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IT1159351B - Circuito di arbitraggio a struttura distribuita per le richieste di accesso al bus di un sistema multiprocessore - Google Patents

Circuito di arbitraggio a struttura distribuita per le richieste di accesso al bus di un sistema multiprocessore

Info

Publication number
IT1159351B
IT1159351B IT67111/83A IT6711183A IT1159351B IT 1159351 B IT1159351 B IT 1159351B IT 67111/83 A IT67111/83 A IT 67111/83A IT 6711183 A IT6711183 A IT 6711183A IT 1159351 B IT1159351 B IT 1159351B
Authority
IT
Italy
Prior art keywords
referee
circuit
multiprocessor system
distributed structure
bus requests
Prior art date
Application number
IT67111/83A
Other languages
English (en)
Other versions
IT8367111A0 (it
Inventor
Giuseppe Nicolo Capizzi
Marcello Melgara
Original Assignee
Cselt Centro Studi Lab Telecom
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Cselt Centro Studi Lab Telecom filed Critical Cselt Centro Studi Lab Telecom
Priority to IT67111/83A priority Critical patent/IT1159351B/it
Publication of IT8367111A0 publication Critical patent/IT8367111A0/it
Priority to US06/575,837 priority patent/US4621342A/en
Priority to DE8484101083T priority patent/DE3466814D1/de
Priority to EP84101083A priority patent/EP0118731B1/en
Priority to DE198484101083T priority patent/DE118731T1/de
Application granted granted Critical
Publication of IT1159351B publication Critical patent/IT1159351B/it

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/368—Handling requests for interconnection or transfer for access to common bus or bus system with decentralised access control
    • G06F13/374—Handling requests for interconnection or transfer for access to common bus or bus system with decentralised access control using a self-select method with individual priority code comparator

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
IT67111/83A 1983-02-03 1983-02-03 Circuito di arbitraggio a struttura distribuita per le richieste di accesso al bus di un sistema multiprocessore IT1159351B (it)

Priority Applications (5)

Application Number Priority Date Filing Date Title
IT67111/83A IT1159351B (it) 1983-02-03 1983-02-03 Circuito di arbitraggio a struttura distribuita per le richieste di accesso al bus di un sistema multiprocessore
US06/575,837 US4621342A (en) 1983-02-03 1984-02-01 Arbitration circuitry for deciding access requests from a multiplicity of components
DE8484101083T DE3466814D1 (en) 1983-02-03 1984-02-02 Distributed-structure circuit for arbitrating the access requests to the bus of a multiprocessor system
EP84101083A EP0118731B1 (en) 1983-02-03 1984-02-02 Distributed-structure circuit for arbitrating the access requests to the bus of a multiprocessor system
DE198484101083T DE118731T1 (de) 1983-02-03 1984-02-02 Verteilte-strukturschaltung fuer die zuteilung von zugriffsanforderungen zu dem bus eines multiprozessorssystems.

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT67111/83A IT1159351B (it) 1983-02-03 1983-02-03 Circuito di arbitraggio a struttura distribuita per le richieste di accesso al bus di un sistema multiprocessore

Publications (2)

Publication Number Publication Date
IT8367111A0 IT8367111A0 (it) 1983-02-03
IT1159351B true IT1159351B (it) 1987-02-25

Family

ID=11299662

Family Applications (1)

Application Number Title Priority Date Filing Date
IT67111/83A IT1159351B (it) 1983-02-03 1983-02-03 Circuito di arbitraggio a struttura distribuita per le richieste di accesso al bus di un sistema multiprocessore

Country Status (4)

Country Link
US (1) US4621342A (it)
EP (1) EP0118731B1 (it)
DE (2) DE3466814D1 (it)
IT (1) IT1159351B (it)

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EP0132161B1 (en) * 1983-07-19 1988-06-15 Nec Corporation Apparatus for controlling a plurality of interruption processings
DE3535436A1 (de) * 1984-10-05 1986-04-10 Mitsubishi Denki K.K., Tokio/Tokyo Arbitrationssystem fuer einen datenbus
US4688172A (en) * 1984-11-13 1987-08-18 International Business Machines Corporation Initialization apparatus for a data processing system with a plurality of input/output and storage controller connected to a common bus
US4760521A (en) * 1985-11-18 1988-07-26 White Consolidated Industries, Inc. Arbitration system using centralized and decentralized arbitrators to access local memories in a multi-processor controlled machine tool
US4881195A (en) * 1986-11-26 1989-11-14 Rockwell International Corp. Multi-requester arbitration circuit
US5241661A (en) * 1987-03-27 1993-08-31 International Business Machines Corporation DMA access arbitration device in which CPU can arbitrate on behalf of attachment having no arbiter
JPS6468838A (en) * 1987-09-10 1989-03-14 Hitachi Ltd Level processing information processor
US5089953A (en) * 1987-12-28 1992-02-18 Sundstrand Corporation Control and arbitration unit
US5140680A (en) * 1988-04-13 1992-08-18 Rockwell International Corporation Method and apparatus for self-timed digital data transfer and bus arbitration
US5349690A (en) * 1988-05-11 1994-09-20 Digital Equipment Corporation Fair arbitration scheme for arbitrating between multiple nodes in a computer system seeking control of a common bus
US5218703A (en) * 1988-07-07 1993-06-08 Siemens Aktiengesellschaft Circuit configuration and method for priority selection of interrupts for a microprocessor
US4972342A (en) * 1988-10-07 1990-11-20 International Business Machines Corporation Programmable priority branch circuit
US5311461A (en) * 1988-12-30 1994-05-10 International Business Machines Corp. Programmable priority and selective blocking in a compute system
US5203007A (en) * 1988-12-30 1993-04-13 International Business Machines Corporation Overriding programmable priority and selective blocking in a computer system
US5101482A (en) * 1989-10-16 1992-03-31 Massachusetts Institute Of Technology Bus-based priority arbitration system with optimum codewords
US5187781A (en) * 1989-12-19 1993-02-16 International Business Machines Corp. Shared hardware interrupt circuit for personal computers
US5301333A (en) * 1990-06-14 1994-04-05 Bell Communications Research, Inc. Tree structured variable priority arbitration implementing a round-robin scheduling policy
US5222218A (en) * 1990-06-27 1993-06-22 Zilog, Inc. System with devices connected in sequence to receive information in a predetermined order
JP2511588B2 (ja) * 1990-09-03 1996-06-26 インターナショナル・ビジネス・マシーンズ・コーポレイション デ―タ処理ネットワ―ク、ロックを獲得させる方法及び直列化装置
JPH0648477B2 (ja) * 1990-09-17 1994-06-22 日通工株式会社 マルチプロセッサシステムにおけるバス獲得方法
GB2250161B (en) * 1990-11-23 1995-04-26 Sony Corp Arbitration circuits for processors and processing systems having pluralities of processors
JP2855298B2 (ja) * 1990-12-21 1999-02-10 インテル・コーポレーション 割込み要求の仲裁方法およびマルチプロセッサシステム
US5613128A (en) * 1990-12-21 1997-03-18 Intel Corporation Programmable multi-processor interrupt controller system with a processor integrated local interrupt controller
US5515523A (en) * 1991-06-03 1996-05-07 Digital Equipment Corporation Method and apparatus for arbitrating conflicts by monitoring number of access requests per unit of time in multiport memory systems
JPH05257851A (ja) * 1991-12-30 1993-10-08 Apple Computer Inc データの転送の順序を制御させる装置
US5640599A (en) * 1991-12-30 1997-06-17 Apple Computer, Inc. Interconnect system initiating data transfer over launch bus at source's clock speed and transfering data over data path at receiver's clock speed
US5887196A (en) * 1991-12-30 1999-03-23 Apple Computer, Inc. System for receiving a control signal from a device for selecting its associated clock signal for controlling the transferring of information via a buffer
US5848297A (en) * 1991-12-30 1998-12-08 Apple Computer, Inc. Control apparatus for maintaining order and accomplishing priority promotion in a computer interconnect
US5410677A (en) * 1991-12-30 1995-04-25 Apple Computer, Inc. Apparatus for translating data formats starting at an arbitrary byte position
US5202999A (en) * 1992-01-10 1993-04-13 Digital Equipment Corporation Access request prioritization and summary device
US5307466A (en) * 1992-04-30 1994-04-26 International Business Machines Corporation Distributed programmable priority arbitration
EP0575651A1 (en) * 1992-06-24 1993-12-29 International Business Machines Corporation Multiprocessor system
US5630173A (en) * 1992-12-21 1997-05-13 Apple Computer, Inc. Methods and apparatus for bus access arbitration of nodes organized into acyclic directed graph by cyclic token passing and alternatively propagating request to root node and grant signal to the child node
WO1994015304A1 (en) * 1992-12-21 1994-07-07 Apple Computer, Inc. Method and apparatus for transforming an arbitrary topology collection of nodes into an acyclic directed graph
AU1261995A (en) * 1993-12-16 1995-07-03 Intel Corporation Multiple programmable interrupt controllers in a multi-processor system
US5740383A (en) * 1995-12-22 1998-04-14 Cirrus Logic, Inc. Dynamic arbitration priority
US6385678B2 (en) * 1996-09-19 2002-05-07 Trimedia Technologies, Inc. Method and apparatus for bus arbitration with weighted bandwidth allocation
KR100252752B1 (ko) * 1997-06-26 2000-04-15 김영환 다단계 제어 버스 중재장치
RU2204160C2 (ru) * 2001-07-31 2003-05-10 Военный инженерно-космический университет Устройство приоритетного обслуживания запросов
US7024505B2 (en) * 2002-03-28 2006-04-04 Seagate Technology Llc Fair arbitration method in a distributed arbitration system
US6886051B2 (en) * 2002-03-28 2005-04-26 Seagate Technology Llc Device discovery method and apparatus
US20050114415A1 (en) * 2003-11-24 2005-05-26 Texas Instruments Incorporated Low-latency circular priority selector
TWI355822B (en) * 2007-12-20 2012-01-01 Realtek Semiconductor Corp Circuit and method for setting data and their appl
US8984194B2 (en) * 2011-01-21 2015-03-17 Numia Medical Technology Llc Multi-master bus arbitration and resource control
CN119759814A (zh) * 2024-12-11 2025-04-04 华大半导体(成都)有限公司 等权重仲裁电路

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US4009470A (en) * 1975-02-18 1977-02-22 Sperry Rand Corporation Pre-emptive, rotational priority system
US4121285A (en) * 1977-04-01 1978-10-17 Ultronic Systems Corporation Automatic alternator for priority circuit
US4326250A (en) * 1979-10-10 1982-04-20 Magnuson Computer Systems, Inc. Data processing apparatus with serial and parallel priority
DE3009308A1 (de) * 1980-03-11 1981-10-01 Siemens AG, 1000 Berlin und 8000 München Verfahren und anordnung zum uebertragen von datensignalen
FR2494010B1 (fr) * 1980-11-07 1986-09-19 Thomson Csf Mat Tel Dispositif d'arbitration decentralisee de plusieurs unites de traitement d'un systeme multiprocesseur
US4375639A (en) * 1981-01-12 1983-03-01 Harris Corporation Synchronous bus arbiter
US4482950A (en) * 1981-09-24 1984-11-13 Dshkhunian Valery Single-chip microcomputer

Also Published As

Publication number Publication date
US4621342A (en) 1986-11-04
IT8367111A0 (it) 1983-02-03
DE118731T1 (de) 1985-11-21
DE3466814D1 (en) 1987-11-19
EP0118731A1 (en) 1984-09-19
EP0118731B1 (en) 1987-10-14

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