IT1149289B - Tunnel epitassiali - Google Patents
Tunnel epitassialiInfo
- Publication number
- IT1149289B IT1149289B IT19614/80A IT1961480A IT1149289B IT 1149289 B IT1149289 B IT 1149289B IT 19614/80 A IT19614/80 A IT 19614/80A IT 1961480 A IT1961480 A IT 1961480A IT 1149289 B IT1149289 B IT 1149289B
- Authority
- IT
- Italy
- Prior art keywords
- tunnels
- epitaxial
- epitaxial tunnels
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/81—Bodies
- H10H20/819—Bodies characterised by their shape, e.g. curved or truncated substrates
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01D—MEASURING NOT SPECIALLY ADAPTED FOR A SPECIFIC VARIABLE; ARRANGEMENTS FOR MEASURING TWO OR MORE VARIABLES NOT COVERED IN A SINGLE OTHER SUBCLASS; TARIFF METERING APPARATUS; MEASURING OR TESTING NOT OTHERWISE PROVIDED FOR
- G01D15/00—Component parts of recorders for measuring arrangements not specially adapted for a specific variable
- G01D15/16—Recording elements transferring recording material, e.g. ink, to the recording surface
- G01D15/18—Nozzles emitting recording material
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/117—Shapes of semiconductor bodies
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/124—Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/40—Crystalline structures
- H10D62/405—Orientations of crystalline planes
-
- H10P14/271—
-
- H10P14/278—
-
- H10P14/2911—
-
- H10P14/2926—
-
- H10P14/3411—
-
- H10P14/3421—
-
- H10W40/47—
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Led Devices (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
- Recrystallisation Techniques (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Light Receiving Elements (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US06/017,230 US4178197A (en) | 1979-03-05 | 1979-03-05 | Formation of epitaxial tunnels utilizing oriented growth techniques |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| IT8019614A0 IT8019614A0 (it) | 1980-02-01 |
| IT1149289B true IT1149289B (it) | 1986-12-03 |
Family
ID=21781460
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| IT19614/80A IT1149289B (it) | 1979-03-05 | 1980-02-01 | Tunnel epitassiali |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US4178197A (it) |
| EP (1) | EP0016910B1 (it) |
| JP (1) | JPS55118629A (it) |
| CA (1) | CA1130474A (it) |
| DE (1) | DE3062651D1 (it) |
| IT (1) | IT1149289B (it) |
Families Citing this family (24)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0049286B1 (en) * | 1980-04-10 | 1988-03-02 | Massachusetts Institute Of Technology | Methods of producing sheets of crystalline material and devices amde therefrom |
| US4485551A (en) * | 1981-03-02 | 1984-12-04 | Rockwell International Corporation | NPN Type lateral transistor separated from substrate by O.D.E. for minimal interference therefrom and method for producing same |
| GB8518353D0 (en) * | 1985-07-20 | 1985-08-29 | Plessey Co Plc | Heterostructure device |
| US4806996A (en) * | 1986-04-10 | 1989-02-21 | American Telephone And Telegraph Company, At&T Bell Laboratories | Dislocation-free epitaxial layer on a lattice-mismatched porous or otherwise submicron patterned single crystal substrate |
| US4862232A (en) * | 1986-09-22 | 1989-08-29 | General Motors Corporation | Transistor structure for high temperature logic circuits with insulation around source and drain regions |
| US4797718A (en) * | 1986-12-08 | 1989-01-10 | Delco Electronics Corporation | Self-aligned silicon MOS device |
| US4714685A (en) * | 1986-12-08 | 1987-12-22 | General Motors Corporation | Method of fabricating self-aligned silicon-on-insulator like devices |
| US4749441A (en) * | 1986-12-11 | 1988-06-07 | General Motors Corporation | Semiconductor mushroom structure fabrication |
| CA1296816C (en) * | 1987-02-28 | 1992-03-03 | Kenji Yamagata | Process for producing a semiconductor article |
| US4760036A (en) * | 1987-06-15 | 1988-07-26 | Delco Electronics Corporation | Process for growing silicon-on-insulator wafers using lateral epitaxial growth with seed window oxidation |
| US4762382A (en) * | 1987-06-29 | 1988-08-09 | Honeywell Inc. | Optical interconnect circuit for GaAs optoelectronics and Si VLSI/VHSIC |
| JP2746301B2 (ja) * | 1988-10-20 | 1998-05-06 | キヤノン株式会社 | 半導体整流素子 |
| US4971928A (en) * | 1990-01-16 | 1990-11-20 | General Motors Corporation | Method of making a light emitting semiconductor having a rear reflecting surface |
| DE4034000C1 (it) * | 1990-10-25 | 1991-10-17 | Siemens Ag, 8000 Muenchen, De | |
| JPH05291307A (ja) * | 1991-12-05 | 1993-11-05 | Samsung Electron Co Ltd | 化合物半導体装置及びその製造方法 |
| US5336626A (en) * | 1992-03-18 | 1994-08-09 | Samsung Electronics Co., Ltd. | Method of manufacturing a MESFET with an epitaxial void |
| US5328559A (en) * | 1992-09-08 | 1994-07-12 | Ic Sensors, Inc. | Groove width trimming |
| US5467415A (en) * | 1994-04-22 | 1995-11-14 | At&T Corp. | Method for making polarization independent silica optical circuits |
| US6093330A (en) * | 1997-06-02 | 2000-07-25 | Cornell Research Foundation, Inc. | Microfabrication process for enclosed microstructures |
| US6180536B1 (en) | 1998-06-04 | 2001-01-30 | Cornell Research Foundation, Inc. | Suspended moving channels and channel actuators for microfluidic applications and method for making |
| JP3399841B2 (ja) * | 1998-06-25 | 2003-04-21 | 科学技術振興事業団 | 光導波路付き探針及びその製造方法 |
| NL2003357C2 (en) * | 2009-08-14 | 2011-02-15 | Univ Twente | Method for manufacturing a single crystal nano-wire. |
| KR102135836B1 (ko) * | 2016-05-20 | 2020-07-21 | 루미레즈 엘엘씨 | 발광 디바이스를 위한 p형 층을 형성하는 방법 |
| EP3459117B1 (en) | 2016-05-20 | 2021-04-14 | Lumileds LLC | Method of forming a p-type layer for a light emitting device |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3425879A (en) * | 1965-10-24 | 1969-02-04 | Texas Instruments Inc | Method of making shaped epitaxial deposits |
| US3621346A (en) * | 1970-01-28 | 1971-11-16 | Ibm | Process for forming semiconductor devices with polycrystalline diffusion pathways and devices formed thereby |
| DE2120388A1 (de) * | 1970-04-28 | 1971-12-16 | Agency Ind Science Techn | Verbindungshalbleitervorrichtung |
| US3884733A (en) * | 1971-08-13 | 1975-05-20 | Texas Instruments Inc | Dielectric isolation process |
| JPS4934391A (it) * | 1972-07-26 | 1974-03-29 | ||
| JPS5338954B2 (it) * | 1972-07-26 | 1978-10-18 | ||
| US3855690A (en) * | 1972-12-26 | 1974-12-24 | Westinghouse Electric Corp | Application of facet-growth to self-aligned schottky barrier gate field effect transistors |
| US3984173A (en) * | 1974-04-08 | 1976-10-05 | Texas Instruments Incorporated | Waveguides for integrated optics |
| JPS5342679B2 (it) * | 1975-01-08 | 1978-11-14 | ||
| JPS5814644B2 (ja) * | 1975-05-14 | 1983-03-22 | 松下電器産業株式会社 | ヒカリデンソウロノセイゾウホウホウ |
| JPS5244173A (en) * | 1975-10-06 | 1977-04-06 | Hitachi Ltd | Method of flat etching of silicon substrate |
-
1979
- 1979-03-05 US US06/017,230 patent/US4178197A/en not_active Expired - Lifetime
-
1980
- 1980-01-09 CA CA343,368A patent/CA1130474A/en not_active Expired
- 1980-01-18 JP JP371480A patent/JPS55118629A/ja active Granted
- 1980-01-23 DE DE8080100327T patent/DE3062651D1/de not_active Expired
- 1980-01-23 EP EP80100327A patent/EP0016910B1/fr not_active Expired
- 1980-02-01 IT IT19614/80A patent/IT1149289B/it active
Also Published As
| Publication number | Publication date |
|---|---|
| US4178197A (en) | 1979-12-11 |
| CA1130474A (en) | 1982-08-24 |
| DE3062651D1 (en) | 1983-05-19 |
| JPS55118629A (en) | 1980-09-11 |
| JPS639369B2 (it) | 1988-02-29 |
| IT8019614A0 (it) | 1980-02-01 |
| EP0016910B1 (fr) | 1983-04-13 |
| EP0016910A1 (fr) | 1980-10-15 |
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