IN2012DN02001A - - Google Patents
Download PDFInfo
- Publication number
- IN2012DN02001A IN2012DN02001A IN2001DEN2012A IN2012DN02001A IN 2012DN02001 A IN2012DN02001 A IN 2012DN02001A IN 2001DEN2012 A IN2001DEN2012 A IN 2001DEN2012A IN 2012DN02001 A IN2012DN02001 A IN 2012DN02001A
- Authority
- IN
- India
- Prior art keywords
- signal
- accurate
- signals
- prioritizer
- information
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04W—WIRELESS COMMUNICATION NETWORKS
- H04W72/00—Local resource management
- H04W72/12—Wireless traffic scheduling
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B7/00—Radio transmission systems, i.e. using radiation field
- H04B7/24—Radio transmission systems, i.e. using radiation field for communication between two or more posts
- H04B7/26—Radio transmission systems, i.e. using radiation field for communication between two or more posts at least one of which is mobile
- H04B7/2603—Arrangements for wireless physical layer control
- H04B7/2606—Arrangements for base station coverage control, e.g. by using relays in tunnels
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04W—WIRELESS COMMUNICATION NETWORKS
- H04W84/00—Network topologies
- H04W84/02—Hierarchically pre-organised networks, e.g. paging networks, cellular networks, WLAN [Wireless Local Area Network] or WLL [Wireless Local Loop]
- H04W84/04—Large scale networks; Deep hierarchical networks
- H04W84/042—Public Land Mobile systems, e.g. cellular systems
- H04W84/047—Public Land Mobile systems, e.g. cellular systems using dedicated repeater stations
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Mobile Radio Communication Systems (AREA)
- Radio Relay Systems (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
A device is provided having a local oscillator (LO) configured to generate a first signal having timing information, frequency information, phase information or combinations thereof. The device also includes a prioritizer comprising at least two inputs, each input configured to receive a respective second signal having timing information, frequency information, phase information or combinations thereof. The prioritizer is configured to determine an accuracy of at least one second signal of the at least two second signals in relation to a second signal assigned to be a most accurate of the at least two second signals. The prioritizer is also configured to order the at least two second signals from most accurate to least accurate. The LO is disciplined to correct an offset error of the LO relative to a most accurate second signal that is available to the device, based on the order of the at least two second signals.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US23951409P | 2009-09-03 | 2009-09-03 | |
| PCT/CA2010/001351 WO2011026224A1 (en) | 2009-09-03 | 2010-09-03 | Frequency division duplexing in multihop relay networks |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| IN2012DN02001A true IN2012DN02001A (en) | 2015-07-24 |
Family
ID=43648804
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| IN2001DEN2012 IN2012DN02001A (en) | 2009-09-03 | 2010-09-03 |
Country Status (8)
| Country | Link |
|---|---|
| EP (2) | EP4164140A1 (en) |
| JP (1) | JP2013504223A (en) |
| CN (1) | CN102792609A (en) |
| BR (1) | BR112012004801A2 (en) |
| CA (1) | CA2773052C (en) |
| IN (1) | IN2012DN02001A (en) |
| RU (1) | RU2012112888A (en) |
| WO (1) | WO2011026224A1 (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5187909B2 (en) * | 2009-10-05 | 2013-04-24 | 株式会社エヌ・ティ・ティ・ドコモ | Mobile communication method and relay node |
| US9014110B2 (en) * | 2011-07-18 | 2015-04-21 | Qualcomm Incorporated | Enabling half-duplex operation |
| US9954606B2 (en) * | 2013-05-22 | 2018-04-24 | Lg Electronics Inc. | Structure of full duplex radio region applied in radio access system supporting full duplex radio scheme, and method and apparatus for allocating same |
| CN106937365B (en) * | 2015-12-31 | 2018-06-26 | 深圳友讯达科技股份有限公司 | Wireless self-organizing network nodes communication means and node |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20100278123A1 (en) * | 2007-12-10 | 2010-11-04 | Nortel Networks Limited | Wireless communication frame structure and apparatus |
-
2010
- 2010-09-03 IN IN2001DEN2012 patent/IN2012DN02001A/en unknown
- 2010-09-03 WO PCT/CA2010/001351 patent/WO2011026224A1/en not_active Ceased
- 2010-09-03 BR BR112012004801A patent/BR112012004801A2/en not_active Application Discontinuation
- 2010-09-03 EP EP22196827.4A patent/EP4164140A1/en not_active Withdrawn
- 2010-09-03 RU RU2012112888/07A patent/RU2012112888A/en not_active Application Discontinuation
- 2010-09-03 CA CA2773052A patent/CA2773052C/en active Active
- 2010-09-03 CN CN2010800496505A patent/CN102792609A/en active Pending
- 2010-09-03 EP EP10813196.2A patent/EP2474107A4/en not_active Ceased
- 2010-09-03 JP JP2012527164A patent/JP2013504223A/en active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| EP4164140A1 (en) | 2023-04-12 |
| JP2013504223A (en) | 2013-02-04 |
| CA2773052C (en) | 2018-05-22 |
| RU2012112888A (en) | 2013-10-20 |
| EP2474107A4 (en) | 2016-05-25 |
| EP2474107A1 (en) | 2012-07-11 |
| CA2773052A1 (en) | 2011-03-10 |
| CN102792609A (en) | 2012-11-21 |
| WO2011026224A1 (en) | 2011-03-10 |
| BR112012004801A2 (en) | 2017-05-30 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| TW200709587A (en) | Circuit for measuring an eye size of data, and method of measuring the eye size of data | |
| WO2012145117A3 (en) | Memory components and controllers that calibrate multiphase synchronous timing references | |
| WO2010117739A3 (en) | Time-to-digital converter (tdc) with improved resolution | |
| WO2008153645A3 (en) | Memory comprising : clock generator, clock circuit, voltage regulator | |
| EP3515030A3 (en) | Rf carrier synchronization and phase alignment methods and systems | |
| WO2007149212A3 (en) | Rfid device with first clock for data acquisition and/or calibration of second clock | |
| MY151999A (en) | A phased array antenna and a method of operating a phased array antenna | |
| WO2010033436A3 (en) | Techniques for generating fractional clock signals | |
| TW200710413A (en) | Test circuit, delay circuit, clock generating circuit, and image sensor | |
| EP2360834A3 (en) | Frequency multiplier | |
| WO2009154906A3 (en) | Apparatus and method for multi-phase clock generation | |
| WO2009149104A3 (en) | Time, frequency, and location determination for femtocells | |
| WO2013063193A3 (en) | Clock drift profile determination in navigation system receivers | |
| IN2012DN02001A (en) | ||
| IN2014CN03136A (en) | ||
| WO2008108374A1 (en) | Signal measuring apparatus and testing apparatus | |
| WO2009086060A8 (en) | Method and apparatus for generating or utilizing one or more cycle-swallowed clock signals | |
| GB2546613A (en) | Systems and methods for clock synchronization in a data acquisition system | |
| WO2013015853A3 (en) | Shift register with two-phase non-overlapping clocks | |
| GB201211425D0 (en) | Data tranfer between clock domains | |
| WO2008114307A1 (en) | Delay circuit and method for testing the circuit | |
| TW200627809A (en) | Digital frequency/phase recovery circuit | |
| TW200743930A (en) | Adjusting circuit for delay circuit | |
| TW200729738A (en) | Calibration circuitry | |
| WO2013174377A3 (en) | Circuit arrangement and method for calibrating activation signals for voltage-controlled oscillators |