HK40081660B - Solder alloy, solder paste, solder preform and solder joint - Google Patents

Description

Soft solder alloys, solder paste, soft solder preforms and brazed joints

This application is a divisional application of the application filed on December 14, 2019, with application number 201980081823.2 and invention title "Soft solder alloy, solder paste, soft solder preform and brazed joint".

Technical Field

This invention relates to Sn-Sb-Ag-Cu based solder alloys, as well as solder paste, solder preforms, and brazed joints containing Sn-Sb-Ag-Cu based solder alloys.

Background Technology

Previously, silicon (Si) was the primary material used in semiconductor chips. In recent years, however, the requirements for semiconductor properties have become more stringent, and the operating environments have become increasingly demanding, leading to its replacement by materials such as SiC, GaAs, and GaN. These semiconductor chips possess the excellent characteristics of packaged semiconductor devices and can be used in optical devices such as power transistors and LEDs.

These semiconductor components can operate at high temperatures, with their solder joints to substrates sometimes reaching around 250–280°C. Therefore, there is a need for high-temperature solder that does not melt during semiconductor component operation. Furthermore, semiconductor components generate heat during operation, thus requiring connection to heat sinks such as metal cores or ceramic plates for heat dissipation. High-temperature solder is also required for this application.

Among the known high-temperature solders, Au-20Sn solder alloy, which is an Au-Sn eutectic alloy, is an example. The eutectic temperature of Au-20Sn solder alloy is 280°C, so it can be used at temperatures above 250°C but below 280°C, but it is a very expensive material.

Therefore, as examples of lower-cost high-temperature solder alloys, Sn-Sb-based solder alloys, Bi-based solder alloys, Zn-based solder alloys, and Ag-containing sintered body alloys were studied. Among them, Sn-Sb-based solder alloys showed superior thermal conductivity, corrosion resistance, and bonding strength compared to Bi-based, Zn-based solder alloys, and solder alloys containing Ag sintered body powder.

In this patent document 1, to suppress cracking and bending of the ceramic matrix that may occur during bonding, a Sn-Sb-Ag-Cu alloy is disclosed as a solder with a melting point lower than that of a silver-copper alloy. It is stated that the solder described in the embodiments of this document has a melting temperature of 400°C or higher, and the Sn content is suppressed to 50% by weight or less. Furthermore, the embodiments of this document disclose an alloy composition with Sb of 40% by weight or more and an alloy composition with Ag of 70% by weight or more.

Patent Document 2 discloses a solder alloy with Sn and Sb as the main components and containing more than 10% by weight Ag and more than 10% by mass Cu, in order to achieve a high melting point and improved Vickers hardness. In the invention described in this document, the Ag content and Cu content are adjusted as described above so that the melting point falls within the range of 306 to 348°C.

Existing technical documents

Patent documents

Patent Document 1: Japanese Patent No. 3238051

Patent Document 2: Japanese Patent Application Publication No. 2003-290976

Summary of the Invention

The problem the invention aims to solve

However, the solder and solder alloys described in Patent Documents 1 and 2 are designed with melting point in mind. Due to the high content of Sb, Ag, and Cu, they exhibit hard intermetallic compounds after reflow soldering. During cooling after heating, the molten solder solidifies before the semiconductor chip and substrate cool. Therefore, due to the difference in the linear expansion coefficients of the semiconductor chip and the substrate, significant stress is applied to the solder joint. In recent years, semiconductor devices have become significantly miniaturized, accompanied by a trend towards thinner semiconductor chips. As a result, stress during cooling concentrates on the semiconductor chip rather than on the solder joint, gradually leading to semiconductor chip breakage. Patent Document 1 discloses an alloy with a melting point lowered to around 400-500°C to prevent cracking in the ceramic substrate; however, even this melting point is still high, making it unsuitable for thin semiconductor chips. Patent Document 2 evaluates Vickers hardness as a mechanical property, but it shows a Vickers hardness more than 10 times that of conventional alloys, thus failing to prevent semiconductor chip breakage.

Furthermore, the Sn-Sb-Ag-Cu alloys described in Patent Documents 1 and 2 have high melting points, resulting in the presence of incompletely melted compounds during heating. These compounds grow upon cooling after heating, forming brazed joints. These alloys are in a semi-molten state upon heating, thus exhibiting high viscosity. During cooling, the voids formed by compound growth are not expelled to the outside but remain inside the brazed joint. These residual voids significantly reduce the heat dissipation characteristics of the brazed joint. Since most of the heat generated in a semiconductor device is dissipated through the substrate, using the aforementioned alloys makes heat difficult to conduct to the substrate, preventing the semiconductor device from achieving its intended performance.

Furthermore, Patent Document 1 describes limiting Sn to 50% by weight or less to suppress voids. In the embodiments of Patent Document 1, the Sb content in the alloy composition consisting of Sn, Sb, Ag, and Cu is 40% by weight or more, or the Ag content is 50% by weight or more. In the solder described in Patent Document 1, Ag and Sb are components used to adjust the melting point, but the excessive addition of these two elements causes the viscosity of the molten solder to increase with the melting point, leaving voids in the solder joint and deteriorating the heat dissipation characteristics of the solder joint. As a result, the performance of the semiconductor device that it should have been able to achieve is not obtained. Patent Document 2 describes adding 10% by weight of Ag and also adding 10% by weight or more of Cu, but in this case, similar to Patent Document 1, the viscosity of the molten solder increases, and voids remain in the solder joint upon cooling, thus deteriorating the heat dissipation characteristics of the solder joint.

Furthermore, semiconductor devices carrying high currents sometimes generate heat up to around 220°C, thus requiring brazed joints that demonstrate high bonding strength at 250°C.

Therefore, the objective of this invention is to provide a solder alloy, solder paste, solder preform, and solder joint that suppress chip breakage during cooling, improve the heat dissipation characteristics of the solder joint, and exhibit high bonding strength at high temperatures.

Solution for solving the problem

The inventors investigated the cause of semiconductor chip breakage when the content of Sb, Ag, and Cu is increased to achieve a higher melting point, as is the case with conventional alloy designs. In conventional alloy designs, it is believed that the melting point is increased by increasing the content of Sb, Ag, and Cu to suppress the precipitation of the low-melting-point Sn phase. As a result, the solder alloy hardens, leading to semiconductor chip breakage.

In order to mitigate the stress generated during cooling using brazing joints, the inventors conducted in-depth research on alloy composition and microstructure. In recent years, semiconductor chips have shown a tendency to experience reduced durability due to thinning; therefore, the inventors conceived of a method to induce the precipitation of the Sn phase, which was avoided in conventional alloy designs. This is because the Sn phase, compared to intermetallic compounds, is more flexible and can mitigate the stress applied during cooling.

The Sn phase precipitates through solidification segregation during cooling, but Sb, Ag, and Cu readily cause Sn compounds to precipitate. Therefore, when the content of these elements is high, the Sn phase will not precipitate. Furthermore, as described in Patent Document 1, when the Sb and Ag contents are high and the Sn content is low, Sn is consumed in the precipitation of SnSb compounds and _Ag3Sn compounds, thus the Sn phase will not precipitate. As described in Patent Document 2, when the Cu content is high, Sn is consumed in the precipitation of _{Cu6Sn5 compounds} and _Cu3Sn compounds, thus the Sn phase will essentially not precipitate.

Thus, in Sn-Sb-Ag-Cu solder alloys, in order for the Sn phase to precipitate to a certain extent, even if Sn is consumed by the precipitation of Ag _3Sn compound, Cu _{6Sn 5} compound, Cu _3Sn compound, and SnSb compound, it must exist alone in the solder alloy. The inventors conceived that if the Sn phase precipitates moderately, damage to the semiconductor chip can be suppressed.

On the other hand, when reducing the Sb, Ag, and Cu content to cause a large amount of Sn phase precipitation, crosslinking the semiconductor chip to the substrate using Ag _3Sn , Cu _{6Sn 5} , Cu _3Sn , and SnSb compounds was not performed. As a result, if the semiconductor device generates heat during operation, the bonding strength of the brazed joint decreases. However, even with Sn phase precipitation, high bonding strength at high temperatures can be obtained by crosslinking the semiconductor chip to the substrate using Ag _3Sn , Cu _{6Sn 5} , Cu _3Sn , and SnSb compounds. The inventors conceived of obtaining high bonding strength at high temperatures by moderately precipitating the Sn phase and crosslinking the semiconductor chip to the substrate using Ag _3Sn , Cu _{6Sn 5} , Cu _3Sn , and SnSb compounds.

In addition to the above-mentioned concept, the inventors also conceived that if the Sn phase precipitates appropriately, it can be used as a high-temperature solder.

Furthermore, the inventors investigated the cause of voids. They believed that conventional alloys have high melting points, causing residual compounds to grow during solidification after heating, leading to crosslinking between the semiconductor chip and the substrate. While increasing the heating temperature transforms the semi-molten state into a fully molten state, reflow soldering conditions are determined considering various factors such as the heat resistance of the substrate and semiconductor components, making them difficult to change easily. Therefore, the inventors conceived of a method where, under the same heating conditions as before, the molten solder becomes fully molten, reducing its viscosity, thereby eliminating voids. Upon cooling, compounds precipitate, leading to crosslinking between the semiconductor chip and the substrate.

Based on this concept, the inventors conducted a detailed investigation of the Sb, Ag, and Cu contents and obtained the following insights: when these contents are within a specified range, it can be used as a high-temperature solder, and it can suppress chip breakage after reflow soldering, improve the heat dissipation characteristics of the solder joint by reducing the void amount, and show a high-temperature bonding strength of the same degree as before, thus completing the present invention.

The present invention derived from this insight is as follows.

(1) A soft solder alloy, characterized in that it has the following alloy composition: by mass % Sb: 9.0 to 33.0%, Ag: more than 4.0% and less than 11.0%, Cu: more than 2.0% and less than 6.0%, and the balance being Sn.

(2) The soft solder alloy according to (1) above, wherein the alloy composition further contains at least one of Al: 0.003-0.1%, Fe: 0.01-0.2%, and Ti: 0.005-0.4% by mass%.

(3) The solder alloy according to (1) or (2) above, wherein the alloy composition further contains at least one of P, Ge and Ga in a total of 0.002 to 0.1% by mass%.

(4) The solder alloy according to any one of (1) to (3) above, wherein the alloy composition further contains at least one of Ni, Co and Mn in a total of 0.01 to 0.5% by mass.

(5) The solder alloy according to any one of (1) to (4) above, wherein the alloy composition further contains at least one of Au, Ce, In, Mo, Nb, Pd, Pt, V, Ca, Mg, Si, Zn, Bi and Zr in a total of 0.0005 to 1% by mass%.

(6) The solder alloy according to any one of (1) to (5) above, wherein the solder alloy has the following alloy structure: at least one of Ag ₃ Sn compound, Cu ₆ Sn ₅ compound and Cu ₃ Sn compound, SnSb compound, and the balance being composed of Sn phase.

(7) The solder alloy according to (6) above, wherein the alloy microstructure is Sn phase: 5.6 to 70.2% in atomic percent.

(8) The solder alloy according to (6) or (7) above, wherein the alloy structure, in atomic percent, is Ag ₃ Sn compound: 5.8-15.4%, Cu ₆ Sn ₅ compound: 5.6-15.3%, Cu ₃ Sn compound: 1.0-2.8%, SnSb compound: 16.8-62.1%.

(9) The solder alloy according to any one of (1) to (8) above, wherein the composition of the aforementioned alloy satisfies the following formulas (1) to (3).

(2/3)≤x≤(15.3/16.3)(2)

78≤Ag×Cu×Sb≤2029(3)

In equations (1) and (3) above, Ag, Cu and Sb represent the contents (mass%) of the aforementioned alloy composition.

(10) A solder alloy, characterized in that it is an alloy having Ag, Cu and Sb, with the balance being Sn.

It has the following alloy structure: at least one of Ag ₃ Sn compound, Cu ₃ Sn compound and Cu ₆ Sn ₅ compound, SnSb compound, and the balance consisting of Sn phase.

(11) The solder alloy according to (10) above, wherein the alloy structure is Sn phase with an atomic percentage of 5.6 to 70.2%.

(12) The solder alloy according to (10) or (11) above, wherein the alloy structure, in atomic percent, is Ag ₃ Sn compound: 5.8-15.4%, Cu ₆ Sn ₅ compound: 5.6-15.3%, Cu ₃ Sn compound: 1.0-2.8%, SnSb compound: 16.8-62.1%.

(13) A solder paste having any one of the solder alloys described in (1) to (12) above.

(14) A solder preform having any one of the solder alloys described in (1) to (12) above.

(15) A brazing joint having any one of the soft solder alloys described in (1) to (12) above.

Attached Figure Description

Figure 1 shows a cross-sectional SEM photograph and a cross-sectional EDS element mapping diagram of the brazed joint. Figure 1(a) is a SEM photograph of Comparative Example 2, Figure 1(b) is a cross-sectional EDS element mapping diagram of Comparative Example 2, Figure 1(c) is a SEM photograph of Invention Example 6, and Figure 1(d) is a cross-sectional EDS element mapping diagram of Invention Example 6.

Figure 2 shows optical microscope images and X-ray planar images of the chip after soldering. Figure 2(a) is an optical microscope image of Invention Example 6, Figure 2(b) is an X-ray planar image of Invention Example 6, Figure 2(c) is an optical microscope image of Invention Example 10, Figure 2(d) is an X-ray planar image of Invention Example 10, Figure 2(e) is an optical microscope image of Comparative Example 7, and Figure 2(f) is an X-ray planar image of Comparative Example 7.

Figure 3 is a graph showing the shear strength of Invention Examples 1, 5, 6, 10 and Comparative Examples 1 to 8.

Detailed Implementation

The present invention will be described in more detail below. In this specification, the "%" referring to the composition of the solder alloy is "mass %" unless otherwise specified.

1. Soft solder alloy

(1) Sb: 9.0–33.0%

Sb induces the precipitation of SnSb compounds, crosslinking the semiconductor chip with the substrate and thereby improving the bonding strength at high temperatures. Furthermore, if the Sb content is within the aforementioned range, the amount of Sn phase precipitation can be controlled, maintaining high resistance to chip breakage. Moreover, Sb optimizes the viscosity of the molten solder, suppressing void formation and thus improving the heat dissipation characteristics of the brazed joint.

If the Sb content is below 9.0%, the amount of SnSb compound precipitated will be low, failing to improve the bonding strength at high temperatures. Furthermore, the amount of residual Sn will be relatively high, thus accelerating the dissolution of the liner metal on the semiconductor chip side. The disappearance of the liner metal could potentially lead to semiconductor chip peeling. The lower limit for the Sb content is 9.0% or more, preferably 15.0% or more, more preferably 19.5% or more, and even more preferably 20.0% or more.

On the other hand, if the Sb content exceeds 33.0%, a large amount of SnSb compound will precipitate, thus the Sn phase will not be fully precipitated, reducing the stress mitigation effect and becoming a cause of chip breakage. The upper limit of the Sb content is 33.0% or less, preferably 30.0% or less, more preferably 27.5% or less, and even more preferably 27.0% or less.

(2) Ag: More than 4.0% but less than 11.0%

Ag induces the precipitation of _Ag3Sn compounds, thereby crosslinking the semiconductor chip with the substrate and improving the bonding strength at high temperatures. Furthermore, if the Ag content is within the aforementioned range, the amount of Sn phase precipitation can be controlled, maintaining high resistance to chip breakage.

If the Ag content is below 4.0%, the amount of Ag _3Sn compound precipitated is low, which cannot improve the bonding strength at high temperatures. Furthermore, the amount of Sn residue is relatively high, thus accelerating the dissolution of the liner metal on the semiconductor chip side. The disappearance of the liner metal could potentially lead to semiconductor chip peeling. The lower limit of the Ag content is above 4.0%, preferably above 4.1%, and more preferably above 7.0%.

On the other hand, if the Ag content is 11.0% or higher, a large amount of Ag ₃ Sn compound will precipitate, thus the Sn phase will not precipitate, reducing the stress mitigation effect and becoming a cause of chip breakage. The upper limit of Ag content is below 11.0%, preferably below 10.9%, and more preferably below 10.0%.

(3) Cu: exceeding 2.0% but less than 6.0%

Cu induces the precipitation of Cu _{6Sn 5} and Cu _3Sn compounds, thereby crosslinking the semiconductor chip with the substrate and improving the bonding strength at high temperatures. Furthermore, if the Cu content is within the aforementioned range, the amount of Sn phase precipitation can be controlled, maintaining high chip crack resistance. Additionally, Cu can suppress Cu diffusion on the lead frame side.

If the Cu content is below 2.0%, Cu _{6Sn 5} and Cu _3Sn compounds will not be fully precipitated, failing to improve the bonding strength at high temperatures. Furthermore, the relatively higher Sn residue will accelerate the dissolution of the liner metal on the semiconductor chip side, potentially leading to liner metal loss and semiconductor chip peeling. The lower limit for Cu content is above 2.0%, preferably above 2.1%, and more preferably above 3.0%.

On the other hand, if the Cu content is 6.0% or higher, a large amount of Cu _{6Sn 5} and Cu _3Sn compounds will precipitate, thus promoting Sn consumption. This reduces the stress mitigation effect during solidification shrinkage after reflow soldering, becoming a cause of chip breakage. Furthermore, if a large amount of Sn is consumed in the formation of these compounds, the melting point of the solder alloy will not decrease, and the molten solder will not reach a fully molten state during reflow soldering. Therefore, a reduction in the viscosity of the molten solder cannot be expected, making it difficult to remove voids. The upper limit of the Cu content is below 6.0%, preferably below 5.9%, and more preferably below 4.0%.

(4) At least one of Al: 0.003–0.1%, Fe: 0.01–0.2%, and Ti: 0.005–0.4%.

These elements are any elements that can improve the bonding strength at high temperatures by suppressing the coarsening of SnSb compounds, _{Cu6Sn5 compounds} , _Cu3Sn compounds, and _Ag3Sn compounds (hereinafter, suitable as “Sn compounds”).

These elements preferentially precipitate during solidification, becoming seeds for the formation of inhomogeneous nuclei and preventing the coarsening of each phase. When nucleation of each phase is promoted through the formation of inhomogeneous nuclei, the starting point for nucleation increases, thus increasing the area of grain boundaries in the solder alloy and dispersing the stress applied to the grain boundaries. Therefore, the coarsening of Sn compounds can be suppressed.

Furthermore, regarding the content of Al, Ti, and Fe, considering the minimum content of Al and the maximum content of all three, the amounts are trace, ranging from 0.003% to 0.7%. Therefore, compounds with melting points higher than Sn compounds precipitate as metallic compounds containing Al, Ti, Fe, Sb, Ag, and Cu, and the amount precipitated is also very small, resulting in trace amounts of Sb, Ag, and Cu being consumed in the solder alloy. Thus, the Sn compound ensures a precipitation amount sufficient for cross-linking between the semiconductor chip and the substrate, thereby maintaining high bonding strength at high temperatures. Moreover, even at a high content of only 0.7%, these elements do not affect the void suppression effect of the present invention, exhibiting excellent heat dissipation characteristics.

To fully realize the aforementioned effects, the Al content is preferably 0.003–0.1%, more preferably 0.01–0.08%, and even more preferably 0.02–0.05%. The Fe content is preferably 0.01–0.2%, more preferably 0.02–0.15%, and even more preferably 0.02–0.1%. The Ti content is preferably 0.005–0.4%, more preferably 0.01–0.3%, and even more preferably 0.02–0.2%.

(5) At least one of P, Ge and Ga in a total of 0.002 to 0.1%.

These are any elements that are effective in reducing the surface tension of molten solder and facilitating the removal of voids by suppressing oxidation. The total content of these elements is preferably 0.002–0.1%, more preferably 0.003–0.01%. There are no particular limitations on the content of each element, but to fully realize the aforementioned effects, the content of P is preferably 0.002–0.005%, the content of Ge is preferably 0.002–0.006%, and the content of Ga is preferably 0.002–0.02%.

(6) Total of at least one of Ni, Co, and Mn: 0.01–0.5%

These elements are any elements that can refine the microstructure of the solder alloy and improve the bonding strength at high temperatures. The total content of these elements is preferably 0.01–0.5%, more preferably 0.01–0.05%. There are no particular limitations on the content of each element, but to fully realize the aforementioned effects, the Ni content is preferably 0.02–0.07%, the Co content is preferably 0.02–0.04%, and the Mn content is preferably 0.02–0.05%.

(7) At least one of Au, Ce, In, Mo, Nb, Pd, Pt, V, Ca, Mg, Si, Zn, Bi and Zr in total of 0.0005% to 1%.

These elements are any elements that may be included without impairing the effects of the present invention. The total content of Au, Ce, In, Mo, Nb, Pd, Pt, V, Ca, Mg, Si, Zn, Bi and Zr is preferably 0.0005 to 1%, more preferably 0.02 to 0.03%.

The preferred content of Au is 0.0005–0.02%. The preferred content of Ce is 0.0005–0.049%. The preferred content of In is 0.0005–0.9%. The preferred content of Mo is 0.0005–0.0025%. The preferred content of Nb is 0.0005–0.003%. The preferred content of Pd is 0.0005–0.03%. The preferred content of Pt is 0.0005–0.012%. The preferred content of V is 0.0005–0.012%. The preferred content of Ca is 0.0005–0.1%. The preferred content of Mg is 0.0005–0.0045%. The preferred content of Si is 0.0005–0.1%. The preferred content of Zn is 0.01–0.2%. The preferred content of Bi is 0.02–0.3%. When Zr is present, the content is 0.0005% to 0.0008%.

(8) Alloy structure

The solder alloy of the present invention preferably has the following alloy structure: Ag ₃ Sn compound, Cu ₃ Sn compound, Cu ₆ Sn ₅ compound and SnSb compound, with the balance being Sn phase.

The solder alloy of the present invention contains a specified amount of Sb, Ag, and Cu, thereby crosslinking the semiconductor chip to the substrate using a compound of Sn with Sb, Ag, and Cu. That is, the solder joint formed by the solder alloy of the present invention bonds the semiconductor chip to the substrate using the aforementioned high-melting-point Sn compound. Therefore, even if the semiconductor chip generates heat and the temperature of the solder alloy rises, the bonding strength can be maintained at high temperatures, enabling its use as a high-temperature solder.

Furthermore, the solder alloy of the present invention contains specified amounts of Sb, Ag, and Cu, thereby allowing an appropriate amount of Sn phase to precipitate. When this appropriate amount of Sn phase precipitates within the Sn compound, the Sn phase, being softer than the Sn compound, exhibits a stress-relieving effect, mitigating the stress exerted on the semiconductor chip during cooling. Additionally, the melting point of the solder alloy is lowered; therefore, during reflow soldering, the molten solder becomes completely molten, voids are expelled from the molten solder, and heat dissipation characteristics are improved.

To achieve this effect, the solder alloy of the present invention preferably has the following alloy structure: SnSb compound precipitated from Sn and Sb, _Ag3Sn compound precipitated from Sn and Ag, _Cu6Sn5 compound and _Cu3Sn compound precipitated from Sn and Cu, and the balance being composed of the Sn phase. These compounds have high melting points and crosslink the semiconductor chip to the substrate. Thus, even when the balance is composed of the Sn phase, it also functions as a high-temperature solder. To obtain such _an alloy structure, the above alloy composition is further preferred.

From this perspective, the preferred precipitation amounts of _Ag3Sn compounds are 5.8–15.4 atoms, _{Cu6Sn5 compounds} are 5.6–15.3 atoms, _Cu3Sn compounds are 1.0–2.8 atoms, SnSb compounds are 16.8–62.1 atoms, and Sn phase is 5.6–70.2 atoms.

In the solder alloy of the present invention, the lower limit of the precipitation amount of _Ag3Sn compound is more preferably 5.9 atomic% or more, and even more preferably 13.9 atomic% or more. The upper limit of the precipitation amount of _Ag3Sn compound is more preferably 15.2 atomic% or less, even more preferably 14.3 atomic% or less, particularly preferably 14.2 atomic% or less, and most preferably 14.1 atomic% or less.

In the solder alloy of the present invention, the lower limit of the precipitation amount of Cu ₆ Sn ₅ compound is more preferably 8.0 atomic% or more, and even more preferably 10.5 atomic% or more. The upper limit of the precipitation amount of _{Cu 6} Sn ₅ compound is more preferably 12.5 atomic% or less, and even more preferably 10.6 atomic% or less.

In the solder alloy of the present invention, the lower limit of the precipitation amount of Cu ₃ Sn compound is more preferably 1.5 atomic% or more. The upper limit of the precipitation amount of _{Cu 3} Sn compound is more preferably 2.4 atomic% or less, and even more preferably 1.9 atomic% or less.

In the solder alloy of the present invention, the lower limit of the SnSb compound precipitation is more preferably 17.2 atomic% or more, and even more preferably 37.5 atomic% or more. The upper limit of the SnSb compound precipitation is more preferably 61.1 atomic% or less, and even more preferably 50.7 atomic% or less.

In the solder alloy of the present invention, the lower limit of the Sn phase content is more preferably 11.3 atomic% or more, and even more preferably 22.7 atomic% or more. The upper limit of the Sn phase content is more preferably 56.7 atomic% or less, even more preferably 38.2 atomic% or less, and particularly preferably 35.9 atomic% or less.

It should be noted that the alloy structure in this invention may contain compounds different from the four types mentioned above to a degree that does not affect the effect of the solder alloy in this invention.

(9)(1)～(3)

The alloy composition of the solder alloy of the present invention preferably satisfies the following formulas (1) to (3).

(2/3)≤x≤(15.3/16.3)(2)

78≤Ag×Cu×Sb≤2029(3)

In equations (1) and (3) above, Ag, Cu and Sb represent the content (mass%) in the alloy composition.

Equation (1) is a preferred method for the precipitation of the Sn phase after the precipitation of the aforementioned Sn compound. The coefficients in Equation (1) are obtained to ensure Sn residue. First, the coefficients of Ag will be explained in detail.

The unit cell lattice of the Ag ₃ Sn compound consists of 3 Ag atoms and 1 Sn atom. Therefore, the elemental ratio of the Ag ₃ Sn compound is Ag _at. : Sn _at. = 3 : 1. Furthermore, the atomic weight of Ag is 107.8682, and the atomic weight of Sn is 118.71. Therefore, the mass ratio of the Ag ₃ Sn compound is Ag _mass : Sn _mass = 107.8682 × 3 : 118.71 ≈ 73.16 : 26.84. Thus, the amount of Sn required for the precipitation of the Ag ₃ Sn compound, expressed in terms of Ag content, is denoted as "(26.84/73.16) × Ag".

Next, the coefficients of Cu will be described in detail. _Cu will precipitate _Cu6Sn5 and _Cu3Sn compounds, so it is necessary to determine the Sn content required for each to precipitate. Here, the amount of _Cu6Sn5 and _Cu3Sn compounds precipitated varies depending on the heating conditions during reflow soldering, but in general reflow soldering processes, it is assumed _that the amount of _Cu6Sn5 compounds precipitated is greater than that of _Cu3Sn compounds. The ratio of each precipitate is approximately _Cu6Sn5 : _Cu3Sn = 8:2, but it is easy to imagine that this ratio will vary. Therefore, as _a preferred embodiment of the present invention, and as _a scope for fully utilizing the effects of the present invention, in equation (1), the coefficient of _{Cu6Sn5 compounds} is multiplied by "x" from equation (2), and then multiplied by the coefficient of _Cu3Sn compounds "1-x".

That is, in addition to the Sn content, equation (1) also considers the precipitation amount of compounds derived from Cu in equation (2). Therefore, the semiconductor chip and the substrate are crosslinked with _Ag3Sn compound, _{Cu6Sn5 compound} , _Cu3Sn compound and SnSb compound, and the Sn phase is moderately precipitated. Therefore, high bonding strength at high temperature can be obtained, and the breakage of the semiconductor chip can be suppressed. In addition, by strictly controlling the alloy composition to moderately precipitate the Sn phase, the melting point is slightly lowered, which can also suppress voids.

The unit cell lattice of the Cu _{6Sn 5} compound consists of 6 Cu atoms and 5 Sn atoms. Therefore, the elemental ratio of the Cu _{6Sn 5} compound is Cu _at. : Sn _at. = 6 : 5. Furthermore, the atomic weight of Cu is 63.546 and the atomic weight of Sn is 118.71. Therefore, the mass ratio of the Cu _{6Sn 5} compound is Cu _mass : Sn _mass = 63.546 × 6 : 118.71 × 5 ≈ 39.11 : 60.89. Thus, the amount of Sn required for the precipitation of the Cu _{6Sn 5} compound, expressed in terms of Cu content, is denoted as "(60.89/39.11) × Cu".

The unit cell lattice of the Cu _3Sn compound consists of 3 Cu atoms and 1 Sn atom. Therefore, the elemental ratio of the Cu _3Sn compound is Cu _at. : Sn _at. = 3 : 1. Furthermore, the atomic weight of Cu is 63.546, and the atomic weight of Sn is 118.71. Therefore, the mass ratio of the Cu _3Sn compound is Cu _mass : Sn _mass = 63.546 × 3 : 118.71 ≈ 61.63 : 38.37. Thus, the amount of Sn required for the precipitation of the Cu _3Sn compound, expressed in terms of Cu content, is denoted as "(38.37/61.63) × Cu".

Similarly, the unit lattice of the SnSb compound consists of one Sb and one Sn atom, therefore, the elemental ratio of the SnSb compound is Sb _at. : Sn _at. = 1 : 1. Furthermore, the atomic weight of Sb is 121.76 and the atomic weight of Sn is 118.71, therefore, the mass ratio of the SnSb compound is Sb _mass : Sn _mass = 121.76 : 118.71 ≈ 50.63 : 49.37. Therefore, the amount of Sn required for the precipitation of the SnSb compound, expressed in terms of Sb content, is denoted as "(49.37/50.63) × Sb".

Based on the above, in the preferred embodiment of the present invention, if the Sn content obtained by quantifying the total Sn content is 1.2 or more, then the Sn phase precipitates. The lower limit of formula (1) is preferably 1.2 or more, more preferably 1.28 or more, further preferably 1.29 or more, particularly preferably 1.66 or more, and most preferably 1.68 or more.

On the other hand, it is desirable to control the amount of Sn phase precipitation appropriately so that the semiconductor chip and the substrate can be cross-linked with a series of Sn compounds, and higher bonding strength can be easily obtained at high temperatures. From this point of view, the upper limit of formula (1) is preferably 6.50 or less, more preferably 4.42 or less, further 4.25 or less, further more preferably 4.17 or less, particularly preferably 2.38 or less, and most preferably 2.34 or less.

In this invention, x in equation (2) can be obtained as follows. First, observe the cross-section of the solder alloy and determine the area ratio of Cu ₆ Sn ₅ and Cu ₃ Sn. Assuming that the same area ratio is obtained by observing any cross-section, the obtained area ratio is regarded as the volume ratio. Multiply the obtained volume ratio by the density of each compound to calculate the mass ratio, and convert the mass ratio to the atomic ratio of each compound. x and 1-x can be obtained from the ratio of the atomic ratios of each compound. When the ratio of the amount of precipitation is Cu ₆ Sn ₅ : Cu ₃ Sn = 8 (atomic %) : 2 (atomic %), x becomes x = 8/(8+2) = 0.8, and 1-x becomes 0.2.

Then, based on the result calculated from equation (2), the middle part of equation (1) can be obtained.

Furthermore, the solder alloy of the present invention contains Sn and Sb, Ag, and Cu, which facilitate the precipitation of compounds, preferably the Sn compound and Sn phase described above. Therefore, the preferred alloy composition of the solder alloy of the present invention is that the contents of Sb, Ag, and Cu are within the ranges described above, satisfying equations (1) and (2), and also satisfying equation (3).

Equation (3) is the product of the Sb content, Ag content, and Cu content. The balanced addition of these elements ensures that when equation (3) is satisfied in the solder alloy, the precipitation of specific Sn compounds does not increase, thus suppressing the coarsening of specific Sn compounds. Therefore, it is speculated that this can improve the bonding strength at high temperatures. The lower limit of equation (3) is preferably 78 or more, further preferably 360.0 or more, further more preferably 377.0 or more, particularly preferably 483.0 or more, and most preferably 800.0 or more. The upper limit of equation (3) is preferably 2029 or less, more preferably 1357 or less, further preferably 1320 or less, and particularly preferably 1080 or less.

(9) Balance: Sn

The balance of the solder alloy of the present invention is Sn. In addition to the aforementioned elements, it may contain unavoidable impurities. The presence of unavoidable impurities does not affect the aforementioned effects.

2. Solder paste

The solder alloy of the present invention can be used as solder paste. Solder paste is formed by mixing solder alloy powder with a small amount of flux to form a paste. The solder alloy of the present invention can be used as solder paste in the mounting of electronic components to printed circuit boards based on reflow soldering. The flux used in the solder paste can be either water-soluble or non-water-soluble flux.

Furthermore, there are no particular restrictions on the flux used in the solder paste of the present invention, as long as it can be soldered using conventional methods. Therefore, fluxes containing commonly used rosin, organic acids, activators, and solvents can be used. There are no particular restrictions on the mixing ratio of the metal powder component and the flux component in the present invention, but the content of the solder alloy powder relative to the total mass of the solder paste is preferably 5-15%.

3. Preform

The solder alloy of the present invention can be used as a preform. Examples of shapes that can be used as preforms include washers, rings, granules, discs, strips, wires, and balls.

Preformed solder filler metal can be used in reducing atmosphere bonding without flux. Reducing atmosphere bonding has the following characteristics: since there is no contamination of the joint from flux, not only is it unnecessary to clean the joint in post-bonding processes, but the voids in the brazed joint can also be reduced.

4. Brazed joints

The brazing joint of the present invention is used to bond and connect a semiconductor chip in a semiconductor package to a ceramic substrate, a printed circuit board, a metal substrate, etc. Specifically, the brazing joint of the present invention is called an electrode connection portion and can be formed using general soft soldering conditions.

5. Other

Furthermore, the manufacturing method of the solder alloy of the present invention can be carried out according to conventional methods. The bonding method using the solder alloy of the present invention can be carried out, for example, in a reflow oven according to conventional methods. The melting temperature of the solder alloy during flow soldering can be approximately 20°C higher than the liquidus temperature. Additionally, when bonding using the solder alloy of the present invention, the precipitation of the Sn phase can be controlled by considering the cooling rate during solidification. For example, the brazed joint can be cooled at a cooling rate of 2-3°C/second or higher. Other bonding conditions can be appropriately adjusted according to the alloy composition of the solder alloy.

The solder alloy of the present invention can be manufactured by using low-alpha radiation materials as its raw materials. Such low-alpha radiation alloys, when used for forming solder bumps around memory chips, can suppress soft errors.

Example

Test substrates were fabricated using solder alloys with the alloy compositions shown in Table 1. The presence or absence of chip breakage after reflow soldering was observed, the area ratio of voids was calculated, and the shear strength at high temperature was evaluated as the bonding strength. Furthermore, the amount of each compound deposited was determined from the area ratio of each compound in each alloy composition.

• Evaluation of the presence or absence of chip breakage

The solder alloys listed in Table 1 were atomized to form solder powder. This powder was then mixed with a soldering flux (manufactured by Senju Metals Co., Ltd., product name: D128) composed of rosin, solvent, activator, thixotropic agent, and organic acid to prepare solder pastes for each solder alloy. The solder paste contained 90% solder alloy powder by weight. The solder paste was printed onto a 3.0 mm thick Cu substrate using a 100 μm thick metal mask. Fifteen silicon chips were then mounted using an mounting machine, and reflow soldering was performed at a maximum temperature of 350°C for 60 seconds to create a test substrate.

Fifteen chips mounted on the test substrate were observed using an optical microscope at 30x magnification to visually confirm whether the chips were cracked. Cases where no cracks were found were recorded as "none," and cases where even one crack was found were recorded as "yes."

• Area ratio of voids

For the test substrate prepared for the "Evaluation of the Presence or Absence of Chip Fracture," a Toshiba FA System Engineering Co., Ltd. TOSMICRON-6090FP X-ray planar image was displayed on a monitor at 30x magnification. Voids were detected from the displayed image, and the area ratio was calculated. The image analysis software used for the detection was Soft Imaging System's Scandium. The contrast between voids and other areas in the image differs, allowing for identification through image analysis, enabling the detection and measurement of only voids. Voids were marked with "◎" if their area relative to the silicon chip area was less than 4.8%, marked with "〇" if it was between 4.8% and 5%, and marked with "×" if it exceeded 5%.

Shear strength at high temperatures

Using a Rhesca STR-1000 joint strength testing machine, three test substrates were randomly selected from those prepared for the "Evaluation of the Presence or Absence of Chip Breakage" at a high temperature (260°C), and the shear strength of the brazed joints was measured as the bond strength. The test conditions for shear strength were as follows: shear speed set to 24 mm/min and test height set to 100 μm. Then, the shear strength was measured for each silicon chip, and its average was calculated. Cases with an average value of 30 N or more were marked with "◎", cases with an average value of 20 N or more but less than 30 N were marked with "〇", and cases with an average value less than 20 N were marked with "×".

• Amount of compound precipitation

The solder alloy, composed of the alloys shown in Table 1, was adjusted. The adjusted solder alloy was then mirror-polished, and a 1000x cross-sectional photograph was taken using SEM. EDS analysis was performed on this photograph, and the area of the compounds was determined using Scandium image analysis software manufactured by Seika Sangyo Co., Ltd. The area of each compound was divided by the area of the joint captured in the SEM photograph to calculate the area fraction (%). Assuming the obtained area fraction was a volume fraction, the volume fraction was multiplied by the density of each compound to calculate the mass ratio, which was then converted to an atomic ratio to obtain the precipitation amount (atomic %) of each compound.

In addition, in equation (1), the ratio of the precipitation amounts of Cu ₆ Sn ₅ and Cu ₃ Sn is obtained by calculating the ratio of the precipitation amounts of the two compounds based on their atomic ratios, thus obtaining "x" and "1-x" in the middle of equation (2). Substituting this result into equation (1), the values in the middle of equation (1) for each alloy composition are calculated.

The results are shown in Tables 1 and 2.

[Table 1]

[Table 2]

As clearly shown in Tables 1 and 2, none of the invention examples resulted in chip breakage, exhibiting low void area ratio, excellent heat dissipation characteristics, _and high high-temperature shear strength. Furthermore, it was confirmed that, in addition to Invention Examples 1 and 10, these examples simultaneously possessed _Ag3Sn , _Cu6Sn5 , _Cu3Sn , and SnSb/Sn phases, with each precipitation amount falling within the aforementioned preferred range. Therefore, Invention Examples 2-9 and Invention Examples 11-34 all satisfy equations (1)-(3), thus, the appropriate precipitation of the Sn phase further fully realizes the aforementioned effects.

On the other hand, in Comparative Example 1, the contents of Sb, Ag, and Cu were all low, resulting in poor high-temperature shear strength. Comparative Example 2 had a low Sb content, therefore, its high-temperature shear strength was also poor. Comparative Example 3 had a high Sb content, therefore, chip breakage occurred. Therefore, it was impossible to measure the shear strength at high temperatures.

Comparative Example 4 had a low Ag content, therefore its shear strength at high temperatures was poor. Comparative Example 5 had a high Ag content, therefore the chip cracked. Therefore, it was impossible to measure the shear strength at high temperatures. Comparative Example 6 had a low Cu content, therefore its shear strength at high temperatures was poor. Comparative Example 7 had a high Cu content, therefore the chip cracked and a large number of voids were generated. Therefore, it was impossible to measure the shear strength at high temperatures. Comparative Example 8 had high contents of Sb, Ag, and Cu, resulting in chip cracking and a large number of voids. Therefore, it was impossible to measure the shear strength at high temperatures.

Next, the microstructure of the brazed joint is explained using cross-sectional photographs. Figure 1 shows a cross-sectional SEM photograph and a cross-sectional EDS element mapping diagram of the brazed joint. Figure 1(a) is a SEM photograph of Comparative Example 2, Figure 1(b) is a cross-sectional EDS element mapping diagram of Comparative Example 2, Figure 1(c) is a SEM photograph of Invention Example 6, and Figure 1(d) is a cross-sectional EDS element mapping diagram of Invention Example 6.

As clearly shown in Figure 1, in this embodiment, SnSb, _Cu6Sn5 , _{Cu3Sn ,} and _Ag3Sn are formed. Furthermore, as shown in Figure 1(d), the brazed joint of Invention Example 6 exhibits excellent balance between _Cu6Sn5 and _Cu3Sn . Additionally, as shown in Figure 1(d), in Invention Example 6, the Sn _phase is separated by the compound, indicating that the test substrate and the silicon chip are cross-linked by the compound. Therefore, Invention Example 6 demonstrates excellent shear strength at high temperatures. On the other hand, as shown in Figure 1(b), in Comparative Example 2, the Sn phase on the left side of the photograph is connected from near the test substrate to near the silicon chip, and this portion is not cross-linked by the compound. Therefore, Comparative Example 2 exhibits poor shear strength at high temperatures.

Figure 2 shows optical microscope images and X-ray planar images of the soldered chips. Figure 2(a) is an optical microscope image of Invention Example 6, Figure 2(b) is an X-ray planar image of Invention Example 6, Figure 2(c) is an optical microscope image of Invention Example 10, Figure 2(d) is an X-ray planar image of Invention Example 10, Figure 2(e) is an optical microscope image of Comparative Example 7, and Figure 2(f) is an X-ray planar image of Comparative Example 7. It can be seen that in Invention Examples 6 and 10, no chip breakage occurred, and the void area ratio was less than 5%. It can be seen that the void area ratio in Invention Example 6 was even lower than that in Invention Example 10. In contrast, it can be seen that in Comparative Example 7, chip breakage occurred, and the void area ratio far exceeded 5%.

Figure 3 shows the shear strength of Invention Examples 1, 5, 6, 10 and Comparative Examples 1 to 8. In Figure 3, in Comparative Examples 3, 5, 7, and 8, the chip broke, and the shear strength at high temperature could not be measured, so they are blank columns. It is clear from Figure 3 that the Invention Examples all show shear strength at higher temperatures than the Comparative Examples. Furthermore, Invention Examples 5, 6, and 10 all show shear strength at higher temperatures than Invention Example 1.

Claims (14)

1. A soft solder alloy, characterized in that it has the following alloy composition (by mass%): Sb: 9.0–33.0%, Ag: 4.1% or more and less than 11.0%, Cu: more than 2.0% and less than 6.0%, and the balance being Sn. The solder alloy has the following microstructure: _Ag3Sn compound, _{Cu6Sn5 compound} and _Cu3Sn compound, SnSb compound, and the balance being composed of Sn phase. The alloy microstructure, in atomic percent, is: Ag ₃ Sn compound: 13.9–15.4%, Cu ₆ Sn ₅ compound: 5.6–15.3%, Cu ₃ Sn compound: 1.0–2.8%, SnSb compound: 16.8–62.1%. 2. The solder alloy according to claim 1, wherein the alloy composition further comprises at least one of Al: 0.003-0.1%, Fe: 0.01-0.2%, and Ti: 0.005-0.4% by mass%. 3. The solder alloy according to claim 1 or 2, wherein the alloy composition further comprises at least one of P, Ge and Ga in a total mass percentage of 0.002 to 0.1%. 4. The solder alloy according to claim 1 or 2, wherein the alloy composition further comprises at least one of Ni, Co and Mn in a total of 0.01 to 0.5% by mass. 5. The solder alloy according to claim 3, wherein the alloy composition further comprises at least one of Ni, Co and Mn in a total mass percentage of 0.01 to 0.5%. 6. The solder alloy according to claim 1 or 2, wherein the alloy composition further comprises at least one of Au, Ce, In, Mo, Nb, Pd, Pt, V, Ca, Mg, Si, Zn, Bi and Zr in a total of 0.0005 to 1% by mass. 7. The solder alloy according to claim 3, wherein the alloy composition further comprises at least one of Au, Ce, In, Mo, Nb, Pd, Pt, V, Ca, Mg, Si, Zn, Bi and Zr in a total of 0.0005 to 1% by mass. 8. The solder alloy according to claim 4, wherein the alloy composition further comprises at least one of Au, Ce, In, Mo, Nb, Pd, Pt, V, Ca, Mg, Si, Zn, Bi and Zr in a total of 0.0005 to 1% by mass. 9. The solder alloy according to claim 5, wherein the alloy composition further comprises at least one of Au, Ce, In, Mo, Nb, Pd, Pt, V, Ca, Mg, Si, Zn, Bi and Zr in a total of 0.0005 to 1% by mass. 10. The solder alloy according to claim 1 or 2, wherein the alloy microstructure, in atomic percent, is Sn phase: 5.6-70.2%, and the sum of the contents of each compound in the alloy microstructure is 100%. 11. The solder alloy according to claim 1 or 2, wherein the alloy composition satisfies the following formulas (1) to (3). (2/3)≤x≤(15.3/16.3) (2) 78≤Ag×Cu×Sb≤2029     (3) In equations (1) and (3), Ag, Cu, and Sb represent the mass percentages of the alloy composition. 12. A solder paste having a solder alloy according to any one of claims 1 to 11. 13. A solder preform having any one of claims 1 to 11. 14. A brazing joint having a soft solder alloy as described in any one of claims 1 to 11.