HK1234185B - Method for producing a circuit for a chip card module and circuit for a chip card module - Google Patents

Description

The invention relates to the field of smart cards, which are well known to the public and have many uses: payment cards, SIM cards for mobile phones, transport cards, identity cards, etc.

Chip cards include transmission means for transmitting data from the chip to a card reader (read) device or from that device to the card (write). These transmission means can be contactless, contactless, or dual-interface when combining the two previous means. The invention is particularly relevant to the field of dual-interface chip cards. Dual-interface chip cards are called dual if the modes contactless and contactless are managed by a single chip or hybrid if the modes contactless and contactless are managed by two physically distinct chips.

Dual-interface chip boards are usually made of a rigid plastic support such as PVC, PVC/ABS, PET or polycarbonate that makes up the core of the board, in which an electronic module and a separately manufactured antenna are incorporated. The electronic module consists of a generally flexible printed circuit board with an electronic chip (integrated circuit) and contact bands electrically connected to the chip and protruding on the electronic module, on the surface of the support, for an electrical contact connection with a card reader device. Dual-interface chip boards also include at least one antenna to transmit data between the chip and a radio frequency system allowing contactless data read/write.

In the previous art, and in particular in document EP 1 673 715 A2, published under international number WO 2005/038702 A2, it was proposed to connect the antenna on conductive bands made on the side opposite to the one containing the contacts.

The US patent application (US 2013/0062419 A1) describes inductive coupling technology between the module and the board antenna, which is an alternative technique to the electrical connection between the module and the board antenna, developed precisely to avoid certain problems encountered when connecting the module to the antenna in the board receiving that module.

One purpose of the invention is to design dual card modules that are more economical to manufacture.

For this purpose, a manufacturing process for a flexible circuit for a chipboard module according to claim 1 is provided in which an insulating substrate is provided and a single conductive layer supported by this insulating substrate.

The contact can be made by engraving a sheet of electrically conductive material such as a copper alloy, pre-glued and/or laminated onto the insulating substrate, with or without a layer of glue between the insulating substrate and the conductive layer.

In the case of contacts being engraved into the conductive layer after it has been carried back onto one of the substrate faces, this perforation step is advantageously achieved by punching ( punching according to Anglo-Saxon terminology) the insulating substrate before it receives the conductive layer.

In any case, the conductive layer is therefore finally supported by the insulating substrate, with one side facing the insulating substrate and a second side to establish a connection by electrical contact with a smart card reader.

In addition, the conductive layer covers at least part of the connection wells, the first face of which is intended to establish, at the connection well level, an electrical connection with an electronic chip. Generally, the conductive layer completely covers the connection wells to form Borgne holes.

At least two conductive bands, electrically isolated from the contacts, shall also be made in the conductive layer at which the first face of the conductive layer at least partially covers at least one connection well for the connection of an electronic chip to an antenna.

The flexible circuit for a chipboard module thus produced has only one conductive side and saves a layer of conductive material on the other side of the insulating substrate.

For example, five contacts are made in the conductive layer, each for the connection of the mass, power supply, input/output, clock and reset of an electronic chip, and two additional conductive bands are made, each for the connection of one end (or terminal) of an antenna.

The method according to the invention is particularly advantageous when the modules and/or their conductive bands are to be miniaturized, and in particular when the number of contacts connected to the chip can be reduced. The method according to the invention allows the dimensions and orientation of the different conductive bands and contacts in a chipboard module to be optimized.two areas may remain between these two rows, forming on each of them a conductive band. This results in the two conductive bands, each located essentially on either side of the central area for receiving the electronic chip, with the two conductive bands and the central area for receiving the electronic chip spread over a row between the contact rows. This arrangement is particularly advantageous, since in a rectangular chip board the module can be oriented so that the two contact rows, each located essentially on either side of the chip,Each end of the antenna can then be at the level of one edge of the module and its cavity, essentially perpendicular to the smallest side of the board. Since, however, a space must be left between these ends for the chip and its encapsulation resin, a connection well is made for the connection of the electronic chip with the antenna, at the level of each of the two conducting ranges, so that the distance between the wells is greater than the dimension of the cavity saved in the board to receive the electronic chip and its encapsulation resin.

There are several ways to connect the chip to the antenna. For each conductive layer, at least two connection wells can be made, separated by a portion of the insulating substrate. On each conductive layer, one of the connection wells is used for an electrical connection to the electronic chip, and the other for an electrical connection to the antenna. A single well, of sufficient size in a plane parallel to the first and second faces of the conductive layer (e.g. oblong), can also be made to electrically connect the electronic and the antenna in two places on the same conductive layer.The advantage is that the connection (via a well dedicated solely or not to this connection) is made with the electronic chip in an encapsulation area corresponding to an area to be covered with a material protecting the chip and its connections to the contacts and conductive bands.The connection of each conductive band to the antenna can be made after this encapsulation step, and is then made outside the encapsulation zone through a well dedicated solely or not to this connection.

Steps of the process according to the invention may be performed at the same manufacturer or at different manufacturers. For example, the electronic chip may be attached to a chipboard module circuit comprising the insulating substrate and the conductive layer, and then connected through the connection wells, both to the contacts and conductive ranges, at a different manufacturer than the one that manufactured the chipboard module circuit (without the chip and its connection). Connecting an antenna to a chipboard module circuit supporting a chip (possibly already encapsulated in a protective resin) may also be done at another manufacturer.However, it is understood that in all cases it is essential that the circuit (called single face ) for a chipboard module is suitable for a connection of the chip to the antenna via the conductive layer located on the so-called front face or contact face of the module.

In order to facilitate the integration of the module into a chip board, the insulating substrate can be expected to be essentially made of a thermally reactive adhesive material ( hot-melt according to Anglo-Saxon preheating). In this case, it is also considered non-adhesive in that after the material is applied to the medium on which it is applied, its adhesive properties can be modified by reactivation. The transition temperature of the glass material is generally between 50°C and 100°C (for example, the thermal transition temperature of the glass is usually less than 40°C).

If the adhesive material is to be coated, its viscosity is adjusted so that it can be spread at room temperature on the electrically conductive layer or removable intermediate substrate.

The connection of the antenna to the conductive bands through the connection wells can be done in several ways: by means of a conductive ink or paste filling the connection wells and possibly forming a superthickness ( bumps according to Anglo-Saxon terminology) above the connection wells in relation to the surface of the surface of the substrate opposite the contact face, by means of an ink or paste forming a conductive surface on the ends of the antenna to establish a connection at the bottom of the connection wells, by means of conductors (or wires) conducting the connection wells, etc.

In some cases, particularly when it is necessary to strengthen the attachment and/or connection of the antenna ends to the conductive bands, more than two connection wells at the level of at least one conductive band are made. For example, the connection wells can form a more or less regular network of holes (framing, holes arranged in concentric circles, in a rose, etc.).

These multiple connection wells also allow better control over the diffusion and distribution of the conductive material (paste, ink or glue) more or less liquid.

In another respect, the invention relates to a flexible circuit as claimed 14 for the implementation of a process of manufacturing a chipboard module (or manufacturing a complete chipboard) in which conductive bands on the same side of the module as the contacts for connection to a card reader are used to make an electrical connection between an antenna and an electronic chip.

This flexible circuit has an insulating substrate whose thickness, flexibility and flexibility are compatible with, on the one hand, its implementation in a continuous coil-to-coil manufacturing process ( reel-to-reel according to Anglo-Saxon terminology) and, on the other hand, with the standards and standards determining the maximum thickness of finished chip cards. This substrate is in the form of a sheet with a first and second main faces essentially parallel to each other. This dielectric substrate is generally thin. Its thickness, advantageously at 400μm, is for example in the order of 20 200μm, or even adherent to 50 and 150μm. This substrate is composed of a flexible material (for example, plastic, plastic, plastic, glass, and possibly anise, and sometimes also polyester, PET, etc.).

The insulating substrate has connection wells through its entire thickness to allow a connection between a chip located on the so-called back side (or bonding side according to Anglo-Saxon terminology) and contacts and conductive bands, electrically isolated from contacts, located on the so-called front side (or contact side according to Anglo-Saxon terminology).

The insulating substrate therefore has a conductive layer supported by the insulating substrate, with one side facing the insulating substrate and a second side.

At the contact level, the second side of the conductive layer is intended to establish an electrical contact connection with a smart card reader; the first side of the conductive layer is intended to establish, at the connection well level, an electrical connection with an electronic chip.

At the conductive bands, the first face of the conductive layer shall at least partially cover at least one connection well for the connection of an electronic chip to an antenna.

With this circuit, a chip board module can be made with contacts complying with the standard of the chip board and conductive bands for connection with an antenna. This module then has first Borg hole (connection wells at least partially covered by contacts) for connection of the chip to the contacts and second Borg hole (connection wells at least partially covered by conductive bands) for connection of the chip to the antenna. The connection of the antenna (in the board) to the module can be done either by third Borg holes (connection wells at least partially covered by conductive bands) separate from the second Borg hole, or by the same two Borg holes that serve as the connection of the Borg conductor to the antenna, perpendicular to the conductive bands, and directly conducting the signal through a plane that is perpendicular to the conductive bands, and is electrically perpendicular to the conductive bands.

The mechanical attachment of the electronic chip to the substrate is achieved by at least one known technique such as chip attachment ( die-attach in Anglo-Saxon terminology) and its electrical connection to the contacts and antenna is achieved by at least one known technique such as reverse chip technology ( flip-chip in Anglo-Saxon technology), wire-bonding ( wire-bonding in Anglo-Saxon terminology), etc.

Further features and advantages of the invention will be apparent from the detailed description and the attached drawings on which: Figure 1 shows a schematically in perspective of a chip board intended to receive a chip board circuit according to the invention; Figure 2 shows schematically from the front of the circuit a circuit with contacts, this circuit being intended to make a module for a board such as that shown in Figure 1; Figure 3 shows, in a manner analogous to Figure 2, a variant of the circuit in Figure 2; Figure 4 shows, in a manner analogous to Figure 2, a variant of the circuits in Figures 2 and 3 and its integration into a chip board cavity; Figures 5, 6, 7, 8a, b, c, 9, 10, 11 and 12 show schematically in cut-out different examples of how a circuit such as that in Figures 2 to 4 is to be made, with connections to a chip and an antenna, and Figures 8a and 8b illustrate the structure shown in Figure 8.

In this text, conductor zone 17 is an area (positioned according to ISO 7816-2 and also called contact 6) of the conductor layer 16 which may be used for a contact connection between the chip 8 and a card reader, or an area (also called conductor range 14) of the conductor layer 16 which may be used for a connection, in accordance with the invention, of the chip to an antenna.

As shown in Figure 1, the invention can be used to make a chip card 1 (bank card or other type). This card 1 has a module 2 intended to be inserted into a cavity 3, e.g. milled into the card body 1. This module 2 has an electrically insulating substrate 4 which is advantageously flexible. On one of the faces of this substrate 4, called the front face 5, conductive areas (i.e. contacts and conductive bands) are made, in a layer 16, electrically insulated from each other.

On the other side, called the back face 7, substrate 4 supports a chip 8. Substrate 4 with contacts 6 and conductive bands forms a flexible metallic circuit.

The conductive layer 16 is therefore supported by substrate 4, with a first face facing substrate 4 and a second face for electrical contact connection with a smart card reader (not shown).

An antenna 9 (e.g. Class 1 or Class 2 according to ISO 14443-1) is inserted into the body of the card 1 between two laminated layers.

The contacts are connected to chip 8 with wires (not visible in Figure 1, but shown in Figures 5 to 11) through connection wells 11 located in the substrate 4. These connection wells 11 are for example made by perforating substrate 4, before laminating conductive layer 16 with substrate 4. The conductive layer 16 covers at least part of the connection wells 11, the first face of the conductive layer 16 thus forming the bottom of these connection wells. The connection wells 11 then form burgundy holes and allow access to face 5, from the back face 7, with a single conductor 16 on the front face 5.

The conductive layer 16 may have various metallization layers (Nickel, gold, etc.) on its first and/or second sides. The quality of the first (usually metallized) side of the conductive layer 16 is important to ensure a good connection to the chip, for example by welding conductive wires 13.

As schematically shown in Figure 2, the conductive zones 17 (whose dimensions and position are defined by ISO 7816-2), for example, are eight in number (C1, C2, C3, C4, C5, C6, C7 and C8). The simple rectangular shapes in dotted lines around the references C1 to C8 represent the minimum dimensions and locations of the conductive zones C1 to C8 according to ISO 7816-2.the conductive band C6 is not used and, apart from USB applications, the conductive bands C4 and C8 are not used for dual-interface bank card applications. The conductive bands 14 corresponding to the contacts C6, C4 and C8 are not used in these cases to establish an electrical connection between the chip 8 and a card reader. The conductive bands C4 and C8 can therefore, according to the invention, be used for the connection of the antenna 9.The test method is based on the following principles:

Different ways of making this connection are shown below in relation to Figures 5 to 11.

In one variant, shown in Figure 3, the conductive zones 17 are seven, including five contacts 6 and two conductive bands 14. The surface area of the conductive zone C5 is considerably reduced, the conductive zone C6 is removed, and more generally the conductive surfaces metallized to make contacts 6 and conductive bands 14 are minimised to cover essentially the minimum areas required by ISO 7816-2 for conductive zones C1, C2, C3, C4, C5, C7 and C8, and the connection wells 11 and boreholes 12 are in the same positions as in the previous example.

According to another variant, shown in Figure 4, there are eight conductive zones 17, five of which are 6 contacts (C1, C2, C3, C5 and C7), two conductive zones 14 for the antenna connection and the conductive zone C6 which remains unused except for aesthetic purposes).The circle corresponding to the encapsulation area 15 of chip 8 and its connection wires 13 leaves the oblong holes 12 open for subsequent connection to an antenna 9. Indeed, as shown on the right in Figure 4, the antenna 10 ends are discovered when the cavity is milled 3. When module 2 is inserted into cavity 3, the conductive bands 14 come in relation to the 10 ends (see as indicated by the arrows) to be connected to them.

This configuration is particularly advantageous from the point of view of miniaturization, such as orientation in relation to the antenna.

Since the two conductive bands 14 are each essentially on either side of a central area for receiving the electronic chip 8, the width of the module is essentially limited to three contacts 6 arranged and distributed on a row, so that two rows of three contacts 6 are located on each side of a central area for receiving the electronic chip 8.

The connection of conductive bands to an antenna 9 can be achieved in many ways.

Figure 5 shows a substrate 4 with a conductive layer 16 in which contacts 6 and conductive bands 14 have been made, in cut form, and a chip 8 is fixed on the surface of the substrate opposite to that on which the conductive layer 16 rests. Connection wells 11 allow the chip 8 to be connected to the first face of the conductive layer 16 by means of gold or copper type connecting wires 13. In this embodiment example, the 10 ends of the antenna 9 are also connected to the conductive face of the layer 16 with connecting wires 13.

In the variant shown in Figure 6, a 10 end of antenna 9 and chip 8 is connected to a conductive range 14 through two separate holes (e.g. a 11 round connection well and a 12 oblong bore hole) separated by a portion of substrate 4.

In the variant shown in Figure 7, the wire connection from antenna 9 end 10 to conductive range 14 is replaced by a conductive paste, glue or ink with a charge of 18.

In the variant illustrated in Figures 8a to 8c, a protective film 19 of substrate 4 (especially required in the case of a hot reactive adhesive substrate 4) is used to form a super-thickness of conductive paste 18 (Fig. 8a) of, for example, 50-100μm. The protective film 19 is then removed, for example just before the module is inserted, leaving the conductive paste 18 super-thick (Fig. 8b), to facilitate connection with an antenna 9 end 10 when the module is integrated into the board (Fig. 8c).

In the variant shown in Figure 9, the conductive paste 18 of the borehole 12 is overlaid on the back side of substrate 4 to form a super thickness which will facilitate connection with an antenna 9 end 10 when the module is integrated into a board.

Figure 10 shows a schematically shown conductive band 14 as shown in Figure 4 above. The fixing and connection of the antenna ends to the conductive bands 14 when made in particular as in the embodiments shown in Figures 7 to 9 can be reinforced by using several connection wells 11.

Alternatively, as shown in Figure 11, an empty borehole 12 without encapsulation resin is left so that it can receive a 10 end of antenna 9 with a super-thickness of conductive paste 18 and allow it to be connected to the first face of the conductive band 14.

In the variant shown in Figure 12, a thermo-reactive adhesive substrate 4 with anisotropic conductive properties is used, which allows a direct electrical connection (represented by the black arrow) to be established between a 10 end of antenna 9 and the first face of the conductive range 14 during the hot and pressurized insertion operation.

The use of a substrate 4 with thermo-reactive adhesive properties allows the chip 8 to be directly bonded to the substrate 4 without the addition of glue such as that usually used for bonding the chips ( die attach ) and module 2 in Map 1 (see white arrow). be available in coils to be compatible with a continuous coil-to-coil process;have a thermal resistance of at least up to 130°C;have chemical resistance to solvents, bases and acids used in copper chemical etching processes;have chemical resistance to electrolytic metallization baths (nickel, gold, silver, etc.);allow chip bonding with a shear strength (in kgf) greater than 1,2 times the chip surface (in mm)^{2 and}The first is the use of a soldering iron, which is a soldering iron, which is used to make the solder of the conductive wires 13 connecting the chip 8 to the conductive layer 1 with a force equal to or greater than 3gf.

Substrate 4 compatible with these requirements corresponds for example to Tesa® reference 844 or 8410, Scapa® reference G185A, Cardel® reference HiBond-3 or Nitto® reference FB-ML4. More generally, substrate 4 based on a co-polyamide, nitrile phenolic, polyfine, polyester, polyurethane, EVA, epoxy chemistry may be compatible with the invention.

The thermo-reactive adhesive substrate 4 can be reinforced with woven or non-woven organic textile (PET) or mineral (glass) fibres to improve its mechanical properties during continuous rolling steps. For example, Porcher® reference glass fabrics 1080-Greige or G106 can be continuously hot co-laminated to produce a composite substrate 4 with optimized mechanical properties.

A resin available as pellets, hot coated on textile fibres using for example nozzle injection technology ( slot-die in Anglo-Saxon terminology) can be used to obtain a thermo-reactive adhesive substrate 4.

So with this type of substrate 4, reinforced or not, the chip 8 can be glued directly onto it, whereas in the previous state of the art processes a glue had to be dispensed during an additional step before integrating module 2 into the board 1. This is particularly advantageous especially when the steps of making module 2 on the one hand, and integrating module 2 into a board 1 on the other hand, are carried out by separate operators.

The solution of using an adhesive substrate also avoids the need to apply a layer of glue between a dielectric substrate such as epoxy glass and the conductive layer and to cross-link this glue after rolling the conductive layer on the substrate.

In addition to its thermo-reactive adhesive properties, the substrate can have, as shown above, anisotropic electrical conductivity properties ( ACF for Anisotropic Conductive Film according to the Anglo-Saxon terminology). Substrate with this type of property corresponds for example to the Tesa® references HAF 8412 and HAF 8414 consisting respectively of phenolic and copolyamide masses to ensure the adhesion function, and loaded with glass and copper micro-beads coated with silver with a density of e.g. 60/mm respectively.^{2 and}to provide the electrical conduction function according to the direction of substrate thickness.

Substrate with anisotropic electrical conductivity properties that can be used to make circuits of the invention can also be mechanically reinforced as shown above.

The fact that two functions (collage electrical connection) are carried out on a single element (substrate 4) allows a miniaturisation of the modules for smart cards compared to modules in which these two functions are carried out by different elements.

Claims (23)

1. Method for producing a circuit for a chip card (1) module (2) comprising

   - the provision of an insulating substrate (4),

   - the perforation of the insulating substrate (4) in order to form connection wells (11, 12),

   - the provision of a conductive layer (16) supported by the insulating substrate (4), with a first side turned toward the insulating substrate (4) and a second side,

   - the implementation, in the conductive layer (16), of contacts (6) at the level of which

   ∘ the second side is intended to establish a connection by electrical contact with a chip card reader, and

   ∘ the first side is intended to establish, at the level of connection wells (11, 12), an electrical connection with an electronic chip (8),

   characterized by the fact that at least two conductive lands (14), that are electrically isolated from the contacts (6), are also made in the conductive layer (16), at the level of which lands the first side of the conductive layer (16) at least partially closes up at least one connection well (11, 12) that is intended to connect the electronic chip (8) to an antenna (9) inserted into a chip card (1) body, and the fact that wells (11) for connection with the electronic chip (8) are made in an encapsulation area (15) corresponding to an area intended to be covered by a material for protecting the chip (5) and its connections (13) to the contacts (6) and to the conductive lands (14), and connection wells (12), outside the encapsulation area (15), for connecting the antenna (9) to a conductive land (14), and by the fact that two wells (12) for connecting the antenna (9) to a conductive land (14) that are located outside the encapsulation area (15) are each respectively essentially located on either side of the encapsulation area (15)
2. Method according to Claim 1, in which the connection of the antenna (9) to the module (2) is made by the same connection wells (11, 12), that are at least partially closed up by conductive lands (14), as those serving to connect the chip (5) to the conductive lands (14).
3. Method according to Claim 1 or 2, in which the bulk of the module (2) in terms of width is essentially limited to that of three contacts (6) arranged and distributed in a row.
4. Method according to one of Claims 1 to 3, in which two rows of three contacts (6) are implemented on a module (2), each row respectively being located on either side of a central area that is intended to accommodate the electronic chip (8), and two conductive lands (14), on either side of this central area.
5. Method according to one of the preceding claims, in which contacts (6) distributed in two rows are implemented, the two conductive lands (14) and the central area that is intended to accommodate the electronic chip (8) being distributed in a row that is located between the rows of contacts.
6. Method according to one of the preceding claims, in which a connection well (12) that is intended for the connection of the electronic chip (8) to an antenna (9) is made at the level of each of the two conductive lands (14), the distance between these two connection wells (12), each being respectively located at the level of a conductive land, being greater than the size of a cavity made in the card in order to accommodate the electronic chip (8) and an encapsulation resin.
7. Method according to one of the preceding claims, in which five contacts (6) are made in the conductive layer (16), each respectively for connecting the ground, the power supply, the input/output, the clock and the reset of an electronic chip (8), as well as two additional conductive lands (14).
8. Method according to one of the preceding claims, in which an array of connection holes is made at the level of each conductive land.
9. Method according to one of the preceding claims, in which the connection wells (11, 12) that are at least partially closed up by the conductive lands (14) have a form that is elongated along a plane parallel to the first and second sides of the conductive layer (16).
10. Method according to one of the preceding claims, in which the insulating substrate (4) is essentially composed of an adhesive material.
11. Method according to the preceding claim, in which the adhesive material is thermally reactivatable.
12. Method according to Claim 10 or 11, in which the adhesive material has anisotropic electrical properties.
13. Method according to one of the preceding claims, in which more than two connection wells are made at the level of at least one conductive land (14).
14. Flexible electrical circuit for implementing a method for producing a chip card (1) module (2), this circuit comprising:

    - an insulating substrate (4) with connection wells,

    - a conductive layer (16) supported by the insulating substrate (4), with a first side turned toward the insulating substrate (4) and a second side, with contacts (6) that are formed in this conductive layer (16), at the level of which contacts (6)

    ∘ the second side is intended to establish a connection by electrical contact with a chip card reader, and

    ∘ the first side is intended to establish, at the level of connection wells (11), an electrical connection with an electronic chip (8),

    characterized by the fact that the conductive layer (16) also comprises at least two conductive lands (14), that are electrically isolated from the contacts (6), at the level of which lands the first side of the conductive layer (16) at least partially closes up at least one connection well (11) that is intended to connect an electronic chip to an antenna (9) inserted into a chip card (1) body, and that it comprises wells (11) for connection with the electronic chip (8) in an encapsulation area (15) corresponding to an area intended to be covered by a material for protecting the chip (5) and its connections (13) to the contacts (6) and to the conductive lands (14), and connection wells (12), outside the encapsulation area (15), for connecting the antenna (9) to a conductive land (14), and by the fact that two wells (12) for connecting the antenna (9) to a conductive land (14) that are located outside the encapsulation area (15) are each respectively essentially located on either side of the encapsulation area (15).
15. Circuit according to Claim 14, in which the same connection wells (11, 12) at least partially closed up by conductive lands (14) serving to connect the chip (5) to the conductive lands (14) are intended for the connection of the antenna (9) to the module (2).
16. Circuit according to either of Claims 14 and 15, comprising connection wells (11, 12) that are each at least partially closed up by a conductive land (14) and whose form is elongated along a plane parallel to the first and second sides of the conductive layer.
17. Circuit according to either of Claims 14 and 16, in which the bulk of a module (2) in terms of width is essentially limited to that of three contacts (6) arranged and distributed in a row.
18. Circuit according to one of Claims 14 to 17, comprising two rows of three contacts (6), each row respectively being located on either side of a central area that is intended to accommodate the electronic chip (8), and two conductive lands (14), on either side of this central area.
19. Circuit according to one of Claims 14 to 18, comprising a connection well (12) that is intended for the connection of the electronic chip (8) to an antenna (9) at the level of each of the two conductive lands (14), the distance between these two connection wells (12), each being respectively located at the level of a conductive land, being greater than the size of a cavity made in the card in order to accommodate the electronic chip (8) and an encapsulation resin.
20. Circuit according to one of Claims 14 to 19, comprising five contacts (6) in the conductive layer (16), each respectively for connecting the ground, the power supply, the input/output, the clock and the reset of an electronic chip, as well as two additional conductive lands (14) for connecting an antenna (9).
21. Circuit according to one of Claims 14 to 20, in which the insulating substrate (4) is essentially composed of an adhesive material.
22. Circuit according to the preceding claim, in which the adhesive material is thermally reactivatable.
23. Circuit according to Claim 21 or 22, in which the adhesive material has anisotropic electrical properties.