HK1233800B - Apparatuses and methods for performing asynchronous multicarrier communications - Google Patents

Description

Apparatus and method for performing asynchronous multi-carrier communication

Priority claim

This application claims priority to and the benefit of U.S. Provisional Application No. 62/004,337, filed May 29, 2014, and U.S. Non-Provisional Application No. 14/574,149, filed December 17, 2014, which are hereby incorporated by reference in their entireties for all applicable purposes as if fully set forth below.

Technical Field

Aspects of the present disclosure relate generally to wireless communication systems, and more particularly, to asynchronous multi-carrier communications.

Background Art

Wireless communication networks are widely deployed to provide various communication services such as telephony, video, data, messaging, broadcast, etc. Such networks, which are typically multiple-access networks, support communications for multiple users by sharing the available network resources.

As the demand for mobile broadband access continues to grow, research and development continues to advance wireless communication technologies not only to meet the growing demand for mobile broadband access, but also to advance and enhance the user experience.

Synchronous communication is commonly used in wireless communication networks. However, there are some disadvantages involved in using such synchronous communication.

Summary of the Invention

A simplified summary of one or more aspects of the present disclosure is provided below to provide a basic understanding of such aspects. This summary is not a general overview of all contemplated features of the present disclosure and is neither intended to identify the key or elements of all aspects of the present disclosure nor to delimit the scope of any or all aspects of the present disclosure. Its sole purpose is to provide some concepts of one or more aspects of the present disclosure in a simplified form as a prelude to a more detailed description that will be provided later.

One or more aspects of the present disclosure provide for implementing asynchronous multi-carrier communications. For example, in one aspect, a method for waveform design at a communication link layer to reduce inter-carrier interference between links facilitates asynchronous multi-carrier communications. One such waveform design method for wireless communications involves: generating a waveform comprising one or more carriers at a first wireless device; shaping the waveform to reduce interference between the waveform and adjacent waveforms; and transmitting the shaped waveform asynchronously across a frequency spectrum.

Another aspect relates to a wireless communication device comprising: a unit for generating a waveform comprising one or more carriers at a first wireless device; a unit for shaping the waveform to reduce interference between the waveform and adjacent waveforms; and a unit for asynchronously transmitting the shaped waveform over a frequency spectrum.

Another aspect relates to a wireless communication device comprising at least one processor, a memory communicatively coupled to the at least one processor, and a communication interface communicatively coupled to the at least one processor, wherein the at least one processor is configured to perform the following operations: generate a waveform comprising one or more carriers at a first wireless device; shape the waveform to reduce interference between the waveform and adjacent waveforms; and asynchronously transmit the shaped waveform on a frequency spectrum.

Another aspect relates to a non-transitory computer-readable medium storing computer-executable code, including code for performing the following operations: generating a waveform including one or more carriers at a first wireless device; shaping the waveform to reduce interference between the waveform and adjacent waveforms; and asynchronously transmitting the shaped waveform on a frequency spectrum.

Another aspect relates to a method of wireless communication comprising the steps of: receiving a signal at a first wireless device via asynchronous communication on a spectrum; filtering the received signal to reduce interference from other asynchronous communications on the spectrum; and recovering user data from the filtered signal.

Another aspect relates to a wireless communication device comprising: a unit for receiving a signal at a first wireless device via asynchronous communication on a spectrum; a unit for filtering the received signal to reduce interference from other asynchronous communications on the spectrum; and a unit for recovering user data from the filtered signal.

Another aspect relates to a wireless communication device comprising at least one processor, a memory communicatively coupled to the at least one processor, and a communication interface communicatively coupled to the at least one processor, wherein the at least one processor is configured to perform the following operations: receive a signal via asynchronous communication on a spectrum at a first wireless device; filter the received signal to reduce interference from other asynchronous communications on the spectrum; and recover user data from the filtered signal.

Another aspect relates to a non-transitory computer-readable medium storing computer-executable code, including code for performing the following operations: receiving a signal at a first wireless device via asynchronous communication on a spectrum; filtering the received signal to reduce interference from other asynchronous communications on the spectrum; and recovering user data from the filtered signal.

The waveform design for transmitting data may also involve structures and methods for performing Orthogonal Frequency Division Multiple Access (OFDMA) modulation with Weighted Overlap Add (WOLA) filtering. In another aspect, the waveform design may involve structures and methods for performing multi-carrier Frequency Domain Equalization (FDE).

At the network planning level, one aspect of the present disclosure relates to structures and methods for allowing the coexistence of both asynchronous and synchronous communications. Such structures and methods may involve provisioning between asynchronous and synchronous communications and provisioning bandwidth for handling conflicts.

One such aspect relates to a method of wireless communications comprising the following operations: providing a preselected bandwidth for communications on a wireless network; supplying a first portion of the preselected bandwidth for synchronous communications on the wireless network; and supplying a second portion of the preselected bandwidth for asynchronous communications on the wireless network based on traffic demand in the wireless network.

Another such aspect relates to a wireless communication device comprising: means for providing a preselected bandwidth for communications on a wireless network; means for supplying a first portion of the preselected bandwidth for synchronous communications on the wireless network; and means for supplying a second portion of the preselected bandwidth for asynchronous communications on the wireless network based on traffic demand in the wireless network.

Another aspect relates to a wireless communication device comprising at least one processor, a memory communicatively coupled to the at least one processor, and a communication interface communicatively coupled to the at least one processor, wherein the at least one processor is configured to perform the following operations: provide a preselected bandwidth for communications on a wireless network; supply a first portion of the preselected bandwidth for synchronous communications on the wireless network; and supply a second portion of the preselected bandwidth for asynchronous communications on the wireless network based on traffic demand in the wireless network.

Another such aspect relates to a non-transitory computer-readable medium storing computer-executable code, including code for performing the following operations: providing a preselected bandwidth for communications on a wireless network; supplying a first portion of the preselected bandwidth for synchronous communications on the wireless network; and supplying a second portion of the preselected bandwidth for asynchronous communications on the wireless network based on traffic demand in the wireless network.

Based on the review of the detailed description that follows, these and other aspects of the method and apparatus will become more fully understood. By reviewing the description of the specific exemplary embodiments of the given method and apparatus below in conjunction with the accompanying drawings, other aspects, features and embodiments of the given method and apparatus will become apparent to those skilled in the art. Although the features of the given method and apparatus can be discussed below with respect to specific embodiments and the accompanying drawings, all embodiments of the given method and apparatus can include one or more of the advantageous features discussed herein. In other words, although one or more embodiments can be discussed as having specific advantageous features, one or more of such features can also be used according to the various embodiments of the method and apparatus discussed herein. Similarly, although exemplary embodiments can be discussed below as device, system or method embodiments, it should be understood that such exemplary embodiments can be implemented in various devices, systems and methods.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a diagram illustrating one example of a hardware implementation of an apparatus using a processing system.

FIG2 is a diagram showing an example of a network architecture.

FIG3 is a diagram showing an example of an access network.

FIG4 is a diagram showing an example of synchronous uplink.

5 is a diagram illustrating one example of an asynchronous uplink in accordance with certain aspects of the present disclosure.

FIG. 6 is a diagram showing examples of various communication links.

7 is a diagram illustrating an example of inter-carrier interference (ICI) and a design scheme for addressing ICI and enabling asynchronous communication in accordance with certain aspects of the present disclosure.

8 is a diagram illustrating an example process for operating a transmitter circuit enabled for asynchronous communication, in accordance with certain aspects of the present disclosure.

9 is a diagram illustrating one simplified example of a hardware implementation of an apparatus employing processing circuitry and suitable for operating transmitter circuitry in accordance with certain aspects of the present disclosure.

10 is a diagram illustrating one example process for operating a receiver circuit enabled for asynchronous communication, in accordance with certain aspects of the present disclosure.

11 is a diagram illustrating one simplified example of a hardware implementation of an apparatus employing processing circuitry and suitable for operating receiver circuitry in accordance with certain aspects of the present disclosure.

12 is a diagram illustrating one example of a transmitter circuit for implementing asynchronous communications using orthogonal frequency division multiple access (OFDMA) modulation with weighted overlap-add (WOLA) filtering, in accordance with certain aspects of the present disclosure.

13 is a diagram illustrating one example process for operating a transmitter circuit enabled for asynchronous communication using orthogonal frequency division multiple access (OFDMA) modulation with weighted overlap-add (WOLA) filtering, in accordance with certain aspects of the present disclosure.

14 is a diagram illustrating one example of a receiver circuit for implementing asynchronous communications using orthogonal frequency division multiple access (OFDMA) modulation with weighted overlap-add (WOLA) filtering, in accordance with certain aspects of the present disclosure.

15 is a diagram illustrating one example process for operating a receiver circuit enabled for asynchronous communication using orthogonal frequency division multiple access (OFDMA) modulation with weighted overlap-add (WOLA) filtering, in accordance with certain aspects of the present disclosure.

16 is a diagram illustrating one example of transmitter circuitry for implementing asynchronous communication using multi-carrier frequency domain equalization (FDE), in accordance with certain aspects of the present disclosure.

17 is a diagram illustrating an example process for operating transmitter circuitry enabled for asynchronous communication using multi-carrier frequency domain equalization (FDE), in accordance with certain aspects of the present disclosure.

18 is a diagram illustrating one example of a receiver circuit for implementing asynchronous communication using multi-carrier frequency domain equalization (FDE), in accordance with certain aspects of the present disclosure.

19 is a diagram illustrating an example process for operating receiver circuitry enabled for asynchronous communication using multi-carrier frequency domain equalization (FDE), in accordance with certain aspects of the present disclosure.

20 is a diagram illustrating two examples for allocating bandwidth for asynchronous communications in a wireless communication network, in accordance with certain aspects of the present disclosure.

21 is a diagram illustrating one example for allocating bandwidth for synchronous and asynchronous communications using static or semi-static provisioning in a wireless communication network, in accordance with certain aspects of the present disclosure.

22 is a diagram illustrating one example for allocating bandwidth for synchronous and asynchronous communications using dynamic provisioning in a wireless communication network, in accordance with certain aspects of the present disclosure.

23 is a diagram illustrating an example of allocating bandwidth for asynchronous communications using symbolic numerology, optimized for various use cases in a wireless communication network, in accordance with certain aspects of the present disclosure.

24 is a diagram illustrating an example process for allocating bandwidth for asynchronous communications in a wireless communication network, in accordance with certain aspects of the present disclosure.

25 is a diagram illustrating one simplified example of a hardware implementation of an apparatus employing processing circuitry and suitable for allocating bandwidth for asynchronous communications in a wireless communication network, in accordance with certain aspects of the present disclosure.

26 is a diagram illustrating a transmit windowing operation of a weighted overlap-add (WOLA) filter in accordance with certain aspects of the present disclosure.

27 is a diagram illustrating a receive windowing operation of a weighted overlap-add (WOLA) filter in accordance with certain aspects of the present disclosure.

DETAILED DESCRIPTION

The detailed description set forth below in conjunction with the accompanying drawings is intended to serve as a description of various configurations and is not intended to represent the only configuration by which the concepts described herein may be practiced. For the purpose of providing a thorough understanding of the various concepts, the detailed description includes specific details. However, it will be apparent to those skilled in the art that these concepts may be practiced without these specific details. In some cases, well-known structures and components are shown in block diagram form to avoid obscuring such concepts.

With respect to synchronous communication, it can be good for link efficiency, but has associated costs. For example, at the receiver, synchronous communication may require the receiver to acquire, track, and correct timing before data can be received. At the transmitter, and after the receiver has configured the timing, the transmitter may require additional timing advance and tight coordination across the entire operating bandwidth before data transfer can occur. Therefore, synchronous communication may not be ideal in certain applications (e.g., those that send data at relatively slow data rates).

Aspects of the present disclosure relate to establishing asynchronous communications that do not have as many requirements as synchronous communications. Specifically, methods for implementing asynchronous communications are provided that involve transmit and receive waveform designs having waveform shaping that can sufficiently reduce interference between carriers to implement asynchronous communications. In certain aspects, the transmit waveform design involves using: (1) orthogonal frequency division multiple access (OFDMA) modulation with weighted overlap-add (WOLA) filtering; (2) multi-carrier frequency domain equalization (FDE); or (3) other schemes suitable for implementing asynchronous communications. In certain aspects, the receive waveform design involves: (1) orthogonal frequency division multiple access (OFDMA) modulation with weighted overlap-add (WOLA) filtering; (2) multi-carrier frequency domain equalization (FDE); or (3) other schemes suitable for implementing asynchronous communications.

Aspects of the present disclosure also relate to provisioning and provisioning bandwidth for conflict resolution between asynchronous and synchronous communications. One such aspect relates to providing a preselected bandwidth for communications on a wireless network, provisioning a first portion of the preselected bandwidth for synchronous communications on the wireless network, and provisioning a second portion of the preselected bandwidth for asynchronous communications on the wireless network based on traffic demand in the wireless network.

Several aspects of telecommunication systems will now be presented with reference to various apparatuses and methods. The systems of Figures 1-3 are non-limiting examples of apparatuses and methods within which the teachings described herein may find application and/or implementation. These apparatuses and methods will be described in the following detailed description and illustrated in the accompanying drawings by various blocks, modules, components, circuits, steps, processes, algorithms, etc. (collectively referred to as "elements"). These elements may be implemented using electronic hardware, computer software, or any combination thereof. Whether such elements are implemented as hardware or software depends on the specific application and the design constraints imposed on the overall system.

As an example, a "processing system" including one or more processors can be utilized to implement an element, or any part of an element, or any combination of elements. Examples of processors include microprocessors, microcontrollers, digital signal processors (DSPs), field programmable gate arrays (FPGAs), programmable logic devices (PLDs), state machines, gated logic, discrete hardware circuits, and other suitable hardware configured to perform the various functions described throughout this disclosure. One or more processors in a processing system can execute software. Regardless of whether it is referred to as software, firmware, middleware, microcode, hardware description language, or other terms, software should be broadly understood to represent instructions, instruction sets, codes, code segments, program codes, programs, subroutines, software modules, applications, software applications, software packages, routines, subroutines, objects, executable files, threads of execution, processes, functions, etc. The software can be located on a computer-readable medium. The computer-readable medium can be a non-transitory computer-readable medium. Non-transitory computer-readable media include, by way of example, magnetic storage devices (e.g., hard disk, floppy disk, magnetic stripe), optical disks (e.g., compact disc (CD), digital versatile disc (DVD)), smart cards, flash memory devices (e.g., card, stick, key drive), random access memory (RAM), read-only memory (ROM), programmable ROM (PROM), erasable PROM (EPROM), electrically erasable PROM (EEPROM), registers, removable disks, and any other suitable medium for storing software and/or instructions that can be accessed and read by a computer. The computer-readable medium may be present in the processing system, external to the processing system, or distributed across multiple entities including the processing system. The computer-readable medium may be included in a computer program product. As an example, a computer program product may include a computer-readable medium in packaging material. Those skilled in the art will recognize how to best implement the described functionality presented throughout this disclosure depending on the specific application and the overall design constraints imposed on the overall system.

FIG1 is a conceptual diagram illustrating an example of a hardware implementation of an apparatus 100 using a processing system 114. In this example, processing system 114 can be implemented with a bus architecture generally represented by bus 102. Depending on the specific application of processing system 114 and the overall design constraints, bus 102 can include any number of interconnected buses and bridges. Bus 102 links together various circuits, including one or more processors generally represented by processor 104 and computer-readable media generally represented by computer-readable media 106. Bus 102 can also link various other circuits, such as timing sources, peripherals, voltage regulators, and power management circuits, which are well known in the art and therefore will not be described in any further detail. Bus interface 108 provides an interface between bus 102 and transceiver 110. Transceiver 110 provides means for communicating with various other devices via a transmission medium (e.g., transmitter and receiver circuits). Depending on the nature of the apparatus, a user interface 112 (e.g., a keypad, display, speaker, microphone, joystick) may also be provided.

The processor 104 is responsible for managing the bus 102 and general processing, including the execution of software stored on the computer-readable medium 106. When executed by the processor 104, the software causes the processing system 114 to perform the various functions described below for any particular device. The computer-readable medium 106 can also be used to store data that the processor 104 manipulates when executing the software. Examples of the processor 104 include a microprocessor, a microcontroller, a digital signal processor (DSP), a field programmable gate array (FPGA), a programmable logic device (PLD), a state machine, a gated logic unit, a discrete hardware circuit, and other suitable hardware configured to perform the various functions described throughout this disclosure. That is, the processor 104 (as utilized in the device 100) can be used to implement any one or more of the processes described below.

In one aspect, the apparatus 100 may be a user equipment (UE) or a base station (BS). A base station may also be referred to by those skilled in the art as a base transceiver (BST), a wireless base station, a wireless transceiver, a transceiver function, a basic service set (BSS), an extended service set (ESS), an access point (AP), a node B, an evolved node B (eNB), a mesh node, a repeater, or some other suitable term. A base station may provide a wireless access point to a core network for any number of user equipments (UEs). Examples of UEs include cellular phones, smartphones, session initiation protocol (SIP) phones, laptop computers, notebook computers, netbooks, smartbooks, personal digital assistants (PDAs), satellite radios, global positioning system (GPS) devices, multimedia devices, video devices, digital audio players (e.g., MP3 players), cameras, entertainment devices, wearable communication devices, cars, mesh network nodes, M2M components, game consoles, or any other similar functional device. A UE may also be referred to by those skilled in the art as a mobile station (MS), a user station, a mobile unit, a user unit, a wireless unit, a remote unit, a mobile device, a wireless device, a wireless communication device, a remote device, a mobile user station, an access terminal (AT), a mobile terminal, a wireless terminal, a remote terminal, a handset, a terminal, a user agent, a mobile client, a client, or some other suitable term.

The various concepts presented throughout this disclosure can be implemented across a wide variety of telecommunication systems, network architectures, and communication standards. Existing wireless communication networks, such as those defined in accordance with the 3GPP standard for the Evolved Packet System (EPS), often referred to as Long Term Evolution (LTE) networks, provide simultaneous communication and orthogonal access for multiple users. However, the specific timing requirements in supporting simultaneous communication can have associated costs.

Evolved versions of this network, such as fifth generation (5G) networks, can provide many different types of services or applications, including but not limited to web browsing, video streaming, VoIP, task applications, multi-hop networks, remote operations with real-time feedback (e.g., remote surgery), etc.

Aspects of the present disclosure are not limited to a particular generation of wireless networks, but rather relate generally to wireless communications, and specifically to 5G networks. However, to facilitate understanding of such aspects utilizing known communication platforms, examples of such aspects relating to LTE are provided in Figures 2-3.

FIG2 is a diagram illustrating an LTE network architecture 200 using various apparatuses 100 (see FIG1 ). LTE network architecture 200 may be referred to as an evolved packet system (EPS) 200. EPS 200 may include one or more user equipment (UE) 202, an evolved UMTS terrestrial radio access network (E-UTRAN) 204, an evolved packet core (EPC) 210, a home subscriber server (HSS) 220, and an operator's IP services 222. The EPS may interconnect with other access networks, but for simplicity, those entities/interfaces are not shown. As shown, the EPS provides packet-switched services, however, as those skilled in the art will readily appreciate, the various concepts presented throughout this disclosure may be extended to networks providing circuit-switched services.

The E-UTRAN includes an evolved Node B (eNB) 206 and other eNBs 208. The eNB 206 provides user and control plane protocol terminations toward the UE 202. The eNB 206 can be connected to the other eNBs 208 via an X2 interface (i.e., backhaul). The eNB 206 may also be referred to by those skilled in the art as a base station, a base transceiver station, a radio base station, a radio transceiver, a transceiver function, a basic service set (BSS), an extended service set (ESS), or some other suitable term. The eNB 206 provides an access point to the EPC 210 for the UE 202. Examples of the UE 202 are described above. The UE 202 may also be referred to by those skilled in the art using other terms, such as those described above.

The eNB 206 is connected to the EPC 210 via the S1 interface. The EPC 210 includes a Mobility Management Entity (MME) 212, other MMEs 214, a Serving Gateway 216, and a Packet Data Network (PDN) Gateway 218. The MME 212 is a control node that handles signaling between the UE 202 and the EPC 210. In general, the MME 212 provides bearer and connection management. All user IP packets are transferred through the Serving Gateway 216, which is itself connected to the PDN Gateway 218. The PDN Gateway 218 provides IP address allocation and other functions for the UE. The PDN Gateway 218 is connected to the operator's IP services 222. The operator's IP services 222 include the Internet, the intranet, the IP Multimedia Subsystem (IMS), and the PS Streaming Service (PSS).

FIG3 is a diagram illustrating an example of an access network in an LTE network architecture. In this example, the access network 300 is divided into multiple cellular regions (cells) 302. One or more lower power class eNBs 308, 312 may have cellular regions 310, 314, respectively, that overlap with one or more of the cells 302. The lower power class eNBs 308, 312 may be femtocells (e.g., home eNBs (HeNBs)), picocells, or microcells. A higher power class or macro eNB 304 is assigned to the cell 302 and is configured to provide access points to the EPC 210 for all UEs 306 in the cell 302. No centralized controller is present in this example of the access network 300, but a centralized controller may be used in alternative configurations. The eNB 304 is responsible for all radio-related functions, including radio bearer control, admission control, mobility control, scheduling, security, and connectivity to the serving gateway 216 (see FIG2 ).

The modulation and multiple access scheme used by access network 300 may vary depending on the specific telecommunications standard being deployed. In LTE applications, OFDM is used on the DL and SC-FDMA is used on the UL to support both frequency division duplex (FDD) and time division duplex (TDD). As will be readily appreciated by those skilled in the art from the detailed description that follows, the various concepts presented herein are well suited for LTE applications. However, these concepts can be easily extended to other telecommunications standards that use other modulation and multiple access technologies. As an example, these concepts can be extended to Evolution Data Optimized (EV-DO) or Ultra Mobile Broadband (UMB). EV-DO and UMB are air interface standards published by the Third Generation Partnership Project 2 (3GPP2) as part of the CDMA2000 family of standards, and use CDMA to provide broadband Internet access to mobile stations. These concepts can also be extended to: Universal Terrestrial Radio Access (UTRA) using Wideband CDMA (W-CDMA) and other variants of CDMA such as TD-SCDMA; Global System for Mobile Communications (GSM) using TDMA; and Evolved UTRA (E-UTRA), Ultra Mobile Broadband (UMB), IEEE 802.11 (Wi-Fi), IEEE 802.16 (WiMAX), IEEE 802.20, and Flash OFDM using OFDMA. UTRA, E-UTRA, UMTS, LTE, and GSM are described in documents from the 3GPP organization. CDMA2000 and UMB are described in documents from the 3GPP2 organization. The actual wireless communication standard and multiple access technology used will depend on the specific application and the overall design constraints imposed on the system.

The eNB 304 may have multiple antennas that support MIMO technology. The use of MIMO technology enables the eNB 304 to exploit the spatial domain to support spatial multiplexing, beamforming, and transmit diffraction.

Spatial multiplexing can be used to send different data streams simultaneously on the same frequency. The data streams can be sent to a single UE 306 to increase the data rate, or to multiple UEs 306 to increase the overall system capacity. This is achieved by spatially precoding each data stream (i.e., applying scaling to the amplitude and phase) and then transmitting each spatially precoded stream through multiple transmit antennas on the downlink. The spatially precoded data streams arrive at the UE 306 with different spatial signatures, which enables each of the UEs 306 to recover the one or more data streams intended for that UE 306. On the uplink, each UE 306 transmits a spatially precoded data stream, which enables the eNB 304 to identify the source of each spatially precoded data stream.

Spatial multiplexing is typically used when channel conditions are favorable. Under less favorable channel conditions, beamforming can be used to focus transmission energy in one or more directions. This can be achieved by spatially precoding the data for transmission via multiple antennas. To achieve good coverage at the cell edges, single-stream beamforming transmission can be used in conjunction with transmit leveling.

In the detailed description that follows, various aspects of the access network may relate to a MIMO system that supports OFDM on the downlink. OFDM is a spread spectrum technique that modulates data onto multiple subcarriers within an OFDM symbol. The subcarriers are spaced apart at precise frequencies. The spacing provides "orthogonality" that enables the receiver to recover the data from the subcarriers. In the time domain, a guard interval (e.g., a cyclic prefix) can be added to each OFDM symbol to combat interference between OFDM symbols. The uplink can use SC-FDMA in the form of DFT-stretched OFDM signals to compensate for high peak-to-average power ratio (PARR). The cyclic prefix (CP) in LTE can be used to mitigate inter-symbol interference (ISI) and ensure orthogonality between UL signals. The cyclic prefix attached to each OFDM symbol or each SC-FDM symbol can be used to combat inter-symbol interference (ISI) caused by delay spread in a multipath channel. The signal sent by the cell can reach the UE via multiple signal paths. Delay spread is the difference between the earliest and latest signal copies arriving at the UE. To effectively combat ISI, the cyclic prefix length can be chosen to be equal to or greater than the expected delay spread so that the cyclic prefix contains a significant portion of the total multipath energy.The cyclic prefix represents a fixed overhead of samples per OFDM or SC-FDM symbol.

FIG4 is a diagram illustrating an example of a synchronous uplink. In one aspect, this example can be a traditional type of synchronous uplink found in an LTE network or other wireless network. Synchronous uplink 400 can be associated with communication between a user equipment (UE) 402 and a network node (e.g., a base station) 404. In one aspect of the present disclosure, asynchronous communication 406 is also possible between another UE 408 and the network node 404. A timing sub-diagram 410 illustrates the protocol overhead typically associated with establishing a synchronous uplink. More specifically, a user (e.g., “User 1” and/or “User 2”) typically listens (412) for a synchronization message (e.g., “Sync”) 414 for a period of time to align with the downlink frame boundary. The user then typically submits a request 416 for a grant (typically with timing advance information) 418 so that they can transmit and are aligned at the receiver after the difference in round-trip time (RTT) over the air. After synchronization and grant, the user finally sends data 420. These protocol overhead requirements for establishing synchronous communications via synchronous uplinks can be costly in terms of performance for certain network devices on the wireless network, including those that transmit data at relatively low data rates, as well as other network devices on the wireless network.

Regarding synchronous communication, in general, it may be good for link efficiency, but has associated costs. For example, at the receiver, synchronous communication may require the receiver to acquire, track, and correct timing before data can be received. At the transmitter, and after the receiver has configured the timing, the transmitter may require additional timing advance and tight coordination across the entire operating bandwidth before data transmission can occur. Similarly, inter-node synchronization may be beneficial for transmission and interference coordination, but also has associated costs. At the base station, for example, synchronization across base stations may be achievable using macro and/or micro cells. However, some indoor and small cells may not meet the accuracy requirements of synchronization. In addition, such accuracy requirements may be even worse if the cyclic prefix (CP) length is shortened. At repeaters and various device-to-device links, for autonomous links, there may be additional complexity in maintaining accurate timing and alignment with the global macro network. Therefore, synchronous communication may not be ideal in specific applications.

Aspects of the present disclosure provide apparatus and methods for establishing asynchronous communication that does not have as many protocol overhead requirements as synchronous communication. Asynchronous communication can achieve more efficient communication including potential power savings. In one aspect, the apparatus and method for establishing asynchronous communication described herein can improve support for indoor and/or independent small cells, repeaters, and device-to-device links. In one aspect, the apparatus and method for establishing asynchronous communication described herein can enable lower power devices to send data with very little overhead. In addition, they can achieve low latency by sending data immediately upon a triggering event. Aspects of the present disclosure can also achieve hybrid waveform coexistence to address constraints associated with efficiency, latency, and/or propagation (e.g., hybrid symbol duration for low latency, normal mobility, and staticity). Aspects of the present disclosure can achieve graceful degradation when dealing with other radio access technology interference issues. For example, aspects of the present disclosure can allow native support for coexistence with interference sources on independent timelines.

FIG5 is a diagram illustrating an example of an asynchronous uplink 500 according to certain aspects of the present disclosure. The asynchronous uplink 500 may be associated with communications between a user equipment (UE) 502 and a network node (e.g., a base station) 504. In one aspect of the present disclosure, asynchronous communications 506 may also be possible between another UE 508 and the network node 504. A first timing sub-diagram 510 illustrates the protocol overhead typically associated with establishing an asynchronous uplink involving operations without uplink alignment. More specifically, users (e.g., “User 1” and “User 2”) may wait for synchronization messages 512 before sending data 514 but may choose to ignore authorization messages. A second timing sub-diagram 516 illustrates the protocol overhead typically associated with establishing an asynchronous uplink involving fully asynchronous operations. Specifically, a user may choose to ignore both authorization and synchronization messages when sending data 518.

So, in summary, for asynchronous communications, users can choose to ignore authorization or even synchronous messages in order to send information quickly and with low signaling overhead. These more autonomous transaction capabilities can allow users to save power in certain situations (e.g., small transmissions that occur from time to time). Other advantages are described above.

Figure 6 is a diagram showing examples of various communication links (602, 604, 606). In one aspect, it should be noted that a link is defined by an associated transmitter and receiver. In such a case, each transmitter may have one or more receivers (or links). The case where one transmitter communicates with many receivers is similar to a base station downlink. However, there are other possible network links. For example, each receiver may have one or more transmitters (or links). The case where one receiver communicates with many transmitters is similar to a base station uplink, but again, this is not the only case. The links between different transmitters and receivers may be within the same system bandwidth. This applies to different device types (e.g., base stations, smartphones, sensors, tablet computers, machines, etc.). In some cases, the network node (e.g., transmitter and/or receiver) that establishes a communication link may be referred to as a scheduling entity or a slave entity. For example, the apparatus 100 of Figure 1 may be a user equipment (UE), which may be a scheduling entity or a slave entity. In another example, the apparatus 100 of Figure 1 may be a base station, which may be a scheduling entity.

FIG7 is a diagram illustrating inter-carrier interference (ICI) and an example of a design scheme for addressing ICI and achieving asynchronous communication according to certain aspects of the present disclosure. Waveform frequency-domain subgraph 700 illustrates how an orthogonal frequency-division multiple access (OFDMA) signal may suffer from ICI when subcarriers are misaligned. More specifically, ICI can be caused by frequency overlap with zeros at the subcarrier center frequency. Timing subgraph 702 illustrates various subframes including a cyclic prefix (CP) followed by user data for several different users. Misalignment of one of the subframes (e.g., the subframe for user 5) can lead to ICI (e.g., the ICI depicted in waveform subgraph 700). To mitigate ICI, one aspect of the present disclosure may involve providing the system with filter bank multicarrier or OFDM with symbol windowing to better separate the subbands. A desirable frequency-domain representation of such a system may look like subgraph 704, where the carriers in the multicarrier waveform have less overlap. In such a case, the system can achieve asynchronous operation between links, where different symbol numerology and cyclic prefix lengths can be used for each link. Such a system can scale bandwidth up and down as needed.

FIG8 is a diagram illustrating an exemplary process 800 for operating transmitter circuitry enabled for asynchronous communication, in accordance with certain aspects of the present disclosure. In one aspect, process 800 may be performed by transmitter circuitry of transceiver 110 in FIG1 or other suitable circuitry. In block 802, the process generates a waveform comprising one or more carriers at a first wireless device. In one aspect, the process also shares a spectrum comprising multiple carriers at the first wireless device (e.g., where the spectrum may be divided across multiple wireless devices including the first wireless device).

In block 804, the process shapes the waveform to reduce interference between the waveform and adjacent waveforms (e.g., to enable the first wireless device to transmit asynchronously with respect to another wireless device, or to improve the performance of the first wireless device when transmitting asynchronously). In one aspect, the process may shape the waveform to reduce interference between the waveform and adjacent waveforms (e.g., those generated by other wireless devices operating on the spectrum) such that any such interference is less than that of the unshaped waveform. In one aspect, the process may shape the waveform to reduce interference between the waveform and adjacent waveforms (e.g., those generated by other wireless devices operating on the spectrum) to a preselected level (e.g., a preselected maximum level). In one aspect, the preselected level is approximately -13 decibel-milliwatts (dBm) across an adjacent 1 megahertz (MHz) of the spectrum. In block 806, the process transmits the shaped waveform asynchronously on the spectrum (e.g., with respect to another wireless device on the spectrum). As discussed in detail below, the process can specifically be implemented using: (1) orthogonal frequency division multiple access (OFDMA) modulation with weighted overlap-add (WOLA) filtering; (2) multi-carrier frequency domain equalization (FDE); or (3) other schemes suitable for implementing asynchronous communication.

FIG9 is a diagram 900 illustrating a simplified example of a hardware implementation of an apparatus employing processing circuitry 902 and suitable for operating transmitter circuitry in accordance with certain aspects of the present disclosure. Processing circuitry 902 may be provided in accordance with the specific aspects described with respect to processing system 114 of FIG1 . Processing circuitry 902 includes one or more processors 912, which may include a microprocessor, a microcontroller, a digital signal processor, a sequencer, and/or a state machine. Processing circuitry 902 may be implemented with a bus architecture generally represented by bus 916. Depending on the specific application of processing circuitry 902 and the overall design constraints, bus 916 may include any number of interconnecting buses and bridges. Bus 916 links various circuits, including computer-readable storage media 914 and one or more processors 912 and/or hardware devices operating in concert to perform the specific functions described herein and represented by modules and/or circuits 904, 906, 908, and 910. Bus 916 may also link various other circuits, such as timing sources, timers, peripherals, voltage regulators, and power management circuitry. The bus interface 918 may provide an interface between the bus 916 and other devices such as a transceiver 920 or a user interface 922. The transceiver 920 may provide a wireless communication link for communication with various other devices. In some cases, the transceiver 920 and/or the user interface 922 may be directly connected to the bus 916.

Processor 912 is responsible for general processing, including the execution of software stored as code on computer-readable storage medium 914. When executed by processor 912, the software configures one or more components of processing circuit 902 so that processing circuit 902 can perform the various functions described above for any particular device. Computer-readable storage medium 914 can also be used to store data manipulated by processor 912 when executing the software. Processing circuit 902 also includes at least one of modules 904, 906, and 908. Modules 904, 906, and 908 can be software modules running on processor 912 loaded from code present and/or stored on computer-readable storage medium 914, one or more hardware modules coupled to processor 912, or some combination thereof. Modules 904, 906, and/or 908 can include microcontroller instructions, state machine configuration parameters, or some combination thereof.

The modules and/or circuits 904 may be configured to generate a waveform comprising one or more carriers at the first wireless device. In one aspect, the modules and/or circuits 904 may be configured to perform the functions described with respect to block 802 in FIG. 8 , block 1302 in FIG. 13 , and/or block 1702 in FIG. 17 .

The modules and/or circuits 906 may be configured to shape the waveform to reduce interference between the waveform and adjacent waveforms (e.g., to enable the first wireless device to transmit asynchronously or to improve performance of the first wireless device when transmitting asynchronously). In one aspect, the modules and/or circuits 906 may be configured to perform the functions described with respect to block 804 of FIG. 8 , block 1304 of FIG. 13 , and/or block 1704 of FIG. 17 .

The modules and/or circuits 908 may be configured to transmit the shaped waveform asynchronously across the spectrum. In one aspect, the modules and/or circuits 908 may be configured to perform the functions described with respect to block 806 in FIG. 8 , block 1306 in FIG. 13 , and/or block 1706 in FIG. 17 .

FIG10 is a diagram illustrating an example process 1000 for operating receiver circuitry enabled for asynchronous communication, in accordance with certain aspects of the present disclosure. In one aspect, process 1000 may be performed by receiver circuitry of transceiver 110 in FIG1 or other suitable circuitry. In block 1002, a process receives a signal at a first wireless device via asynchronous communication over a spectrum. In one aspect, the process shares a spectrum comprising multiple carriers at the first wireless device (e.g., where the spectrum may be divided across multiple wireless devices including the first wireless device, and where each of the multiple wireless devices is assigned a different carrier of the spectrum). In block 1004, the process filters the received signal to reduce interference from other asynchronous communications over the spectrum. In one aspect, the process may filter the received signal to reduce interference between the received signal and adjacent waveforms/signals on the spectrum (e.g., those generated by other wireless devices operating on the spectrum), such that any such interference is less than interference from unfiltered waveforms. In one aspect, the process may filter the received signal to reduce interference between the received signal and adjacent waveforms/signals (e.g., those generated by other wireless devices operating on the spectrum) to a preselected level (e.g., a preselected maximum level). In one aspect, the preselected level is approximately -13 dBm across an adjacent 1 MHz of the spectrum. In block 1006, the process recovers the user data from the filtered signal. As will be discussed in detail below, this process may be implemented using, in particular: (1) orthogonal frequency division multiple access (OFDMA) modulation with weighted overlap add (WOLA) filtering; (2) multi-carrier frequency domain equalization (FDE); or (3) other schemes suitable for implementing asynchronous communication.

FIG11 is a diagram 1100 illustrating a simplified example of a hardware implementation of an apparatus employing processing circuitry 1102 and suitable for operating receiver circuitry in accordance with certain aspects of the present disclosure. Processing circuitry 1102 may be provided in accordance with the specific aspects described with respect to processing system 114 of FIG1 . Processing circuitry 1102 may include one or more processors 1112, which may include a microprocessor, a microcontroller, a digital signal processor, a sequencer, and/or a state machine. Processing circuitry 1102 may be implemented with a bus architecture generally represented by bus 1116. Depending on the specific application and overall design constraints of processing circuitry 1102, bus 1116 may include any number of interconnecting buses and bridges. Bus 1116 links together various circuits, including computer-readable storage media 1114 and one or more processors 1112 and/or hardware devices operating in concert to perform the specific functions described herein and represented by modules and/or circuits 1104, 1106, 1108, and 1110. The bus 1116 may also link various other circuits such as timing sources, timers, peripherals, voltage regulators, and power management circuits. A bus interface 1118 may provide an interface between the bus 1116 and other devices such as a transceiver 1120 or a user interface 1122. The transceiver 1120 may provide a wireless communication link for communicating with various other devices. In some cases, the transceiver 1120 and/or the user interface 1122 may be directly connected to the bus 1116.

Processor 1112 is responsible for general processing, including the execution of software stored as code on computer-readable storage medium 1114. When executed by processor 1112, the software configures one or more components of processing circuit 1102 so that processing circuit 1102 can perform the various functions described above for any particular device. Computer-readable storage medium 1114 may also be used to store data manipulated by processor 1112 when executing the software. Processing circuit 1102 also includes at least one of modules 1104, 1106, and 1108. Modules 1104, 1106, and 1108 may be software modules running on processor 1112 loaded from code present and/or stored on computer-readable storage medium 1114, one or more hardware modules coupled to processor 1112, or some combination thereof. Modules 1104, 1106, and/or 1108 may include microcontroller instructions, state machine configuration parameters, or some combination thereof.

The modules and/or circuits 1104 may be configured to receive a signal at the first wireless device via asynchronous communication over the spectrum. In one aspect, the modules and/or circuits 1104 may be configured to perform the functions described with respect to block 1002 in FIG. 10 , block 1502 in FIG. 15 , and/or block 1902 in FIG. 19 .

The modules and/or circuits 1106 may be configured to filter the received signal to reduce interference from other asynchronous communications on the spectrum. In one aspect, the modules and/or circuits 1106 may be configured to perform the functions described with respect to block 1004 in FIG. 10 , block 1504 in FIG. 15 , and/or block 1904 in FIG. 19 .

Modules and/or circuits 1108 may be configured to recover user data from the filtered signal. In one aspect, modules and/or circuits 1108 may be configured to perform the functions described with respect to block 1006 in FIG. 10 , block 1506 in FIG. 15 , and/or block 1906 in FIG. 19 .

FIG12 is a diagram illustrating an example of a transmitter circuit 1200 for implementing asynchronous communication using orthogonal frequency division multiple access (OFDMA) modulation with weighted overlap-add (WOLA) filtering, in accordance with certain aspects of the present disclosure. The transmitter circuit 1200 receives a plurality of user tones 1202 that are provided to an inverse fast Fourier transform (IFFT) 1204 (e.g., for OFDMA modulation). The output of the IFFT 1204 is provided to a parallel-to-serial (P/S) block 1206. A cyclic prefix (CP) block 1208 adds a cyclic prefix (CP) to the output of the P/S block 1206. The output of the CP block 1208 (e.g., a transmit signal) is provided to a WOLA filter 1210. Subgraph 1212 illustrates an example of the shape of a filtered waveform as provided by the WOLA filter 1210. Subgraph 1214 illustrates an example of the shape of an accumulated waveform produced after filtering by the WOLA filter 1210.

In one aspect, the WOLA filter 1210 utilizes overlap-add to use a pulse-shaped window 1212 to maintain cyclicity and reduce side lobes in the transmitted signal. This is illustrated in more detail in FIG26. Each OFDM symbol consisting of an IFFT output 2602 and a cyclic prefix 2606 can be further extended to have a small prefix (later than the cyclic prefix) and a small suffix, by which the left edge weighting function 2604 and the right edge weighting function 2608 can be applied to the edges of the symbol. Then, in 2610, each symbol can be overlapped with the previous and upcoming symbols at the point where the weighting function is applied. This process effectively gradually reduces the transition between symbols and causes a more compact roll-off of the spectrum of the waveform.

Although FIG. 12 illustrates the transmitter circuit 1200 as including a first transmitter chain (1202, 1204, 1206, 1208, 1210), the transmitter circuit 1200 may also include a second transmitter chain (1202.N, 1204.N, 1206.N, 1208.N, 1210.N) and additional transmitter chains depending on the number of user tones provided to the transmitter circuit 1200 (e.g., up to N user tones).

In one aspect, using aggressive WOLA at the transmitter can improve tolerance to asynchrony. For example, an aggressive choice of the window size at the transmitter WOLA (so that it is a larger portion of the cyclic prefix) can improve tolerance to asynchrony. Users providing input tones can employ different symbol numerologies and use guard tones. In one aspect, the methods described herein can implement such techniques to achieve separation between synchronous and asynchronous carriers (i.e., frequency domain equalization (FDE)) consisting of OFDM waveforms or waveforms that can be demodulated with similar low complexity.

FIG13 is a diagram illustrating an exemplary process 1300 for operating a transmitter circuit enabled for asynchronous communication using orthogonal frequency division multiple access (OFDMA) modulation with weighted overlap-add (WOLA) filtering, in accordance with certain aspects of the present disclosure. In one aspect, process 1300 may be performed by the transmitter circuit of FIG12 or other suitable circuitry.

In block 1302, a process generates a waveform to be transmitted at a first wireless device, wherein the waveform includes one or more carriers. In one aspect, this may be performed by block 906 in FIG. 9 . In sub-block 1302a of block 1302, the process generates a plurality of user tones to be transmitted. In one aspect, this may be performed by block 1202 in FIG. 12 . In sub-block 1302b of block 1302, the process applies orthogonal frequency division multiple access (OFDMA) modulation to the plurality of user tones. In one aspect, this may be performed by block 1204 in FIG. 12 . In sub-block 1302c of block 1302, the process generates a transmit signal from the OFDMA modulation. In one aspect, this may be performed by blocks 1206 and/or 1208 in FIG. 12 .

In block 1304, the process shapes the waveform to reduce interference between the waveform and adjacent waveforms (e.g., to enable the first wireless device to transmit asynchronously, or to improve the performance of the first wireless device when transmitting asynchronously). In one aspect, this may be performed by block 906 in FIG. 9 . In subblock 1304a of block 1304, the process filters the transmit signal to enable the first wireless device to transmit asynchronously. In one aspect, the process filters the transmit signal in subblock 1304a using a weighted overlap-add filter (e.g., a WOLA filter such as block 1210 in FIG. 12 ). In one aspect, the process filters the transmit signal to reduce interference between the waveform (e.g., the transmit signal) and adjacent waveforms (e.g., other signals spectrally adjacent to the transmit signal) and to enable the first wireless device to transmit asynchronously, or to improve the performance of the first wireless device when transmitting asynchronously.

In block 1306, the process transmits the shaped waveform asynchronously across the spectrum. In subblock 1306a of block 1306, the process transmits the transmit signal (e.g., the filtered transmit signal). In one aspect, this may be performed by block 110 in FIG. 1 , block 908 in FIG. 9 , and/or block 1200 in FIG. 12 .

In one aspect, process 1300 also handles conflicts between users. For example, in one aspect, the process provides a preselected bandwidth for asynchronous communication on a wireless network and then recovers the signals from two preselected asynchronously communicating wireless devices, where the recovery may involve using code division multiple access across the two preselected wireless devices. In other cases, other conflict handling techniques may be used.

FIG14 is a diagram illustrating an example of a receiver circuit 1400 for implementing asynchronous communication using orthogonal frequency division multiple access (OFDMA) modulation with weighted overlap-add (WOLA) filtering, in accordance with certain aspects of the present disclosure. Receiver circuit 1400 receives a signal 1402 (e.g., from a user/wireless device in an OFDMA communication system) provided to a WOLA filter 1404. The output of WOLA filter 1404 (e.g., to reduce interference from other users communicating asynchronously in the OFDMA communication system) is provided to a serial-to-parallel (S/P) block 1406. The output of S/P block 1406 is provided to a fast Fourier transform (FFT) block 1408 (e.g., to perform OFDMA demodulation). The output of FFT block 1408 is provided to a frequency domain equalization (FDE) block 1410 that generates/recovers output user tones 1412.

Although FIG. 14 illustrates the receiver circuit 1400 as including a first receiver chain ( 1402 , 1404 , 1406 , 1408 , 1410 , 1412 ), the receiver circuit 1400 may also include a second receiver chain ( 1402 .N , 1404 .N , 1406 .N , 1408 .N , 1410 .N , 1412 .N ) and additional receiver chains depending on the number of user tones to be recovered by the receiver circuit 1400 (e.g. , up to N user tones).

Therefore, WOLA filter 1404 can be included in receiver circuit 1400 to further reduce inter-carrier interference (ICI). Alignment and WOLA shape can be adjusted based on the level of interference (e.g., ICI) and multipath delay spread. In one aspect, receiver circuit 1400 does not include a WOLA filter.

FIG15 is a diagram illustrating an exemplary process 1500 for operating a receiver circuit enabled for asynchronous communication using orthogonal frequency division multiple access (OFDMA) modulation with weighted overlap-add (WOLA) filtering, in accordance with certain aspects of the present disclosure. In one aspect, process 1500 may be performed by the receiver circuit of FIG14 or other suitable circuitry.

In block 1502, the process receives a signal at a first wireless device via asynchronous communication over a spectrum. In one aspect, this may be performed by block 1104 in FIG. 11 . In subblock 1502a of block 1502, the process receives a signal from a user in an orthogonal frequency division multiple access (OFDMA) communication system. In one aspect, this may be performed by block 1402 in FIG.

In block 1504, the process filters the received signal to reduce interference from other asynchronous communications on the spectrum. In one aspect, this may be performed by block 1106 in FIG. 11 and/or block 1404 in FIG. 14. In subblock 1504a of block 1504, the process filters the received signal to reduce interference from other asynchronous communications in the OFDMA system. In one aspect, the process filters the received signal in block 1504a using a weighted overlap-add filter (e.g., such as WOLA filter 1404 of FIG. 14).

In block 1506, the process recovers the user data from the filtered signal. In one aspect, this may be performed by block 1108 in FIG. 11 and/or blocks 1406, 1408, and/or 1410 in FIG. 14. In sub-block 1506a of block 1506, the process applies OFDMA demodulation to the received signal to generate a plurality of frequency domain outputs. In one aspect, this may be performed by block 1408 in FIG. 14. In sub-block 1506b of block 1506, the process applies frequency domain equalization (FDE) to the frequency domain outputs to recover a plurality of user tones. In one aspect, this may be performed by block 1410 in FIG. 14.

In one aspect, process 1500 also handles conflicts between users. For example, in one aspect, the process provides a preselected bandwidth for asynchronous communication on a wireless network and then recovers the signals from two preselected asynchronously communicating wireless devices, where the recovery may involve using code division multiple access across the two preselected wireless devices. In other cases, other conflict handling techniques may be used.

FIG16 is a diagram illustrating an example of a transmitter circuit 1600 for implementing asynchronous communication using multi-carrier frequency domain equalization (FDE) in accordance with certain aspects of the present disclosure. The transmitter circuit 1600 includes multiple user signal inputs (e.g., s ₀ (n), s ₁ (n) ... s _N-1 (n)) 1602 (e.g., user baseband signals to be transmitted). The first user signal (e.g., s ₀ (n)) is upsampled (e.g., at K ₀ ) at block 1604, appended with a cyclic prefix (CP) at block 1606, filtered using a filter (e.g., at H(f)) at block 1608, and then modulated onto a subcarrier frequency (e.g., f ₀ ) at block 1610. In one aspect, a single carrier waveform can be used for power efficiency. In one aspect, the user bandwidth can be scaled as needed (e.g., 300 kilohertz (kHz) or 1 megahertz (MHz) per carrier or wideband). Waveform subgraph 1612 illustrates the frequency response of filter H(f). In one aspect, the frequency response of waveform subgraph 1612 may correspond to a 1/16 bandwidth (BW) occupancy of 10 symbols per span with a beta equal to 0.2 at -40 dB. Subframe 1614 illustrates the structure of a typical subframe including single-carrier FDE (SC-FDE) symbols. In one aspect, transmitter circuit 1600 provides separate symbols per carrier without any requirement for synchronization. In one aspect, transmitter circuit 1600 provides frequency division multiplexing of separate user subbands to reduce adjacent channel interference (ACI).

FIG17 is a diagram illustrating an example process 1700 for operating a transmitter circuit enabled for asynchronous communication using multi-carrier frequency domain equalization (FDE), in accordance with certain aspects of the present disclosure. In one aspect, process 1700 may be performed by the transmitter circuit of FIG16 or other suitable circuitry.

In block 1702, the process generates a waveform comprising one or more carriers at a first wireless device. In one aspect, this may be performed by block 904 in FIG. 9 . In sub-block 1702a of block 1702, the process generates a user baseband signal to be transmitted. In one aspect, this may be performed by block 1602 in FIG. 16 . In sub-block 1702b of block 1702, the process upsamples the user baseband signal, thereby generating an upsampled signal. In one aspect, this may be performed by block 1604 in FIG. 16 . In sub-block 1702c of block 1702, the process generates a cyclic prefix. In sub-block 1702d of block 1702, the process inserts the cyclic prefix into the upsampled signal. In one aspect, this step may be performed by block 1606 in FIG. 16 .

In block 1704, the process shapes the waveform to reduce interference between the waveform and adjacent waveforms (e.g., to enable the first wireless device to transmit asynchronously, or to improve the performance of the first wireless device when transmitting asynchronously). In one aspect, this may be performed by block 906 in FIG. 9 and/or block 1608 in FIG. 16 . In subblock 1704a of block 1704, the process filters the upsampled signal with the cyclic prefix, thereby generating a filtered signal. In one aspect, this may be performed by block 906 in FIG. 9 and/or block 1608 in FIG. 16 . In subblock 1704b of block 1704, the process modulates the filtered signal at preselected user subcarriers, thereby generating a waveform (e.g., a shaped waveform). In one aspect, this step may be performed by block 906 in FIG. 9 and/or block 1610 in FIG. 16 .

In block 1706, the process transmits the shaped waveform asynchronously across the spectrum. In one aspect, this may be performed by block 908 in FIG. 9 and/or block 1600 in FIG. 16.

In one aspect, process 1700 also handles conflicts between users. For example, in one aspect, the process provides a preselected bandwidth for asynchronous communication on a wireless network and then recovers the signals from two preselected asynchronously communicating wireless devices, where the recovery may involve using code division multiple access across the two preselected wireless devices. In other cases, other conflict handling techniques may be used.

FIG18 is a diagram illustrating an example of a receiver circuit 1800 for implementing asynchronous communication using multi-carrier frequency domain equalization (FDE) in accordance with certain aspects of the present disclosure. Receiver circuit 1800 receives an output signal (e.g., a signal from a user communicating asynchronously in a multi-carrier communication system) at a radio frequency front end (RFFE) block 1802. The following four components (1804, 1806, 1808, 1810) collectively downscale the received signal to subcarriers and occupied bandwidth. More specifically, block 1804 may demodulate the received signal. Block 1806 may apply low-pass filtering (LPE). Block 1808 may remove the cyclic prefix (CP), and block 1810 may downsample the received signal. After the received signal has been downscaled, it is provided to a serial-to-parallel (S/P) block 1812. The output of the S/P is provided to a fast Fourier transform (FFT) 1814. It should be noted that the baseband waveform at 1806 may be oversampled to such an extent that an N-point FFT can be used to recover the information encoded with the data tones after CP removal in 1808. However, since the waveform may actually have its energy concentrated in a narrower bandwidth captured by the filter in 1806, it follows that the baseband waveform may be further subsampled by some rate L so that the FFT complexity can be reduced to N/L points 1814 when recovering the information encoded in the tones. The output of the FFT 1814 (e.g., a processed signal derived from the original user input signal) is provided to a frequency domain equalization (FDE) block 1816 (e.g., with spatial combining capabilities).

In addition, it is important to note that FDE is an effective technique that exhibits relatively low complexity (the complexity grows linearly with the number of tones in the FFT) compared to conventional time-domain equalization. However, in actual broadband wireless communications, not only multipath interference exists, but also narrowband interference (NBI). Conventional FDE methods may not account for NBI, and performance is therefore degraded. Using FDE with spatial combining capability can effectively suppress NBI to maximize the signal-to-noise ratio. FDE with spatial combining capability can use conventional algorithms such as least mean squares or recursive least squares.

The output of the FDE block 1816 is provided to an inverse fast Fourier transform (IFFT) 1818 commensurate with the size of the FFT 1814 used to transform the received samples into the frequency domain (N/L points in FIG. 18 ). The output of the IFFT 1818 is then provided to a parallel-to-serial (P/S) block 1820. The output of the P/S block 1820 is then provided to a downsampling block (K/L) 1822, and the equalized symbols can then be demodulated. In one aspect, using FDE with CP (as in the circuits of FIG. 16 and 18 ) thus mitigates intersymbol interference and provides equalizer complexity that scales with OFDM.

FIG19 is a diagram illustrating an exemplary process 1900 for operating a receiver circuit enabled for asynchronous communication using multi-carrier frequency domain equalization (FDE), in accordance with certain aspects of the present disclosure. In one aspect, process 1900 may be performed by the receiver circuit of FIG18 or other suitable circuitry.

In block 1902, the process receives a signal at a first wireless device via asynchronous communication over a spectrum. In subblock 1902a of block 1902, the process receives a signal from a user communicating asynchronously in a multi-carrier communication system. In one aspect, this may be performed by block 1104 in FIG. 11 and/or block 1802 in FIG. 18 .

In block 1904, the process filters the received signal to reduce interference from other asynchronous communications on the spectrum. In sub-block 1904a of block 1904, the process demodulates and filters the received signal at pre-selected subcarriers to obtain the user signal, thereby reducing interference from other wireless devices communicating asynchronously on the spectrum. In one aspect, this may be performed by block 1106 in FIG. 11 and/or blocks 1804-1812 in FIG. 18.

In block 1906, the process recovers the user data from the filtered signal. In one aspect, this may be performed by block 1108 in FIG. 11 and/or blocks 1814-1822 in FIG. 18 . In subblock 1906a of block 1906, the process applies frequency domain equalization to the processed signal derived from the user signal, thereby generating a plurality of equalized symbols. In one aspect, this may be performed by block 1816 in FIG. 18 . In subblock 1906b of block 1906, the process recovers the user data from the equalized symbols. In one aspect, the process removes the cyclic prefix from the user signal before applying frequency domain equalization. In one aspect, this may be performed by blocks 1818, 1820, and/or 1822 in FIG. 18 .

In one aspect, process 1900 also handles conflicts between users. For example, in one aspect, the process provides a preselected bandwidth for asynchronous communication on a wireless network and then recovers the signals from two preselected asynchronously communicating wireless devices, where the recovery may involve using code division multiple access across the two preselected wireless devices. In other cases, other conflict handling techniques may be used.

In addition to waveform design or shaping as described above with respect to Figures 7-19, there may be a need to engage in network planning and signaling (eg, allocating bandwidth) to support asynchronous communications. Accordingly, Figures 20-25 are related to network planning and signaling.

Figure 20 is a diagram showing two examples of asynchronous communication allocation bandwidth in a wireless communication network according to certain aspects of the present disclosure. The first example 2000 shows the bandwidth for asynchronous communication supplied to link A, link B and link C based on the difference in timing (e.g., timing offset). For each link in Figure 20 (e.g., link A, link B, link C), the link is depicted as a series of unshaded rectangles followed by a shaded rectangle, wherein the unshaded rectangle represents the CP length, and the shaded rectangle represents the symbol length. The second example 2002 shows the bandwidth for asynchronous communication supplied to link A, link B and link C based on the different symbol numerology of the three links. In an OFDM system, if the symbol length of link A is different from those in link B (as shown in the second example 2002), the cyclicity of the sinusoidal curve in each symbol will not have the same properties, that is, the symbol length will be different, and the cyclic prefix will not be aligned and therefore can be asynchronous. The lack of this alignment can cause inter-carrier interference. For example, different symbol numerologies can be placed into categories of wireless devices, including those involved in indoor and/or static communications, outdoor mobility communications, and low-power, small payload communications. In other aspects, other symbol numerologies and categories can be used. Thus, in one aspect, the term "asynchronous" can be defined as communications in which users start at different times using the same symbol size (e.g., as in the first example 2000) and/or communications in which users start at the same time using different symbol sizes (e.g., as in the second example 2002).

Figure 21 is a diagram illustrating an example of allocating bandwidth for synchronous and asynchronous communications using static or semi-static provisioning in a wireless communication network according to certain aspects of the present disclosure. Link A, Link B, and Link C are the links involved in synchronous communication, while Link D is involved in asynchronous communication. For each link in Figure 21 (e.g., Link A, Link B, and Link C), the link is depicted as a series of unshaded rectangles followed by shaded rectangles, where the unshaded rectangles represent the CP length and the shaded rectangles represent the symbol length. In one aspect, the network can set reserved bandwidth for both synchronous and asynchronous communications. For example, in one aspect, the network can allocate bandwidth for asynchronous communication to low-power and low-latency devices, while providing other bandwidth for synchronous communication for nominal connections with higher spectral efficiency. In one such case, unauthorized transmissions can be allowed for small payload links. In one aspect, network bandwidth provisioning can be based on peak traffic demand expectations or other such network characteristics. For example, in one aspect, the provisioning can vary slowly based on historical demand and/or load patterns.

Figure 22 is a diagram illustrating an example of allocating bandwidth for synchronous and asynchronous communications using dynamic configuration in a wireless communication network according to certain aspects of the present disclosure. In one aspect, the network can dynamically supply bandwidth for asynchronous communication to Link A, Link B, and Link C based on load. In one such case, for light load/no load situations, the network can send control signaling to indicate that synchronization requirements can be relaxed (e.g., enabling asynchronous communication for Link A, Link B, and Link C). In one aspect, the user can switch from asynchronous to synchronous waveforms, or be notified by the network with a signal of specific parameters to be used. In one aspect, for heavy load situations, the network can propagate a signal to force synchronization (e.g., for Link A, Link B, and Link C, forcing synchronous communication). The diagram of Figure 22 shows bandwidth allocation for both light load and heavy load situations. For each link in Figure 22 (e.g., Link A, Link B, Link C), the link is depicted as a series of unshaded rectangles followed by a shaded rectangle, wherein the unshaded rectangle represents the CP length, and the shaded rectangle represents the symbol length.

Figure 23 is a diagram showing an example of allocating bandwidth for asynchronous communication using symbol numerology optimized for various use cases in a wireless communication network according to certain aspects of the present disclosure. Link A and Link B are using basic symbol numerology, which can be suitable for indoor/outdoor activities when mobile. Link C is using thin symbol numerology, which can be suitable for indoor activities when static. Link D is using low-power or small payload symbol numerology that can be similar to thin numerology. For each link in Figure 23 (e.g., Link A, Link B, Link C, Link D), the link is depicted as a series of unshaded rectangles followed by a shaded rectangle, wherein the unshaded rectangle represents the CP length and the shaded rectangle represents the symbol length. In one aspect, Figure 23 shows a design option that can allow multiplexing of symbol numerology optimized for various use cases.

FIG24 is a diagram illustrating an exemplary process 2400 for allocating bandwidth for asynchronous communications in a wireless communication network, in accordance with certain aspects of the present disclosure. In one aspect, process 2400 may be performed according to one or more of the examples presented in FIG20 , FIG21 , and FIG22 . In one aspect, process 2400 may be performed using wireless device 100 of FIG1 (e.g., as a base station or equivalent in a wireless network). In block 2402, the process provides a preselected bandwidth for communications on the wireless network. In block 2404, the process allocates a first portion of the preselected bandwidth for synchronous communications on the wireless network. In block 2406, the process allocates a second portion of the preselected bandwidth for asynchronous communications on the wireless network based on traffic demand in the wireless network. In one aspect, traffic demand includes predicted traffic demand (e.g., static demand) and/or real-time traffic demand (e.g., dynamic demand).

In one aspect, process 2400 also handles collisions between users. For example, in one aspect, the process recovers signals from two pre-selected wireless devices that are communicating asynchronously, where the recovery may involve using code division multiple access across the two pre-selected wireless devices. In other cases, other collision handling techniques may be used.

FIG25 is a diagram 2500 illustrating a simplified example of a hardware implementation of an apparatus using a processing circuit 2502 and suitable for allocating bandwidth for asynchronous communications in a wireless communication network, in accordance with certain aspects of the present disclosure. The processing circuit 2502 may be provided in accordance with certain aspects described with respect to the processing system 114 of FIG1 . The processing circuit 2502 may include one or more processors 2512, which may include a microprocessor, a microcontroller, a digital signal processor, a sequencer, and/or a state machine. The processing circuit 2502 may be implemented with a bus architecture generally represented by a bus 2516. Depending on the specific application of the processing circuit 2502 and the overall design constraints, the bus 2516 may include any number of interconnected buses and bridges. The bus 2516 links together various circuits, including a computer-readable storage medium 2514 and one or more processors 2512 and/or hardware devices that operate in concert to perform the specific functions described herein and are represented by modules and/or circuits 2504, 2506, and 2508. The bus 2516 may also link various other circuits such as timing sources, timers, peripherals, voltage regulators, and power management circuits. A bus interface 2518 may provide an interface between the bus 2516 and other devices such as a transceiver 2520 or a user interface 2522. The transceiver 2520 may provide a wireless communication link for communicating with various other devices. In some cases, the transceiver 2520 and/or the user interface 2522 may be directly connected to the bus 2516.

Processor 2512 is responsible for general processing, including the execution of software stored as code on computer-readable storage medium 2514. When executed by processor 2512, the software configures one or more components of processing circuit 2502 so that processing circuit 2502 can perform the various functions described above for any particular device. Computer-readable storage medium 2514 may also be used to store data manipulated by processor 2512 when executing the software. Processing circuit 2502 also includes at least one of modules 2504, 2506, and 2508. Modules 2504, 2506, and 2508 may be software modules running on processor 2512 loaded from code present and/or stored on computer-readable storage medium 2514, one or more hardware modules coupled to processor 2512, or some combination thereof. Modules 2504, 2506, and/or 2508 may include microcontroller instructions, state machine configuration parameters, or some combination thereof.

Modules and/or circuits 2504 may be configured to provide a preselected bandwidth for communications over the wireless network.In one aspect, modules and/or circuits 2504 may be configured to perform the functions described with respect to block 2402 in FIG.

Modules and/or circuits 2506 may be configured to provision a first portion of a preselected bandwidth for simultaneous communications over the wireless network. In one aspect, modules and/or circuits 2506 may be configured to perform the functions described with respect to block 2404 in FIG. 24 .

Modules and/or circuits 2508 may be configured to provision a second portion of the preselected bandwidth for asynchronous communications on the wireless network based on traffic demand in the wireless network. In one aspect, modules and/or circuits 2508 may be configured to perform the functions described with respect to block 2406 in FIG. 24 .

Some general aspects of WOLA filtering are described above with respect to Figures 12-15. More specific aspects of WOLA filtering are described below with respect to Figures 26-27 (eg, with respect to a transmitter and then to a receiver).

FIG26 is a schematic diagram illustrating the transmit windowing operation of a weighted overlap-add (WOLA) filter according to certain aspects of the present disclosure. In operation, input symbol-A 2602 is received from the output of an upstream IFFT block (see IFFT 1004 in FIG10 ). A preselected portion of the end (e.g., the right edge) of symbol-A 2602 is copied, weighted using left-edge weighting function-B 2604, and appended to the beginning of symbol-A 2602 as a cyclic prefix (CP) 2602. A right-edge weighting function-A 2608 may also be applied to the end of symbol-A 2602. The resulting transmit waveform 2610 for symbol-A is shown at the bottom of FIG26 . In practice, the WOLA filter can be used to control the length and degree of edge roll-off of the transmit waveform derived from the IFFT input symbols.

FIG27 is a schematic diagram illustrating a receive windowing operation of a weighted overlap-add (WOLA) filter according to certain aspects of the present disclosure. In operation, a transmitted waveform (e.g., from the WOLA filter operation of FIG26 ) is captured and stored in a receive sample buffer for processing. The transmitted waveform may or may not have WOLA filtering along its edges as previously discussed. The received waveform can be shortened to the FFT input length by first applying a weighted average window 2702, which may be larger than the FFT input length, to accommodate a smoother roll-off. The edges of the weighted average output step can then be overlap-added by block 2704. The right side of the weighted average output is added to the left side of the waveform, and vice versa for the other side, to maintain cyclicity. Finally, a segment within the output having a length equal to the length of the FFT input is selected for further processing. Similar to the transmitter side, the receive WOLA filter can be used to control the length of the received waveform and the degree of edge roll-off for later processing at the FFT input.

The window length/placement in Figures 26-27 can be determined based on multiple factors including, for example, the power imbalance between the signal and the interference, the frequency separation between the signal and the interference, and the residual interference (without the interfering signal). In addition, the emission lower limit of the significant interferer can also be considered for the window placement.

Aspects of the present disclosure provide waveform designs for reducing inter-carrier interference between links. At least two system implementations have been described, including transmitter waveform designs for asynchronous communication (e.g., Figures 8, 9, 12, 13, 16, 17) and receiver waveform designs for asynchronous communication (e.g., Figures 10, 11, 14, 15, 18, 19).

Aspects of the present disclosure also provide for network design across asynchronous modes. More specifically, a network can include multiple links with different numerologies, multiple links with different timing offsets and/or both symbol and timing differences.

Aspects of the present disclosure also provide network planning and signaling for asynchronous communication. More specifically, the network can use static and/or dynamic partitioning to make provisions between asynchronous and synchronous communication. In one aspect, the partitioning can be based on load and traffic demand. In one aspect, the network can include provisions for handling conflicts such as using CDMA and successive interference cancellation. In one aspect, the network can comply with requirements regarding acknowledgement (ACK) for asynchronous transmissions.

Aspects of the present disclosure include methods for allowing coexistence of asynchronous and synchronous subcarriers within a given system bandwidth, and provide mechanisms for provisioning bandwidth accordingly.

As will be readily appreciated by those skilled in the art, the various aspects described throughout this disclosure can be extended to any suitable telecommunication system, network architecture, and communication standard. As an example, the various aspects can be applied to UMTS systems such as W-CDMA, TD-SCDMA, and TD-CDMA. The various aspects can also be applied to systems using Long Term Evolution (LTE) (using FDD, TDD, or both modes), Advanced LTE (LTE-A) (using FDD, TDD, or both modes), 5G, CDMA2000, Evolution Data Optimized (EV-DO), Ultra Mobile Broadband (UMB), IEEE 802.11 (Wi-Fi), IEEE 802.16 (WiMAX), IEEE 802.20, Ultra Wideband (UWB), Bluetooth, and/or other suitable systems, including those described by wide area network standards that have not yet been defined. The actual telecommunication standard, network architecture, and/or communication standard used will depend on the specific application and the overall design constraints imposed on the system.

Within this disclosure, the term "exemplary" is used to mean "serving as an example, instance, or illustration." Any implementation or aspect described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other aspects of this disclosure. Likewise, the term "aspect" does not require that all aspects of this disclosure include the discussed feature, advantage, or mode of operation. The term "coupled" is used herein to refer to a direct or indirect coupling between two objects. For example, if object A physically contacts object B, and object B contacts object C, objects A and C can still be considered coupled to each other even if they are not in direct physical contact with each other. For example, a first die can be coupled to a second die in a package even if the first die is never in direct physical contact with the second die. The terms "circuit" and "circuitry" are used broadly and are intended to include both hardware implementations of electrical devices and conductors that, when connected and configured, implement the functions described in this disclosure without limiting the type of electronic circuitry, and software implementations of information and instructions that, when executed by a processor, implement the functions described in this disclosure.

One or more parts, steps, features and/or functions of the parts, steps, features and/or functions shown in Figures 1-27 can be rearranged and/or combined into a single part, step, feature or function, or be included in several parts, steps or functions. Additional elements, parts, steps and/or functions can also be added without departing from the novel features disclosed herein. The devices, equipment and/or parts shown in Figures 1-27 can be configured to perform one or more methods, features or steps of the methods, features or steps described herein. The novel algorithms described herein can also be efficiently implemented and/or embedded in hardware using software.

It should be understood that the specific order or layering of steps in the disclosed methods is an illustration of an exemplary process. Based on design preferences, it should be understood that the specific order or layering of steps in the methods can be rearranged. The accompanying method claims present elements of the various steps in an example order and are not intended to be limited to the specific order or layering presented unless specifically recited therein.

The foregoing description is provided to enable anyone skilled in the art to practice the various aspects described herein. Various modifications to these aspects will be apparent to those skilled in the art, and the general principles defined herein can be applied to other aspects. Therefore, the claims are not intended to be limited to the aspects shown herein, but will conform to the full scope consistent with the language of the claims, wherein, unless specifically indicated otherwise, references to elements in the singular are not intended to mean "one and only one," but rather "one or more." Unless specifically indicated otherwise, the term "some" refers to one or more. A phrase referring to "at least one of" a list of items refers to any combination of those items, including individual members. As an example, "at least one of a, b, or c" is intended to cover: a; b; c; a and b; a and c; b and c; and a, b, and c. All structural and functional equivalents of the elements of the various aspects described throughout this disclosure that are known or later become known to those of ordinary skill in the art are expressly incorporated herein by reference and are intended to be included in the claims. In addition, nothing disclosed herein is intended to be contributed to the public, regardless of whether such disclosure is explicitly stated in the claims. Unless the element is expressly recited using the phrase "means for..." or, in the case of a method claim, the element is recited using the phrase "step for...", no claim element is to be construed under the provisions of 35 U.S.C. §112, sixth paragraph.

Accordingly, the various features associated with the examples described herein and shown in the accompanying drawings may be implemented in different examples and implementations without departing from the scope of the present disclosure. Thus, although specific specific configurations and arrangements have been described and shown in the accompanying drawings, such implementations are merely illustrative and do not limit the scope of the present disclosure, as various other additions, modifications, and deletions to the described implementations will be apparent to those skilled in the art. The scope of the present disclosure is therefore determined by the literal language of the claims that follow and their legal equivalents.

Claims (52)

1. A method for wireless communication, comprising: Generate an orthogonal waveform comprising one or more carriers at the first wireless device; Shaping the orthogonal waveform to reduce interference between the orthogonal waveform and adjacent waveforms, wherein shaping the orthogonal waveform includes filtering the orthogonal waveform to enable the first wireless device to transmit asynchronously; and The shaped waveform is transmitted asynchronously over the spectrum. 2. The wireless communication method according to claim 1: Wherein, generating the orthogonal waveform comprising one or more carriers at the first wireless device includes: Generate multiple user tones to be sent; Orthogonal Frequency Division Multiple Access (OFDMA) modulation is applied to the multiple user tones; and The transmission signal is generated from the OFDMA modulation; Wherein, shaping the waveform to reduce interference between the orthogonal waveform and adjacent waveforms includes: Filtering the transmitted signal to enable the first wireless device to transmit asynchronously; and The asynchronous transmission of the shaped waveform on the spectrum includes: transmitting the transmission signal. 3. The method according to claim 2, wherein filtering the transmitted signal to enable the first wireless device to transmit asynchronously comprises: filtering the transmitted signal using a weighted overlapping summation filter. 4. The method of claim 3, wherein filtering the transmitted signal using the weighted overlapping additive filter comprises: copying and weighting a portion of an input symbol derived from one of the plurality of user tones, and appending the portion of the input symbol to the beginning of the input symbol. 5. The method of claim 1, wherein filtering the orthogonal waveform to enable the first wireless device to transmit asynchronously comprises: filtering the orthogonal waveform using a weighted overlap summation filter. 6. The wireless communication method according to claim 1: Wherein, generating the waveform comprising one or more carriers at the first wireless device includes: Generate the user baseband signal to be transmitted; The user baseband signal is upsampled to generate an upsampled signal; Generate a cyclic prefix; and The cyclic prefix is inserted into the upsampled signal; Wherein, shaping the waveform to reduce interference between the waveform and adjacent waveforms includes: The upsampled signal having the cyclic prefix is filtered to generate a filtered signal; and The filtered signal is modulated at a pre-selected user subcarrier to generate the shaped waveform. 7. A wireless communication device, comprising: A unit for generating orthogonal waveforms including one or more carriers at a first wireless device; A unit for shaping the orthogonal waveform to reduce interference between the orthogonal waveform and adjacent waveforms, wherein the unit for shaping the orthogonal waveform includes a unit for filtering the orthogonal waveform to enable the first wireless device to transmit asynchronously; and A unit used to asynchronously transmit the shaped waveform over the spectrum. 8. The wireless communication device according to claim 7: The unit for generating the orthogonal waveform comprising one or more carriers at the first wireless device includes: Units used to generate multiple user tones to be sent; Units for applying orthogonal frequency division multiple access (OFDMA) modulation to the plurality of user tones; and A unit for generating a transmission signal from the OFDMA modulation; The unit for shaping the waveform to reduce interference between the orthogonal waveform and adjacent waveforms includes: A unit for filtering the transmitted signal to enable the first wireless device to transmit asynchronously; and The asynchronous transmission of the shaped waveform on the spectrum includes a unit for transmitting the transmission signal. 9. The wireless communication device according to claim 8, wherein the unit for filtering the transmitted signal to enable the first wireless device to transmit asynchronously comprises: a unit for filtering the transmitted signal using a weighted overlapping additive filter. 10. The wireless communication device of claim 9, wherein the unit for filtering the transmitted signal using the weighted overlapping additive filter comprises: a unit for copying and weighting a portion of an input symbol derived from one of the plurality of user tones, and appending the portion of the input symbol to the beginning of the input symbol. 11. The wireless communication device according to claim 7, wherein the unit for filtering the orthogonal waveform to enable the first wireless device to transmit asynchronously comprises: a unit for filtering the orthogonal waveform using a weighted overlapping additive filter. 12. The wireless communication device according to claim 7: The unit for generating the waveform including one or more carriers at the first wireless device includes: A unit used to generate the user baseband signal to be transmitted; A unit used to upsample the user baseband signal to generate an upsampled signal; Units used to generate cyclic prefixes; and The unit used to insert the cyclic prefix into the upsampled signal; The unit for shaping the waveform to reduce interference between the waveform and adjacent waveforms includes: A unit for filtering the upsampled signal having the cyclic prefix to generate a filtered signal; and A unit for modulating the filtered signal at a pre-selected user subcarrier to generate the shaped waveform. 13. A wireless communication device, comprising: At least one processor; A memory communicatively coupled to the at least one processor; and A communication interface communicatively coupled to the at least one processor, wherein the at least one processor is configured to: At a first wireless device, an orthogonal waveform to be transmitted is generated, the waveform comprising one or more carriers; Shaping the orthogonal waveform to reduce interference between the orthogonal waveform and adjacent waveforms, wherein shaping the orthogonal waveform includes filtering the orthogonal waveform to enable the first wireless device to transmit asynchronously; and The shaped waveform is transmitted asynchronously over the spectrum. 14. The wireless communication device according to claim 13, wherein the at least one processor is further configured to: Generate multiple user tones to be sent; Orthogonal Frequency Division Multiple Access (OFDMA) modulation is applied to the multiple user tones; and The transmission signal is generated from the OFDMA modulation; Filtering the transmitted signal to enable the first wireless device to transmit asynchronously; and Send the aforementioned transmission signal. 15. The wireless communication device according to claim 14, wherein the at least one processor is further configured to: The transmitted signal is filtered using a weighted overlapping summation filter. 16. The wireless communication device according to claim 15, wherein the at least one processor is further configured to: A portion of the input symbol derived from one of the plurality of user tones is copied and weighted, and the portion of the input symbol is appended to the beginning of the input symbol. 17. The wireless communication device according to claim 13, wherein the at least one processor is further configured to: The orthogonal waveform is filtered using a weighted overlapping additive filter so that the first wireless device can transmit asynchronously. 18. The wireless communication device according to claim 13, wherein the at least one processor is further configured to: Generate the user baseband signal to be transmitted; The user baseband signal is upsampled to generate an upsampled signal; Generate a cyclic prefix; and The cyclic prefix is inserted into the upsampled signal; The upsampled signal having the cyclic prefix is filtered to generate a filtered signal; and The filtered signal is modulated at a pre-selected user subcarrier to generate the shaped waveform. 19. A non-transitory computer-readable medium storing computer-executable code, comprising code for performing the following operations: Generate an orthogonal waveform comprising one or more carriers at the first wireless device; Shaping the orthogonal waveform to reduce interference between the orthogonal waveform and adjacent waveforms, wherein shaping the orthogonal waveform includes filtering the orthogonal waveform to enable the first wireless device to transmit asynchronously; and The shaped waveform is transmitted asynchronously over the spectrum. 20. The computer-readable medium of claim 19, further comprising code for performing the following operations: The orthogonal waveform is filtered using a weighted overlapping additive filter so that the first wireless device can transmit asynchronously. 21. The computer-readable medium of claim 19, further comprising code for performing the following operations: Generate multiple user tones to be sent; Orthogonal Frequency Division Multiple Access (OFDMA) modulation is applied to the multiple user tones; and The transmission signal is generated from the OFDMA modulation; Filtering the transmitted signal to enable the first wireless device to transmit asynchronously; and Send the aforementioned transmission signal. 22. The computer-readable medium of claim 21, further comprising code for performing the following operations: The transmitted signal is filtered using a weighted overlapping summation filter. 23. The computer-readable medium of claim 22, further comprising code for performing the following operations: A portion of the input symbol derived from one of the plurality of user tones is copied and weighted, and the portion of the input symbol is appended to the beginning of the input symbol. 24. The computer-readable medium of claim 19, further comprising code for performing the following operations: Generate the user baseband signal to be transmitted; The user baseband signal is upsampled to generate an upsampled signal; Generate a cyclic prefix; and The cyclic prefix is inserted into the upsampled signal; The upsampled signal having the cyclic prefix is filtered to generate a filtered signal; and The filtered signal is modulated at a pre-selected user subcarrier to generate the shaped waveform. 25. A method for wireless communication, comprising: At a first wireless device, a signal is received via asynchronous communication on the spectrum, wherein the signal comprises an orthogonal waveform comprising one or more carriers; The received signal is filtered to reduce interference from other asynchronous communications on the spectrum; and Recover user data from filtered signals. 26. The wireless communication method according to claim 25: Wherein, receiving the signal at the first wireless device via asynchronous communication on the spectrum includes: The signal is received from a second wireless device in an orthogonal frequency division multiple access (OFDMA) communication system; The filtering of the received signal to reduce interference from other asynchronous communications on the spectrum includes: The received signal is filtered to reduce interference from other asynchronous communications in the OFDMA system; and The recovery of the user data from the filtered signal includes: The received signal is demodulated using OFDMA to generate multiple frequency domain outputs; and Frequency domain equalization is applied to the frequency domain output to recover multiple user tones from the second wireless device. 27. The method of claim 26, wherein filtering the received signal to reduce interference from other asynchronous communications in the OFDMA system comprises: filtering the received signal using a weighted overlap summation filter. 28. The method of claim 27, wherein filtering the received signal to reduce interference from other asynchronous communications in the OFDMA system comprises: copying and weighting the end portion of an input symbol in the received signal, and appending the end portion of the input symbol to the beginning of the input symbol. 29. The method of claim 27, wherein filtering the received signal to reduce interference from other asynchronous communications in the OFDMA system comprises: copying and weighting the beginning portion of an input symbol in the received signal, and appending the beginning portion of the input symbol to the end of the input symbol. 30. The wireless communication method according to claim 25: Wherein, receiving the signal at the first wireless device via asynchronous communication on the spectrum includes: Receive signals from a second wireless device that communicates asynchronously on the spectrum; The filtering of the received signal to reduce interference from other asynchronous communications on the spectrum includes: The received signal is demodulated and filtered at a pre-selected subcarrier to obtain the user signal, thereby reducing interference from other wireless devices communicating asynchronously on the spectrum; and The recovery of the user data from the filtered signal includes: Frequency domain equalization is applied to the processed signal derived from the user signal to generate multiple equalized symbols; and The user data is recovered from the equalized symbols. 31. The method of claim 30, further comprising: Remove the cyclic prefix from the user signal before applying the frequency domain equalization. 32. A wireless communication device, comprising: A unit for receiving signals via asynchronous communication on the spectrum at a first wireless device, wherein the signals include orthogonal waveforms, the orthogonal waveforms including one or more carriers; A unit for filtering the received signal to reduce interference from other asynchronous communications on the spectrum; and A unit used to recover user data from filtered signals. 33. The wireless communication device according to claim 32: The unit for receiving the signal at the first wireless device via asynchronous communication on the spectrum includes: A unit for receiving the signal from a second wireless device in an orthogonal frequency division multiple access (OFDMA) communication system; The unit for filtering the received signal to reduce interference from other asynchronous communications on the spectrum includes: A unit for filtering the received signal to reduce interference from other asynchronous communications in the OFDMA system; and The unit for recovering the user data from the filtered signal includes: A unit for applying OFDMA demodulation to the received signal to generate multiple frequency domain outputs; and A unit for applying frequency domain equalization to the frequency domain output to recover multiple user tones from the second wireless device. 34. The wireless communication device of claim 33, wherein the unit for filtering the received signal to reduce interference from other asynchronous communications in the OFDMA system comprises: a unit for filtering the received signal using a weighted overlapping additive filter. 35. The wireless communication device of claim 34, wherein the unit for filtering the received signal to reduce interference from other asynchronous communications in the OFDMA system comprises: a unit for copying and weighting the end portion of an input symbol in the received signal, and appending the end portion of the input symbol to the beginning of the input symbol. 36. The wireless communication device of claim 34, wherein the unit for filtering the received signal to reduce interference from other asynchronous communications in the OFDMA system comprises: a unit for copying and weighting the start portion of an input symbol in the received signal, and appending the start portion of the input symbol to the end of the input symbol. 37. The wireless communication device according to claim 32: The unit for receiving the signal at the first wireless device via asynchronous communication on the spectrum includes: A unit for receiving signals from a second wireless device that communicates asynchronously on the spectrum; The unit for filtering the received signal to reduce interference from other asynchronous communications on the spectrum includes: A unit for demodulating and filtering a received signal at a pre-selected subcarrier to obtain a user signal, thereby reducing interference from other wireless devices communicating asynchronously on the spectrum; and The unit for recovering the user data from the filtered signal includes: A unit for applying frequency domain equalization to the processed signal derived from the user signal, thereby generating a plurality of equalized symbols; and Unit for recovering user data from the equalized symbols. 38. The wireless communication device according to claim 37, further comprising: A unit for removing the cyclic prefix from the user signal before applying the frequency domain equalization. 39. A wireless communication device, comprising: At least one processor; Memory, communicatively coupled to the at least one processor; and A communication interface communicatively coupled to the at least one processor, wherein the at least one processor is configured to: At a first wireless device, a signal is received via asynchronous communication on the spectrum, wherein the signal comprises an orthogonal waveform comprising one or more carriers; The received signal is filtered to reduce interference from other asynchronous communications on the spectrum; and Recover user data from filtered signals. 40. The wireless communication device of claim 39, wherein the at least one processor is further configured to: The signal is received from a second wireless device in an orthogonal frequency division multiple access (OFDMA) communication system; The received signal is filtered to reduce interference from other asynchronous communications in the OFDMA system; and The received signal is demodulated using OFDMA to generate multiple frequency domain outputs; and Frequency domain equalization is applied to the frequency domain output to recover multiple user tones from the second wireless device. 41. The wireless communication device according to claim 40, wherein the at least one processor is further configured to: The received signal is filtered using a weighted overlapping additive filter. 42. The wireless communication device according to claim 41, wherein the at least one processor is further configured to: The last part of the input symbol in the received signal is copied and weighted, and the last part of the input symbol is appended to the beginning of the input symbol. 43. The wireless communication device according to claim 41, wherein the at least one processor is further configured to: The starting portion of the input symbol in the received signal is copied and weighted, and the starting portion of the input symbol is appended to the end of the input symbol. 44. The wireless communication device of claim 39, wherein the at least one processor is further configured to perform the following operations: Receive signals from a second wireless device that communicates asynchronously on the spectrum; The received signal is demodulated and filtered at a pre-selected subcarrier to obtain the user signal, thereby reducing interference from other wireless devices communicating asynchronously on the spectrum; and Frequency domain equalization is applied to the processed signal derived from the user signal to generate multiple equalized symbols; and User data is recovered from the balanced symbols. 45. The wireless communication device according to claim 44, wherein the at least one processor is further configured to: Remove the cyclic prefix from the user signal before applying the frequency domain equalization. 46. A non-transitory computer-readable medium storing computer-executable code, comprising code for performing the following operations: At a first wireless device, a signal is received via asynchronous communication on the spectrum, wherein the signal comprises an orthogonal waveform comprising one or more carriers; The received signal is filtered to reduce interference from other asynchronous communications on the spectrum; and Recover user data from filtered signals. 47. The computer-readable medium of claim 46, further comprising code for performing the following operations: The signal is received from a second wireless device in an orthogonal frequency division multiple access (OFDMA) communication system; The received signal is filtered to reduce interference from other asynchronous communications in the OFDMA system; and The received signal is demodulated using OFDMA to generate multiple frequency domain outputs; and Frequency domain equalization is applied to the frequency domain output to recover multiple user tones from the second wireless device. 48. The computer-readable medium of claim 47, further comprising code for performing the following operations: The received signal is filtered using a weighted overlapping additive filter. 49. The computer-readable medium of claim 48, further comprising code for performing the following operations: The last part of the input symbol in the received signal is copied and weighted, and the last part of the input symbol is appended to the beginning of the input symbol. 50. The computer-readable medium of claim 48, further comprising code for performing the following operations: The starting portion of the input symbol in the received signal is copied and weighted, and the starting portion of the input symbol is appended to the end of the input symbol. 51. The computer-readable medium of claim 46, further comprising code for performing the following operations: Receive signals from a second wireless device that communicates asynchronously on the spectrum; The received signal is demodulated and filtered at a pre-selected subcarrier to obtain the user signal, thereby reducing interference from other wireless devices communicating asynchronously on the spectrum; Frequency domain equalization is applied to the processed signal derived from the user signal to generate multiple equalized symbols; and The user data is recovered from the equalized symbols. 52. The computer-readable medium of claim 51, further comprising code for performing the following operations: Remove the cyclic prefix from the user signal before applying the frequency domain equalization.