HK1232345B - Systems and methods related to linear and efficient broadband power amplifiers - Google Patents

Description

Systems and methods related to linear and efficient broadband power amplifiers

CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims priority to U.S. Provisional Application No. 61/992,842, filed May 13, 2014, entitled “SYSTEMS AND METHODS RELATED TO LINEAR AND EFFICIENT BROADBAND POWER AMPLIFIERS,” U.S. Provisional Application No. 61/992,843, filed May 13, 2014, entitled “CIRCUITS, DEVICES AND METHODS RELATED TO COMBINERS FOR DOHERTY POWER AMPLIFIERS,” and U.S. Provisional Application No. 61/992,844, filed May 13, 2014, entitled “SYSTEMS AND METHODS RELATED TO LINEAR LOAD MODULATED POWER AMPLIFIERS,” the disclosures of which are hereby expressly incorporated herein by reference in their entireties.

The present disclosure is related to U.S. patent application Ser. No. 14/797,254, filed on Jul. 13, 2015, entitled “SYSTEMS AND METHODS RELATED TO LINEAR AND EFFICIENT BROADBAND POWER AMPLIFIERS,” U.S. patent application Ser. No. 14/797,275, filed on Jul. 13, 2015, entitled “SYSTEMS AND METHODS RELATED TO LINEAR LOAD MODULATED POWER AMPLIFIERS,” and U.S. patent application Ser. No. 14/797,261, filed on Jul. 13, 2015, entitled “CIRCUITS, DEVICES AND METHODS RELATED TO COMBINERS FOR DOHERTY POWER AMPLIFIERS,” the disclosures of which are hereby expressly incorporated herein by reference in their entireties.

Technical Field

The present disclosure generally relates to radio frequency (RF) power amplifiers (PAs).

Background Art

Traditionally, Doherty PAs have been widely considered unsuitable for linear PA applications in handheld devices due to their size, complexity, and nonlinear behavior. In fact, in basestation applications, predistortion linearizers are typically used with Doherty PAs to meet linearity requirements. As described herein, issues associated with Doherty PAs, such as size, complexity, and linearity, can be appropriately addressed.

Summary of the Invention

According to some implementations, the present disclosure relates to a power amplifier (PA) system, comprising: an input circuit configured to receive a radio frequency (RF) signal and divide the RF signal into a first portion and a second portion; a Doherty amplifier circuit comprising a carrier amplification path coupled to the input circuit to receive the first portion, and a peaking amplification path coupled to the input circuit to receive the second portion; and an output circuit coupled to the Doherty amplifier circuit. The output circuit may include a balanced-to-unbalanced (BALUN) circuit configured to combine outputs of the carrier amplification path and the peaking amplification path to produce an amplified RF signal.

In some embodiments, the PA system may further include a pre-driver amplifier configured to partially amplify the RF signal before being received by the input circuit. In some embodiments, at least one of the input circuit and the output circuit may be implemented as a lumped element circuit.

In some embodiments, the carrier amplification path may include a carrier amplifier and the peak amplification path may include a peak amplifier, each of the carrier amplifier and the peak amplifier including a driver stage and an output stage. In some embodiments, the input circuit may include: a modified Wilkinson power divider configured to provide DC power to each of the carrier amplifier and the peak amplifier. In some embodiments, the DC power may be provided to the carrier amplifier and the peak amplifier through a choke inductor. In some embodiments, each of the carrier amplification path and the peak amplification path may include a DC blocking capacitor. In some embodiments, the modified Wilkinson power divider may also be configured to provide impedance matching between the driver stage and the pre-driver amplifier. In some embodiments, each of the carrier amplification path and the peak amplification path may include an LC matching circuit having a capacitance along the path and an inductive coupling to ground.

In some embodiments, the modified Wilkinson power divider can be configured to provide a desired phase shift to compensate for or tune the AM-PM effect associated with the peaking amplifier. In some embodiments, the modified Wilkinson power divider can also be configured to provide a desired attenuation adjustment at the input of the carrier amplifier or the peaking amplifier to compensate for or tune the AM-AM effect associated with the carrier amplifier and the peaking amplifier. In some embodiments, the modified Wilkinson power divider includes: a capacitor that couples a first node to ground along the carrier amplification path; and an impedance that couples a second node to ground along the peaking amplification path. In some embodiments, the modified Wilkinson power divider can also include an isolation resistor implemented between the first node and the second node, the isolation resistor being selected to prevent or reduce a source-pulling effect between the carrier amplification path and the peaking amplification path.

In some embodiments, the BALUN circuit can include an LC BALUN transformer. In some embodiments, the peaking amplifier can be configured to behave as a short circuit or low impedance node when in an off state, and the carrier amplifier can be configured to behave as a single-ended amplifier when utilizing the LC BALUN transformer, which is equivalent to a single-section matching network with a series inductor and a bypass capacitor. In some embodiments, the LC BALUN transformer can be configured such that the impedance seen by the carrier amplifier increases when in low power mode. In some embodiments, the impedance seen by the carrier amplifier approximately doubles when in low power mode.

In some embodiments, the peaking amplifier can also be configured to operate in a manner similar to a push-pull amplifier, in which the RF current from the carrier amplifier is affected by the RF current from the peaking amplifier. In some embodiments, the push-pull operation can reduce even-harmonics, thereby improving linearity.

In some embodiments, the LC balun converter may include a first path coupling the output of the carrier amplifier to the output node, and a second path coupling the output of the peaking amplifier to the output node. In some embodiments, each of the first path and the second path may be inductively coupled to a DC port to provide a DC feed to the output stage. In some embodiments, each of the first path and the second path may include a harmonic suppressor. In some embodiments, the harmonic suppressor may include a second harmonic suppressor having an LC bypass to ground and a series inductor. In some embodiments, the second path may include a bypass capacitor and a series capacitor configured to provide phase compensation for the output of the peaking amplifier. In some embodiments, at least one of the bypass capacitor and the series capacitor may be a surface mount technology (SMT) capacitor.

In some embodiments, the LC balun converter can be configured to provide reduced losses in the carrier amplification path to maintain high efficiency in back-off and in high power mode.

In some embodiments, the load modulation of the peaking amplifier can be configured such that the impedance loci of the peaking amplifier runs from a near short circuit when the peaking amplifier is in an off state to an optimal load impedance when the peaking amplifier contributes approximately the same power as the carrier amplifier.

In some embodiments, the input circuit can be a wideband circuit due at least in part to a lead-lag network configured to provide a wideband phase shift.

In some embodiments, the input circuit is configured to provide reactiveness for practical impedance matching and isolation between the carrier amplifier and the peaking amplifier while providing broadband performance.

In some implementations, the present disclosure relates to a method for amplifying a radio frequency (RF) signal, the method comprising: providing a Doherty amplifier circuit having a carrier amplification path and a peaking amplification path; receiving an RF signal; dividing the RF signal into a first portion and a second portion, the first portion being provided to the carrier amplification path and the second portion being provided to the peaking amplification path; and combining outputs of the carrier amplification path and the peaking amplification path to produce an amplified RF signal using a balanced-to-unbalanced (BALUN) circuit.

In some implementations, the present disclosure relates to a power amplifier module. The power amplifier module may include: a packaging substrate configured to accommodate multiple components; and a power amplifier (PA) system implemented on the packaging substrate. The PA system may include: an input circuit configured to receive an RF signal and divide the RF signal into a first part and a second part. The PA system may also include a Doherty amplifier circuit having a carrier amplification path coupled to the input circuit to receive the first part, and a peak amplification path coupled to the input circuit to receive the second part. The PA system may also include: an output circuit coupled to the Doherty amplifier circuit. The output circuit may include: a balanced-to-unbalanced (BALUN) circuit configured to combine the outputs of the carrier amplification path and the peak amplification path to produce an amplified RF signal. The power amplifier module may also include: a plurality of connectors configured to provide electrical connections between the PA system and the packaging substrate.

In some implementations, the present disclosure relates to a wireless device comprising: a transceiver configured to generate a radio frequency signal; a power amplifier (PA) module in communication with the transceiver; and an antenna in communication with the PA module, the antenna configured to facilitate transmission of the amplified RF signal. The PA module may include an input circuit configured to receive the RF signal and divide the RF signal into a first portion and a second portion. The PA module may also include a Doherty amplifier circuit having a carrier amplification path coupled to the input circuit to receive the first portion, and a peaking amplification path coupled to the input circuit to receive the second portion. The PA module may also include an output circuit coupled to the Doherty amplifier circuit. The output circuit may include a balanced-to-unbalanced (BALUN) circuit configured to combine the outputs of the carrier amplification path and the peaking amplification path to produce an amplified RF signal. The transceiver may also include an antenna in communication with the PA module, configured to facilitate transmission of the amplified RF signal.

According to some implementations, the present disclosure relates to a signal combiner, comprising: a Balun converter circuit having a first coil and a second coil. The first coil is implemented between a first port and a second port. The second coil is implemented between a third port and a fourth port. The first port and the third port are coupled via a first capacitor. The second port and the fourth port are coupled via a second capacitor. The first port is configured to receive a first signal. The fourth port is configured to receive a second signal. The second port is configured to generate a combination of the first and second signals. The signal combiner further comprises: a termination circuit coupling the third port to ground.

In some embodiments, the first port can be configured to receive a carrier-amplified signal from a Doherty power amplifier (PA), and the fourth port can be configured to receive a peak-amplified signal from the Doherty PA. In some embodiments, the termination circuit can include a capacitor. In some embodiments, the capacitor can have a capacitance approximately equal to 2 times π (pi) times the operating frequency of the Doerty PA times the multiplicative inverse of the characteristic impedance of a load coupled to the Doherty PA.

In some embodiments, the first port can be configured to receive a peak-amplified signal from a Doherty power amplifier (PA), and the fourth port can be configured to receive a carrier-amplified signal from the Doherty PA. In some embodiments, the termination circuit can include an inductor. In some embodiments, the inductor can have an inductance approximately equal to the characteristic impedance of a load coupled to the Doherty PA divided by the product of 2 times π (pi) times the operating frequency of the Doherty PA.

In some embodiments, the S-parameter between the first one of the ports and the second one of the ports may be approximately equal to (1+j)/2. In some embodiments, the S-parameter between the first one of the ports and the second one of the ports may be approximately equal to (1-j)/2. In some embodiments, the S-parameter matrix of the S-parameters between the ports may include only values approximately 0, (1+j)/2, and (1-j)/2.

In some embodiments, the balun transformer circuit can be implemented as an integrated passive device. In some embodiments, the integrated passive device also implements an auto-transformer based impedance matching circuit.

In some implementations, the present disclosure relates to a power amplifier (PA) module, comprising: a packaging substrate configured to accommodate a plurality of components; and a signal combiner implemented on the packaging substrate. The signal combiner includes a balun converter circuit having a first coil and a second coil. The first coil is implemented between a first port and the second port. The second coil is implemented between a third port and a fourth port. The first port and the third port are coupled via a first capacitor. The second port and the fourth port are coupled via a second capacitor. The first port is configured to receive a first signal. The fourth port is configured to receive a second signal. The second port is configured to generate a combination of the first signal and the second signal. The signal combiner also includes a termination circuit that couples the third port to ground.

In some embodiments, the balun transformer circuit can be implemented as an integrated passive device. In some embodiments, the integrated passive device can also implement an impedance matching circuit based on an auto-transformer.

In some embodiments, the PA module may further include a Doherty PA implemented on a package substrate. The Doherty PA may have a carrier amplification path for generating a carrier amplified signal and a peak amplification path for generating a peak amplified signal. In some embodiments, the first port may be configured to receive the carrier amplified signal, and the fourth port may be configured to receive the peak amplified signal. In some embodiments, the termination circuit may include a capacitor having a capacitance approximately equal to the inverse of the multiplication of 2 times π times the operating frequency of the Doerty PA times the characteristic impedance of a load coupled to the Doherty PA. In some embodiments, the first port may be configured to receive the peak amplified signal, and the fourth port may be configured to receive the carrier amplified signal. In some embodiments, the termination circuit may include an inductor having an inductance approximately equal to the characteristic impedance of the load coupled to the Doherty PA divided by 2 times π times the operating frequency of the Doherty PA.

In some embodiments, the S-parameter matrix of the S-parameters between ports includes only values approximately 0, (1+j)/2, and (1-j)/2.

In some implementations, the present disclosure relates to a wireless device comprising: a transceiver configured to generate a radio frequency (RF) signal. The wireless device also includes a power amplifier (PA) module in communication with the transceiver. The PA module includes an input circuit configured to receive an RF signal and split the RF signal into a first portion and a second portion. The PA module also includes a Doherty PA having a carrier amplification path coupled to the input circuit to receive the first portion, and a peaking amplification path coupled to the input circuit to receive the second portion. The PA module also includes an output circuit coupled to the Doherty amplifier circuit. The output circuit includes a balun converter circuit having a first coil and a second coil. The first coil is implemented between a first port and a second port. The second coil is implemented between a third port and a fourth port. The first port and the third port are coupled via a first capacitor. The second port and the fourth port are coupled via a second capacitor. The first port is configured to receive a first signal via the carrier amplification path. The fourth port is configured to receive a second signal via the peaking amplification path. The second port is configured to generate a combination of the first and second signals as an amplified RF signal. The wireless device also includes an antenna in communication with the PA module. The antenna is configured to facilitate transmission of the amplified RF signal.

In some implementations, the present disclosure relates to a method for amplifying a radio frequency (RF) signal. The method includes providing a Doherty amplifier circuit having a carrier amplification path and a peaking amplification path; receiving an RF signal; dividing the RF signal into a first portion and a second portion, the first portion being provided to the carrier amplification path and the second portion being provided to the peaking amplification path; and combining the output of the carrier amplification path and the output of the peaking amplification path using a balun converter circuit to generate an amplified RF signal. The balun converter circuit includes a first coil and a second coil. The first coil is implemented between a first port and a second port. The second coil is implemented between a third port and a fourth port. The first port and the third port are coupled via a first capacitor. The second port and the fourth port are coupled via a second capacitor. The first port is configured to receive the output of the carrier amplification path. The fourth port is configured to receive the output of the peaking amplification path. The second port is configured to generate an amplified RF signal.

According to some implementations, the present disclosure relates to a power amplifier (PA) system, comprising: an input circuit configured to receive a radio frequency (RF) signal and divide the RF signal into a first portion and a second portion. The PA system also includes: a Doherty amplifier circuit, comprising a carrier amplifier coupled to the input circuit to receive the first portion, and a peaking amplifier coupled to the input circuit to receive the second portion. The first portion and the second portion have different phases and different powers. The PA system also includes: an output circuit coupled to the Doherty amplifier circuit. The output circuit is configured to combine the outputs of the carrier amplifier and the peaking amplifier to produce an amplified RF signal.

In some embodiments, the input circuit can include a phase shifter configured to cause the first portion and the second portion to have different phases. In some embodiments, the phase shifter and the peaking amplifier can be implemented in the peaking amplification path. In some embodiments, the first portion and the second portion can have a phase difference of between 10 and 20 degrees. In some embodiments, the different phases can reduce at least one of AM/AM distortion or AM/PM distortion compared to the same phase.

In some embodiments, the input circuit may include an attenuator configured such that the first portion and the second portion have different powers. In some embodiments, the attenuator and the carrier amplifier may be implemented in a carrier amplification path. In some embodiments, the different powers may reduce at least one of AM/AM distortion or AM/PM distortion compared to equal powers.

In some embodiments, the input circuit may include a pre-driver amplifier.

In some embodiments, the peaking amplifier includes: a driver stage configured to operate in a first bias mode; and an output stage configured to operate in the first bias mode. In some embodiments, the first bias mode is a class B bias mode. In some embodiments, the class B bias mode improves the PAE of the peaking amplifier compared to the class AB bias mode. In some embodiments, the carrier amplifier includes a driver stage configured to operate in a second bias mode. In some embodiments, the second bias mode is a class AB bias mode. In some embodiments, the carrier amplifier further includes an output stage configured to operate in the first bias mode. In some embodiments, the carrier amplifier further includes an output stage configured to operate in the second bias mode.

In some implementations, the present disclosure relates to a power amplifier (PA) module. The PA module includes: a packaging substrate configured to accommodate multiple components; and a PA system implemented on the packaging substrate. The PA system includes: an input circuit configured to receive a radio frequency (RF) signal and divide the RF signal into a first part and a second part. The PA system also includes: a Doherty amplifier circuit including a carrier amplifier coupled to the input circuit to receive the first part, and a peak amplifier coupled to the input circuit to receive the second part. The first part and the second part have different phases and different powers. The PA system also includes an output circuit coupled to the Doherty amplifier circuit. The output circuit is configured to combine the outputs of the carrier amplifier and the peak amplifier to generate an amplified RF signal.

In some embodiments, at least one of the input circuit or the output circuit can be implemented as an integrated passive device. In some embodiments, at least one of the input circuit or the output circuit can be implemented on a single GaAs die.

In some implementations, the present disclosure relates to a wireless device. The wireless device includes a transceiver configured to generate a radio frequency (RF) signal. The wireless device includes a power amplifier (PA) module in communication with the transceiver. The PA module includes an input circuit configured to receive an RF signal and divide the RF signal into a first part and a second part. The PA module includes a Doherty amplifier circuit including a carrier amplifier coupled to the input circuit to receive the first part, and a peak amplifier coupled to the input circuit to receive the second part. The first part and the second part have different phases and different powers. The PA module includes an output circuit coupled to the Doherty amplifier circuit. The output circuit is configured to combine the outputs of the carrier amplifier and the peak amplifier to produce an amplified RF signal. The wireless device also includes an antenna in communication with the PA module. The antenna is configured to facilitate transmission of the amplified RF signal.

In some implementations, the present disclosure relates to a method for amplifying a radio frequency (RF) signal. The method includes providing a Doherty amplifier circuit having a carrier amplification path and a peaking amplification path; receiving an RF signal; dividing the RF signal into a first portion and a second portion, the first portion being provided to the carrier amplification path and the second portion being provided to the peaking amplification path, the first portion and the second portion having different phases and different powers; and combining an output of the carrier amplification path and an output of the peaking amplification path to generate an amplified RF signal.

For the purpose of summarizing this disclosure, certain aspects, advantages, and novel features of the present invention have been described herein. It will be appreciated that, according to any particular embodiment of the present invention, it is not necessary to realize all of these advantages. Thus, the present invention may be implemented or performed in a manner that realizes or optimizes one advantage or a group of advantages as taught herein, without necessarily realizing other advantages as may be taught or suggested herein.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 shows that in some embodiments the power amplifier may be implemented as a linear and efficient broadband power amplifier.

FIG2 illustrates an example architecture of a power amplifier including a carrier amplification path and a peaking amplification path.

FIG3 shows an example configuration of a modified Wilkinson-type power splitter.

FIG. 4 shows an example configuration of a combiner that can provide balanced-to-unbalanced (BALUN) converter functionality.

FIG5 shows a first example load modulation profile of a carrier amplifier and a peaking amplifier using a BALUN converter configuration.

FIG6 shows a second example load modulation profile for a carrier amplifier and a peaking amplifier using a BALUN converter configuration.

FIG. 7 shows an example configuration of a power amplifier including a modified Wilkinson-type power divider.

FIG8 shows an example wideband phase shift response.

FIG. 9 shows an example impedance response including a harmonic trap.

FIG10 shows example adjacent channel leakage power ratio (ACLR) curves and power added efficiency (PAE) curves.

FIG11 depicts a wireless device having one or more features described herein.

FIG12 shows an example combiner configuration where both the carrier amplifier and the peaking amplifier are in the on state.

FIG13 shows an example combiner configuration with the carrier amplifier in the on-state and the peaking amplifier in the off-state.

FIG14 shows an example Doherty combiner comprising two or more quarter-wave transmission lines.

FIG. 15 shows an example Smith diagram for the combiner of FIG. 14 .

FIG16 shows an example Doherty combiner including a 3dB coupler.

FIG. 17 shows an example Smith diagram for the combiner of FIG. 16 .

FIG. 18 shows an example hybrid circuit that may be used as a Doherty combiner.

FIG. 19 shows another example hybrid circuit that can be used as a Doherty combiner.

FIG. 20 shows an example S-parameter matrix for the combiner of FIG. 16 .

FIG. 21 shows an example S-parameter matrix for the combiner of FIG. 18 .

FIG. 22 shows an example Doherty combiner configuration using the hybrid circuit of FIG. 18 .

FIG23 shows the impedance locus resulting from the Doherty behavior in the combiner of FIG22.

FIG. 24 shows another example Doherty combiner configuration using the hybrid circuit of FIG. 18 .

FIG. 25 shows an example of a hybrid circuit and autotransformer-based impedance matching integration as an integrated passive device (IPD).

FIG. 26 shows an example Smith chart with inverted load modulation traces.

FIG. 27 shows another example of integration of a hybrid circuit as an IPD.

28 illustrates an example architecture of a power amplifier that may implement a Doherty combiner having one or more features as described herein.

FIG29 depicts a wireless device having one or more features described herein.

FIG30 illustrates an example architecture of a power amplifier (PA) having one or more features as described herein.

FIG31 shows an example of a combiner circuit for a Doherty PA.

FIG32 shows an example of a divider circuit for a Doherty PA.

FIG. 33 shows an example of a power divider that may be used as the divider of FIG. 30 .

FIG. 34 shows another example of a power divider that can be used as the divider of FIG. 30 .

FIG. 35 shows an example of a combiner that can be used as the combiner of FIG. 30 .

FIG. 36 shows another example of a combiner that can be used as the combiner of FIG. 30 .

FIG37 shows an example of a low-headroom class AB bias circuit.

FIG38 shows an example of a low-headroom Class B bias circuit.

FIG39 shows an example of the beneficial effects of using class B biasing of the driver stage for the peaking amplifier.

FIG40 shows another example of the beneficial effects of using class B biasing of the driver stage for the peaking amplifier.

FIG. 41 shows an example of the linearization effect that can be obtained by introducing a phase shift between the RF signal associated with carrier amplification and peak amplification.

FIG. 42 shows an example of the linearization effect that can be obtained by introducing an uneven power split between the RF signal associated with carrier amplification and peak amplification.

FIG. 43 shows an example of the combined linearization effect that can be obtained through a combination of phase shifting and uneven power division.

44 illustrates example graphs of power added efficiency (PAE) and adjacent channel power (ACP) at various operating frequencies for a front end module (FEM).

FIG45 depicts a wireless device having one or more features described herein.

DETAILED DESCRIPTION

Headings provided herein, if any, are for convenience only and do not necessarily affect the scope or meaning of the claimed invention.Described herein are systems, devices, circuits, and methods related to radio frequency (RF) power amplifiers (PAs).

Power amplifier using Balun converter

FIG1 shows that in some embodiments, a PA 100 having one or more features as described herein can be configured to provide broadband capabilities with desired linearity and efficiency, or both. The PA 100 is shown receiving an RF signal (RF_IN) and generating an amplified signal (RF_OUT). Various examples related to such a PA are described in more detail herein.

FIG2 shows an example architecture of a PA 100 having one or more examples as described herein. The architecture shown is a Doherty PA architecture. Although various examples are described in the context of such a Doherty PA architecture, it will be understood that one or more features of the present disclosure may also be implemented in other types of PA systems.

The example PA 100 is shown as including an input port (RF_IN) for receiving an RF signal to be amplified. Such an input RF signal may be partially amplified by a pre-driver amplifier 102 before being split into a carrier amplification path 110 and a peaking amplification path 130. Such splitting may be implemented by a splitter 104. Examples related to the splitter 104 are described in more detail herein, including with reference to examples in FIG3 and FIG7.

In FIG2 , carrier amplification path 110 is shown as including attenuator 112 and amplifier stages, generally designated 114. Amplification stage 114 is shown as including driver stage 116 and output stage 120. Driver stage 116 is shown as being biased by bias circuit 118, and output stage 120 is shown as being biased by bias circuit 122. In some embodiments, there may be a greater or fewer number of amplifier stages. In various examples described herein, amplifier stage 114 is sometimes described as an amplifier; however, it will be understood that such an amplifier may include one or more stages.

In FIG2 , peak amplification path 130 is shown as including phase shift circuit 132 and amplifier stages generally designated 134. Amplification stage 134 is shown as including driver stage 136 and output stage 140. Driver stage 136 is shown as being biased by bias circuit 138, and output stage 140 is shown as being biased by bias circuit 142. In some embodiments, there may be a greater or fewer number of amplifier stages. In various examples described herein, amplifier stage 134 is sometimes described as an amplifier; however, it will be understood that such an amplifier may include one or more stages.

2 further illustrates that carrier amplification path 110 and peaking amplification path 130 can be combined by combiner 144 to produce an amplified RF signal at output port (RF_OUT). Examples related to combiner 144 are described in more detail herein, including with reference to examples in FIG4 and FIG7.

In some embodiments, the splitter 104 of FIG. 2 can be implemented as a lumped element power divider. Such a power divider can be implemented as a modified Wilkinson-type power divider configured to provide DC power to each of the driver stages (e.g., 116 and 136 in FIG. 2 ). FIG. 3 illustrates an example configuration of a modified Wilkinson-type power divider 104 that can be implemented as the splitter 104 of FIG. 2 . FIG. 7 illustrates an example of how the modified Wilkinson-type power divider 104 can be implemented in the circuit example of the PA 100 of FIG. 2 .

In FIG3 , a modified power divider 104 is shown as including an input port 150 configured to receive an input RF signal. As shown in the example PA circuit 100 of FIG7 , the input port 150 can be coupled to the collector of transistor Q0 of the pre-driver amplifier 102. The input port 150 is also shown as being coupled to a divider node 156 via node 152. Node 152 is shown as being coupled to a DC power port 154 via an inductor L1 (e.g., an inductor). DC power for each of the driver stages can be obtained via the DC power port 154. In FIG3 , L1 can be part of a modified Wilkinson-type divider that matches the impedance seen into the divider to the impedance presented to the pre-driver PA collector. At the same time, L1 can serve as a DC path for the pre-driver.

In FIG3 , the carrier amplifier path (110 in FIG2 ) is shown as including a path from divider node 156 through capacitor C1, node 158, and capacitor C3 to node 160. Node 160 may or may not be connected to port 162 to facilitate coupling of the aforementioned path to the carrier amplifier (e.g., 114 in FIG2 ). Node 158 is shown coupled to ground via capacitor C2. Node 160 is shown coupled to ground via inductor L2.

In FIG3 , the peak amplification path (130 in FIG2 ) is shown as including a path from divider node 156 through capacitor C4, node 164, and capacitor C5 to node 166. Node 166 may or may not be connected to port 168 to facilitate coupling of the aforementioned path to the peak amplifier (e.g., 134 in FIG2 ). Node 164 is shown coupled to ground via inductor L3. Node 166 is shown coupled to ground via inductor L4.

3, resistor R1 is shown coupling node 158 of the carrier amplification path and node 164 of the peaking amplification path. Resistor R1 may be selected to act as an isolation resistor to prevent or reduce source pull effects from the carrier and/or peaking amplifiers.

3 , capacitor C1 can be selected to provide a DC blocking function for the carrier amplification path. Similarly, capacitor C4 can be selected to provide a DC blocking function for the peaking amplification path.

In FIG3 , capacitor C3 and inductor L2 may be selected to provide impedance matching between the pre-driver amplifier (e.g., 102 in FIG2 and FIG7 ) and carrier amplifier 114. Similarly, C5 and inductor L4 may be selected to provide impedance matching between the pre-driver amplifier (e.g., 102 in FIG2 and FIG7 ) and peaking amplifier 134.

In FIG3 , the capacitor C2 associated with the carrier amplification path and the inductor L3 associated with the peaking amplification path can be selected to provide a desired phase shift between the two paths. Such a phase shift can be selected, for example, to compensate for and/or tune for AM-PM phenomena associated with the peaking amplifier 134. In FIG2 , such a phase shift function is depicted as block 132 along the peaking amplification path 130.

In some embodiments, and as shown in FIG2 , an attenuator 112 may be provided along the carrier amplification path 110 (e.g., before the carrier amplifier 114) or the peaking amplification path 130 (e.g., before the peaking amplifier 134). Such an attenuator may be configured to provide desired attenuation adjustment to compensate for and/or tune AM-AM phenomena associated with either or both the carrier and peaking amplifiers. Such an attenuator may also improve uneven power division between the two amplification paths.

It is noted that the aforementioned correction and/or tuning of the AM-AM and/or AM-PM effects can result in the PA 100 of Figures 2 and 7 being substantially linear. Such linearity can be achieved without digital predistortion, which typically reduces the efficiency of the PA system and the suitability of the PA system for use in amplifiers for portable wireless devices. Furthermore, the linearity achieved by the PA 100 of Figures 2 and 7 (without digital predistortion) can be similar to the linear performance associated with a Class AB single-ended amplifier.

In some embodiments, combiner 144 of FIG. 2 can be implemented as or similar to a lumped element balanced-to-unbalanced (BALUN) converter. FIG. 4 shows an example configuration of combiner 144 that can provide such a BALUN converter function. FIG. 7 shows an example of how combiner 144 can be implemented in the circuit example of PA 100 of FIG. 2 .

In Figure 4, combiner 144 is shown as including a portion of the carrier amplification path (e.g., 110 in Figure 2) and a portion of the peaking amplification path (130) connected at a combining node 186. Combining node 186 is shown coupled to output port 198 (RF_OUT in Figures 2 and 7).

In FIG4 , this portion of the carrier amplification path is shown as coupling a combined node 186 and a node 182 via an inductor L13. Node 182 may or may not be connected to port 180 to facilitate coupling of the aforementioned path to the carrier amplifier (e.g., 114 in FIG2 ). Node 182 is shown coupled to ground via capacitor C11 and inductor L12. Node 182 is also shown coupled to port 184 via inductor L11.

In FIG4 , this portion of the peak amplification path is shown as coupling the combined node 186 and node 192 via inductor L16, node 196, and capacitor C14. Node 192 may or may not be connected to port 190 to facilitate coupling of the aforementioned path to the peaking amplifier (e.g., 134 in FIG2 ). Node 192 is shown coupled to ground via capacitor C12 and inductor L15. Node 192 is also shown coupled to port 194 via inductor L14. Node L196 is shown coupled to ground via capacitor C13.

In FIG4 , node 182 can be coupled to the collector of the output stage (e.g., 120 in FIG2 ) of the carrier amplifier (114) via port 180. Thus, a DC feed can be provided to the output stage (120) of the carrier amplifier (114) via port 184 and inductor L11. Similarly, node 192 can be coupled to the collector of the output stage (e.g., 140 in FIG2 ) of the peaking amplifier (134) via port 190. Thus, a DC feed can be provided to the output stage (140) of the peaking amplifier (134) via port 194 and inductor L14.

In Figure 4, capacitor C11, inductor L12, and inductor L13 can be selected to act as a second harmonic suppressor for the output of carrier amplifier (114). Similarly, capacitor C12, inductor L15, and inductor L16 can be selected to act as a second harmonic suppressor for the output of peaking amplifier (134).

In Figure 4, capacitors C13 and C14 can be selected to provide phase compensation for the output of peaking amplifier 134. In some embodiments, C13 and C14 can be implemented as surface mount technology (SMT) capacitors. In such embodiments, combiner 144 can be implemented as a broadband power combiner using as few as two SMT capacitors.

The example combiner 144 of FIG4 can provide the desired functionality for operation of a Doherty PA architecture. For example, the peak amplifier in a Doherty PA architecture typically needs to behave as a short circuit or very low impedance path when it is turned off, and when using an LC balun configuration, the carrier amplifier typically acts as a single-ended amplifier, whose equivalent circuit is similar or identical to a typical single-stage matching network (e.g., a series L and a shunt C). In such a state, the impedance seen by the carrier amplifier can double.

When the peaking amplifier is turned on, the PA system can operate in a manner similar to a "push-pull" amplifier. For example, the RF current from the carrier amplifier can see the current from the peaking amplifier. In this state, linearity can be improved because even-order harmonic content can be reduced.

As described herein, a combiner 144 having an example LC balun configuration can be implemented in a compact form using as few as two SMT components (e.g., capacitors). Such a combiner can be configured to provide impedance matching from, for example, a 50 ohm output to the collectors of transistors of a peaking and carrier amplifier including an RF choke and a harmonic suppressor.

As described herein, a combiner 144 having an example LC balun configuration can be implemented to reduce losses in the carrier amplifier path compared to other Doherty topologies. Such a feature can, in turn, facilitate efficient maintenance during fallback and high power modes. Furthermore, the LC balun configuration can provide required or desired impedance and phase adjustments for the carrier amplifier. Such a feature can be important when designing asymmetrically loaded Doherty transmitters.

In some embodiments, the load modulation associated with a peaking amplifier as described herein is generally opposite to that in a conventional Doherty transmitter. FIG5 illustrates the load modulation profiles of the carrier (200) and peaking (202) amplifiers of a conventional Doherty transmitter using a BALUN converter configuration. FIG6 illustrates the load modulation profiles of the carrier (204) and peaking (206) amplifiers of a Doherty transmitter using a BALUN converter configuration as described herein (e.g., FIG7 ). For the peaking amplifiers in FIG5 and FIG6 , it can be seen that the impedance trajectories run in opposite directions from their respective short-circuit states (e.g., when the peaking amplifier is off) to their respective optimal load impedance conditions (e.g., when the peaking amplifier contributes the same power as the carrier amplifier). For the conventional example of FIG5 , as power increases, the impedance trajectory of the peaking amplifier runs in the same direction as the impedance trajectory of the carrier amplifier. For the example of FIG6 , as power increases, the impedance trajectory of the peaking amplifier runs in the opposite direction to the impedance trajectory of the carrier amplifier.

FIG7 shows an example of a PA 100 having one or more features as described herein. The PA may include a pre-driver amplifier 102, such as a single-ended amplifier. The output of the pre-driver amplifier 102 is shown as being provided to a divider 104, such as in the example described with reference to FIG3 . The divided output of the divider 104 is shown as being provided to a carrier amplifier 114 and a peaking amplifier 134. The outputs of the carrier amplifier 114 and the peaking amplifier 134 are shown as being combined by a combiner 144, such as in the example described with reference to FIG4 .

In the example PA 100 of FIG7 , the splitter 104 and the combiner 144 can produce a broadband combination. For example, due to the lead-lag network that provides broadband phase shift, the splitter 104 is inherently broadband. An example of such a phase shift response is shown as curve 250 in FIG8 . The example response curve 250 represents a typical phase difference between a matched reactive base impedance and the collector of a driver amplifier. Also note that the splitter 104 provides advantageous features such as reactiveness for practical impedance matching, isolation between the carrier and peaking amplifiers, and still produces broadband performance.

In another example, combiner 144, with its LC balun configuration, can also contribute to the broadband performance of PA 100. As described herein, the LC balun can include a harmonic suppressor configured to maintain the impedance trajectory within a lower constant-Q circle. Examples of such impedance responses are shown as curves 260, 262, and 264 in FIG9. Example response curves 260, 262, and 264 represent collector load impedance versus frequency for different ZP values. ZP1 represents the load impedance seen by the carrier PA collector when both the carrier and peaking PAs are on (in operation), and in this example is approximately 5.7 + j0.119 ohms. ZP2 is the collector impedance at the peaking PA collector, which is similar to the previous case (e.g., the same impedance when both PAs are on). ZP4 is the impedance seen by the carrier PA collector when the peaking PA is off, which effectively doubles to approximately 10.86 + j0.058 ohms in this example. This feature effectively increases the bandwidth of the PA architecture because the impedance does not scale along a Smith chart with respect to frequency.

A PA architecture having one or more features as described herein (including the examples of Figures 1 to 4 and 7) can be configured to produce very good linearity and efficient wideband performance. For example, a 21% relative bandwidth can be achieved for a -37-dBc ACLR (adjacent channel leakage power ratio) using an LTE signal (e.g., 10-MHz BW, QPSK, 12RB). Figure 10 shows ACLR curves and power added efficiency (PAE) curves for different samples. The upper set of curves (270, 292) are the power added efficiency (PAE) for 27.5 and 27 dBm output power levels, respectively. The middle set of curves (274, 276) are ACLR1 for 27.5 and 27 dBm output power levels, respectively. The dashed curve (278) is ACLR2 for 27.5 dBm output power. In the context of ACLR performance, it can be seen that the -37-dBc ACLR bandwidth at 27-dBm output power is approximately 525 MHz (e.g., between markers "m39" and "m38"), which is approximately 21% of the center frequency of approximately 2500 MHz (e.g., marker "m48"). Note that the bandwidth can be even wider if the ACLR level is allowed to increase.

In some implementations, devices and/or circuits having one or more features described herein may be included in an RF device, such as a wireless device. Such devices and/or circuits may be implemented directly in the wireless device, in a modular form as described herein, or in some combination thereof. In some embodiments, such wireless devices may include, for example, cellular phones, smartphones, handheld wireless devices with or without telephone functionality, wireless tablets, and the like.

FIG11 schematically illustrates an example wireless device 400 having one or more advantageous features described herein. In an example, one or more PAs 110, collectively labeled PA architecture 100, may include one or more features as described herein. Such a PA may, for example, facilitate multi-band operation of the wireless device 400.

The PA 110 can receive its respective RF signals from the transceiver 410, which can be configured and operated to generate RF signals to be amplified and transmitted, and to process the received signals. The transceiver 410 is shown as interacting with a baseband subsystem 408, which is configured to provide conversion between data and/or voice signals intended for a user and RF signals intended for the transceiver 410. The transceiver 410 is also shown as being connected to a power management component 406, which is configured to manage power for the operation of the wireless device 400. Such power management can also control the operation of the baseband subsystem 408 and the PA 110.

The baseband subsystem 408 is shown connected to the user interface 402 to facilitate various inputs and outputs of voice and/or data to and from the user. The baseband subsystem 408 may also be connected to the memory 404, which is configured to store data and/or instructions to facilitate the operation of the wireless device 400 and/or provide storage of information for the user.

In the example wireless device 400, the output of the PA 110 is shown as matched (via matching circuit 420) and routed to the antenna 416 via its respective duplexers 412a-412d and the band select switch 414. The band select switch 414 can be configured to allow selection of the operating band. In some embodiments, each duplexer 412 can allow simultaneous transmit and receive operations using a common antenna (e.g., 416). In FIG11, the received signal is shown as being routed to an "Rx" path (not shown), which can include, for example, a low noise amplifier (LNA).

Many other wireless device configurations can utilize one or more of the features described herein. For example, a wireless device need not be a multi-band device. In another example, a wireless device can include additional antennas such as a diversity antenna, and additional connectivity features such as Wi-Fi, Bluetooth, and GPS.

Signal combination using a Balun transformer wound on a coil

A combiner can be implemented as part of a Doherty PA and is typically used to provide multiple functions. For example, the combiner can be configured to provide equal power combining when the PA is operating at full power. Figure 12 shows an example of such a configuration, where the combiner can function as a traditional power combiner. In Figure 12, the values of the various performance and operating parameters are examples and can be adjusted appropriately for different applications.

Thus, in FIG12 , a configuration 2100 is illustrated in which the carrier amplifier 2110 and the peaking amplifier 2112 are in an on-state. In some implementations, the carrier amplifier 2110 and the peaking amplifier are both saturated and have a power added efficiency (PAE) of 50% or greater. The outputs of the carrier amplifier 2110 and the peaking amplifier 2112 are fed to respective input ports 2131, 2132 of a transmission line combiner 2120. A 50 ohm impedance may be presented at the first input port 2131 and the second input port 2132. The transmission line combiner 2120 includes a 50 ohm transmission line 2121 coupled between the first input port 2131 and the second input port 2132, and a 35.5 ohm transmission line 2122 coupled between the second input port 2132 and the output port 2133. The input of the 35.5 ohm transmission line 2122 may present a 25 ohm impedance.

In another example, the combiner can be configured to provide impedance transformation between the PA and the load coupled to the PA. For example, when the peaking amplifier is idle, a 2:1 impedance transformation can be achieved from the load to the output of the carrier amplifier. Such a transformation function is illustrated in FIG13 . Again, the values of the various performance and operating parameters are examples and can be adjusted appropriately for different applications. The aforementioned function may be desirable over as wide a partial bandwidth as possible to achieve economical coverage of multiple operating frequencies with a single amplifier.

Thus, in FIG13 , a configuration 2150 is illustrated in which the carrier amplifier 2110 is in an on state and the peaking amplifier 2112 is in an off state. In some implementations, the carrier amplifier 2110 is saturated and has a PAE of 50% or greater. In such a configuration 2150, an impedance of 100 ohms may be presented at the first input port 2131, and a very high impedance (approximately an open circuit) may be presented at the second input port 2132.

FIG14 shows an example of a common Doherty combiner 2120, which includes two or more quarter-wave transmission lines 2121, 2122, which are arranged in a manner so as to achieve both combining and impedance transformation functions. Such an implementation is typically relatively bulky, especially at low frequencies. Therefore, such a combiner 2120 may be particularly unsuitable for use in devices such as RFICs (radio frequency integrated circuits), MMICs (monolithic microwave integrated circuits), and other RF modules. The impedance spread (spread) versus frequency for the Doherty combiner 2120 of FIG14 is shown in the example Smith diagram 2144 of FIG15.

Other types of Doherty combiners may be based on lumped elements.Most of such implementations are restricted to a relatively narrow operating band.

FIG16 shows another example of a Doherty combiner 2220 that uses a 3dB coupler 2221 with a terminal impedance close to an open circuit at an isolated port 2222. Even though such an implementation is more compact than the example combiner 2120 of FIG14, due to its quarter wavelength, it is still generally too large for applications such as RFICs, MMICs, and other RF modules at low frequencies. Combiner 2220 includes a 3dB coupler 2221 having a first port coupled to a first input port 2231 of combiner 2220, a second port coupled to a second input port 2232 of combiner 2220, a third port coupled to an output port 2233 of combiner 2220, and a fourth port (e.g., isolated port 2222) coupled to a terminal impedance close to an open circuit. The impedance spread versus frequency for the Doherty combiner 2220 of FIG16 is shown in the example Smith diagram 2244 of FIG17.

Figures 18 and 19 show examples of hybrid circuits that can be used as Doherty combiners. Such hybrid circuits can be configured to be particularly suitable for applications such as RFICs, MMICs, and other RF modules. Figure 18 shows a schematic representation of such a hybrid circuit, and Figure 19 shows an example layout thereof.

The hybrid circuits of Figures 18 and 19 can be implemented as semi-lumped 90-degree hybrids based on baluns. Due to the compact nature of the baluns used, such designs can be easily implemented on insulating/semi-insulating substrates such as silicon, GaAs, and IPDs (e.g., glass or silicon).

In the hybrid circuits of Figures 18 and 19, the values of various performance and operating parameters are examples; and may be adjusted appropriately for different applications.

Thus, in FIG18 , signal combiner 2320 is shown as including a first port 2331, a second port 2332, a third port 2333, and a fourth port 2334. A first capacitor 2322 couples first port 2331 and second port 2332. A second capacitor 2323 couples third port 2333 and fourth port 2334. Signal combiner 2320 also includes a transformer 2321 having four ports, respectively coupled to the four ports 2331-2334 of signal combiner 2320. In FIG19 , a substantially similar signal combiner 2390 is illustrated including a balun transformer 2391 that includes a first coil and a second coil.

FIG20 shows an example S-parameter (dispersion parameter) matrix that can represent the example of FIG16 , and FIG21 shows an example S-parameter matrix that can represent the examples of FIG18 and FIG19 . It can be seen that the S-parameter matrix of FIG21 is significantly different from the S-parameter matrix of FIG20 . In the example of FIG16 , the open termination of the isolated port can lead to Doherty behavior. In the examples of FIG18 and FIG19 , specific terminations can be provided at the isolated port to achieve Doherty behavior. Examples of terminations are described in more detail herein.

In some embodiments, it can be shown that such a specific terminal can be implemented as a capacitance (e.g., a capacitor) whose reactance is equal in magnitude to the characteristic impedance of the system. Therefore, such a capacitance can be expressed as C=1/( _2πfZ0 ), where f is the operating frequency of the Doherty PA and _Z0 is the characteristic impedance of the load coupled to the Doherty PA.

FIG22 illustrates an example of a Doherty combiner configuration 2400 utilizing the hybrid circuits of FIG18 and FIG19 . Configuration 2400 includes a first input port 2431 that can be configured to receive a carrier amplified signal from a Doherty PA; a second input port 2432 that can be configured to receive a peak amplified signal from a Doherty PA; and an output port 2433 that outputs a combination of the signals received at the first input port 2431 and the second input port 2432. Configuration 2400 includes a transformer (e.g., a balun transformer) having a first coil 2401 implemented between a first port 2411 and a second port 2412, and a second coil 2402 implemented between a third port 2413 and a fourth port 2414. The first port 2411 and the third port 2413 are coupled by a first capacitor 2421 and a second port 2412, and the fourth port 2414 is coupled by a second capacitor 2422. The third port 2413 is coupled to ground via a termination circuit, which in FIG22 includes a third capacitor 2423. In some implementations, the capacitances of the first capacitor 2421 and the second capacitor 2422 are equal. In some implementations, the capacitance of the third capacitor 2423 is twice the capacitance of the first capacitor 2421 and/or the second capacitor 2422.

FIG23 shows an impedance trace 2444 resulting from the Doherty behavior in the combiner 2400 of FIG22. The spread of the impedance trace is slightly wider than that of the example of FIG17, but better than that of the example of FIG15. In the Doherty combiner of FIG22, the values of the various performance and operating parameters are examples and can be adjusted appropriately for different applications.

It can be seen that an alternative configuration with inductive termination of L=Z ₀ /(2πf) can provide Doherty combiner functionality in a similar manner. In this case the port positions of the carrier and peaking amplifiers can be swapped. Figure 24 shows an example utilizing such inductive termination.

The Doherty combiner configuration 2500 of FIG24 includes a first input port 2531 that can be configured to receive a carrier-amplified signal from a Doherty PA; a second input port 2532 that can be configured to receive a peak-amplified signal from a Doherty PA; and an output port 2533 that outputs a combination of the signals received at the first input port 2531 and the second input port 2532. Configuration 2500 includes a transformer (e.g., a balun transformer) having a first coil 2501 implemented between a first port 2511 and a second port 2512, and a second coil 2502 implemented between a third port 2513 and a fourth port 2514. The first port 2511 and the third port 2513 are coupled by a first capacitor 2521, and the second port 2512 and the fourth port 2514 are coupled by a second capacitor 2522. The third port 2513 is coupled to ground via a termination circuit, which in FIG24 includes an inductor 2523. In the Doherty combiner 2500 of FIG. 24 , the values of various performance and operating parameters are examples; and may be appropriately adjusted for different applications.

In some embodiments, the examples described with reference to Figures 18, 19, and 20-24 are particularly useful for RFIC, MMIC, and RF module (e.g., hybrid module) configurations where impedance matching is achieved using magnetic or automatic transformers. In some embodiments, the nearly open-circuit output impedance of the peaking amplifier device is not inverted by the matching circuit and can be presented as is at the peaking amplifier port of the Doherty combiner.

FIG25 illustrates an example of integrating a hybrid circuit having one or more features described herein and auto-transformer-based impedance matching into an integrated passive device (IPD). Circuit 2600 includes an IPD 2602, which includes an impedance matching network 2610 including one or more auto-transformers. The IPD also includes a combiner 2620, such as described above. Circuit 2600 also includes an MMIC 2601 having a carrier amplifier 2611 and a peaking amplifier 2612.

If an impedance reverse matching circuit is used, such as a π network, a T network, or a quarter-wave transformer, the peaking amplifier typically presents an impedance close to a short circuit at the input of the Doherty combiner when it is idle. In such an example, a reverse load modulation trajectory is typically required or desired from the Doherty combiner (e.g., from 0.5*Rload impedance to Rload impedance, as shown in the example Smith diagram 2744 of Figure 26). In some embodiments, such a function can be implemented by swapping the carrier and peaking amplifier inputs. Figure 27 shows an example of such a swap configuration. Therefore, in Figure 27, circuit 2700 includes IPD2702, which includes, for example, a combiner 2720 as described above. Circuit 2700 also includes MMIC 2701, which has a carrier amplifier 2711 and a peaking amplifier 2712. The circuit also includes an impedance reverse matching circuit 2710. Although not shown in Figure 27, the impedance reverse matching circuit 2710 can be implemented within the IPD 2702.

In FIG. 25 to FIG. 27 , the values of various performance and operating parameters are examples; and may be appropriately adjusted for different applications.

FIG28 illustrates an example architecture of a PA 2800 in which a Doherty combiner having one or more features as described herein may be implemented. The architecture shown is a Doherty PA architecture. Although various examples are described in the context of such a Doherty PA architecture, it will be understood that one or more features of the present disclosure may also be implemented in other types of PA systems.

Example PA 2800 is shown as including an input port (RF_IN) for receiving an RF signal to be amplified. Such an input RF signal may be partially amplified by a pre-driver amplifier 2802 before being split into a carrier amplification path 2810 and a peaking amplification path 2830. Such splitting may be achieved by a splitter 2804. Examples related to splitter 2804 (also referred to herein as a divider or power divider) are described in more detail herein.

In FIG28 , a carrier amplification path 2810 is shown as including an attenuator 2812 and amplifier stages generally designated 2814. Amplifier stage 2814 is shown as including a driver stage 2816 and an output stage 2820. Driver stage 2816 is shown as being biased by bias circuit 2818, and output stage 2820 is shown as being biased by bias circuit 2822. In some embodiments, there may be a greater or lesser number of amplifier stages. In various examples described herein, amplifier stage 2814 is sometimes described as an amplifier; however, it will be understood that such an amplifier may include one or more stages.

In FIG28 , peak amplification path 2830 is shown as including phase shift circuit 2832 and amplifier stages generally labeled 2834. Amplification stage 2834 is shown as including driver stage 2836 and output stage 2840. Driver stage 2836 is shown as being biased by bias circuit 2838, and output stage 2840 is shown as being biased by bias circuit 2842. In some embodiments, there may be a greater or fewer number of amplifier stages. In the various examples described herein, amplifier stage 2834 is sometimes described as an amplifier; however, it will be understood that such an amplifier may include one or more stages.

FIG28 further illustrates that the carrier amplification path 2810 and the peak amplification path 2830 can be combined by a combiner 2844 to produce an amplified RF signal at the output port (RF_OUT). Examples related to the combiner 2844 are described in more detail herein. For example, the combiner 2844 can be implemented as one of the combiners of FIG22 and FIG24.

In some implementations, devices and/or circuits having one or more features described herein may be included in an RF device, such as a wireless device. Such devices and/or circuits may be implemented directly in the wireless device, in a modular form as described herein, or in some combination thereof. In some embodiments, such wireless devices may include, for example, cellular phones, smartphones, handheld wireless devices with or without telephone functionality, wireless tablets, and the like.

FIG29 schematically illustrates an example wireless device 2900 having one or more advantageous features described herein. In an example, one or more PAs 2910, collectively labeled PA architecture 2101, may include one or more features as described herein. Such a PA may, for example, facilitate multi-band operation of the wireless device 2900.

The PAs 2110a-2110d can receive their respective RF signals from a transceiver 2910, which can be configured and operated to generate RF signals to be amplified and transmitted, and to process the received signals. The transceiver 2910 is shown interacting with a baseband subsystem 2908, which is configured to provide conversion between data and/or voice signals intended for a user and RF signals intended for the transceiver 2910. The transceiver 2910 is also shown connected to a power management component 2906, which is configured to manage power for the operation of the wireless device 2900. Such power management can also control the operation of the baseband subsystem 2908 and the PAs 2110a-2110d.

The baseband subsystem 2908 is shown connected to the user interface 2902 to facilitate various inputs and outputs of voice and/or data to and from the user. The baseband subsystem 2908 may also be connected to the memory 2904, which is configured to store data and/or instructions to facilitate the operation of the wireless device 2900 and/or provide storage of information for the user.

In the example wireless device 2900, the outputs of the PAs 2110a-2110d are shown as matched (via matching circuits 2920a-2920d) and routed to antenna 2916 via their respective duplexers 2912a-2912d and band select switch 2914. The band select switch 2914 can be configured to allow selection of an operating band. In some embodiments, each duplexer 2912 can allow simultaneous transmit and receive operations using a common antenna (e.g., 2916). In FIG29, received signals are shown as being routed to an "Rx" path (not shown), which can include, for example, a low noise amplifier (LNA).

Many other wireless device configurations can utilize one or more of the features described herein. For example, a wireless device need not be a multi-band device. In another example, a wireless device can include additional antennas such as a diversity antenna, and additional connectivity features such as Wi-Fi, Bluetooth, and GPS.

Power amplification with improved linearization

Various examples are disclosed related to Doherty power amplifier (PA) applications, such as those for high peak-to-average power ratio (PAPR) 4G modulated signals used in 3G and 4G handset applications. In some embodiments, by using the Doherty approach, a 10% higher peak power added efficiency (PAE) level can be achieved for the same adjacent adjacent power level ratio (ACLR) level compared to other designs. Such PAE performance is comparable to that of envelope tracking (ET) PAs at a much lower overall system complexity.

Traditionally, it has been widely believed that Doherty PAs are unsuitable for linear PA applications in handheld devices due to their size, complexity, and nonlinear behavior. In fact, in basestation applications, predistortion linearizers are typically used with Doherty PAs to meet linearity requirements. As described herein, issues associated with Doherty PAs, such as size, complexity, and linearity, can be appropriately addressed.

FIG30 shows an example architecture of a PA 3100 having one or more features as described herein. The architecture shown is a Doherty PA architecture. Although various examples are described in the context of such a Doherty PA architecture, it will be understood that one or more features of the present disclosure may also be implemented in other types of PA systems.

The example PA 3100 is shown as including an input port (RF_IN) for receiving an RF signal to be amplified. Such an input RF signal may be partially amplified by a pre-driver amplifier 3102 before being split into a carrier amplification path 3110 and a peaking amplification path 3130. Such splitting may be achieved by a splitter 3104. Examples related to the splitter 3104 (also referred to herein as a divider or power divider) are described in more detail herein.

In FIG30 , a carrier amplification path 3110 is shown as including an attenuator 3112 and amplifier stages, generally designated 3114. Amplifier stage 3114 is shown as including a driver stage 3116 and an output stage 3120. Driver stage 3116 is shown as being biased by bias circuit 3118, and output stage 3120 is shown as being biased by bias circuit 3122. In some embodiments, there may be a greater or lesser number of amplifier stages. In various examples described herein, amplifier stage 3114 is sometimes described as an amplifier; however, it will be understood that such an amplifier may include one or more stages.

In FIG30 , peak amplification path 3130 is shown as including phase shift circuit 3132 and amplifier stages generally labeled 3134. Amplification stage 3134 is shown as including driver stage 3136 and output stage 3140. Driver stage 3136 is shown as being biased by bias circuit 3138, and output stage 3140 is shown as being biased by bias circuit 3142. In some embodiments, there may be a greater or fewer number of amplifier stages. In various examples described herein, amplifier stage 3134 is sometimes described as an amplifier; however, it will be understood that such an amplifier may include one or more stages.

30 further illustrates that the carrier amplification path 3110 and the peaking amplification path 3130 can be combined by a combiner 3144 to produce an amplified RF signal at the output port (RF_OUT). Examples related to the combiner 3144 are described in more detail herein.

FIG31 shows an example of a combiner circuit for a Doherty PA. Such a combiner can be configured to provide medium bandwidth performance. In FIG31 , the peak amplifier signal and the carrier amplifier signal are shown as being received from their respective collectors (not shown) and combined to produce an output that can be provided to, for example, a duplexer. In FIG31 , the impedance values and the values of the various capacitive and inductive elements are examples; and it will be understood that other values can also be implemented.

The combiner 3200 includes a first input port 3211 that may receive a peaking amplifier signal, a second input port 3212 that may receive a carrier amplifier signal, and an output port 3213 that provides a combination of the signals received at the first input port 3211 and the second input port 3212 .

The first input port 3211 is coupled to a first node 3211. The first node 3221 is also coupled to ground (via a first capacitor 3241 and a third inductor 3233) and a second node 3222 (via the first inductor 3231). The second node 3222 is coupled to ground (via a second capacitor 3242) and a third node 3223 (via a second inductor 3232).

Second input port 3212 is coupled to fourth node 3224. The fourth node is also coupled to ground (via third capacitor 3243 and fifth inductor 3235) and fifth node 3225 (via fourth inductor 3234). Fifth node 3225 is coupled to ground (via fourth capacitor 3244) and third node 3223 (via fifth capacitor 3245).

The output port 3213 is coupled to a sixth node 3226. The sixth node 3226 is also coupled to ground (via a sixth inductor 3236) and to the third node 3223 (via a sixth capacitor 3246).

The first input port 3211 , the second input port 3212 , the first capacitor 3241 , the third inductor 3233 , the third capacitor 3243 , and the fifth inductor 3235 may be implemented as an integrated passive device (IPD). In some embodiments, the components may be implemented on a single GaAs die 3270 .

The impedance presented at the second node 3222 and the fifth node 3225 may each be 25 ohms. The impedance presented at the third node 3223 may be 12.5 ohms.

FIG32 shows an example of a power divider circuit for a Doherty PA. Such a divider can be used with the example combiner of FIG31 and is configured to provide medium bandwidth performance. In FIG32 , an input radio frequency (RF) signal is shown as being received at input 3311 and divided into two paths. The first path can be coupled to the peak PA at a first output 3312, and the second path can be coupled to the carrier PA at a second output 3313. An inductor 3331 is arranged along the first path, and a capacitor 3341 is arranged along the second path. In FIG32 , the values of the various capacitive and inductive elements are examples; and it will be understood that other values can also be implemented.

FIG33 shows an example of a power divider 3400 that can be used as the divider 3104 of FIG30. In FIG33, the power divider 3400 includes a transformer 3450 having two coils positioned relative to each other. The first coil can have interleaved windings coupled to each other, one of which is coupled to an input 3411 and the other is coupled to a first output 3414. The second coil can have interleaved windings coupled to each other, one of which is coupled to an isolated port 3412 and the other is coupled to a second output 3413.

The example of Figure 33 can be configured as a quadrature divider with broadband capabilities. Such a divider can be configured as a semi-lumped 90 degree power splitter, which can be implemented as an IPD design for low frequencies and as an integrated divider on a GaAs die for higher frequencies.

The power divider 3400 may further include capacitors 3441 and 3442 that couple the coils. In some embodiments, the first capacitor 3441 is coupled between the input 3411 and the isolated port 3412 , and the second capacitor 3442 is coupled between the first output 3413 and the second output 3414 .

With the above configuration, the power of the RF signal received at the input port can be divided into two output ports 3413 and 3414. Such divided signals can be provided to the carrier amplifier and the peak amplifier of FIG.

Figure 34 shows an example of a power divider 3500 that can be used as the divider 3104 of Figure 1. Additional details related to such a power divider are described above, including but not limited to the section entitled "Power Amplification Using Balun Converters."

The example of Figure 34 can be configured as a quadrature divider with broadband capabilities. In some embodiments, such a divider can be configured as a lumped 90-degree power splitter that can be implemented as an SMT circuit for low frequencies and as an integrated (e.g., IPD) divider on a GaAs die for higher frequencies.

Figure 35 shows an example of a combiner 3600 that can be used as combiner 3144 of Figure 30. Additional details concerning such a combiner are described above, including but not limited to the section entitled "Power Amplification Using Balun Converters."

The example of Figure 35 can be implemented as a SMT circuit with broadband capabilities. In some embodiments, such a combiner can include power combining and dynamic load pulling functions implemented using lumped baluns.

Figure 36 shows another example of a combiner 3700 that can be used as combiner 3144 of Figure 30. Additional details concerning such combiners are described above, including but not limited to the section entitled "Signal Combination Using a Coiled Balun Transformer."

The example of Figure 36 can be implemented as an IPD with broadband capabilities. In some embodiments, such a combiner can include power combining and dynamic load pulling functionality implemented using a semi-lumped 90-degree hybrid configuration.

30 , in some embodiments, each of the driver stage 3116 and output stage 3120 of the carrier amplifier 3114 can be configured to operate in Class AB mode. Furthermore, each of the driver stage 3136 and output stage 3140 of the peaking amplifier 3134 can be configured to operate in Class B mode. For such a configuration, bias circuits such as those shown in FIGS. 38 and 39 can be used to bias each stage of the carrier amplifier 3114 and the peaking amplifier 3134, respectively. Thus, the carrier amplifier 3114 and the peaking amplifier 3134 can operate in different bias modes. Furthermore, for each amplifier 3114, 3134, each stage (3116, 3120 and 3136, 3140) can operate in a different bias mode. The different bias modes can include Class A, Class B, Class AB, Class C, Class D, Class F, Class G, Class I, Class S, Class T, or any other bias mode.

FIG37 shows an example of a low-headroom class AB bias circuit that can be used to provide a bias voltage (VBIAS) to a stage (driver 3116 or output 3120) of the carrier amplifier 3114. Thus, the class AB bias circuit can provide the functionality of bias circuit 3118 and/or bias circuit 3122 of FIG30. Appropriate selection of transistors, diodes, capacitors, and resistors can be implemented to accommodate such driver and output stage functionality. In some embodiments, the example bias circuit of FIG37 can be particularly suitable for integration with an external bandgap reference on CMOS or GaAs where low voltage headroom makes it difficult to use a traditional 2xVbe bias circuit. The bias circuit of FIG37 can include sufficient bandwidth at baseband frequencies to support broadband signals such as LTE.

38 shows an example of a low-headroom Class B bias circuit that can be used to provide a bias voltage (VBIAS) to a stage (driver 3136 or output 3140) of peaking amplifier 3134. Thus, the Class B bias circuit can provide the biasing function of bias circuit 3138 and/or bias circuit 3142 of FIG 30. Appropriate selection of transistors, diodes, capacitors, and resistors can be implemented to accommodate such driver and output stage functions.

Figure 39 shows an example of the beneficial effects of using a Class B bias in the driver stage for a peaking amplifier (3134 in Figure 1). The graph 4000 of Figure 39 includes a graph of the output stage current as a function of output power for different configurations. For the carrier amplifier, the solid line 4011 is for the configuration of each of the bias driver and output stage in Class B mode, while the dotted line 4011 is for the configuration of having a Class AB bias of the driver stage and a Class B bias of the output stage. Similarly, for the peaking amplifier, the solid line 4021 is for the configuration of each of the bias driver and output stage in Class B mode, while the dotted line 4022 is for the configuration of having a Class AB bias of the driver stage and a Class B bias of the output stage. As shown in Figure 39, using a Class B bias in the driver stage in the peaking amplifier greatly reduces the current consumption of the output stage. However, using a Class B bias in the driver stage in the carrier amplifier slightly increases the current consumption of the output stage.

FIG40 shows an example of the beneficial effects of utilizing Class B biasing of the driver stage for a peaking amplifier (3134 in FIG1 ). The graph 4100 of FIG40 includes a plot of power added efficiency (PAE) as a function of output power for different configurations. The solid line 4101 is for a configuration in which each of the driver and output stages of the peaking amplifier is biased in Class B mode. The dashed line 4102 is for a configuration in which the driver stage is biased in Class AB mode and the output stage is biased in Class B mode. The two-point dashed line 4103 is for an equivalent non-Doherty amplifier biased in Class AB mode. As shown in FIG40 , using Class B biasing in the driver stage in the peaking amplifier significantly improves PAE performance.

FIG41 illustrates an example of a linearization effect that can be achieved by introducing a phase shift between RF signals associated with carrier amplification and peak amplification. Such a phase shift can be introduced, for example, by the phase shift component 3132 of FIG1 . Graph 1200 of FIG41 includes plots of AM/AM (left vertical axis) and AM/PM (right vertical axis) as a function of output power. For AM/AM plots 4211 and 4212, FIG41 illustrates that the curves corresponding to the configuration with the phase shift have less AM/AM distortion than the configuration without the phase shift, particularly at higher output powers. Similarly, for AM/PM plots 4221 and 4222, FIG41 illustrates that the curves corresponding to the configuration with the phase shift have less AM/PM distortion than the configuration without the phase shift, particularly at higher output powers.

As described herein, the power divided into the carrier amplification path and the peaking amplification path can be different. FIG42 illustrates an example of the linearization effect that can be achieved by introducing such an uneven power split between the RF signals associated with carrier amplification and peaking amplification. Such uneven power splitting can be introduced or facilitated, for example, by attenuator assembly 3112 of FIG1 . Graph 4300 of FIG42 includes plots of AM/AM (left vertical axis) and AM/PM (right vertical axis) as a function of output power. For AM/AM plots 4311 and 4312, FIG42 illustrates that the curves corresponding to the configuration with uneven power splitting have less AM/AM distortion than the configuration with even power splitting, particularly at higher output powers. Similarly, for AM/PM plots 1321 and 1322, FIG13 illustrates that the curves corresponding to the configuration with uneven power splitting have less AM/PM distortion than the configuration with even power splitting, particularly at medium to higher output powers.

Figure 43 shows an example of a combined linearization effect that can be obtained by combining the aforementioned phase shift and uneven power splitting features described with reference to Figures 41 and 42. The curve graph 4400 of Figure 43 includes a graph of gain (left vertical axis) and PAE (right vertical axis) as a function of output power. Specifically, line 4411 shows the gain of a non-Doherty amplifier, line 4412 shows the gain of a Doherty amplifier without phase shift and uniform power splitting, and line 4413 shows the gain of a Doherty amplifier with phase shift and uneven power splitting. Similarly, line 4421 shows the PAE of a non-Doherty amplifier, line 4422 shows the PAE of a Doherty amplifier without phase shift and uniform power splitting, and line 4423 shows the PAE of a Doherty amplifier with phase shift and uneven power splitting.

FIG43 shows that a linear load modulated amplifier (a Doherty PA with phase shift and uneven power division) has a gain compression curve that is very similar to that of a non-Doherty PA (e.g., a class AB/F amplifier). FIG43 also shows that the PAE of the linear load modulated amplifier (a Doherty PA with phase shift and uneven power division) is only slightly less (e.g., about 3% less at higher output powers) than the PAE of a classical nonlinear Doherty amplifier (a Doherty PA without linearization).

Figure 44 shows a graph of PAE (left vertical axis) and adjacent channel power (ACP) (right vertical axis) at various operating frequencies for a front-end module (FEM) with a dual-band Doherty PA configured for LTE operation and a FEM with an average power tracking (APT) PA. Figure 44 shows that PAE is generally higher and ACP is generally lower for the Doherty PA compared to the APT PA. In the example shown, the improvement is approximately 10%.

In some implementations, devices and/or circuits having one or more features described herein may be included in an RF device, such as a wireless device. Such devices and/or circuits may be implemented directly in the wireless device, in a modular form as described herein, or in some combination thereof. In some embodiments, such wireless devices may include, for example, cellular phones, smartphones, handheld wireless devices with or without telephone functionality, wireless tablets, and the like.

FIG45 schematically illustrates an example wireless device 3801 having one or more advantageous features described herein. In an example, one or more PAs 3110a-3110d, collectively labeled PA architecture 3101, may include one or more features as described herein. Such a PA may facilitate, for example, multi-band operation of the wireless device 3801.

The PAs 3100a-3100d can receive their respective RF signals from a transceiver 3810, which can be configured and operated to generate RF signals to be amplified and transmitted and to process the received signals. The transceiver 3810 is shown interacting with a baseband subsystem 3808, which is configured to provide conversion between data and/or voice signals intended for a user and RF signals intended for the transceiver 3810. The transceiver 3810 is also shown connected to a power management component 3806 configured to manage power for the operation of the wireless device 3801. Such power management can also control the operation of the baseband subsystem 3808 and the PAs 3110a-3110d.

The baseband subsystem 3808 is shown connected to the user interface 3802 to facilitate various inputs and outputs of voice and/or data to and from the user. The baseband subsystem 3808 may also be connected to the memory 3404, which is configured to store data and/or instructions to facilitate the operation of the wireless device 3801 and/or provide storage of information for the user.

In the example wireless device 3801, the outputs of the PAs 3110a-3110d are shown matched (via matching circuits 3820a-3820d) and routed to antenna 3816 via their respective duplexers 3812a-3812d and band select switch 3814. The band select switch 3814 can be configured to allow selection of an operating band. In some embodiments, each duplexer 3812 can allow simultaneous transmit and receive operations using a common antenna (e.g., 3816). In FIG45, received signals are shown routed to an "Rx" path (not shown), which can include, for example, a low noise amplifier (LNA).

Many other wireless device configurations can utilize one or more of the features described herein. For example, a wireless device need not be a multi-band device. In another example, a wireless device can include additional antennas such as a diversity antenna, and additional connectivity features such as Wi-Fi, Bluetooth, and GPS.

Unless the context clearly requires otherwise, throughout the specification and claims, the words "comprise", "comprising", etc. are to be interpreted as containing, rather than as exclusive or exhaustive, that is, as "including but not limited to". The word "coupled" as generally used herein refers to two or more elements that can be directly connected or connected through one or more intermediate elements. In addition, the words "herein", "above", "below" and words of similar meaning, when used in this application, should refer to the application as a whole, rather than any particular part of the application. As long as the context permits, words used in the singular or plural in the above specification may also include the plural or singular, respectively. In the reference to a list of two or more items, the word "or" includes all of the following interpretations of the word: any one of the items in the list, all of the items in the list, or any combination of the items in the list.

The above detailed description of the embodiment of the present invention is not intended to be exhaustive or to limit the present invention to the precise form disclosed above. Although specific embodiments and examples of the present invention have been described above for illustrative purposes, various equivalent modifications within the scope of the present invention are possible as will be appreciated by those skilled in the relevant art. For example, although processes or blocks are presented in a given order, alternative embodiments may perform routines with steps or adopt systems with blocks in different orders, and may delete, move, add, subdivide, combine and/or modify some processes or blocks. Each of these processes or blocks may be implemented in various different ways. In addition, although processes or blocks are sometimes shown as being executed serially, these processes or blocks may alternatively be executed in parallel, or may be executed at different times.

The teachings of the invention provided herein can be applied to other systems, not necessarily the systems described above.The elements and acts of the various embodiments described above can be combined to provide other embodiments.

Although some embodiments of the present invention have been described, these embodiments have been presented by way of example only and are not intended to limit the scope of the present disclosure. Indeed, the novel methods and systems described herein may be embodied in a variety of other forms; furthermore, various omissions, substitutions, and changes in the form of the methods and systems described herein may be made without departing from the spirit of the present disclosure. The accompanying drawings and the like are intended to cover such forms or modifications as would fall within the scope and spirit of the present disclosure.

Claims (71)

1. A power amplifier system, comprising: The input circuit is configured to receive a radio frequency signal at the input port and divide the radio frequency signal into a first part and a second part; A Doherty amplifier circuit includes a carrier amplification path coupled to an input circuit to receive a first portion, and a peak amplification path coupled to an input circuit to receive a second portion. The input circuit includes an isolation resistor implemented between a first node along the first path coupling the input port to the carrier amplification path and a second node along the second path coupling the input port to the peak amplification path. The isolation resistor is selected to prevent or reduce source pull effects between the carrier amplification path and the peak amplification path. The output circuit, coupled to the Doherty amplifier circuit, is configured to combine the outputs of the carrier amplification path and the peak amplification path to generate an amplified radio frequency signal. The output circuit includes a balanced-to-unbalanced converter circuit having a first coil and a second coil. The first coil is implemented between a first port and a second port, and the second coil is implemented between a third port and a fourth port. The first port and the third port are coupled through a first capacitor, and the second port and the fourth port are coupled through a second capacitor. The first port is configured to receive the output of the carrier amplification path, the fourth port is configured to receive the output of the peak amplification path, and the second port is configured to generate the amplified radio frequency signal. 2. The power amplifier system of claim 1, wherein the carrier amplification path includes a carrier amplifier and the peak amplification path includes a peak amplifier. 3. The power amplifier system of claim 2 further includes a pre-driver amplifier having an output coupled to the input port. 4. The power amplifier system of claim 3, wherein at least one of the input circuit and the output circuit is implemented as a lumped element circuit. 5. The power amplifier system of claim 1 or 2, wherein the input circuitry includes a modified Wilkinson power divider. 6. The power amplifier system of claim 5, wherein DC power is provided to the carrier amplifier and the peak amplifier via a choke inductor. 7. The power amplifier system of claim 5, wherein each of the carrier amplification path and the peak amplification path includes a DC blocking capacitor. 8. The power amplifier system of claim 3, wherein the input circuitry is further configured to provide impedance matching between the carrier amplifier and the pre-driver amplifier, and between the peak amplifier and the pre-driver amplifier. 9. The power amplifier system of claim 8, wherein each of the carrier amplification path and the peak amplification path includes an LC matching circuit having capacitance along the path and inductive coupling to ground. 10. The power amplifier system of claim 2, wherein the input circuitry is further configured to provide a desired phase shift to compensate for or tune the AM-PM effect associated with the peak amplifier. 11. The power amplifier system of claim 2, wherein the input circuitry is further configured to provide desired attenuation regulation at the input of one or both of the carrier amplifier and the peak amplifier to compensate for or tune AM-AM effects associated with one or both of the carrier amplifier and the peak amplifier. 12. The power amplifier system of claim 1, wherein the input circuitry comprises: a first impedance coupling the first node to ground and a second impedance coupling the second node to ground. 13. The power amplifier system of claim 12, wherein the first impedance comprises a capacitor and the second impedance comprises an inductor. 14. The power amplifier system of claim 1, wherein the peak amplifier is configured to act as a short-circuit or low-impedance node when in an off state, and the carrier amplifier is configured to act as a single-ended amplifier when using the balanced-to-unbalance converter circuit, the single-ended amplifier being equivalent to a single-ended amplifier with a single-segment matching network having a series inductor and a bypass capacitor. 15. The power amplifier system of claim 14, wherein the balanced-to-unbalanced converter circuit is configured such that the impedance seen by the carrier amplifier increases when in low-power mode. 16. The power amplifier system of claim 15, wherein the impedance seen by the carrier amplifier is approximately doubled when in low power mode. 17. The power amplifier system of claim 14, wherein the peak amplifier is further configured to operate in a manner similar to that of a push-pull amplifier, in which the radio frequency current from the carrier amplifier is affected by the radio frequency current from the peak amplifier. 18. The power amplifier system of claim 17, wherein the push-pull operation reduces even harmonics, thereby improving linearity. 19. The power amplifier system of claim 1, wherein the balun circuit includes a first path coupling the output of the carrier amplifier to the output node and a second path coupling the output of the peak amplifier to the output node. 20. The power amplifier system of claim 19, wherein each of the first and second paths is inductor-coupled to a DC port to provide DC feed to the output stage. 21. The power amplifier system of claim 19, wherein each of the first path and the second path includes a harmonic suppressor. 22. The power amplifier system of claim 2, wherein each of the first combiner path that couples the output of the carrier amplifier to the output node and the second combiner path that couples the output of the peak amplifier to the output node includes a harmonic suppressor. 23. The power amplifier system of claim 22, wherein the harmonic suppressor includes a second harmonic suppressor having an LC bypass to ground and a series inductor. 24. The power amplifier system of claim 19, wherein the second path includes a bypass capacitor and a series capacitor configured to provide phase compensation for the output of the peak amplifier. 25. The power amplifier system of claim 24, wherein at least one of the bypass capacitor and the series capacitor is a surface mount capacitor. 26. The power amplifier system of claim 1, wherein the balanced-to-unbalanced converter circuit is configured to provide reduced losses in the carrier amplification path to maintain high efficiency during backoff and in high-power mode. 27. The power amplifier system of claim 2, wherein the input circuitry is configured to provide DC power to each of the carrier amplifier and the peak amplifier. 28. The power amplifier system of claim 2, wherein the input circuitry is a broadband circuitry, which is at least in part due to a lead-lag network configured to provide a broadband phase shift. 29. The power amplifier system of claim 2, wherein the input circuitry is configured to provide reactance for actual impedance matching and isolation between the carrier amplifier and the peak amplifier when providing broadband performance. 30. The power amplifier system of claim 1, wherein the first portion and the second portion have different phases and different powers. 31. A method for amplifying radio frequency signals, the method comprising: Provides a Doherty amplifier circuit with a carrier amplification path and a peak amplification path; Receive radio frequency signals; The radio frequency signal is divided into a first part and a second part, the first part being provided to a carrier amplification path and the second part being provided to a peak amplification path; and A balanced-to-unbalanced converter circuit is used to combine the outputs of the carrier amplification path and the peak amplification path to generate an amplified radio frequency signal. The balanced-to-unbalanced converter circuit has a first coil and a second coil, the first coil being implemented between a first port and a second port, the second coil being implemented between a third port and a fourth port, the first port and the third port being coupled by a first capacitor, the second port and the fourth port being coupled by a second capacitor, the first port being configured to receive the output of the carrier amplification path, the fourth port being configured to receive the output of the peak amplification path, and the second port being configured to generate the amplified radio frequency signal. 32. The method of claim 31, wherein the first portion and the second portion have different phases and different powers. 33. A power amplifier module, comprising: The packaging substrate is configured to accommodate multiple components; A power amplifier system, implemented on a package substrate, includes an input circuit configured to receive a radio frequency (RF) signal and divide the RF signal into a first portion and a second portion. The power amplifier system further includes a Doherty amplifier circuit having a carrier amplification path coupled to the input circuit to receive the first portion and a peak amplification path coupled to the input circuit to receive the second portion. The power amplifier system also includes an output circuit coupled to the Doherty amplifier circuit, the output circuit including a balun circuit configured to combine the outputs of the carrier amplification path and the peak amplification path to generate an amplified RF signal. Multiple connectors are configured to provide electrical connections between the power amplifier system and the package substrate. The balanced-to-unbalanced converter circuit has a first coil and a second coil, the first coil being implemented between a first port and a second port, the second coil being implemented between a third port and a fourth port, the first port and the third port being coupled by a first capacitor, the second port and the fourth port being coupled by a second capacitor, the first port being configured to receive the output of the carrier amplification path, the fourth port being configured to receive the output of the peak amplification path, and the second port being configured to generate the amplified radio frequency signal. 34. A wireless device, comprising: The transceiver is configured to generate radio frequency signals; A power amplifier module, communicating with the transceiver, includes input circuitry configured to receive a radio frequency (RF) signal and divide it into a first portion and a second portion. The power amplifier module also includes a Doherty amplifier circuit having a carrier amplification path coupled to the input circuitry to receive the first portion and a peak amplification path coupled to the input circuitry to receive the second portion. The power amplifier module further includes an output circuit coupled to the Doherty amplifier circuitry, the output circuitry including a balun circuit configured to combine the outputs of the carrier amplification path and the peak amplification path to generate an amplified RF signal. An antenna, in communication with the power amplifier module, is configured to facilitate the transmission of amplified radio frequency signals. The balanced-to-unbalanced converter circuit has a first coil and a second coil, the first coil being implemented between a first port and a second port, the second coil being implemented between a third port and a fourth port, the first port and the third port being coupled by a first capacitor, the second port and the fourth port being coupled by a second capacitor, the first port being configured to receive the output of the carrier amplification path, the fourth port being configured to receive the output of the peak amplification path, and the second port being configured to generate the amplified radio frequency signal. 35. The wireless device of claim 34, wherein the carrier amplification path includes a carrier amplifier and the peak amplification path includes a peak amplifier, each of the carrier amplifier and the peak amplifier including a driver stage and an output stage. 36. A signal combiner, comprising: A balanced-to-unbalanced converter circuit includes a first coil and a second coil. The first coil is implemented between a first port and a second port, and the second coil is implemented between a third port and a fourth port. The first port and the third port are coupled through a first capacitor, and the second port and the fourth port are coupled through a second capacitor. The first port is configured to receive a first signal, the fourth port is configured to receive a second signal, and the second port is configured to generate a combination of the first signal and the second signal. The terminating circuit couples the third port to ground, and the terminating circuit has a reactance that is approximately equal in magnitude to the impedance at the second port. 37. The signal combiner of claim 36, wherein the first port is configured to receive a carrier-amplified signal from the carrier amplifier of the Doherty power amplifier, and the fourth port is configured to receive a peak-amplified signal from the peak amplifier of the Doherty power amplifier. 38. The signal combiner of claim 37, wherein the terminating circuitry includes a capacitor and has a capacitive reactance that is substantially equal in size to the impedance at the second port. 39. The signal combiner of claim 36, wherein the first port is configured to receive a peak-amplified signal from the peak amplifier of the Doherty power amplifier, and the fourth port is configured to receive a carrier-amplified signal from the carrier amplifier of the Doherty power amplifier. 40. The signal combiner of claim 39, wherein the terminating circuitry includes an inductor and has an inductive reactance that is substantially equal in size to the impedance at the second port. 41. The signal combiner of claim 36, wherein the S-parameter between the first and the second of the ports is approximately equal to (1+j)/2. 42. The signal combiner of claim 36, wherein the S-parameter between the first and the second of the ports is approximately equal to (1-j)/2. 43. The signal combiner of claim 36, wherein the S-parameter matrix of the S-parameters between the ports contains only values approximately 0, (1+j)/2, and (1-j)/2. 44. The signal combiner of claim 36, wherein the balanced-to-unbalanced converter circuit is implemented as an integrated passive device. 45. The signal combiner of claim 44, wherein the integrated passive device further implements an impedance matching circuit based on an automatic converter. 46. A power amplifier module, comprising: The packaging substrate is configured to accommodate multiple components; and A signal combiner, implemented on a package substrate, includes a balun circuit having a first coil and a second coil, the first coil being implemented between a first port and a second port, the second coil being implemented between a third port and a fourth port, the first port and the third port being coupled via a first capacitor, the second port and the fourth port being coupled via a second capacitor, the first port being configured to receive a first signal, the fourth port being configured to receive a second signal, and the second port being configured to generate a combination of the first signal and the second signal. The signal combiner also includes a terminating circuit coupling the third port to ground, the terminating circuit having a reactance approximately equal in magnitude to the impedance at the second port. 47. The power amplifier module of claim 46, wherein the balanced-to-unbalanced converter circuit is implemented as an integrated passive device. 48. The power amplifier module of claim 47, wherein the integrated passive device further implements an impedance matching circuit including one or more automatic converters. 49. The power amplifier module of claim 46, wherein the power amplifier module further comprises a Doherty power amplifier disposed on a package substrate, the Doherty power amplifier having a carrier amplifier for generating a signal with carrier amplification and a peak amplifier for generating a signal with peak amplification. 50. The power amplifier module of claim 49, wherein the first port is configured to receive a carrier-amplified signal, and the fourth port is configured to receive a peak-amplified signal. 51. The power amplifier module of claim 50, wherein the terminating circuitry includes a capacitor and has a capacitive reactance that is substantially equal in size to the impedance at the second port. 52. The power amplifier module of claim 49, wherein the first port is configured to receive a peak-amplified signal, and the fourth port is configured to receive a carrier-amplified signal. 53. The power amplifier module of claim 52, wherein the terminating circuitry includes an inductor and has an inductive reactance that is substantially equal in size to the impedance at the second port. 54. The power amplifier module of claim 46, wherein the S-parameter matrix of the S-parameters between the ports contains only values approximately 0, (1+j)/2, and (1-j)/2. 55. A wireless device, comprising: The transceiver is configured to generate radio frequency signals; A power amplifier module, communicating with a transceiver, includes input circuitry configured to receive and divide a radio frequency (RF) signal into a first portion and a second portion. The power amplifier module also includes amplifier circuitry comprising a carrier amplifier coupled to the input circuitry to receive the first portion and a peak amplifier coupled to the input circuitry to receive the second portion. The power amplifier module further includes output circuitry coupled to the amplifier circuitry, comprising a balun circuitry having a first coil and a second coil, the first coil being implemented between a first port and a second port, and the second coil being implemented between a third port and a fourth port. The first port and the third port are coupled via a first capacitor, and the second port and the fourth port are coupled via a second capacitor. The first port is configured to receive a first amplified signal from either the carrier amplifier or the peak amplifier, and the fourth port is configured to receive a second amplified signal from the other carrier amplifier or the peak amplifier. The second port is configured to generate a combination of the first and second amplified signals as an amplified version of the RF signal. The third port is coupled to ground via a termination circuitry having a reactance approximately equal in magnitude to the impedance at the second port. An antenna, in communication with a power amplifier module, is configured to facilitate the transmission of an amplified version of a radio frequency signal. 56. The wireless device of claim 55, wherein the first port is configured to receive a first amplified signal from a carrier amplifier and the fourth port is configured to receive a second amplified signal from a peak amplifier, and the terminal circuitry includes a capacitor and has a capacitive reactance that is substantially equal in size to the impedance at the second port. 57. The wireless device of claim 55, wherein the first port is configured to receive a first amplified signal from a peak amplifier and the fourth port is configured to receive a second amplified signal from a carrier amplifier, and the terminal circuitry includes an inductor and has an inductive reactance that is substantially equal in size to the impedance at the second port. 58. A power amplifier system, comprising: An input circuit includes an input node, a first divider node, a second divider node, and a converter. The converter includes a first coil having a first winding and a second winding, and a second coil having a first winding and a second winding. The first winding of the first coil is coupled to the input node, the second winding of the first coil is coupled to the first divider node, the first winding of the second coil is coupled to an isolation port, and the second winding of the second coil is coupled to the second divider node. The input circuit is configured to receive a radio frequency (RF) signal at the input node and divide the RF signal into a first portion provided at the first divider node and a second portion provided at the second divider node. A Doherty amplifier circuit includes a carrier amplifier coupled to an input circuit to receive a first portion and a peak amplifier coupled to an input circuit to receive a second portion, the first and second portions having different phases and different powers. The carrier amplifier has a driver stage configured to operate in Class AB bias mode and an output stage configured to operate in Class B bias mode. The peak amplifier has a driver stage configured to operate in Class B bias mode and an output stage configured to operate in Class B bias mode. The output circuit, coupled to the Doherty amplifier circuit, is configured to combine the outputs of the carrier amplifier and the peak amplifier to generate an amplified radio frequency signal. The output circuit includes a balanced-to-unbalanced converter circuit having a first coil and a second coil. The first coil is implemented between a first port and a second port, and the second coil is implemented between a third port and a fourth port. The first port and the third port are coupled by a first capacitor, and the second port and the fourth port are coupled by a second capacitor. The first port is configured to receive the output of the carrier amplifier, the fourth port is configured to receive the output of the peak amplifier, and the second port is configured to generate the amplified radio frequency signal. 59. The power amplifier system of claim 58, wherein the input circuitry includes a phase shifter configured such that the first portion and the second portion have different phases. 60. The power amplifier system of claim 59, wherein the phase shifter and the peak amplifier are implemented in the peak amplification path. 61. The power amplifier system of claim 58, wherein the first portion and the second portion have a phase difference between 10 degrees and 20 degrees. 62. The power amplifier system of claim 58, wherein different phases reduce at least one of AM/AM distortion or AM/PM distortion compared to equal phases. 63. The power amplifier system of claim 58, wherein the input circuitry includes an attenuator configured such that the first portion and the second portion have different power. 64. The power amplifier system of claim 63, wherein the attenuator and the carrier amplifier are implemented in the carrier amplification path. 65. The power amplifier system of claim 58, wherein different power reduces at least one of AM/AM distortion or AM/PM distortion compared to equal power. 66. The power amplifier system of claim 58, wherein the input circuitry includes a pre-driver amplifier. 67. The power amplifier system of claim 58, wherein the Class B bias mode improves the PAE of the peak amplifier compared to the Class AB bias mode. 68. A power amplifier module, comprising: The packaging substrate is configured to accommodate multiple components; and A power amplifier system implemented on a package substrate includes: an input circuit having an input node, a first divider node, a second divider node, and a converter; the converter includes a first coil having a first winding and a second winding, and a second coil having a first winding and a second winding, the first winding of the first coil being coupled to the input node, the second winding of the first coil being coupled to the first divider node, the first winding of the second coil being coupled to an isolation port, and the second winding of the second coil being coupled to the second divider node; the input circuit is configured to receive a radio frequency (RF) signal at the input node and divide the RF signal into a first portion provided at the first divider node and a second portion provided at the second divider node. The power amplifier system further includes a Doherty amplifier circuit comprising a carrier amplifier coupled to an input circuit to receive a first portion, and a peak amplifier coupled to an input circuit to receive a second portion, the first and second portions having different phases and different powers. The carrier amplifier has a driver stage configured to operate in Class AB bias mode and an output stage configured to operate in Class B bias mode. The peak amplifier has a driver stage configured to operate in Class B bias mode and an output stage configured to operate in Class B bias mode. The power amplifier system further includes an output circuit coupled to a Doherty amplifier circuit. This output circuit is configured to combine the outputs of a carrier amplifier and a peak amplifier to generate an amplified radio frequency signal. The output circuit includes a balun circuit having a first coil and a second coil. The first coil is implemented between a first port and a second port, and the second coil is implemented between a third port and a fourth port. The first port and the third port are coupled via a first capacitor, and the second port and the fourth port are coupled via a second capacitor. The first port is configured to receive the output of the carrier amplifier, the fourth port is configured to receive the output of the peak amplifier, and the second port is configured to generate the amplified radio frequency signal. 69. The power amplifier module of claim 68, wherein at least one of the input circuitry or the output circuitry is implemented as an integrated passive device. 70. The power amplifier module of claim 68, wherein at least one of the input circuitry or the output circuitry is implemented on a single GaAs bare die. 71. A wireless device, comprising: The transceiver is configured to generate radio frequency signals; A power amplifier module, communicating with the transceiver, includes: an input circuit having an input node, a first divider node, a second divider node, and a converter; the converter includes a first coil having a first winding and a second winding, and a second coil having a first winding and a second winding, the first winding of the first coil coupled to the input node, the second winding of the first coil coupled to the first divider node, the first winding of the second coil coupled to an isolation port, and the second winding of the second coil coupled to the second divider node; the input circuit is configured to receive a radio frequency (RF) signal at the input node and divide the RF signal into a first portion provided at the first divider node and a second portion provided at the second divider node; the power amplifier module further includes a Doherty amplifier circuit, the Doherty amplifier circuit including a carrier amplifier coupled to the input circuit to receive the first portion, and a peak amplifier coupled to the input circuit to receive the second portion, the first portion and the second portion having different phases and different powers. The carrier amplifier has a driver stage configured to operate in Class AB bias mode and an output stage configured to operate in Class B bias mode; the peak amplifier has a driver stage configured to operate in Class B bias mode and an output stage configured to operate in Class B bias mode; and the power amplifier module further includes an output circuit coupled to a Doherty amplifier circuit, the output circuit being configured to combine the outputs of the carrier amplifier and the peak amplifier to generate an amplified radio frequency signal, the output circuit including a balun circuit having a first coil and a second coil, the first coil being implemented between a first port and a second port, the second coil being implemented between a third port and a fourth port, the first port and the third port being coupled by a first capacitor, the second port and the fourth port being coupled by a second capacitor, the first port being configured to receive the output of the carrier amplifier, the fourth port being configured to receive the output of the peak amplifier, and the second port being configured to generate the amplified radio frequency signal; and An antenna, in communication with a power amplifier module, is configured to facilitate the transmission of the amplified radio frequency signal.