HK1226201B - Multi-band power amplification system having enhanced efficiency through elimination of band selection switch - Google Patents

Description

Multi-band power amplifier system with enhanced efficiency by eliminating band-selective switches

CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims the benefit of U.S. Provisional Application No. 62/116,448, filed February 15, 2015, entitled “REDUCED POWER AMPLIFIER SIZETHROUGH ELIMINATION OF MATCHING NETWORK,” U.S. Provisional Application No. 62/116,449, filed February 15, 2015, entitled “ENHANCED POWER AMPLIFIER EFFICIENCY THROUGH ELIMINATION OF MATCHING NETWORK,” U.S. Provisional Application No. 62/116,450, filed February 15, 2015, entitled “MULTI-BAND POWER AMPLIFICATION SYSTEM HAVING ENHANCED EFFICIENCY THROUGH ELIMINATION OF BAND SELECTION SWITCH,” and U.S. Provisional Application No. 62/116,451, filed February 15, 2015, entitled “MULTI-BAND DEVICE HAVING MULTIPLE MINIATURIZED SINGLE-BAND POWER AMPLIFIERS,” the disclosures of each of which are expressly incorporated herein by reference in their entireties.

Technical Field

The present application relates generally to power amplifiers for radio frequency (RF) applications.

Background Art

In radio frequency (RF) applications, the RF signal to be transmitted is generally generated by a transceiver. Such RF signal can then be amplified by a power amplifier (PA), and the amplified RF signal can be routed to an antenna for transmission.

Summary of the Invention

According to various embodiments, the present application relates to a power amplification system comprising a power amplifier (PA) configured to receive and amplify a radio frequency (RF) signal, and a filter coupled to the PA and configured to condition the amplified RF signal. The PA is further configured to drive a load approximately equal to a characteristic impedance of the filter.

In some embodiments, the PA may have an impedance greater than about 40 ohms. The impedance of the PA may have a value of about 50 ohms.

In some embodiments, the power amplification system may further include a power supply system configured to provide a high voltage (HV) power supply to the PA. The power supply system may include a step-up DC/DC converter configured to generate the HV power supply based on a battery voltage Vbatt.

In some embodiments, the PA may include a heterojunction bipolar transistor (HBT). The HBT may be, for example, a gallium arsenide (GaAs) device. The HV power supply may be provided as VCC to the collector of the HBT.

In some embodiments, the filter may be a Tx filter configured to operate in a corresponding transmit (Tx) frequency band. The Tx filter may be part of a duplexer configured to operate in the Tx frequency band and a corresponding receive (Rx) frequency band.

In some embodiments, the filter may be coupled to the PA via an output path substantially free of impedance transformation circuitry.

In some embodiments, the power amplification system may further include one or more additional PAs, each configured to operate with the HV power supply and amplify a corresponding RF signal. The power amplification system may further include a filter coupled to each of the one or more additional PAs and configured to condition the corresponding amplified RF signal. Each of the one or more additional PAs may further be configured to drive a load impedance approximately equal to the characteristic impedance of the corresponding filter. Each of the one or more additional filters may be coupled to the corresponding PA via an output path substantially free of impedance transformation circuitry.

In some embodiments, the PA and the one or more additional PAs may form M PAs. In some embodiments, the M PAs may be implemented on a single semiconductor die. The M PAs may be configured to operate in separate frequency bands. The system may be substantially free of band select switches between the M PAs and their corresponding filters.

In some embodiments, the power amplifier system can be configured to operate as an average power tracking (APT) system. The APT system can have lower losses than another power amplifier system with similar frequency band handling capabilities but in which the PA operates at a lower voltage. The other power amplifier system can be an envelope tracking (ET) system. The APT system can have higher overall efficiency than the ET system.

In some teachings, the present application relates to a radio frequency (RF) module comprising a package substrate configured to house a plurality of components, and a power amplification system implemented on the package substrate. The power amplification system comprises a plurality of power amplifiers (PAs), each PA configured to receive and amplify a radio frequency (RF) signal. The power amplification system further comprises a filter coupled to each PA, each PA configured to drive a load impedance approximately equal to a characteristic impedance of the filter.

In some embodiments, each PA may be configured to operate in a high voltage (HV) power mode. Each filter may be coupled to a corresponding PA via an output path that is substantially free of impedance transformation circuitry.

In some embodiments, the RF module may be substantially free of band select switches between the plurality of PAs and their corresponding filters.The RF module may be, for example, a front end module (FEM).

According to some embodiments, the present application relates to a wireless device comprising a transceiver configured to generate a radio frequency (RF) signal and a front-end module (FEM) in communication with the transceiver. The FEM comprises a packaging substrate configured to house a plurality of components and a power amplification system implemented on the packaging substrate. The power amplification system comprises a plurality of power amplifiers (PAs), each PA configured to receive and amplify a radio frequency (RF) signal. The power amplification system further comprises a filter coupled to each PA, each PA configured to drive a load impedance approximately equal to the characteristic impedance of the filter. The wireless device further comprises an antenna in communication with the FEM, the antenna configured to transmit the amplified RF signal.

In some teachings, the present application relates to a method of processing a radio frequency (RF) signal. The method includes amplifying the RF signal with a power amplifier (PA), and routing the amplified RF signal to a filter. The method also includes operating the PA so that the PA drives approximately a characteristic impedance of the filter.

In some embodiments, the PA may have an impedance of approximately 50 ohms. In some embodiments, operating the PA may include powering the PA with a high voltage (HV).

According to various teachings, the present application relates to a power amplification system comprising a power amplifier (PA) configured to receive and amplify a radio frequency (RF) signal. The power amplification system further comprises an output filter coupled to the PA via an output path substantially free of impedance transforming circuitry.

In some embodiments, the PA can be further configured to drive a load impedance approximately equal to the characteristic load impedance of the output filter. The PA being configured to drive a load impedance approximately equal to the characteristic load impedance of the output filter can be achieved by operating the PA with a high voltage (HV) supply. The substantial absence of impedance transformation circuitry in the output path can result in a loss reduction of at least 0.5 dB between the PA and the output filter.

In some embodiments, the PA may have an impedance greater than about 40 ohms. The impedance of the PA may have a value of about 50 ohms. The impedance of the PA may result in reduced current drain in the PA. The reduced current drain in the PA may allow the PA to be smaller than other PAs with lower impedance.

In some embodiments, the power amplification system may further include a power supply system configured to provide a high voltage (HV) power supply to the PA. The power supply system may include a step-up DC/DC converter configured to generate the HV power supply based on a battery voltage Vbatt.

In some embodiments, the PA may include a heterojunction bipolar transistor (HBT). The HBT may be a gallium arsenide (GaAs) device. The HV power supply may be provided as VCC to the collector of the HBT.

In some embodiments, the output filter may be a Tx filter configured to operate at a corresponding transmit (Tx) frequency band. The Tx filter may be part of a duplexer configured to operate at the Tx frequency band and a corresponding receive (Rx) frequency band.

In some embodiments, the power amplification system may further include one or more additional PAs, each configured to operate with the HV power supply and amplify a corresponding RF signal. The power amplification system may further include an output filter coupled to each of the one or more additional PAs via an output path substantially free of impedance transformation circuitry. Each of the one or more additional PAs may further be configured to drive a load impedance approximately equal to the characteristic impedance of the corresponding output filter.

In some embodiments, the PA and the one or more additional PAs may form M PAs. The M PAs may be implemented on a single semiconductor chip. The M PAs may be configured to operate in separate frequency bands.

In some embodiments, the power amplification system may be substantially free of band select switches between the M PAs and their corresponding output filters. The power amplification system having substantially no band select switches may result in at least a 0.3 dB loss reduction between a given PA and its corresponding output filter.

In some embodiments, the power amplifier system can be configured to operate as an average power tracking (APT) system. The APT system can have lower losses than another power amplifier system with similar frequency band handling capabilities but in which the PA operates at a lower voltage. The other power amplifier system can be an envelope tracking (ET) system. The APT system can have higher overall efficiency than the ET system.

According to some embodiments, the present application relates to a radio frequency (RF) module, comprising a package substrate configured to house a plurality of components, and a power amplification system implemented on the package substrate. The power amplification system includes a plurality of power amplifiers (PAs), each PA configured to receive and amplify a radio frequency (RF) signal. The power amplification system also includes an output filter coupled to each PA via an output path substantially free of impedance transformation circuitry.

In some embodiments, each PA can be configured to operate in a high voltage (HV) supply mode. Each PA can also be configured to drive a load impedance approximately equal to the characteristic impedance of the corresponding output filter.

In some embodiments, the RF module may be substantially free of band select switches between the plurality of PAs and their corresponding output filters.The RF module may be, for example, a front end module (FEM).

In some embodiments, the present application relates to a wireless device comprising a transceiver configured to generate a radio frequency (RF) signal and a front-end module (FEM) in communication with the transceiver. The FEM comprises a packaging substrate configured to house a plurality of components and a power amplification system implemented on the packaging substrate. The power amplification system comprises a plurality of power amplifiers (PAs), each PA configured to receive and amplify a radio frequency (RF) signal. The power amplification system further comprises an output filter coupled to each PA via an output path substantially free of impedance transformation circuitry. The wireless device further comprises an antenna in communication with the FEM, the antenna configured to transmit the amplified RF signal.

In some teachings, the present application relates to a method of processing a radio frequency (RF) signal. The method includes amplifying the RF signal with a power amplifier (PA), and routing the amplified RF signal to an output filter substantially without impedance transformation. The method also includes filtering the amplified RF signal with the output filter.

In some embodiments, amplifying the RF signal may include operating the PA such that the PA drives approximately the characteristic impedance of the output filter, thereby allowing routing without substantial impedance transformation. The PA may have an impedance of approximately 50 ohms. In some embodiments, operating the PA may include powering the PA with a high voltage (HV).

According to some teachings, the present application relates to a power amplification system comprising a plurality of power amplifiers (PAs), each PA configured to receive and amplify radio frequency (RF) signals in a frequency band. The power amplification system may further include an output filter coupled to each PA via a separate output path, such that the power amplification system is substantially free of band select switches between the plurality of PAs and their corresponding output filters.

In some embodiments, each PA can be further configured to drive a load impedance approximately equal to the characteristic load impedance of the corresponding output filter. Each PA configured to drive a load impedance approximately equal to the characteristic load impedance of the corresponding output filter can be achieved by operating the PA with a high voltage (HV) power supply. The power amplification system, which is substantially free of band select switches, can result in a loss reduction of at least 0.3 dB between each PA and the corresponding output filter.

In some embodiments, each PA may have an impedance greater than about 40 ohms. The impedance of each PA may have a value of about 50 ohms. The impedance of each PA results in reduced current drain in the PA. The reduced current drain in each PA may allow the PA to be smaller than other PAs with lower impedance.

In some embodiments, the power amplification system may further include a power supply system configured to provide a high voltage (HV) power supply to each PA. The power supply system may include a step-up DC/DC converter configured to generate the HV power supply based on a battery voltage Vbatt.

In some embodiments, each PA may include a heterojunction bipolar transistor (HBT). The HBT may be a gallium arsenide (GaAs) device. The HV power supply may be provided as VCC to the collector of the HBT.

In some embodiments, each output filter may be a Tx filter configured to operate at a corresponding transmit (Tx) frequency band. The Tx filter may be part of a duplexer configured to operate at the Tx frequency band and a corresponding receive (Rx) frequency band.

In some embodiments, each output filter can be coupled to a corresponding PA via an output path substantially free of impedance transforming circuitry. Each output path substantially free of impedance transforming circuitry can result in at least a 0.5 dB loss reduction between the corresponding PA and the output filter.

In some embodiments, the plurality of PAs may be implemented on a single semiconductor chip. In some embodiments, the power amplification system may be configured to operate as an average power tracking (APT) system. The APT system may have lower losses than another power amplifier system having similar frequency band handling capabilities but in which the PAs operate at a lower voltage. The other power amplifier system may be an envelope tracking (ET) system. The APT system may have higher overall efficiency than the ET system.

In some teachings, the present application relates to a radio frequency (RF) module having a package substrate configured to house a plurality of components, and a power amplification system implemented on the package substrate. The power amplification system includes a plurality of power amplifiers (PAs), each PA configured to receive and amplify radio frequency (RF) signals within a frequency band. The power amplification system also includes an output filter coupled to each PA via a separate output path, such that the power amplification system is substantially free of band select switches between the plurality of PAs and their corresponding output filters.

In some embodiments, each PA can be configured to operate in a high voltage (HV) supply mode. Each PA can also be configured to drive a load impedance approximately equal to the characteristic impedance of the corresponding output filter.

In some embodiments, each output path may have substantially no impedance transformation circuitry between the corresponding PA and the output filter. In some embodiments, the RF module may be a front-end module (FEM).

According to various teachings, the present application relates to a wireless device comprising a transceiver configured to generate a radio frequency (RF) signal and a front-end module (FEM) in communication with the transceiver. The FEM comprises a packaging substrate configured to house a plurality of components and a power amplification system implemented on the packaging substrate. The power amplification system comprises a plurality of power amplifiers (PAs), each PA configured to receive and amplify radio frequency (RF) signals in a frequency band. The power amplification system further comprises an output filter coupled to each PA via a separate output path, such that the power amplification system is substantially free of band select switches between the plurality of PAs and their corresponding output filters. The wireless device further comprises an antenna in communication with the FEM, the antenna configured to transmit the amplified RF signal.

In some teachings, the present application relates to a method for processing a radio frequency (RF) signal. The method includes amplifying the RF signal with a selected one of a plurality of power amplifiers (PAs), the RF signal being within a frequency band. The method also includes routing the amplified RF signal to an output filter substantially without band select switching operation. The method also includes filtering the amplified RF signal with the output filter.

In some embodiments, amplifying the RF signal may include operating a selected PA such that the PA drives approximately the characteristic impedance of a corresponding output filter to allow routing substantially without impedance transformation. The PA may have an impedance of approximately 50 ohms.

In some embodiments, operating the PA may include powering the PA with a high voltage (HV).

In some embodiments, the present application relates to a power amplifier die comprising a semiconductor substrate and a plurality of power amplifiers (PAs) implemented on the semiconductor substrate. Each PA is configured to drive approximately the characteristic load impedance of downstream components along a signal path of an independent frequency band. Each PA is smaller than a wideband PA configured to drive more than one of a plurality of frequency bands associated with the plurality of PAs.

In some embodiments, the downstream component may include an output filter. The independent frequency band signal path may be a narrowband signal path. Each PA configured to drive a characteristic load impedance approximately equal to that of the corresponding output filter may be achieved by operating the PA with a high voltage (HV) power supply. Each PA may have an impedance greater than approximately 40 ohms. The impedance of each PA may have a value of approximately 50 ohms. The impedance of each PA may result in reduced current consumption in the PA. The reduced current consumption in each PA may allow the PA to be smaller than another PA having a lower impedance.

In some embodiments, each PA may include a heterojunction bipolar transistor (HBT), such as a gallium arsenide (GaAs) device. The HBT may be configured to receive the HV power supply as VCC through its collector.

In some embodiments, the PA can be configured to operate in average power tracking (APT) mode. The APT mode can result in lower losses than another die with similar frequency band handling capabilities but in which the PA operates at a lower voltage. The other die can be configured to operate in envelope tracking (ET) mode. The APT mode can produce higher overall efficiency than that associated with the ET mode.

According to some embodiments, the present application relates to a radio frequency (RF) module comprising a package substrate configured to house multiple components, and a power amplification system implemented on the package substrate. The power amplification system comprises multiple power amplifiers (PAs) implemented on a semiconductor substrate. Each PA is configured to drive a characteristic load impedance of a downstream component approximately along a signal path of an independent frequency band. Each PA is smaller than a wideband PA configured to drive more than one of multiple frequency bands associated with the multiple PAs.

In some embodiments, each PA can be configured to operate in a high voltage (HV) power supply mode. In some embodiments, the downstream component can include an output filter. The output filter can be coupled to the corresponding PA via a separate output path, such that the power amplification system has substantially no band select switch between the multiple PAs and their corresponding output filters. Each output path can have substantially no impedance conversion circuitry between the corresponding PA and the output filter. The RF module can be, for example, a front-end module (FEM).

In some teachings, the present application relates to a wireless device comprising a transceiver configured to generate a radio frequency (RF) signal and a front-end module (FEM) in communication with the transceiver. The FEM comprises a packaging substrate configured to house a plurality of components and a power amplification system implemented on the packaging substrate. The power amplification system comprises a plurality of power amplifiers (PAs) implemented on a semiconductor substrate, each PA being configured to drive a characteristic load impedance of a downstream component approximately along a signal path of an independent frequency band. Each PA is smaller than a wideband PA configured to drive more than one of a plurality of frequency bands associated with the plurality of PAs. The wireless device also comprises an antenna in communication with the FEM, the antenna being configured to transmit the amplified RF signal.

In some embodiments, the present application relates to a method for processing a radio frequency (RF) signal. The method includes amplifying the RF signal using a selected one of a plurality of power amplifiers (PAs), the selected PA driving approximately a characteristic load impedance of a downstream component along a signal path of an independent frequency band. The selected PA is smaller than a wideband PA configured to drive more than one of a plurality of frequency bands associated with the plurality of PAs. The method also includes routing the amplified RF signal to the downstream component.

In some embodiments, the downstream component may include an output filter.Amplifying the RF signal may include powering the selected PA with a high voltage (HV).

According to some teachings, the present application relates to a method for fabricating a power amplifier die. The method includes forming or providing a semiconductor substrate and implementing a plurality of independent frequency band signal paths. The method also includes forming a plurality of power amplifiers (PAs) on the semiconductor substrate, each PA configured to drive approximately a characteristic load impedance of a downstream component along a corresponding independent frequency band signal path. Each PA is smaller than a wideband PA configured to drive more than one of a plurality of frequency bands associated with the plurality of PAs.

For the purpose of summarizing this application, certain aspects, advantages and novel features of the present invention have been described herein. It should be understood that, according to any specific embodiment of the present invention, it is not necessary to achieve all of these advantages. Thus, the present invention may be implemented or realized in a manner that realizes or optimizes one or a group of advantages as taught herein, without realizing other advantages that may be taught or suggested herein.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG1 shows a wireless system or architecture with an amplification system.

FIG2 illustrates that the amplification system of FIG1 may include a radio frequency (RF) amplifier assembly having one or more power amplifiers (PAs).

3A-3E illustrate non-limiting examples of how each PA of FIG. 2 may be configured.

FIG4 shows that in some embodiments, the amplification system of FIG2 may be implemented as a high voltage (HV) power amplification system.

FIG5 illustrates that in some embodiments, the HV power amplification system of FIG4 may be configured to operate in an average power tracking (APT) mode.

FIG6 illustrates an example envelope tracking (ET) power amplification system.

7 illustrates an example high voltage (HV) average power tracking (APT) power amplification system having one or more features described herein.

FIG. 8 shows an HV APT power amplification system that may be a more specific example of the HV APT power amplification system of FIG. 7 .

9 illustrates example efficiency graphs as a function of output power for a power amplifier operating in a buck (Buck) ET configuration, a buck APT configuration, and a boost APT configuration.

FIG. 10 illustrates that a power amplification system having one or more features described herein can have collector efficiency and power added efficiency (PAE) profiles similar to nominal conditions.

FIG. 11 illustrates that a power amplification system having one or more features described herein can have linearity performance similar to the nominal case.

FIG. 12 shows an example graph of power amplifier load current as a function of load voltage.

FIG. 13 illustrates an example of how a power amplification system having one or more features described herein may yield one or more advantageous benefits.

FIG. 14 illustrates another example of how a power amplification system having one or more features described herein may produce one or more advantageous benefits.

FIG. 15 illustrates yet another example of how a power amplification system having one or more features described herein may yield one or more advantageous benefits.

FIG. 16 illustrates yet another example of how a power amplification system having one or more features described herein may produce one or more advantageous benefits.

FIG. 17 illustrates that in some embodiments, some or all of a power amplification system having one or more features described herein may be implemented in a module.

FIG18 illustrates an example wireless device having one or more advantageous features described herein.

DETAILED DESCRIPTION

Subheadings provided herein, if any, are for convenience only and do not necessarily affect the scope or meaning of the claimed invention.

introduction

1 , one or more features of the present disclosure are generally directed to a wireless system or architecture 50 having an amplification system 52. In some embodiments, the amplification system 52 can be implemented as one or more components that can be used in the wireless system/architecture 50. In some embodiments, the wireless system/architecture 50 can be implemented, for example, in a portable wireless device. Examples of such wireless devices are described herein.

FIG2 illustrates that the amplification system 52 of FIG1 may include a radio frequency (RF) amplifier assembly 54 having one or more power amplifiers (PAs). In the example of FIG2 , three PAs 60 a - 60 c are shown forming the RF amplifier assembly 54. It will be appreciated that other numbers of PAs may also be implemented. It will also be appreciated that one or more features of the present disclosure may also be implemented in RF amplifier assemblies having other types of RF amplifiers.

In some embodiments, the RF amplifier assembly 54 may be implemented on one or more semiconductor dies, which may be included in a packaged module such as a power amplifier module (PAM) or a front-end module (FEM). Such a packaged module is generally configured to be mounted on a circuit board associated with a portable wireless device.

The PAs (e.g., 60a-60c) in the amplification system 52 may generally be biased by the bias system 56. In addition, the supply voltage for the PAs may generally be provided by the power supply system 58. In some embodiments, either or both of the bias system 56 and the power supply system 58 may be included in the aforementioned package module with the RF amplifier assembly 54.

In some embodiments, the amplification system 52 may include a matching network 62. Such a matching network may be configured to provide input matching and/or output matching functions to the RF amplifier assembly 54.

For purposes of illustration, it will be understood that each PA (60) of FIG. 2 can be implemented in a variety of ways. FIG. 3A-3E illustrate non-limiting examples of how such a PA may be configured. FIG. 3A illustrates an example PA having an amplifier transistor 64, wherein an input RF signal (RF_In) is provided to the base of transistor 64 and an amplified RF signal (RF_Out) is output through the collector of transistor 64.

FIG3B shows an example PA having multiple amplifier transistors (e.g., 64 a, 64 b) arranged in a staged manner. An input RF signal (RF_In) is shown as being provided to the base of a first transistor 64 a, and the amplified RF signal from the first transistor 64 a is output through its collector. The amplified RF signal from the first transistor 64 a is provided to the base of a second transistor 64 b, and the amplified RF signal from the second transistor 64 b is shown as being output through its collector, thereby generating the PA's output RF signal (RF_Out).

In some embodiments, the aforementioned example PA configuration of Figure 3B may be depicted as two or more stages as shown in Figure 3C. The first stage 64a may be configured as, for example, a driver stage, and the second stage 64b may be configured as, for example, an output stage.

FIG3D shows that in some embodiments, the PA can be configured as a Doherty PA. Such a Doherty PA may include amplifier transistors 64a and 64b configured to provide carrier amplification and peak amplification, respectively, of an input RF signal (RF_In) to generate an amplified output RF signal (RF_Out). The input RF signal can be separated into a carrier portion and a peak portion by a splitter. The amplified carrier and peak signals can be combined by a combiner to generate an output RF signal.

FIG3E shows that in some embodiments, the PA can be implemented in a cascode configuration. An input RF signal (RF_In) can be provided to the base of a first amplifier transistor 64a operating as a common emitter device. The output of the first amplifier transistor 64a can be provided through its collector and can be provided to the emitter of a second amplifier transistor 64b operating as a common base device. The output of the second amplifier transistor 64b can be provided through its collector to generate an amplified output RF signal (RF_Out) of the PA.

3A-3E , the amplifying transistor is depicted as a bipolar junction transistor (BJT) such as a heterojunction bipolar transistor (HBT). It will be understood that one or more features of the present application may also be implemented in or with other types of transistors such as field effect transistors (FETs).

FIG4 shows that in some embodiments, the amplification system 52 of FIG2 can be implemented as a high voltage power amplification system 100. Such a system can include an HV power amplifier assembly 54 configured to include HV amplification operations of some or all PAs (e.g., 60a-60c). As described herein, such PAs can be biased by a bias system 56. In some embodiments, the aforementioned HV amplification operations can be facilitated by an HV power supply system 58. In some embodiments, an interface system 72 can be implemented to provide interface functionality between the HV power amplifier assembly 54 and either or both of the bias system 56 and the HV power supply system 58.

Examples of HV APT systems

Many wireless devices, such as cellular handsets, are configured to support multiple frequency bands. Such devices typically require and/or employ a mix of power amplifier architectures. However, this complexity in power amplifier architectures causes transmit efficiency to decrease as the number of supported frequency bands increases. This decrease in efficiency can be attributed to, for example, the increased losses incurred by combining multiple frequency bands while maintaining competitive size and cost targets.

In some radio frequency (RF) applications, a portable transmit solution may include a battery voltage (e.g., 3.8V) power amplifier (PA) combined with a step-down (Buck) switching power supply. In such an example solution, maximum transmit power is typically achieved at a 3.8V battery voltage, which typically requires or uses a 13:1 impedance transformation network within the PA to support a peak power level of, for example, approximately 1.5 watts.

In the aforementioned example, efficiency improvements at lower transmit power levels can be supported by implementing a buck power supply at a voltage below the battery voltage. Multi-band operation can be achieved by using an RF switch to select the desired filter corresponding to the desired frequency band. Note that some or all of the buck power supply, impedance transformation network, and RF switch may contribute to losses, which in turn reduces transmit efficiency.

Some wireless systems may include an envelope tracking (ET) feature implemented into a buck power supply to provide increased system efficiency. However, envelope tracking can increase the cost of the buck switching power supply and can also significantly complicate the system characterization and calibration process.

Examples of systems, circuits, devices, and methods are described herein that can significantly reduce losses while maintaining or improving competitive levels of size and/or cost. FIG5 illustrates that in some embodiments, the HV power amplification system of FIG4 can be configured to operate in average power tracking (APT) mode. In the example of FIG5 , the HV APT power amplification system 100 can include a power amplifier assembly 104 having one or more PAs configured to amplify one or more RF signals (RF_In). Such amplified one or more RF signals can be routed through a matching component 106 having one or more matching circuits to a duplexer assembly 108 having one or more duplexers.

The duplexer can allow for duplexing of transmit (Tx) and receive (Rx) operations. The Tx portion of such duplex operation is shown as one or more amplified RF signals (RF_Out) being output from the duplexer assembly 108 for transmission by an antenna (not shown). In the example of FIG5 , the Rx portion is not shown; however, the receive signal from the antenna can be received by the duplexer assembly 108 and output to, for example, a low noise amplifier (LNA).

Various examples are described herein in the context of Tx and Rx operations utilizing a duplexer, such that such a duplexer may implement, for example, frequency division duplex (FDD) functionality. It will be understood that, in some embodiments, an HV power amplification system having one or more features described herein may also be implemented in other duplex configurations, including, for example, a time division duplex (TDD) configuration.

5, the HV power supply system 102 is shown providing one or more HV power supply signals to the power amplifier component 104. More specific examples of how such HV signals may be provided to a corresponding PA will be described in greater detail herein.

In some examples, the HV APT power amplifier system 100 of FIG5 can be configured to operate in APT mode and meet or exceed the performance provided by envelope tracking (ET) implementations while maintaining or reducing cost and/or complexity. In some embodiments, such an HV APT power amplifier system can utilize the high voltage capabilities of some PAs, such as gallium arsenide (GaAs) heterojunction bipolar transistor (HBT) PAs. It will be understood that one or more features of the present application can also be implemented with other types of PAs. For example, amplifier systems utilizing CMOS devices with multiple cascode stages of LDMOS, silicon bipolar devices, and GaN/HEMT devices can also benefit from operation in the high voltage region.

By utilizing this high-voltage operation of the PA, one or more lossy components can be eliminated from the amplification system and/or other advantageous benefits can be achieved. For example, the PA output matching network can be eliminated. In another example, PA power supply efficiency can be increased. In yet another example, some passive components can be eliminated. Examples related to the foregoing are described in more detail herein.

One or more of the aforementioned features related to HV operation can result in one or more chips being implemented at a smaller scale, thereby allowing for greater flexibility in power amplifier system design. For example, a power amplifier system can be implemented with a greater number of smaller PAs, thereby allowing for the elimination of lossy components such as band switches. Examples related to the elimination of such band switches are described in more detail herein.

In some embodiments, the HV APT power amplification system 100 of FIG. 5 may be configured to substantially eliminate or reduce the complexities associated with envelope tracking characterization and/or calibration processes.

For illustration, it will be understood that high voltage (HV) may include voltage values higher than the battery voltage used in a portable wireless device. For example, HV may be greater than 3.7V or 4.2V. In some cases, HV may include voltage values greater than the battery voltage and at which the portable wireless device can operate more efficiently. In some cases, HV may include voltage values greater than the battery voltage and less than the breakdown voltage associated with a given type of PA. In the example context of a GaAs HBT, such a breakdown voltage may be in the range of 15V to 25V. Thus, the HV of a GaAs HBT PA may be in the range of, for example, 3.7V to 25V, 4.2V to 20V, 5V to 15V, 6V to 14V, 7V to 13V, or 8V to 12V.

6 and 7 show a comparison between an envelope tracking (ET) power amplification system 110 ( FIG. 6 ) and a high voltage (HV) average power tracking (APT) power amplification system 100 ( FIG. 7 ) to demonstrate how certain lossy components can be substantially eliminated in the HV APT power amplification system 100. For comparison purposes, it will be assumed that each power amplification system is configured to provide amplification in three frequency bands. However, it will be understood that a greater or fewer number of frequency bands may be used.

In the example of FIG6 , the ET power amplification system 110 is shown as including a power amplifier assembly 114 having a wideband amplification path 130 capable of providing amplification for three frequency bands. The amplification path 130 can receive an input RF signal via a common input node 126, and such an RF signal can be routed to one or more amplification stages via, for example, a DC-blocking capacitor 128. The amplification stages may include, for example, a driver stage 132 and an output stage 134. In some embodiments, the amplification stages 132, 134 may include, for example, HBT or CMOS amplification transistors.

6 , the collector of the output stage 134 is shown as being provided with a supply voltage VCC from an envelope tracking (ET) modulator 122 through a choke inductor 124. The ET modulator 122 is shown as being part of the ET modulation system 112. The supply voltage VCC provided by such an ET modulator is generally determined in a dynamic manner and may have a value in the range of, for example, approximately 1 V to 3 V. The ET modulator 122 is shown as generating such a dynamic VCC voltage based on a battery voltage Vbatt.

When amplification path 130 operates in the aforementioned manner, its impedance, Z, is relatively low (e.g., approximately 3 to 5 ohms); therefore, impedance transformation is typically required to match the impedance associated with downstream components. In the example of FIG6 , the band switch 138 (shown as part of band switch system 118 ) that receives the output of amplification path 130 is typically configured to present a 50 ohm load. Therefore, assuming the impedance (Z) presented by amplification path 130 is approximately 4 ohms, an impedance transformation of approximately 13:1 (50:4) is required. In the example of FIG6 , this impedance transformation is shown as being implemented by output matching network (OMN) 136 , which is shown as part of load transformation system 116 .

6, a band switch 138 is shown having a single input from the output of amplification path 130 (via OMN 136) and three outputs corresponding to three example frequency bands. Three duplexers 142a-142c are shown provided for these three frequency bands.

Each of the three duplexers 142a-142c is shown as including TX and RX filters (e.g., bandpass filters). Each TX filter is shown coupled to the band switch 138 to receive a corresponding amplified and switch-routed RF signal for transmission. Such RF signals are shown as being filtered and routed to an antenna port (ANT) (144a, 144b, or 144c). Each RX filter is shown as receiving an RX signal from a corresponding antenna port (ANT) (144a, 144b, or 144c). Such RX signals are shown as being filtered and routed to an RX component (e.g., an LNA) for further processing.

It is generally desirable to provide impedance matching between a given duplexer and components upstream (in the case of TX) or downstream (in the case of RX). In the example of FIG6 , for the TX filter of the duplexer, the band switch 138 is such an upstream component. Accordingly, matching circuits 140 a-140 c (shown as portions of, for example, a PI network 120) are shown implemented between the output of the band switch 138 and the corresponding duplexers 142 a-142 c. In some embodiments, each such matching circuit 140 a-140 c can be implemented, for example, as a pi (π) matching circuit.

Table 1 lists example values for insertion loss and efficiency for various components of the ET power amplification system 110 of FIG6 . It will be understood that the various values listed are approximate. As can be seen from Table 1, the ET power amplification system 110 of FIG6 includes many loss contributors. Even if each component of the system 110 is assumed to operate at its upper efficiency limit, the overall efficiency of the ET power amplification system 110 is approximately 31% (0.83×0.75×0.89×0.93×0.93×0.63).

Table 1

part Insertion loss efficiency ET Modulator(112) N/A 83% Power Amplifier Components(114) N/A 70% to 75% (PAE) Load Transformation (116) 0.5dB to 0.7dB 85% to 89% Band Switch(118) 0.3dB to 0.5dB 89% to 93% PI(120) 0.3dB 93% Duplexer(122) 2.0dB 63%

In the example of FIG7 , HV APT power amplification system 100 is shown configured to provide amplification for the same three frequency bands as the example ET power amplification system 110 of FIG6 . Within power amplifier assembly 104, three separate amplification paths may be implemented, each providing amplification for its respective frequency band. For example, the first amplification path is shown as including PA 168a, which receives an RF signal from input node 162a via DC isolation capacitor 164a. The amplified RF signal from PA 168a is shown as being routed to downstream components via capacitor 170a. Similarly, the second amplification path is shown as including PA 168b, which receives an RF signal from input node 162b via DC isolation capacitor 164b. The amplified RF signal from PA 168b is shown as being routed to downstream components via capacitor 170b. Similarly, the third amplification path is shown as including PA 168c, which receives an RF signal from input node 162c via DC isolation capacitor 164c. The amplified RF signal from PA 168c is shown being routed to downstream components through capacitor 170c.

In some embodiments, some or all of the PAs 168a-168c may comprise, for example, HBT PAs. It will be appreciated that one or more features of the present application may also be implemented using other types of PAs. For example, one or more of the benefits described herein may be achieved using a PA that is operable to produce an impedance that matches or approximates that of downstream components (e.g., through HV operation and/or through other operating parameters).

In the example of FIG7 , each PA (168 a, 168 b, or 168 c) is shown as being provided with a supply voltage VCC from a boost DC/DC converter 160 through a choke inductor (166 a, 166 b, or 166 c). The boost DC/DC converter 160 is shown as being part of the HV system 102. The boost DC/DC converter 160 can be configured to supply such a VCC voltage value range (e.g., approximately 1 V to 10 V) that includes the HV ranges or values described herein. The boost DC/DC converter 160 is shown as generating such a high VCC voltage based on the battery voltage Vbatt.

When PAs 168a-168c are operated in the aforementioned manner with a high VCC voltage (e.g., approximately 10V), the impedance Z of each PA is relatively high (e.g., approximately 40 ohms to 50 ohms), and therefore, no impedance transformation is required to match the impedance associated with downstream components. In the example of FIG7 , each duplexer 174a-174c (shown as portions of duplexer assembly 108) receiving the output of a corresponding PA (168a, 168b, or 168c) is generally configured to present a 50 ohm load. Therefore, assuming the impedance (Z) presented by a PA (168a, 168b, or 168c) is approximately 50 ohms, no impedance transformation (such as the load transformation system 116 in FIG6 ) is required.

It is generally desirable to provide impedance matching between a given duplexer and components upstream (in the case of TX) or downstream (in the case of RX). In the example of FIG7 , for the TX filter of a duplexer (174a, 174b, or 174c), the PA (168a, 168b, or 168c) is such an upstream component. Therefore, matching circuits 172a-172c (shown as portions of, for example, a PI network 106) may be implemented between the outputs of the respective PAs 168a-168c and the respective duplexers 174a-174c. In some embodiments, each such matching circuit 172a-172c may be implemented as, for example, a PI matching circuit.

7 , HV operation of the PAs 168a - 168c may cause each PA 168a - 168c to present an impedance similar to that of the corresponding duplexer, Z. Because impedance transformation is not required in such a configuration, an impedance transformer ( 116 in FIG6 ) is not required.

It should also be noted that operation of the PAs 168a-168c at higher impedances can result in much lower current levels within the PAs 168a-168c. Such much lower current levels can allow the PAs 168a-168c to be implemented in significantly reduced die sizes.

In some embodiments, either or both of the aforementioned features (elimination of the impedance transformer and reduced PA die size) can provide additional flexibility in power amplifier architecture design. For example, the space and/or cost savings provided by the aforementioned features can allow for smaller PAs (168a, 168b, or 168c in FIG. 7 ) to be used for each frequency band, thereby eliminating the need for a band switching system (e.g., 118 in FIG. 6 ). Accordingly, when compared to the ET power amplifier system 110 of FIG. 6 , the size, cost, and/or complexity associated with the HV APT power amplifier system 100 of FIG. 7 can be maintained or reduced while significantly reducing the overall losses of the power amplifier system 100.

Table 2 lists example values for insertion loss and efficiency of various components of the HV APT power amplification system 100 of Figure 7. It will be understood that the various values listed are approximate.

Table 2

part Insertion loss efficiency HV(102) N/A 93% Power amplifier components (104) N/A 80% to 82% (PAE) PI(106) 0.3dB 93% Duplexer(108) 2.0dB 63%

As can be seen from Table 2, the HV APT power amplification system 100 of FIG7 includes multiple loss contributors. However, when compared to the ET power amplification system 110 of FIG6 and Table 1, two significant loss contributors (load conversion (116) and band switch (118)) are eliminated from the HV APT power amplification system 100 of FIG7 . The elimination of these loss contributors is shown as a removal of approximately 1 dB in the transmit path in the example of FIG7 and Table 2.

Referring also to Table 2, if it is assumed that each component of the system 100 operates at its upper efficiency limit (as in the example of Table 1), the overall efficiency of the HV APT power amplification system 100 is approximately 45% (0.93×0.82×0.93×0.63). Even if it is assumed that each component operates at its lower efficiency limit, the overall efficiency of the HV APT power amplification system 100 is approximately 44% (0.93×0.80×0.93×0.63). It can be seen that in either case, the overall efficiency of the HV APT power amplification system 100 of FIG. 7 is significantly higher than the overall efficiency of the ET power amplification system 110 of FIG. 6 (approximately 31%).

6 and 7 , several features can be noted. It should be noted that the use of a DC/DC boost converter (160 in FIG. 7 ) can allow for the elimination of one or more other power converters that may be used in the PA system. For example, when operating to generate an HV supply voltage (e.g., 10V DC), 1 Watt ((10V) ² /(2×50Ω)) of RF power can be generated without harmonic termination.

It should also be noted that driving a PA into a 50 ohm load (e.g., FIG. 7 ) results in significantly lower per-ohm losses than driving a PA into a 3 ohm load (e.g., FIG. 6 ). For example, when driving the PA at 3 ohms, an equivalent series resistance (ESR) of 0.1 ohms has an insertion loss of approximately 0.14 dB, while for a PA driven at 50 ohms, an ESR of 0.1 ohms has an insertion loss of approximately 0.008 dB. Thus, a 3 ohm PA may have a total insertion loss of approximately 4.2 dB (0.14 dB×30), while a 50 ohm PA may have a total insertion loss of approximately 4.0 dB (0.008 dB×500), which is still less than the total insertion loss of a 3 ohm PA.

It should also be noted that a 50 ohm PA can have significantly higher gain than a 3 ohm PA. For example, the gain can be approximated as G _M × R _LL ; if G _M is similar for both cases, then the higher value of 50 ohms produces higher gain.

FIG8 shows a HV APT power amplification system 100 that can be a more specific example of the HV APT power amplification system 100 of FIG7 . In the example of FIG8 , the power amplifier assembly may include a low-band (LB) power amplifier assembly 190, a mid-band (MB) power amplifier assembly 200, and a high-band (HB) power amplifier assembly 210, some or all of which are capable of operating at the high voltage described herein. The power amplifier assembly may also include other PAs that do not operate at high voltage. For example, the 2G power amplifier assembly 220 and the power amplifier assemblies 230 and 232 may be capable of operating at low voltage.

8 , the aforementioned high voltage may be provided to the LB, MB, and HB power amplifier components 190, 200, 210 from, for example, a front-end power management integrated circuit (FE-PMIC) 160. In some embodiments, such a FE-PMIC may include a DC/DC boost converter (e.g., 160 of FIG. 7 ) as described herein.

The FE-PMIC 160 may receive the battery voltage Vbatt and generate a high voltage output 182 as a supply voltage (VCC) for the LB, MB, and HB power amplifier components 190, 200, 210. In some embodiments, such a high voltage VCC may have a value of approximately 10V, with a maximum current of approximately 250mA. It will be appreciated that other values of such a high voltage VCC and/or maximum current may also be used.

FE-PMIC 160 may also generate other outputs. For example, output 184 may provide bias signals to the PAs associated with LB, MB, and HB power amplifier components 190, 200, 210, as well as to 2G power amplifier component 220. In some embodiments, such bias signals may have a value of approximately 4V, with a maximum current of approximately 50mA. It will be appreciated that other values for such bias signals and/or maximum currents may also be used.

8 , the FE-PMIC 160 may be part of the HV system 102 described herein with reference to FIG 7 . The FE-PMIC 160 may include one or more interface nodes 180 . Such interface nodes may be used to control the FE-PMIC 160 , for example.

In the example of FIG8 , the supply voltage VCC for the 2G power amplifier component 220 is shown as being provided substantially directly from the battery voltage Vbatt (e.g., line 186). This Vbatt is also shown as providing operating voltages for various switches associated with the LB, MB, and HB power amplifier components 190, 200, 210. In some embodiments, this Vbatt may have a value in the range of approximately 2.5V to 4.5V. It will be understood that other values of this Vbatt may also be used.

In the example of FIG. 8 , the supply voltage VCC for the power amplifier components 230 , 232 may be provided from a DC/DC switching regulator 234 .

8 , the LB power amplifier assembly 190 is shown as including separate PAs for eight example frequency bands, B27, B28A, B28B, B20, B8, B26, B17, and B13. Each PA is shown providing its amplified RF signal to a corresponding duplexer. As described herein, the eight PAs can be coupled to their respective duplexers without an intervening band select switch.

LB power amplifier assembly 190 is also shown as including and/or coupled to an input switch 192 and an output switch 196. Input switch 192 is shown as including two input nodes 194a, 194b and eight output nodes corresponding to the eight PAs. In input switch 192, the two input nodes 194a, 194b are shown as being switchable to a common node, which is coupled to another common node for switching to one of the eight output nodes. Such coupling between these common nodes may include amplification elements.

The output switch 196 is shown as including eight input nodes corresponding to the eight duplexers and two output nodes 198a, 198b. The output switch 196 may also include inputs for receiving the output of the 2G power amplifier component 220 and the output of the power amplifier component 230.

It will be understood that the LB power amplifier assembly 190 may include different combinations of frequency bands.

Referring to FIG8 , MB power amplifier assembly 200 is shown as including separate PAs for four example frequency bands, B1, B25, B3, and B4. Each PA is shown providing its amplified RF signal to a corresponding duplexer. As described herein, the four PAs can be coupled to their respective duplexers without an intervening band select switch.

MB power amplifier assembly 200 is also shown as including and/or coupled to an input switch 202 and an output switch 206. Input switch 202 is shown as including an input node 204 and four output nodes corresponding to the four PAs. In input switch 202, input node 204 is shown as being coupled to a common node for switching to one of the four output nodes. The coupling between such nodes may include amplification elements.

The output switch 206 is shown as including four input nodes corresponding to the four duplexers and an output node 208. The output switch 206 may also include an input for receiving the output of the 2G power amplifier component 220.

It will be understood that the MB power amplifier assembly 200 may include different combinations of frequency bands.

8, HB power amplifier assembly 210 is shown as including separate PAs for two example frequency bands, B7 and B20. Each PA is shown providing its amplified RF signal to a corresponding duplexer. As described herein, the two PAs can be coupled to their respective duplexers without an intervening band select switch.

HB power amplifier assembly 210 is further shown as including and/or coupled to an input switch 212 and an output switch 216. Input switch 212 is shown as including an input node 214 and two output nodes corresponding to the two PAs. In input switch 212, input node 214 is shown as being coupled to a common node for switching to one of the two output nodes. The coupling between such nodes may include amplification elements.

The output switch 216 is shown as including two input nodes corresponding to the two duplexers and an output node 218. The output switch 216 may also include an input for receiving the output of the power amplifier component 232.

It will be understood that the HB power amplifier component 210 may include different combinations of frequency bands.

8 , the PAs of the LB, MB, and HB power amplifier components 190, 200, 210 may be implemented on one or more dies. For example, the PAs may be implemented on a single HBT (e.g., GaAs) die, on separate HBT dies corresponding to the LB, MB, and HB power amplifier components 190, 200, 210, or some combination thereof.

8 , each of the input switches 192, 202, 212 can be configured to provide the switching functionality described herein, as well as implement the biasing functionality described herein. In some embodiments, the switches 192, 196, 202, 206, 212, 216 can be implemented, for example, on a single silicon-on-insulator (SOI) wafer, on separate wafers corresponding to various functional groups, or some combination thereof.

Figure 9 shows example efficiency graphs as a function of output power for power amplifiers operating in 78% buck ET, 97% buck APT, and 87% boost APT configurations. Note that all three example configurations produce similarly high efficiency curves for output powers up to 15 dBm. Beyond these output levels, it can be seen that the 87% boost APT configuration has significantly higher efficiency values than both the 97% buck APT and 78% buck ET configurations. Such a boost APT configuration can be implemented in either or both of the example HV APT power amplifier systems of Figures 7 and 8.

FIG10 illustrates that a power amplification system having one or more features described herein (e.g., the HV APT power amplification system 100 of FIG8 ) can have collector efficiency and power added efficiency (PAE) curves similar to nominal conditions. For example, the collector efficiency curve associated with the HV APT power amplification system of FIG8 is illustrated as having substantially the same curve as the corresponding nominal collector efficiency curve. Similarly, the PAE curve associated with the HV APT power amplification system of FIG8 (as a function of output power) is illustrated as having substantially the same curve as the corresponding nominal PAE curve.

FIG11 illustrates that a power amplification system having one or more features described herein (e.g., the HA APT power amplification system 100 of FIG8 ) can have linearity performance (e.g., adjacent channel leakage ratio (ACLR)) similar to nominal conditions. For example, a graph of ACLR (as a function of output power) associated with the HV APT power amplification system of FIG8 is shown as having substantially the same curve as the corresponding nominal ACLR graph at higher output power values (e.g., above 29 dBm).

FIG12 shows example graphs of power amplifier load current as a function of load voltage for power amplifier configurations designated "R99" and "50RB LTE." It is assumed that a lower current condition of 40 mA is desired for the power amplifier configuration. For example, such a current of 40 mA can be derived by deducting the fixed bias current and the quiescent current from the supply current (the load current of FIG12 ). For the 50RB LTE example in FIG12 , a load current of approximately 104 mA can produce such a low current (40 mA) condition for this power amplifier configuration. Such a load current of 104 mA corresponds to a load voltage (VCC) of approximately 9.5 V, as indicated by point 250. It can therefore be seen that the high voltage power amplifier operating conditions described herein can produce a lower current condition for the power amplifier.

Examples of Favorable Characteristics

Figures 13-16 illustrate examples of advantageous benefits that can be obtained in an HV APT power amplification system having one or more features described herein. As described herein, Figure 13 illustrates that in some embodiments, the power amplification system 100 may include a power amplifier (PA) configured to receive a radio frequency (RF) signal (RF_in) at an input node 260. Such a PA may be provided with a supply voltage Vcc, which may include a high voltage (HV) value as described herein. The amplified RF signal may be output as RF_out and routed to a filter configured to condition the amplified RF signal and produce a filtered signal at an output node 262. The PA may be operable (e.g., in HV mode) to be driven approximately with a characteristic load impedance of the filter. This characteristic load impedance of the filter may be, for example, approximately 50 ohms.

In some embodiments, the aforementioned configuration can be implemented in an average power tracking (APT) PA system to produce one or more advantageous features. For example, a less complex power supply configuration, reduced losses, and improved efficiency can be achieved. In another example, the aforementioned PA, a wafer having the aforementioned power amplification system 100, and/or a module having the aforementioned power amplification system 100 can be implemented as a reduced-size device. In some embodiments, this reduced-size device can be achieved at least in part due to the elimination of some or all of the output matching network (OMN) of the PA in the power amplification system.

FIG14 shows an example of a power amplification system 100 in which an output matching network (OMN) associated with the PA (also referred to herein as an impedance transformation circuit) is substantially eliminated between the PA and the filter. In the example of FIG14 , the PA, its supply voltage Vcc, and the filter can be configured and operated similarly to the example of FIG13 . This PA configuration can include the HV operating mode described herein.

In the example of FIG14 , some or all of the power amplification system 100 can be implemented on a device 270 such as a PA chip or a PA module. By eliminating the OMN described above, the dimensions associated with the device 270 (e.g., d1×d2) can be reduced. In addition, other advantageous features such as reduced losses and improved efficiency can be achieved with the elimination of the OMN.

15 shows an example of a power amplification system 100 configured to process RF signals of multiple frequency bands. Such frequency bands may be, for example, Band A and Band B. It will be appreciated that other numbers of frequency bands may be implemented for the power amplification system 100.

In the example of Figure 15, each frequency band is shown as having a separate amplification path associated with it. In each amplification path, its PA, supply voltage Vcc, and filter can be configured and operated similarly to the example of Figure 14. This PA configuration can include the HV operating mode described herein.

In the example of FIG15 , each frequency band having its own dedicated amplification path allows for the elimination of a band select switch. Consequently, a device 270 (such as a PA die or PA module) having some or all of the power amplification system 100 can have reduced dimensions (e.g., d3×d4). Furthermore, the elimination of the band select switch can also achieve other advantageous features such as reduced losses and improved efficiency.

FIG16 illustrates an example of a power amplification system 100 similar to the example of FIG15 , configured to process RF signals in multiple frequency bands. In the example of FIG16 , similar to the example of FIG14 , some or all of the multiple amplification paths can each be substantially free of an output matching network (OMN) (also referred to herein as an impedance transformation circuit). Consequently, a device 270 (such as a PA chip or PA module) having some or all of the power amplification system 100 can have reduced dimensions (e.g., d5×d6). Furthermore, by utilizing the band select switch and eliminating some or all of the OMNs, other advantageous features such as reduced losses and improved efficiency can also be achieved.

In the examples of Figures 15 and 16 , the device 270 on which the corresponding power amplification system 100 is implemented can be, for example, a power amplifier die having a semiconductor substrate. Multiple PAs can be implemented in parallel on the semiconductor substrate as shown, with each PA configured to drive an independent narrow-band signal path. Consequently, each PA can be smaller than a wideband PA capable of driving more than one of the multiple frequency bands associated with the multiple PAs. As described herein, the use of such miniaturized single-band PAs can produce a number of desirable characteristics.

Product Examples

FIG17 shows that in some embodiments, some or all of the HV APT power amplification systems having one or more features described herein may be implemented in a module. Such a module may be, for example, a front-end module (FEM). In the example of FIG17 , the module 300 may include a packaging substrate 302 on which a plurality of components may be mounted. For example, the FE-PMIC component 102, the power amplifier assembly 104, the matching component 106, and the duplexer assembly 108 may be mounted and/or implemented on and/or within the packaging substrate 302. Other components such as a plurality of SMT devices 304 and an antenna switch module (ASM) 306 may also be mounted on the packaging substrate 302. Although all the various components are shown as being arranged on the packaging substrate 302, it will be understood that certain components may be implemented above or below other components.

In some embodiments, a power amplification system having one or more features described herein may be included in an RF device, such as a wireless device. Such a power amplification system may be implemented in the wireless device as one or more circuits, one or more chips, one or more packaged modules, or any combination thereof. In some embodiments, such a wireless device may include, for example, a cellular phone, a smartphone, a handheld wireless device with or without telephone functionality, a wireless tablet, and the like.

18 illustrates an example wireless device 400 having one or more advantageous features described herein. In the context of a module having one or more features described herein, such a module may be generally illustrated by dashed box 300 and may be implemented as, for example, a front end module (FEM).

18 , a power amplifier (PA) 420 may receive its corresponding RF signal from a transceiver 410, which may be configured and operable to generate an RF signal to be amplified and transmitted, and to process the received signal. The transceiver 410 is shown interacting with a baseband subsystem 408, which is configured to provide conversion between data and/or voice signals for a user and RF signals for the transceiver 410. The transceiver 410 may also communicate with a power management component 406, which is configured to manage power for the operation of the wireless device 400. Such power management may also control the operation of the baseband subsystem 408 and the module 300.

Baseband subsystem 408 is shown connected to user interface 402 to facilitate various inputs and outputs of voice and/or data to and from the user. Baseband subsystem 408 may also be connected to memory 404, which is configured to store data and/or instructions for facilitating the operation of the wireless device and/or provide information storage for the user.

In the example wireless device 400, the outputs of the PAs 420 are shown matched (via respective matching circuits 422) and routed to their respective duplexers 424. In some embodiments, the matching circuits 422 may be similar to the example matching circuits 172a-172c described herein with reference to FIG. 7 , when the PAs 420 are operating in HV mode with HV power, the outputs of the PAs 420 may be routed to their respective duplexers 424 without impedance transformation (e.g., using load transformation 116 in FIG. 6 ), as also described herein with reference to FIG. 7 . This amplified and filtered signal may be routed to the antenna 416 for transmission via the antenna switch 414. In some embodiments, the duplexer 424 may allow for simultaneous transmit and receive operations utilizing a common antenna (e.g., 416). In FIG. 18 , the receive signal is shown routed through the duplexer 424 to the "Rx" path, which may include, for example, one or more low-noise amplifiers (LNAs).

18, the aforementioned HV power supply for PA 420 may be provided by HV components 102. Such HV components may include, for example, a step-up DC/DC converter as described herein.

A variety of other wireless device configurations can utilize one or more of the features described herein. For example, a wireless device need not be a multi-band device. In another example, a wireless device can include additional antennas such as a diversity antenna and additional connectivity features such as Wi-Fi, Bluetooth, and GPS.

As described herein, when implemented in a system such as the system of the wireless device of FIG. 18 , one or more features of the present application can provide numerous advantages. For example, by eliminating or reducing output losses, a significant reduction in current consumption can be achieved. In another example, a lower bill of materials can be achieved for the power amplification system and/or the wireless device. In another example, due to, for example, separate PAs being used for their respective frequency bands, impedance optimization or desired configuration can be achieved for each supported frequency band. In yet another example, optimization or desired configuration for maximum or greater output power can be achieved by, for example, boosting the supply voltage system. In yet another example, a variety of different battery technologies can be utilized because the maximum or greater power does not have to be limited by the battery voltage.

One or more features of the present application may be implemented with various cellular frequency bands, as described herein. Examples of such frequency bands are listed in Table 3. It will be understood that at least some frequency bands may be divided into multiple sub-bands. It will also be understood that one or more features of the present application may be implemented with frequency ranges that do not have a designation, such as the examples in Table 3.

Table 3

In the description herein, various impedance forms are mentioned. For example, a PA is sometimes referred to as driving a load impedance of a downstream component, such as a filter. In another example, a PA is sometimes referred to as having an impedance value. For purposes of illustration, it will be understood that such references to the impedance of a PA can be used interchangeably. Furthermore, the impedance of a PA can include its output impedance as seen from the output side of the PA. Thus, such a PA configured to drive a load impedance of a downstream component can include the PA having an output impedance that is approximately the same as the load impedance of the downstream component.

Unless the context clearly requires otherwise, throughout the specification and claims, the terms "comprise," "comprising," and the like are to be interpreted in an inclusive sense, as opposed to an exclusive or exhaustive sense, that is, in the sense of "including but not limited to." The term "coupled," as generally used herein, refers to two or more elements that may be connected directly or by means of one or more intermediate elements. Additionally, when used in this application, the terms "herein," "above," "below," and terms of similar meaning shall refer to this application as a whole and not to any particular parts of this application. Where the context permits, terms in the above specification that use the singular or plural may also include the plural or singular, respectively. The term "or" when referring to a list of two or more items encompasses all of the following interpretations of that term: any item in the list, all items in the list, and any combination of items in the list.

The above detailed description of the embodiment of the present invention is not intended to be exhaustive or to limit the present invention to the precise form disclosed above. Although specific embodiments of the present invention and examples for the present invention have been described above for illustrative purposes, various equivalent modifications within the scope of the present invention are possible as will be appreciated by those skilled in the art. For example, although processes or blocks are presented in a given order, alternative embodiments may perform processes with steps in a different order, or employ systems with blocks in a different order, and some processes or blocks may be deleted, moved, added, subtracted, combined, and/or modified. Each of these processes or blocks may be implemented in a variety of ways. Similarly, although processes or blocks are sometimes shown as being performed serially, on the contrary, these processes or blocks may also be performed in parallel, or may be performed at different times.

The teachings of the invention provided herein can be applied to other systems, not necessarily the system described above.The elements and acts of the various embodiments described above can be combined to provide further embodiments.

Although some embodiments of the present invention have been described, these embodiments have been presented by way of example only and are not intended to limit the scope of this application. Indeed, the novel methods and systems described herein may be implemented in a variety of other forms; furthermore, various omissions, substitutions, and changes in the form of the methods and systems described herein may be made without departing from the spirit of this application. The accompanying drawings and their equivalents are intended to encompass such forms or modifications as would fall within the scope and spirit of this disclosure.

Claims (20)

1. A power amplification system, comprising: Multiple power amplifiers, each configured to receive and amplify radio frequency signals in a frequency band; and An output filter, coupled to each power amplifier via a separate output path, has a load impedance. The corresponding power amplifier is configured to operate at high voltage in average power tracking mode to provide the same impedance as the load impedance of the output filter. This results in no band selection switch between the power amplifiers and their corresponding output filters, leading to a loss reduction of at least 0.3 dB between each power amplifier and its corresponding output filter. Each output path also lacks impedance transformation circuitry, resulting in a loss reduction of at least 0.5 dB between the corresponding power amplifier and its output filter. 2. The power amplifier system of claim 1, wherein each power amplifier has an impedance greater than 40 ohms. 3. The power amplifier system of claim 2, wherein each power amplifier has an impedance of 50 ohms. 4. The power amplifier system of claim 2, wherein the impedance of each power amplifier results in reduced current consumption in the power amplifier. 5. The power amplifier system of claim 4, wherein the reduced current consumption in each power amplifier allows the size of the power amplifier to be smaller than that of another power amplifier with lower impedance. 6. The power amplification system of claim 1, further comprising a power supply system configured to provide a high-voltage power supply to each power amplifier. 7. The power amplification system of claim 6, wherein the power supply system includes a boost DC/DC converter configured to generate the high-voltage power supply based on the battery voltage Vbatt. 8. The power amplifier system of claim 6, wherein each power amplifier includes a heterojunction bipolar transistor. 9. The power amplification system of claim 8, wherein the heterojunction bipolar transistor is a gallium arsenide device. 10. The power amplification system of claim 8, wherein the high-voltage supply is provided as VCC to the collector of the heterojunction bipolar transistor. 11. The power amplification system of claim 1, wherein each output filter is a transmit filter configured to operate at a corresponding transmit frequency band. 12. The power amplification system of claim 11, wherein the transmit filter is part of a duplexer configured to operate at the transmit frequency band and the corresponding receive frequency band. 13. The power amplification system of claim 1, wherein the plurality of power amplifiers are implemented on a single semiconductor wafer. 14. The power amplifier system of claim 1, wherein the average power tracking system has lower losses than another power amplifier system having the same bandwidth processing capability but wherein the power amplifier operates at a low voltage. 15. The power amplifier system of claim 14, wherein the other power amplifier system is an envelope tracking system. 16. The power amplification system of claim 15, wherein the average power tracking system has a higher overall efficiency than the envelope tracking system. 17. A radio frequency module, comprising: Packaging substrate, configured to accommodate multiple components; and A power amplification system, implemented on the package substrate, includes a plurality of power amplifiers, each configured to receive and amplify radio frequency signals within a frequency band. The power amplification system also includes an output filter coupled to each power amplifier via a separate output path. The output filter has a load impedance, and the corresponding power amplifier is configured to operate at a high voltage in average power tracking mode to provide an impedance identical to the load impedance of the output filter. This arrangement ensures that the power amplification system has no band selection switch between the plurality of power amplifiers and their corresponding output filters, resulting in a loss reduction of at least 0.3 dB between each power amplifier and its corresponding output filter. Each output path also lacks impedance transformation circuitry, resulting in a loss reduction of at least 0.5 dB between the corresponding power amplifier and its output filter. 18. The radio frequency module of claim 17, wherein the radio frequency module is a front-end module. 19. A wireless device, comprising: The transceiver is configured to generate radio frequency signals; A front-end module, communicating with the transceiver, includes a package substrate configured to house multiple components. The front-end module also includes a power amplification system implemented on the package substrate, comprising multiple power amplifiers, each configured to receive and amplify radio frequency signals in a frequency band. The power amplification system further includes an output filter coupled to each power amplifier via a separate output path. The output filter has a load impedance, and the corresponding power amplifier is configured to operate at a high voltage in average power tracking mode to provide the same impedance as the load impedance of the output filter. This is achieved by eliminating a band selection switch between the multiple power amplifiers and their corresponding output filters, resulting in a loss reduction of at least 0.3 dB between each power amplifier and its corresponding output filter. Each output path also lacks impedance transformation circuitry, resulting in a loss reduction of at least 0.5 dB between the corresponding power amplifier and its output filter. An antenna that communicates with the front-end module is configured to transmit amplified radio frequency signals. 20. A method for processing radio frequency signals, the method comprising: The radio frequency signal is amplified using one of a plurality of power amplifiers, the radio frequency signal being in a frequency band; The amplified RF signal is routed to an output filter via an output path, the output filter having a load impedance. A selected power amplifier is configured to operate at high voltage in average power point tracking mode, providing the same impedance as the load impedance of the output filter. The output path lacks a band selection switch between the selected power amplifier and the output filter, resulting in a loss reduction of at least 0.3 dB between the power amplifier and the output filter. The output path lacks impedance transformation circuitry, resulting in a loss reduction of at least 0.5 dB between the power amplifier and the output filter. The amplified radio frequency signal is filtered using the output filter.