HK1222475B - Plasma reactor vessel and assembly, and a method of performing plasma processing - Google Patents

Description

Plasma reactor vessel and assembly, and method of performing plasma processing

Technical Field

The present invention relates to a plasma reactor vessel that can be used for performing plasma deposition on a substrate, the plasma reactor vessel comprising three electrodes and a substrate carrier configured to hold a substrate such that a substantial part of the upper and lower surfaces of the substrate remains untouched by the substrate carrier or any other part of the plasma reactor vessel. Plasma reactor assemblies and methods of performing plasma processing are also provided.

Background

Fig. 1 illustrates a conventional plasma capacitor processing reactor 100. The first planar electrode comprises a metal plate 2 facing the substrate 11. The first electrode 2 is fed with an RF voltage via an inlet 3 and is surrounded by a grounded liner 4. Modern PECVD reactors deliver their process gases through the first electrode as indicated by the distributed arrows 99. The second electrode of the parallel plate capacitor is a metal back plate 8 on which a substrate 11 is placed in contact with the second electrode 8 through its face 1. As shown in fig. 1, substrate 11 may be inserted into a recess 10 provided in backing plate 8 such that the exposed surface 11' of substrate 11 maintains a significant planar continuity with the surface of backing plate 8 exposed to plasma 5. The recess 10 allows keeping the plasma boundary free of geometric steps, although in many PECVD processing tools the substrate simply lies flat on a flat backing plate sometimes referred to as a susceptor (when it is supplied with heat) or chuck (when it forces the wafer to flatten). The back plate 8 is electrically connected to ground via a connector 9. The RF inlet 3 and the connector 9 may be reversed. In fact, under the condition that the potential difference between the electrodes 2, 8 is ensured, there is a degree of freedom as to where RF power is fed on both the electrodes 2, 8. For most conventional plasma processing, the delivered RF power is at the standard frequency of 13.56MHz, but there is a trend to use higher frequencies (say up to 100 MHz) for silicon-based PECVD. The plasma 5 is made of an ionized fraction of a low-pressure background gas. For PECVD deposition, the plasma is made from reactive gases. The plasma 5 is located in the central region of the plasma capacitor gap. In general, a plasma slab (slab) 5 can be considered as a conductive mass at a single given voltage called the plasma potential (which is itself a superposition of DC and RF components). Within the plasma boundaries 6, 7 or sheath, the plasma free electron density drops sharply and, at the first order (at first torder), the plasma boundaries 6, 7 can be considered as empty non-conductive layers that are capacitively crossed by the RF current. In the classical design, the substrate 11 is being placed in contact with the back plate 8 and the separation between the back surface of the substrate 1 and the back plate electrode 8 is substantially zero. Thanks to this contact, the RF voltage of the substrate 11 is substantially the same as the voltage on the adjacent surface of the back plate 8. It is implied here that the additional impedance associated with the RF current across the substrate is practically negligible. This mechanical contact at the spacing interface 1 provides a good continuity of the voltage set at the boundary of the sheath 6. However, due to this contact, the substrate backside is actually in frictional contact with the backplate 8 in several areas.

Because of the sensitivity of device performance to interface contamination, standard processing techniques consist in carefully cleaning the substrate before it enters the load lock of a low pressure processing system (wet process). During atmospheric transport, the substrate may be processed by a contactless pick-up device as described in US496976 using the Bernoulli force (Bernoulli) effect, or by grabbing the substrate only in a limited area located on the very edge of the substrate (the contact area is forbidden for active devices). When the substrate is inside a low pressure processing apparatus and when it is exposed to RF plasma, it is standard practice to place the substrate on a metal counter plate in order to carefully set the voltage at the backside of the substrate. Indeed, in a plasma capacitor, RF current flows laterally to parallel electrode planes and a ground electrode and return path for the RF current across the substrate must be provided. The difficulty is that the physical contact between the substrate backside surface and the counter plate is sufficient to contaminate the substrate, thereby transporting chemical contaminants or particles. The contaminants can compromise any further processing of the backside of the substrate. At this point, there are two options, the first being to take the substrate back to atmosphere after coating one side, flip the substrate, thoroughly clean the back side, and load again in a low pressure system to further process the other side of the substrate. Since vacuum processing has significant entry costs associated with the time consumed in the load lock operation plus heating/cooling and degassing, this process sequence of having two passes in the vacuum system means high production costs. The second solution is to accept the risk of backside contamination and possibly degraded device performance. After deposition on the top surface of the wafer while it is placed on the back plate, the internal processing system of the production tool flips the wafer and continues processing for the other side of the wafer. This is a process sequence as described in EP 2333814. It should be noted that turning a slice of brittle material, such as a thin silicon wafer, is quite dangerous in terms of the probability of breakage. One of the main reasons for this risk of breakage is due to the lack of atmospheric vibration damping.

The fabrication of heterojunction cells is disclosed in US5066340 and US 6207890. Basically, the fabrication process of heterojunction cells starts with thin, good quality crystalline or polycrystalline silicon wafers. The wafer may be moderately doped. To convert it into a photodiode, an amorphous silicon layer is deposited, with p-doping on one face (boron doping) and n-doping on the opposite face (phosphorus doping). As a result, photovoltaic heterojunction cells are grown from the silicon wafer. After PECVD growth, the initial rough surface (opensurface) of the wafer is embedded deep into the core of the device structure. Thus, it is readily understood that the device is very sensitive to any defects or impurities that were originally attached to the wafer surface. Prior to the coating of crystalline silicon-based wafers, it is very important that the wafer surface is cleaned extremely well. This cleaning incorporates a so-called etch/passivation process based on hydrofluoric acid exposure at the end of the wet cleaning sequence. It is known that HF-based etching removes the oxidized surface of the wafer and leaves a clean and perfectly organized hydrogen-saturated surface of the silicon crystal. This hydrogen-based passivation is known to persist in clean air for several minutes. Soon thereafter, the silicon re-oxidizes and/or chemisorbs to incorporate gaseous impurities on the semiconductor surface. This is because the silicon substrate should be quickly introduced in the load lock and kept inside a clean vacuum machine just after the final etch wet clean.

If a silicon wafer is introduced into a vacuum system and held flat on a substrate holder or electrostatic chuck, it will come into physical and chemical contact with its support. Because of this physical and chemical contact with its support, there is a significant risk of surface contamination of the silicon wafer. Furthermore, it is advantageous if all processes on both sides of the wafer are done in one vacuum sequence; otherwise, if one side of the wafer is coated, the etch cleaning passivation of the other side will be damaged and will have to be performed again (with the risk of damage by wet etching the already coated wafer side) when the substrate is brought back to air.

We will discuss here a rather straightforward solution consisting in maintaining the clearance gap between the back surface of the substrate and the second electrode as a back plate. Fig. 2a illustrates a part of a plasma reactor comprising a first clearance gap 12 between a substrate 11 and a back electrode 8 and wherein the substrate 11 is held in a substrate carrier 13 in electrical contact with the electrode 8. In this configuration, the substrate backside is in mechanical contact with the electrode 8 only via an edge contact 13' with the substrate carrier 13. However, the body of the substrate 11 is in a capacitive relationship with the electrode 8 facing its back surface. The upper surface of the substrate is exposed to a plasma 5 comprising a plasma sheath 6. In this configuration, the laterally flowing RF current first crosses the plasma sheath 6, which is a vacuum capacitor, and then crosses the substrate 11. This is because the resistance (or capacitive impedance) to the RF current across the substrate 11 is neglected. The RF current must also flow horizontally in the substrate, or possibly across an additional capacitor formed by first clearance gap 12.

Fig. 2b shows an equivalent RF circuit of the plasma reactor shown in fig. 2 a. In this equivalent circuit, the plasma sheath 6' and the first clearance gap 12 are respectively formed by a capacitor C_sAnd C_gA description is given. The current transport along the surface of the substrate 11 is the square resistance R expressed in ohm-square_□A description is given. The plasma RF potential is represented by conductive line 15. Contact resistance R_cIndicating the electrical contact between the substrate 11 and the substrate carrier 13 at the edge 13'. Since the substrate holding scheme is arranged to minimize the contact surface right at the wafer edge, it is reasonable to assume that R_cVery large and only a negligible fraction of the RF current flows through the contact point, so in general we can consider the substrate to be floating. In such a case, the driving voltage V across the plasma sheath 6' in front of the substrate_effThe full RF voltage difference V available between plasma 5 and 15 and ground 8 and 13_RFThe ratio can be calculated as in a classical capacitive divider via equation (1):

V_eff/ V_RF=e_s/ (e_s+ e_g) (1)，

wherein e is_sIs the equivalent thickness of the plasma sheath 6' and e_gThe width of the first clearance gap 12.

In a typical RF process, a plasma e_sTypically comprised between 1mm and 4 mm. If e_g1mm, the ratio V_eff/V_RFFrom 80% to 50%. The voltage along the plasma sheath experiences a significant drop in the driving RF voltage amplitude as it moves along the surface from the sheath 6 in front of the electrode 8 (via the conductive substrate carrier 13) to the sheath 6' in front of the substrate, and thus the plasma is significantly non-uniform.

If the contact point between the substrate 11 and the frame 13 is sufficient to collect a significant portion of the RF current, the horizontal conductivity of the substrate may transmit an RF voltage along the substrate due to some damping caused by the sheet resistance. Such transmission can be described by the telegraph's equation, where the lateral perturbation of the voltage is exponentially damped by the ratio L given by equation (2):

L² = 2 e_se_g/ [₀ω R_□(e_s+ e_g)](2)。

the screening length L is an estimate of the distance that its RF voltage will change from the pin-side contact to the floating case of equation (1). Which can be estimated for typical plasma processing conditions, a frequency of 13, 56MHz, a sheath thickness of 2mm, and a first clearance gap 12 of 1 mm. The scaled length is about 40 cm for a substrate square resistance of 10 Ω, 13cm for 100 Ω and 4 cm for 1000 Ω. In a wide range of substrate conductivities from 10 to 1000 Ω square resistances, the screening length is never significantly larger than the size of the substrate of interest; thus, in any case, the horizontal conductivity of the substrate cannot balance the RF voltage across the plasma sheath between the center and the edge of the substrate.

The result is that when the first clearance gap 12 exists between the substrate and the back electrode, the RF voltage in the plasma sheath 6' in front of the substrate is significantly reduced due to the first clearance gap which combines with the sheath to create a capacitive voltage divider. The adjacent plasma region has the full RF voltage across its sheath 6. Recall that in a standard plasma capacitor, the RF sheath is electrically coupledThe voltage provides the driving energy for the plasma and the resulting plasma density scales with the square of the RF voltage. As we have estimated, in the presence of the first clearance gap, the RF voltage ratio V_eff/V_RFTo 80% or less, which means that the plasma generation density varies from 100% to 64% or less between the grounded edge and the central region of the substrate. As electrons in the plasma diffuse, the plasma power non-uniformity will smear laterally and the process non-uniformity will spread from the edge of the substrate toward the center of the wafer.

In summary, one of the most obvious consequences of the presence of a stand off gap behind the substrate is poor process uniformity. In some cases, this RF sheath voltage variation has the drawback of being even more drastic. Especially for silane-based PECVD processes, a stronger edge plasma will induce an early triggering of local excessive plasma dust formation. The trapping of dust trapped in the local sheath will even further deteriorate the plasma uniformity.

US2013112546 discloses a sputtering system having a process chamber with an inlet port and an outlet port, and a sputtering target located on a wall of the process chamber. It also discloses a plurality of process chambers connected via vacuum channels.

US2008061041 discloses a plasma processing apparatus including a first electrode, a second electrode provided so as to face the first electrode via a workpiece so that a space is formed between the second electrode and the workpiece, a gas supply unit that supplies a gas into the space, a circuit having a power supply that applies a high-frequency voltage across the first and second electrodes so that the gas supplied into the space is converted into a plasma, and a support unit that supports at least a part of a second region of the workpiece so that the workpiece is spaced apart from the first electrode by a distance at which no discharge occurs between the first region and the first electrode when the high-frequency voltage is applied across the first and second electrodes.

US2009294062 discloses a plasma reactor utilizing a source and a bias RF power generator, the plasma being stabilized against design transients in the output of the source or bias power generator by compensating for modulation in the other generator.

US2010282709 discloses a substrate plasma processing apparatus for performing plasma processing on an electrode surface of an organic light emitting device. The substrate plasma processing apparatus may adjust a distance between the first electrode and the substrate and adjust a distance between the second electrode and the substrate.

KR20080020722 discloses a plasma processing apparatus provided for improving uniformity of a plasma processing process by generating a high discharge effect to the entire surface of a substrate. A plasma processing process is performed in the processing chamber. The upper electrode and the lower electrode are installed in the process chamber to face each other. The gas supply part supplies the process gas in the following manner: a process gas flow is induced from a lateral surface around the substrate loaded between the upper electrode and the lower electrode toward a center of the substrate.

Disclosure of Invention

It is an object of the present invention to obviate or mitigate at least some of the above-mentioned disadvantages.

It is an object of the present invention to perform RF processing of both sides of a substrate in a single vacuum sequence.

Another object of the present invention is to eliminate contamination due to rubbing or contact on the active area of the substrate, which may occur when the substrate surface is in contact with the back electrode.

Another object is to avoid non-uniformities induced by mechanical voids between the substrate and the backplane electrode.

Another object of the invention is to avoid mechanically flipping the substrate under vacuum. The mechanical flipping of the substrate under vacuum implies a risk of breakage of the wafer.

The present invention accomplishes these objectives by providing a plasma reactor vessel in which the active portion of the substrate remains untouched by the substrate support or any other portion of the plasma reactor vessel, such as an electrode in the plasma reactor vessel.

The present invention achieves these objects by means of a plasma reactor vessel comprising: a vacuum chamber; a first electrode in the vacuum chamber; a second electrode in the vacuum chamber opposite and spaced from the first electrode; means for providing a plasma in the vacuum chamber; a power supply electrically connected to one of said first or second electrodes for applying a primary RF voltage to one of said first and second electrodes, the other electrode being grounded; a substrate carrier comprising an electrically conductive material, the substrate carrier configured to be in electrical contact with the second electrode and to hold a substrate such that at least a majority of an upper surface and a lower surface of the substrate are untouched by any portion of the plasma reactor and can be exposed to the plasma; wherein the reactor vessel further comprises a third electrode comprised between the substrate carrier and the second electrode, wherein the third electrode is electrically insulated from the second electrode; and wherein the third electrode is arranged such that a first clearance gap is included between the substrate and the third electrode when the substrate carrier holds the substrate.

The position of the third electrode and/or the position of the substrate carrier within the plasma reactor vessel may be adjustable such that the size of the first clearance gap between the third electrode and the substrate held by the substrate support may be adjustable. The plasma voltage at the surface of the substrate may be determined by the magnitude of the first clearance gap. The position of the third electrode and/or the position of the substrate carrier within the plasma reactor vessel may be adjusted to provide a predefined plasma voltage at the surface of the substrate.

Preferably, the substrate carrier is configured to hold the substrate at a periphery of the substrate. The substrate carrier may be configured to hold the substrate at a periphery of the substrate such that an upper surface and a lower surface of the substrate are fully exposed, or such that at least a majority of the upper surface and the lower surface of the substrate are exposed. In the latter configuration, the at least a majority of the upper and lower surfaces of the substrate are untouched by any portion of the substrate carrier and/or the plasma reactor vessel. Preferably, the substrate carrier is configured to hold the substrate such that the active areas of the upper and lower surfaces are not in contact with the substrate carrier. Here, the active area corresponds to the surface on which the device is to be deposited. Preferably, the substrate carrier is configured to hold the substrate only within the non-active portion of the substrate. The non-active portion may comprise a distance of 0.5mm to 2mm, or 2mm to 3mm, or 0.5mm to 10mm at the periphery of the substrate surface.

It is yet another object of an advantageous embodiment of the present invention to use a compensated RF voltage to expose both the upper and lower surfaces of a substrate in a single vacuum sequence without flipping the substrate and/or without touching the active areas of both sides of the substrate. To achieve this object, the plasma reactor vessel may comprise a compensation arrangement configured to provide a compensation RF voltage to the third electrode, the compensation RF voltage having a modulation phase opposite to a modulation phase of the RF voltage differential between the first and second electrodes. The magnitude of the compensating RF voltage may be adjusted such that the magnitude of the plasma voltage at the surface of the substrate may be substantially equal to the magnitude of the voltage at one of the first or second electrodes.

The first clearance gap between the third electrode and the substrate has a substantially constant thickness, this distance being comprised between 0.5mm and 3 mm. Preferably, the first clearance gap is less than 2 mm. Most preferably, the gap is about 1 mm.

The present invention provides an assembly comprising a plurality of plasma reactor vessels, at least one of the plurality of plasma reactor vessels being a plasma reactor vessel according to one of the plasma reactor vessels described above, wherein each of the plurality of plasma reactor vessels is connected via a vacuum channel, wherein the vacuum channel is configured to allow passage of a substrate, and wherein at least one of the plasma reactor vessels is configured to provide plasma at an upper surface of the substrate, at least one of the plasma reactor vessels being configured to provide plasma at an opposite lower surface of the substrate. It is to be understood that the upper surface is a first surface of the substrate and the lower surface is a second surface of the substrate opposite the first surface. Thus, the upper and lower surfaces may fall on the same horizontal plane as described for the embodiment of fig. 3, or may fall on the same vertical plane, or may fall on any plane between the horizontal and vertical planes.

The invention also relates to low pressure processing of substrates having active areas on both their upper and lower surfaces. Substrates are commonly used to make electronic, optical, electromechanical or electrochemical components. In most embodiments, it is preferred that a non-conductive substrate is used. It is also preferred that the substrate has a planar profile. Examples of substrates that may be used in the present invention include dielectric substrates such as thin glass substrates for touch screen displays or semiconductor wafers for power diodes or heterojunction silicon solar cells.

An object of the present invention is to provide a method of uniformly performing plasma processing on a substrate without touching an active area of the substrate. It is also preferred that the other side of the substrate is completely treated in a single vacuum sequence process.

This object is achieved by means of a method for performing a plasma treatment using a reactor, comprising the steps of: arranging a substrate carrier to hold a substrate; introducing a substrate carrier holding a substrate into a vacuum chamber; positioning the substrate carrier within the vacuum chamber so as to align the upper or lower surface of the substrate with the first and/or second electrode; moving the third electrode to provide a first clearance gap having a predefined value between the substrate and the third electrode; applying a main RF voltage to one of the first or second electrodes and grounding the other electrode; applying a compensation voltage to the third electrode, wherein the compensation voltage is differentially opposite in phase from the RF voltage applied between the first or second electrodes; providing a plasma in a gap between the substrate and the first or second electrode; and then igniting the plasma.

Further optional features of the invention are given in the dependent claims of the present application.

Drawings

The invention will be better understood by means of a description of embodiments of the invention given by way of example only and illustrated by the accompanying drawings, in which:

FIG. 1 illustrates a conventional plasma capacitor processing reactor;

FIG. 2 illustrates a portion of a conventional plasma reactor (FIG. 2 a) including a recess providing a first gap behind the substrate and an equivalent RF circuit (FIG. 2 b);

FIG. 3 shows a cross-sectional view of a reactor vessel according to an embodiment of the invention;

FIGS. 4a and b illustrate possible configurations of a compensating device for use in the reactor vessel of FIG. 3;

fig. 5a and b illustrate how a substrate carrier can be positioned in the reactor vessel of fig. 3;

6a-c illustrate the substrate and carrier assembly in successive processing positions for successively coating both sides of the substrate;

FIGS. 7a-c show perspective and cross-sectional views of a carrier and substrate assembly in conjunction with second and third electrode assemblies according to further embodiments of the present invention;

8a-c illustrate various configurations of substrate carriers for use in a reactor vessel according to the present invention; and

figure 9 illustrates a small portion of the system components in the form of a processing line according to a further aspect of the invention.

Detailed Description

Fig. 3 illustrates a cross-sectional view of a plasma reactor vessel 100 according to an embodiment.

The plasma reactor vessel 100 includes a vacuum chamber 30 enclosed in a vacuum vessel 101; a plasma reactor volume 32 within the reactor ground wall 100, a first electrode 2 in the reactor volume 32; a second electrode 8 in the vacuum chamber 30 opposite the first electrode 2, facing the reactor volume 32 and spaced from the first electrode 2.

A power supply 33 is electrically connected to the first electrode 2 for applying a main RF voltage to the first electrode 2 for feeding the plasma in the plasma reactor volume 32. The second electrode 8 is grounded. It is to be understood that in another embodiment, the power source 33 may be electrically connected to the second electrode 8 and the first electrode 2 may be grounded.

A substrate carrier 13 comprising an electrically conductive material is further provided in the plasma reactor vessel 100. The substrate carrier 13 is configured such that it can be electrically connected with the second electrode 8 when the substrate carrier 13 is located in the vacuum chamber 30. The substrate carrier 13 illustrated in fig. 3 is shown holding a substrate 11, such as a wafer. The substrate carrier 13 is configured to be removable from the vacuum chamber 30 to allow the substrates 11 to be mounted on the substrate carrier 13. The substrate carrier 13 holds at least one substrate 11 such that at least a majority of the upper surface 40a and the opposing lower surface 40b of the substrate 11 are untouched by the substrate carrier 13 or any other portion of the plasma reactor 100. In the example illustrated in fig. 3, the substrate carrier 13 includes support members 13a, 13b on which the substrate 11 is placed; the length of the support members 13a, 13b is such that they extend only along the non-active portions 11a, 11b of the substrate 11; thus, the active portion 11c of the substrate 11 remains untouched by the support members 13a, 13b or any other portion of the plasma reactor 100. It should be noted that the active portion 11c of the substrate 11 is the portion of the substrate exposed to the plasma 5, while the inactive portions 11a, 11b of the substrate are the portions of the substrate 11 in contact with the substrate carrier 13.

In a variant, the support members 13a, 13b also contact the upper surface of the substrate 11, so that they extend only along the non-active portions 11a, 11b of the substrate 11. It is to be understood that in another embodiment, the substrate carrier 13 may hold the substrate 11 only at the substrate periphery, such that the entire upper and lower surfaces 40a, 40b of the substrate 11 remain untouched by the substrate carrier 13.

The reactor vessel 100 further comprises a third electrode 16 located between the substrate carrier 13 and the second electrode 8; such positioning of the third electrode 16 ensures that the third electrode 16 is located between the substrate 11 and the second electrode 8. The third electrode 16 and the substrate carrier 13 are positioned such that a first clearance gap 12 exists between the third electrode 16 and the substrate 11. The first clearance gap 12 ensures that the substrate 11 is not touched by the third electrode 16. The first clearance gap 12 may be between 0.5mm and 3 mm; preferably, less than 2 mm; and most preferably, about 1 mm. Preferably, the reactor vessel 100 comprises means (not shown) via which the position of the third electrode 16 can be adjusted, so that a user can select and provide any desired first clearance gap 12 between the substrate 11 and the third electrode 16.

The substrate carrier 13 may be configured such that the first clearance gap 12 remains constant along the entire surface of the substrate 11. For example, where the substrate 11 is very thin and bends due to gravity, the electrode 16 may be curved to follow the shape of the bent substrate 11, thereby keeping the first clearance gap 12 constant.

The substrate carrier 13 may further be arranged so as to minimize possible geometrical discontinuities at the intersection between the substrate carrier 13 and the substrate surface when the substrate 11 is held in the substrate carrier 13. For example, the support members 13a, 13b may be configured such that the active surface 11c of the substrate 11 is flush with the substrate carrier 13 (see fig. 3). In a variant not shown, the substrate carrier 13 may comprise a symmetrically tapering edge narrowing towards the substrate 11. In this latter configuration, the intersection between the substrate carrier 13 and the substrate 11 may comprise a step.

Advantageously, since the substrate carrier 13 only touches the substrate 11 at the non-active areas 11a, 11b of the substrate 11, and since there is a first clearance gap 12 between the third electrode 16 and the substrate 11, the active area 11c of the substrate 11 remains untouched by any part of the plasma reactor 100. Therefore, the active region 11c of the substrate 11 can be maintained uncontaminated.

In an embodiment, the vacuum vessel 101 further comprises a valve 26 which positively introduces the substrate carrier 13 into the vacuum vessel 101, for example in the direction indicated by arrow 49. The substrate carrier 13 may be interposed between the reactor body 100 and the second electrode 8. The vacuum vessel 101 may further comprise a further valve 26', for example opposite the valve 26, to allow the substrate carrier 13 to exit the vacuum vessel 101 at this other end.

In an embodiment, the compensation means 18 are electrically connected to the third electrode 16 by a feed line 17. It should be appreciated that the compensating device 18 may take any suitable configuration; example configurations will be discussed in more detail later. For this example, the compensation device 18 can be considered a simple RF voltage source.

The compensation means 18 is configured such that it can provide a compensated RF voltage V to the third electrode 16_cThe compensated RF voltage has a modulation phase opposite to the modulation phase of the RF voltage differential between the first electrode 2 and the second electrode 8. With the second electrode 8 grounded, the RF voltage differential is equal to the main RF voltage applied to the first electrode 2 by the power supply 33.

The compensation means 18 are also electrically connected directly to the second electrode 8, or indirectly to a metal part in contact with the electrode 8, by means of a further connector wire 20; the compensation means 18 is thus electrically connected between the second electrode 8 and the third electrode 16. As a result, the third electrode 16 is supplied with the compensating RF voltage V_cThe compensating means 18 must supply a compensating RF voltage V to the third electrode 16_cThe compensated RF voltage V_cIs adjusted so that the voltage of the substrate 11 takes the same value as the voltage on the second electrode 8 by capacitive effect.

The third electrode 16 is further electrically insulated from said second electrode 8 by means of insulating spacer elements 22, 23, such as ceramic holding posts. The ceramic portions 22, 23 define a second clearance gap 21 between the third electrode 16 and the second electrode 8. The ceramic holding blocks 22, 23 may be replaced by differently sized ceramic holding blocks in order to enable the user to adjust the size of the second clearance gap 21. It will be appreciated that other means than ceramic holding blocks 22, 23 may be used to electrically isolate the third electrode 16 from the second electrode 8. In addition, other means for adjusting the size of second clearance gap 21 may be provided. In an embodiment, the second electrode 8 comprises a recess 112. The second clearance gap 21 may be configured to have a predefined size by providing the second electrode 8 with a recess of a suitable size and providing the ceramic holding blocks 22, 23 with suitable dimensions.

In an embodiment, the reactor vessel 100 comprises a mechanical actuator (shown by numeral 28 in fig. 3 and 5) adapted to move the second electrode 8 and the third electrode 16 (the back plate assembly) relative to the housing 603. This movement allows the plasma reactor volume 32 to be opened to the vacuum chamber 30 when the backing plate assembly is lowered and closed when the backing plate assembly is moved upward.

As can be best seen in fig. 5a and 5b, the reactor vessel 100 is divided into first and second sections 601, 602. The first portion 601 comprises a first electrode 2 located within the housing 100. The second portion 602 comprises the second electrode 8 and the third electrode 16 separated by the ceramic holding blocks 22, 23. The first or second part 601, 602 may be moved relative to the other part, for example by using an actuator 28. The substrate carrier 13 is located between the first and second portions 601, 602. Preferably, the substrate carrier 13 is moved into position in the direction of arrow 49 by means of robotic transport. The first and second portions 601, 602 are arranged such that they both abut the substrate carrier 13, such that the first and second portions 601, 602 and the substrate carrier 13 define the plasma reactor volume 32. In particular, the first and second portions 601, 602 are arranged such that the housing 100 abuts the substrate carrier 13 and such that the second electrode 8 abuts the substrate carrier 13. When the housing 100 abuts the substrate carrier 13, the substrate carrier 13 may be clamped between the backpanel assembly 8 and the housing 603. In a variant which is not shown, the substrate carrier 13 can be moved in the direction of the arrow 49 when clamped.

It should be understood that in alternative embodiments, the first and second portions 601, 602 may be arranged such that they do not abut the substrate carrier 13. In this case, the first and second portions 601, 602 are arranged such that there is a gap between each of the first and second portions 601, 602 and the substrate carrier 13. The gap may be used for supplying gas or extracting gas from the reaction vessel 100. In such a configuration, the electrical contact between the second electrode 8 and the housing 603 may comprise a flexible strip (not shown) electrically connecting the housing 603 to the second electrode 8.

In practice, the second portion 602 of the reaction vessel 100 may be moved towards the first portion 601 of the reaction vessel 100; or in an alternative embodiment, the first portion 601 of the reaction vessel 100 may be moved towards the second portion 602 of the reaction vessel 100; or both the first and second portions 601, 602 may be moved towards each other; so as to sandwich the substrate carrier 13 between the first and second portions 601, 602, thereby defining a plasma chamber in which a reaction process is applied to form the plasma reactor volume 32.

As illustrated in fig. 5a and 5b and in fig. 6a, 6b and 6c, during use, the first and second portions 601, 602 of the reaction vessel 100 are moved apart. The substrate 11 is provided on a substrate carrier 13 and the substrate carrier 13 is located between the first and second sections 601, 602 of the reaction vessel 100. Fig. 6a to 6b illustrate the positioning of the substrate carrier 13 in a chamber 32, said chamber 32 being arranged for coating an upper side of the substrate 11. The substrate carrier 13 is positioned horizontally (arrow 49 in fig. 5 a) such that it is aligned and preferably centered below the first electrode 2 and below the second and third electrodes 8, 16.

It will be appreciated that the substrate carrier 13 may be positioned manually or automatically using any suitable positioning means, for example using a chain, carriage or transport fork-lift (not shown) that will be convenient for a user when positioning the substrate carrier 13. These transport elements 14 may be held by a user when positioning the substrate carrier 13, or alternatively the transport elements 14 may be connected to chains driven by an actuator or other automatically driven transport means to allow automatic positioning of the substrate carrier 13.

Once the substrate carrier 13 is positioned such that it is aligned, and preferably centered, below the first electrode 2 and below the second and third electrodes 8, 16, the second portion 602 of the reaction vessel 100 is moved towards the first portion 601 so as to sandwich the substrate carrier 13 between the first and second portions 601, 602, thereby defining a semi-enclosed plasma reaction volume 32 in which the plasma is confined. In particular, the substrate carrier 13 is sandwiched between the second electrode 8 and the housing 603 in which the first electrode 2 is accommodated. Since the substrate carrier 13 comprises an electrically conductive material, the housing 603 is thus electrically connected to the second electrode 8 by means of the substrate carrier 13.

The positioned first and second portions 601, 602 are then preferably secured during the complete plasma process sequence.

An advantage of having the first and second parts 601, 602 of the reaction vessel 100 moving relative to each other is that the first and second parts 601, 602 may be moved to mechanically contact the substrate carrier 13 and the second electrode 8, thereby precisely defining the predefined first clearance gap 12. Furthermore, moving the first and second portions 601, 602 together closes the plasma reactor volume 32, allowing it to operate in a plasma box fashion. Furthermore, this ensures that the reaction vessel 100, the substrate carrier 13 and the back plate 8 are all electrically grounded when the first and second parts 601, 602 have been moved together to clamp the substrate carrier 13 and contact the second electrode 8.

In the example illustrated in fig. 6a, 6b and 6c, the positioning device may comprise a spring element 27 (represented by a leaf spring) mechanically connected to the substrate carrier 13 and to a stationary part 26 of the positioning device. The stationary portion is shown as frame 26. The spring element 27 allows the substrate holder 14 to move and vertically adjust under the force transmitted by the second electrode 8. The spring element 27 also maintains the substrate carrier 13 in a centered position between the first portion 601 and the second portion 602 as the first and second portions 601, 602 move apart. Figure 6c shows the reactor vessel 100 of figures 6a and 6b inverted. The configuration of fig. 6c may be used to expose the lower surface 40b (see fig. 3) of the substrate 11 to plasma.

It should be noted that the height of the ceramic holding blocks 22, 23 and the depth of the recess 112 are chosen such that the first clearance gap 12 equals a predefined value when the first and second portions 601, 602 are brought together to the vacuum chamber 30.

Next, as shown in fig. 6b and 6c, plasma 5 is provided into the plasma chamber 32. A power supply 33 for applying a main RF voltage to the first electrode 2; the main RF voltage charges the plasma 15 in the plasma reactor volume 32, which causes plasma deposition on the upper surface 40a (see fig. 3) of the substrate 11. The charged plasma 5 induces a voltage on the upper surface 40a of the substrate 11 by a capacitive effect.

At the same time, the power supply 33 is used to apply a main RF voltage to the first electrode 2, and the compensation means 18 is operated to supply a compensation RF voltage V to the third electrode 16_c. Compensating RF voltage V_cIs between 10 and 100% of the main RF voltage, but the compensation RF voltage V_cIs opposite to the phase of the voltage difference between the first and second electrodes 2 and 8.

With the main RF voltage applied to the first electrode 2 and the compensation voltage applied to the third electrode 16, the plasma 5 in the vacuum chamber 30 is then ignited and plasma deposition on the substrate 11 occurs.

Compensating RF voltage V_cA voltage is induced on the lower surface 40b of the substrate 11 by the capacitive effect, which cancels out the voltage induced on the upper surface 40a of the substrate 11 by the charged plasma 5. The voltage induced on the lower surface 40b of the substrate 11 cancels out the effect of the series capacitance introduced by the clearance gap 12. As a result, the upper surface 40a of the substrate 11 will have a resulting potential that is constant across the upper surface 40a of the substrate and equal to the potential of the adjacent second electrode 8. Since the potential across the upper surface 40a of the substrate 11 is constant, plasma deposition will occur that is uniformly distributed across the upper surface 40 a.

For example, assume that the second electrode 8 is grounded(zero voltage) and the driving RF voltage delivered by the power supply 33 on the first electrode 2 is V₀And the RF voltage between the plasma 5 and the second electrode 8 is V_RFAnd also assuming that the plasma is quasi-symmetric, the RF plasma voltage V_RFWill be approximated as V_RF=V₀2, good estimation of the RF voltage across the sheath 6 (see fig. 1-3). The compensating RF voltage supplied by the compensating means 18 to the third electrode 16 is V_c. Effective voltage V at upper surface 40a of substrate 11_effThen it is:

V_eff= (V_RF– V_c)e_s/ (e_s+ e_g) Equation (3)

By being V_cSelecting a suitable value, effective voltage V_effCan become equal to V_RF. Ensuring an effective voltage V_effIs equal to V_RFV of_cSuitable values for (b) may be determined as:

V_c= -(e_g/e_s) V_RFequation (4)

Wherein e_gIs a first clearance gap 12 between the substrate 11 and the third electrode 16, and e_sIs the thickness of the plasma sheath 6.

Negative sign indicates that the phase will be equal to V_RFAre opposite in phase.

Recall that the sheath thickness varies between 1 and 3mm, for a first clearance gap 12 of 1mm, the compensation voltage will be at RF voltage V_RFOr between 66% and 200% for a first clearance gap 12 of 2 mm. Due to the RF voltage V_RFIs approximated by a driving RF voltage V₀Half, the compensation voltage Vc will vary between 16% and 100% of the main RF voltage delivered by the power supply 33 when the first clearance gap 12 is kept between 1 and 2 mm.

Therefore, the compensation voltage Vc for the third electrode will remain at the level (order) of the main RF voltage or less, preferably about one third thereof.

As mentionedAnd, the compensating device 18 may take any suitable configuration. Examples of two different suitable compensation means 18a, 18b are shown in fig. 4a and 4b, respectively. Each of the compensation means 18a, 18b will compensate the RF voltage V in a different way_cTo the third electrode 16.

The compensation means 18a are essentially made of a self-inductance coil 19 electrically connecting the second electrode 8 to the third electrode 16. Also illustrated in fig. 4a is an equivalent circuit from the substrate 11 through the compensation means 18a to the third electrode 16. The equivalent circuit comprising a capacitor C_gA capacitance between the third electrode 16 and the substrate taking into account the first clearance gap 12; and a capacitance C that accounts for the mutual capacitance between the electrode 16 and the enclosed second electrode 8_bWhich includes the contribution of the capacitance of second clearance gap 21 plus the contribution of both the third electrode periphery and the ceramic spacing elements 22, 23. It is readily apparent that such an impedance system connecting the substrate 13 to the second electrode 8 has a net impedance of zero at resonance when the following conditions are met:

L (C_g+ C_b)equation (5) of =1,

whereinIs the resonant frequency.

Zero impedance between the substrate 13 and the electrode 8 means that the two parts are at the same RF voltage. Thus, by providing the self-inductance coil 19 with a suitable self-inductance L, whereinEqual to the RF frequency, the self-inductance coil 19 will compensate for the capacitance C caused by the first clearance gap 12 between the substrate 11 and the third electrode 16_g. In particular, by providing a composition having a ratio equal to 1/(C)_g+ C_b)HasA self-induction coil 19 of self-induction L, whereinTo drive the RF frequency, the self-inductance coil 19 will provide a suitable compensation voltage for canceling the capacitance C caused by the first gap distance 12 between the substrate 11 and the third electrode 16_gThe series impedance effect of (1).

One of the advantages of the compensating means 18a is the simplicity of the configuration; the compensation means 18a comprise a simple self-inductance coil 19 which can be made compact, for example using stripline technology.

Fig. 4b illustrates a further example of a compensating device 18. The compensation means 18b shown in fig. 5b is an alternative to self-inductance based RF power ingress from the main generator 33. The compensation device 18b includes an RF power inlet 51, where a small portion of the RF power is extracted from the RF supply 33, and various adjustable circuits very similar to those found in a classical RF match box. It comprises a voltage control means 52, which voltage control means 52 can be used to adjust the RF voltage output from the RF power supply 51. It also comprises means for inverting and adjusting the phase of the RF power fed to the third electrode 16 via line 23, as can be done with a classical transformer.

In order to compensate for the proper adjustment of the system, whether it be as a self-inductance of 18a or as an auxiliary matching box for 18b, it is proposed to calibrate the phase and amplitude of the compensation voltage. A good part of this can be done by: calibration, a solid model of the plasma is made using a metal block in which the free space simulates a sheath and acts as a solid model of the substrate, with an insulating plane bearing metallization pads thereon. The RF probe can then pick up the voltage differential between the metal pad and the adjacent electrode 8. The adjustment consists in zeroing the probe differential signal. This technique is obviously sufficient to adjust the amplitude and phase of Vc (e.g. to adjust the value of L). Fine tuning using real plasma and uniformity measurements can be done later.

It will be appreciated that the compensating device 18 may take any other suitable configuration than that shown in figures 4a and 4 b. For exampleVarious circuits (passive or active) are capable of supplying a compensating RF voltage V to the third electrode 16_c. These various circuits may be configured to allow adjustment of the compensated RF voltage V_cBoth amplitude and phase. However, regardless of its configuration, the compensation device 18 may be configured such that it can provide the third electrode 16 with a compensation RF voltage V that causes the substrate 11 and the adjacent second electrode 8 to have the same RF voltage_c。

In the above example of the reactor vessel 100, the substrate carrier 13 is shown as being configured to hold a single substrate 11 over a single third electrode 16. Fig. 7a to 7c illustrate different carriers 13 and corresponding backpanel assemblies 602 according to further embodiments of the invention. The upper part of the reactor assembly 601 is the same as in fig. 5a, which has many of the same features as the plasma reactor vessel 100 shown in fig. 3 and similar features are given the same reference numerals. However, the substrate carrier 813 may hold four substrates and the underlying backplate assembly 602' may be adapted to this modified geometry, in particular with a plurality of compensation electrodes 16 beneath a plurality of substrates.

In fig. 7, the substrate carrier 813 comprises a conductive material and is configured such that it can be electrically connected with the second electrode 8 when the substrate carrier 813 is located in the vacuum chamber 30. The substrate carrier 813 illustrated in fig. 7a is shown holding four substrates 811, such as four wafers. Substrate carrier 813 is configured to be removable from vacuum chamber 30 to allow substrate 811 to be mounted on substrate carrier 813. The substrate carrier 813 holds each of the substrates 811 such that at least a majority of the upper surface 40a and the opposing lower surface 40b of each substrate 811 is untouched by the substrate carrier 813 or any other portion of the plasma reactor 100. In the example illustrated in fig. 7a, the substrate carrier 813 comprises four cut-out portions 814, each of which preferably has an area larger than the area of the substrate 811 and which can accommodate the substrate 811. The manner in which each of the substrates 811 remains in the cut-out portion 814 is similar to that described for the individual substrates in fig. 3, with supports that only contact the substrates at the very edges where the devices to be deposited are inactive. As shown in fig. 7b, the substrate carrier 813 includes support members 813a, 813b that extend into the cut-out portion 814. The substrate 811 is placed on these support members 813a, 813 b; the length of the support members 813a, 813b is such that they extend only along the non-active portions 811a, 811b of each substrate 811. Thus, the active portion 811c of each substrate 811 remains untouched by the support members 813a, 813b or any other portion of the plasma reactor 800. It will be appreciated that in an alternative embodiment, the substrate carrier 813 would not include support members 813a, 813b and the cut-out portions 814 may each have an area slightly smaller than the area of the substrate 811, such that each substrate may be positioned directly on the substrate carrier 813 above the corresponding cut-out portion 814. Further, in this case, it is most preferable that the substrate carrier 813 contacts only the non-active portions 811a, 811b of each substrate 811.

In fig. 7a and 7b, the corresponding backplate assembly 602' also includes four third electrodes 816, which correspond to the four cut-out portions 814 provided in the substrate carrier 813. Each of the four third electrodes 816 is electrically connected to the compensation means. Each of the four third electrodes 816 is located between the substrate carrier 813 and the second electrode 8 and the substrate carrier 813 may be arranged such that each of its cut-out portions 814 is aligned over a corresponding third electrode 816. Accordingly, each substrate 811 held by the substrate carrier 813 may be aligned over a corresponding third electrode 816. As in the case of plasma reactor vessel 100, each of the third electrodes 816 is positioned such that a first clearance gap 12 exists between each third electrode 816 and the substrate 811. The first stand-off distance 12 ensures that each substrate 811 is not touched by its corresponding third electrode 816. Preferably, the first clearance gap 12 between each substrate 811 and its corresponding third electrode 816 is about 1 mm.

In fig. 7b, the second electrode 8 further comprises a cylinder 25' positioned towards the centre of the second electrode 8. During use, the center of the substrate carrier 813 will be positioned on the pillars 25' when the substrate carrier 813 is brought into electrical contact with the second electrode 8. The posts 25' will provide structural support to the substrate carrier 813 to prevent the substrate 811 from flexing under its own weight. This ensures that a uniform distance is maintained between each of the substrates 811 and its corresponding third electrode 816.

Although the substrate carrier 813 is shown as including four cut-out portions 814 and corresponding four third electrodes 816, it is understood that the substrate carrier 813 may include any number of cut-out portions 814 and corresponding any number of third electrodes 816.

Fig. 7c illustrates a simpler design of a carrier for accommodating a plurality of substrates. In this case, the third electrode 16 is a single plate covering the entire substrate area and adjacent portions of the substrate carrier, such as 13a and 13 b. This design is preferred due to its simplicity, as long as the planarity of the substrate carrier 13 can be maintained.

For example, fig. 8c illustrates a cross-sectional view of a plasma reactor vessel 900 having a substrate carrier 913 therein, the substrate carrier 913 including four cut-out portions 914, each of which may receive a substrate. Instead of providing a corresponding number of third electrodes, the reactor vessel 900 includes a single third electrode 916 that is large enough to extend under all four cut-out portions 914. The single third electrode 916 is electrically connected to the compensation device 18. This design is sufficient if the mechanical flatness of both the carrier 913 and the backplate assembly 902 is sufficient to ensure good control of the first clearance gap 12 under all of the substrate 811.

Installation and operation of the plasma process requires changing the gas pressure inside the plasma reactor vessel, first installing the process pressure and then pumping out at the end of the process. During pressure changes, there is a risk of transient pressure differentials developing between the upper and lower surfaces of the one or more substrates; the transient pressure differential may cause distortion of the very thin substrate. The substrate may bend to the extent that it touches the third electrode in the plasma reactor vessel. Or it may break. Therefore, it is desirable to limit the pressure difference between the upper and lower surfaces of the substrate.

To address this problem, it is advantageous to allow gas communication between two volumes inside the plasma vessel reactor facing the upper and lower surfaces of the substrate; for example, in the embodiment illustrated in fig. 8a, because the area of the cut-out 914 in the substrate carrier 913 is configured to be larger than the substrate 911, a gap 62 is provided between the periphery of each substrate 911 and the portion of the substrate carrier 813 defining the cut-out. Most preferably, the area of the cut-out 914 is such that the gap 62 is equal to or less than 1mm, preferably about 0.8 mm. The gap 62 will permit gas to pass between the volumes of the upper and lower surfaces facing the substrate in the plasma vessel reactor. Therefore, there will be no pressure differential between the areas occupied by the upper and lower surfaces in the plasma vessel reactor.

An alternative solution is illustrated in fig. 8 b. In fig. 8b, the substrate carrier 913 includes a cut-out portion that does not provide sufficient communication for the gas at the periphery of the substrate 911. To allow gas exchange between the two volumes in the plasma vessel reactor facing the upper and lower surfaces of the substrate, the substrate carrier 913 comprises a plurality of holes 61 allowing gas to pass through the substrate carrier 913 and thus allowing gas exchange between the areas occupied by the upper and lower surfaces in the plasma vessel reactor. Preferably, each of the holes has a diameter of less than 1 mm. Preferably, more than thirty holes 61 are provided in the substrate carrier 913.

Maintaining the same pressure at the upper and lower surfaces of the one or more substrates and processing the exposed surface of the substrate at the reaction location on one face 40a means that the volume behind the substrate is enclosed in the assembly 902 and covered by the carrier 913 and the one or more substrates 911 form a closed volume in diffusive communication with the activated gas from the plasma volume 30. Furthermore, in some specific PECVD processes, the ambient gas may contain unstable species, which lead to secondary contamination from the gas phase of the lower surface of the substrate; this may typically occur during the doped layer deposition process.

To limit such secondary contamination, a conduit 64 may be provided that is arranged to provide a flow of inert gas across the lower surface 40b of the one or more substrates, as shown in fig. 8 c. In the example shown in fig. 8c, the conduit 64 passes through the second electrode 8. The gas supply 63 is connected to a conduit 64 and provides an inert gas that flows through the conduit and across the lower surface 40b of the one or more substrates. The flow of the inert gas will limit the accumulation of process gas on the lower surface 40b of the one or more substrates and will also purge the area below the lower surface 40 b.

It should be noted that in cases where the processing atmosphere within the plasma reactor vessel is exposed to a risk of spurious deposition that would result in secondary contamination of the lower surface 40b of the one or more substrates (as it would be the case during a PECVD process utilizing boron hydride), only a flow of inert gas over the lower surface 40b of the one or more substrates is required. For the case where the plasma reactor vessel may not require a gas supply 63 and conduit 64, the plasma volume 821 may alternatively either reside in a static volume or be allowed to communicate with the outer vacuum volume 30.

Typically, any of the plasma reactor vessels described above may be used to form a production assembly. FIG. 9 illustrates an example of an assembly according to the present invention; the assembly defines a production line including four vacuum vessels 1000 a-d. Substrate 1011 is transported serially to each of the four plasma reaction vessels 1000 a-d. Two of the vessels are shown as being equipped with PECVD reactors, vessel 1000a with the reactor coating the substrate down, and the next vessel 1000c with the reactor coating the other side of the substrate (i.e., up). Typically, the substrate 1011 is transported in series to each of the containers 1000a-d according to arrows 100ab-bc-cd by means of a carriage or some other suitable automated transport device.

In the example of fig. 9, four vessels 1000a-d are placed in series as it would be in a classical in-line vacuum processing system. Those skilled in the art will readily appreciate that the same concept of sequential processing can be designed in a clustered processing system architecture. In fig. 9, the reactor 1000c has a configuration that is an inversion of the configuration of the aforementioned plasma reaction vessel 1000 b. In other words, in the first plasma reaction vessel 1000b, the second and third electrodes 8, 16 are located below the lower surface 40b of the substrate 1011, and the first electrode 2 is located above the upper surface 40a of the substrate 1011. In the second plasma reaction vessel 1000b along the production line, the second and third electrodes 8, 16 are located above the upper surface 40a of the substrate 1011, and the first electrode 2 is located below the lower surface 40b of the substrate 1011. Due to the inverted configuration of the continuous plasma reaction vessels, plasma deposition will occur on the upper surface 40a of the first plasma reaction vessel 1000a in the production line; on the lower surface 40b of the second plasma reaction vessel 1000b in the production line; on the upper surface 40a of a third plasma reaction vessel 1000c in the production line; and finally on the lower surface 40b of the fourth plasma reaction vessel 1000d in the production line. It should be noted that the first substrate 10011 is seen to be pre-positioned in the reactor of chamber 1000b, while the previous substrate in the coating production sequence is seen to be pre-positioned in the next chamber 1000 c.

The assembly is not limited to the exemplary configuration of fig. 9, but may also include any combination of vessels to enable any arbitrary sequence of processes to be performed. For example, the assembly may include a number of containers other than four. The plurality of containers may be arranged such that the substrate 1011 may be processed in any possible combination of process steps when being transported from one container to another. For example, the substrate 1011 may be processed sequentially up and down, several times up (or down) and then down (or up). For example, the substrate 1011 may be continuously transported to a continuous process module comprising plasma reaction vessels 1000b-c (vessel 1000b with a reactor coating the substrate down, the next vessel 1000c with a reactor coating the other side of the substrate (i.e. up)) represented as a PECVD-equipped reactor. Typically, the substrate 1011 is transported in series to each of the containers 1000a-d by means of a carriage or some other suitable automated transport device. The plurality of containers may also be arranged such that the combination of process steps includes a combination of PECVD process steps and other process steps such as load lock, heating, cooling, substrate flipping, plasma etching, plasma cleaning, and PVD deposition such as evaporation or sputtering and reactive sputtering.

As an alternative to the above-described production line, each of the plasma reaction vessels 1000a-d may have all the same configuration, and a means for inverting the substrate 1011 may be provided. The apparatus for inverting substrate 1011 will be operated to invert substrate 1011 between successive plasma reaction vessels 1000a-d such that plasma deposition may occur successively on upper and lower surfaces 40a, 40b of substrate 1011 at each plasma reaction vessel 1000a-d along the production line.

It should be noted that it is most preferred that each of the four plasma reaction vessels 1000a-d be connected by means of a vacuum channel through which substrate 1011 may pass. In this manner, the substrate may be maintained in a vacuum environment as it passes between the four plasma reaction vessels 1000 a-d. Typically, a substrate (or a group of substrates) will be held in a single substrate carrier 1013 and the substrate carrier holding the substrates 1011 will pass in series through to four reaction vessels 1000 a-d.

The concept of the present invention deals with specific devices where both sides of the substrate contribute to the activity of the optoelectronic device. For example, the invention may be used in the manufacture of heterojunction battery cells or in the manufacture of power rectifiers.

Claims (14)

1. A plasma reactor vessel comprising:

a vacuum chamber;

a first electrode in the vacuum chamber;

a second electrode in the vacuum chamber opposite and spaced from the first electrode;

means for providing a reactive process gas in the vacuum chamber;

a power supply electrically connected to one of said first or second electrodes for applying a primary RF voltage to one of said first and second electrodes, the other electrode being grounded;

a substrate carrier comprising an electrically conductive material, the substrate carrier configured to be in electrical contact with the second electrode and to hold a substrate such that at least a majority of an upper surface of the substrate and at least a majority of a lower surface of the substrate are untouched by any portion of the plasma reactor and are capable of being exposed to plasma;

the reactor vessel further comprising a third electrode positioned between the substrate carrier and the second electrode, wherein the third electrode is electrically insulated from the second electrode; and

wherein the third electrode and the substrate carrier are arranged such that a first clearance gap exists between the third electrode and a substrate held by the substrate carrier.

2. The plasma reactor vessel of claim 1 further comprising a compensation device configured to provide a compensated RF voltage to the third electrode, the compensated RF voltage having a modulation phase that is opposite to a modulation phase of an RF voltage difference between the first electrode and the second electrode.

3. The plasma reactor vessel of claim 2 wherein the first clearance gap between the third electrode and substrate is between 0.5mm and 3 mm.

4. The plasma reactor vessel of claim 1 further comprising a second clearance gap between the third electrode and the second electrode, the second clearance gap electrically insulating the third electrode from the second electrode.

5. The plasma reactor vessel of claim 2,

wherein the compensation arrangement comprises a voltage source capable of generating an RF signal and the third electrode is electrically connected to the voltage source via a feed line.

6. The plasma reactor vessel of claim 2,

wherein the compensation means comprises a self-inductance coil electrically connecting the second electrode to the third electrode.

7. The plasma reactor vessel of claim 4,

further comprising an insulating spacer element between the third electrode and the second electrode, the magnitude of the second clearance gap being determined by the height of the insulating spacer element.

8. The plasma reactor vessel of claim 7,

wherein the insulating spacer element comprises a ceramic block.

9. The plasma reactor vessel of claim 1,

wherein the substrate carrier is configured to hold a plurality of the substrates.

10. The plasma reactor vessel of claim 9,

wherein the substrate carrier comprises a plurality of cut-out portions, each cut-out portion being adapted to receive a substrate.

11. The plasma reactor vessel of claim 10,

the reactor vessel includes a plurality of the third electrodes, each of the plurality of third electrodes being aligned with a corresponding cut-out in the substrate carrier.

12. An assembly comprising a plurality of plasma reactor vessels, at least one of the plurality of plasma reactor vessels being a plasma reactor vessel according to claim 1, wherein each of the plurality of plasma reactor vessels is connected via a vacuum channel, wherein the vacuum channel is configured to allow passage of a substrate, and wherein at least one of the plasma reactor vessels is configured to provide plasma at an upper surface of the substrate, at least one of the plasma reactor vessels being configured to provide plasma at an opposite lower surface of the substrate.

13. The assembly of claim 12, wherein the plasma reactor vessel is configured such that one of every two plasma reactor vessels provides plasma on the upper surface of the substrate and the other of every two plasma reactor vessels is configured to provide plasma at an opposite lower surface of the substrate.

14. A method for performing plasma processing using a plasma reactor vessel, the plasma reactor vessel comprising a vacuum chamber; a first electrode in the vacuum chamber; a second electrode in the vacuum chamber opposite and spaced from the first electrode; means for providing a reactive process gas in the vacuum chamber; a power supply electrically connected to one of said first or second electrodes for applying a primary RF voltage to one of said first and second electrodes, the other electrode being grounded; a substrate carrier comprising an electrically conductive material, the substrate carrier configured to be in electrical contact with the second electrode and to hold a substrate such that at least a majority of an upper surface of the substrate and at least a majority of a lower surface of the substrate are untouched by any portion of the plasma reactor and are capable of being exposed to plasma; a third electrode positioned between the substrate carrier and the second electrode, the third electrode being electrically insulated from the second electrode; and the third electrode and the substrate carrier are arranged such that there is a first clearance gap between the third electrode and a substrate held by the substrate carrier;

the method comprises the following steps:

arranging a substrate carrier to hold a substrate;

positioning the substrate carrier within the vacuum chamber such that an upper or lower surface of the substrate is aligned with the first or second electrode;

moving the third electrode to provide a first clearance gap having a predefined value between the substrate and the third electrode;

moving the second and/or first electrode to provide a plasma reactor volume;

applying a main RF voltage to one of the first or second electrodes and grounding the other electrode;

applying a compensation voltage to the third electrode, wherein the compensation voltage is opposite in phase to a primary RF voltage difference applied between the first electrode and the second electrode; and

providing a plasma in a gap between the substrate and the first electrode and then igniting the plasma.