HK1221818B - Image sensor pixel with multiple storage nodes - Google Patents

Description

Image sensor pixel with multiple storage nodes

Technical Field

The present invention relates generally to image sensors and, more particularly, but not exclusively, to image sensors including pixels having multiple storage nodes.

Background Art

Image sensors are widely used in digital cameras, cell phones, surveillance cameras, medical devices, and automobiles. As image sensor applications increase, demand for image sensors with improved image quality and performance is also increasing. Complementary metal oxide semiconductor ("CMOS") technology is used to manufacture lower-cost image sensors on silicon substrates. Some CMOS image sensors are designed to capture high dynamic range ("HDR") images.

Image sensors are also shrinking in size, even as consumers demand increased performance and functionality. Therefore, designers must balance adding features to image sensors with the overall size of the image sensor. To add HDR functionality to image sensors, some designers have used two photodiodes in a combined pixel to capture two different images at different light levels. One subpixel in the combined pixel can be used to sense bright light conditions, while the other subpixel in the combined pixel can be used to sense low light conditions. However, using two photodiodes has a significant impact on the available semiconductor real estate. Some image sensors produce HDR images by capturing consecutive images. However, the readout time between capturing consecutive images affects the final HDR image, especially when the scene contains moving objects. In other cases, such as gesture recognition, it is also necessary to capture consecutive images in a short period of time.

Summary of the Invention

One aspect of the present invention relates to an image sensor pixel comprising: a photodiode for generating image charge in response to image light; a first storage node; a second storage node, wherein the first storage node, the second storage node, and the photodiode have a first doping polarity; a first transfer storage gate (“TSG”) coupled to transfer the image charge from the photodiode to the first storage node, wherein the first TSG is disposed over a major portion of the first storage node; a second TSG coupled to transfer the image charge from the first storage node to the second storage node, wherein the second TSG is disposed over a major portion of the second storage node; a floating diffusion; and an output gate coupled to transfer the image charge from the second storage node to the floating diffusion.

In another aspect of the present invention, an imaging system includes: a light source coupled to emit non-visible light; an image sensor having a pixel array, wherein each image sensor pixel includes: a photodiode for generating an image charge in response to image light; a shutter transistor coupled to reset the photodiode; a first storage node; a second storage node, wherein the first storage node, the second storage node, and the photodiode have a first doping polarity; a first transfer storage gate (“TSG”) coupled to transfer the image charge from the photodiode to the first storage node, wherein the first TSG is disposed over a major portion of the first storage node; a second TSG coupled to transfer the image charge from the first storage node to the second storage node, wherein the second TSG is disposed over a major portion of the second storage node; a floating diffusion; and an output gate coupled to transfer the image charge from the second storage node to the floating diffusion; and a controller coupled to the light source to generate a pulse of the non-visible light and coupled to activate the shutter transistor to reset the photodiode in synchronization with generating the pulse of the non-visible light.

Another aspect of the present invention relates to a method of capturing an image, wherein each image sensor pixel in an array of image sensor pixels performs a method, the method comprising: accumulating a first image charge with a photodiode in response to first image light; transferring the first image charge from the photodiode to a second storage node, wherein the first image charge flows through the first storage node to the second storage node during the transfer; resetting the photodiode using a global shutter signal after transferring the first image charge to the second storage node; accumulating a second image charge with the photodiode in response to second image light, wherein accumulating the second image charge occurs after resetting the photodiode; transferring the second image charge to the first storage node while the first image charge is stored in the second storage node; transferring the first image charge from the second storage node to a floating diffusion for readout, wherein the second storage node is coupled between the first storage node and the floating diffusion; and transferring the second image charge from the first storage node to the floating diffusion for readout, wherein the second image charge flows through the second storage node to the floating diffusion during the transfer.

BRIEF DESCRIPTION OF THE DRAWINGS

Non-limiting and non-exhaustive embodiments of the present invention are described with reference to the following figures, wherein like reference numerals refer to like parts throughout the various views unless otherwise specified.

1 is a schematic block diagram illustrating one example of an imaging system including a pixel array having pixels with multiple storage nodes, according to an embodiment of the present invention.

2A is a cross-sectional view of an example pixel including multiple storage nodes, according to an embodiment of the present invention.

2B is a plan view of a layout of an example pixel including multiple storage nodes according to an embodiment of the present invention.

2C is a schematic diagram illustrating an electrical model of the example pixel of FIG. 2A , according to an embodiment of the invention.

3 illustrates an example method of operating a pixel having multiple storage nodes according to an embodiment of the present invention.

DETAILED DESCRIPTION

This document describes systems and methods for capturing images having pixels with multiple storage nodes. In the following description, numerous specific details are set forth to provide a thorough understanding of the embodiments. However, one skilled in the art will recognize that the techniques described herein can be practiced without one or more of the specific details, or with other methods, components, materials, and the like. In other instances, well-known structures, materials, or operations are not shown or described in detail to avoid obscuring certain aspects.

Reference throughout this specification to "one embodiment" or "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the present invention. Thus, the appearances of the phrases "in one embodiment" or "in an embodiment" in various places throughout this specification are not necessarily all referring to the same embodiment. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.

1 is a schematic block diagram illustrating an example of an imaging system 100 according to an embodiment of the present invention. Imaging system 100 includes an example pixel array 102, control circuitry 108, readout circuitry 104, and function logic 106. Pixel array 102 is coupled to control circuitry 108 and readout circuitry 104. Readout circuitry 104 is coupled to function logic 106.

In one example, pixel array 102 is a two-dimensional (2D) array of imaging sensors or pixels 107 (e.g., pixels P1, P2, ..., Pn). In one example, each pixel 107 is a CMOS imaging pixel having multiple storage nodes. As illustrated, each pixel 107 is arranged in rows (e.g., rows R1 to Ry) and columns (e.g., columns C1 to Cx) to acquire image data of a person, location, object, etc., which can then be used to render an image of the person, location, object, etc.

After each pixel 107 has acquired its image data or image charge, the image data is read out by readout circuitry 104 via readout columns 112 and then transferred to function logic 106. In various examples, readout circuitry 104 may include amplification circuitry, analog-to-digital (ADC) conversion circuitry, or other circuitry. Function logic 106 may simply store the image data or even manipulate the image data by applying post-image effects (e.g., cropping, rotating, removing red eye, adjusting brightness, adjusting contrast, or otherwise). In one example, readout circuitry 104 may read out image data one row at a time along a readout column line (illustrated) or may use various other techniques (not illustrated) to read out image data, such as serial readout or fully parallel readout of all pixels simultaneously. The image charge generated by different photodiodes of pixel 107 may be read out separately during different time periods.

To capture an image generated by image light received by pixel array 102, control circuitry 108 is coupled to pixel array 102 to control operational characteristics of pixel array 102. For example, control circuitry 108 may generate a shutter signal for controlling image acquisition. In one example, the shutter signal is a global shutter signal that simultaneously enables all pixels 107 within pixel array 102 to simultaneously acquire their respective image data during a single acquisition window. In one embodiment, imaging system 100 includes a light source 175 coupled to illuminate a scene or a subject within the scene. Light source 175 generates non-visible light. In one embodiment, light source 175 includes an infrared light emitting diode ("LED"). In the illustrated embodiment, control circuitry 108 is coupled to control light source 175. The control circuitry may send a light signal to light source 175 that causes light source 175 to emit pulses of non-visible light to illuminate the scene or subject. Control circuitry 108 may be configured to synchronize the shutter signal with the pulses of non-visible light so that the pulses of non-visible light illuminate a scene or subject and pixels 107 of pixel array 102 capture reflections of the pulsed non-visible light from the scene or subject.

FIG2A is a cross-sectional view of an example pixel 207 including multiple storage nodes according to an embodiment of the present invention, and FIG2B is a plan view of an example layout of pixel 207 according to an embodiment of the present invention. Pixel 207 can be used as pixel 107 in pixel array 102. Pixel 207 includes a global shutter ("GS") gate 290, a pinned layer 204, a photodiode 205, a first transfer storage gate ("TSG") 251, a first storage node 210, a second transfer storage gate ("TSG"), a second storage node 220, an output gate 280, and a floating diffusion 230. Pixel 207 is disposed within substrate 203. Substrate 203 is a P-type doped semiconductor substrate in FIG2A. Photodiode 205, first storage node 210, second storage node 220, and floating diffusion 230 are doped opposite to substrate 203, which is an N-type doping in FIG2A.

FIG2C illustrates an electrical model of pixel 207 according to an embodiment of the present invention. Transistor TX0 289 includes a global shutter gate 290. When TX0 289 is activated (e.g., by a digital high voltage on shutter gate 290), photodiode 205 is precharged to voltage VDD 299. Transistor TX1 209 includes a first transfer storage gate ("TSG") 251. When TX1 209 is activated (e.g., by a digital high voltage on TSG 251), image charge generated by photodiode 205 is transferred to a first storage node 210. Transistor TX2 219 includes a second transfer storage gate ("TSG") 252. When TX2 219 is activated (e.g., by a digital high voltage on TSG 252), image charge from first storage node 210 is transferred to a second storage node 220. Transistor TX3 229 includes an output gate 280. When TX3 229 is activated (eg, by a digital high voltage on output gate 280 ), image charge is transferred from second storage node 220 to floating diffusion 230 .

Source follower SF transistor 242 amplifies the image signal generated by the image charge within floating diffusion 230, and row select transistor SEL 243 is activated to bring the amplified image signal onto readout column 212 for readout. Reset transistor 241 is activated to reset floating diffusion 230 to voltage VDD 299. By resetting floating diffusion 230 and reading out the reset floating diffusion to establish a baseline readout and then subtracting the baseline readout from the image signal to produce a noise-corrected image signal, pixel 207 can perform a readout technique known as correlated double sampling ("CDS").

Photodiode 205 is configured to generate image charge in response to receiving image light 275. In FIG2A , a P-type doped pinning layer 204 is disposed above photodiode 205 to form a pinned photodiode. Also in FIG2A , a first TSG 251 is disposed above a major portion of a first storage node 210 and a second TSG 252 is disposed above a major portion of a second storage node 220. Due to their serial nature and immediate proximity, first TSG 251 and second TSG 252 may be referred to as cascaded transfer storage gates. This configuration allows pixel 207 to operate in a unique operating mode while also reducing the pixel area required to execute the unique operating mode.

FIG3 is an example process 300 for operating pixel 207 according to an embodiment of the present invention. The order in which some or all of the process blocks in process 300 appear should not be considered limiting. Rather, those skilled in the art having benefit of this disclosure will understand that some of the process blocks may be performed in various orders not illustrated, or even in parallel.

In process block 305, a first image charge is accumulated in the photodiode 205. A global shutter signal may activate TX0 289 via the global shutter gate 290 to pre-charge the photodiode 205 prior to this first accumulation period. After the first accumulation period, in process block 310, the first image charge is transferred from the photodiode 205 to the second storage node 220. To transfer the first image charge from the photodiode 205 to the second storage node 220, a positive voltage is applied to the first TSG 251 to activate TX0 209 and transfer the image charge from the photodiode 205 to the first storage node 210. Subsequently, a negative voltage is applied to the first TSG 251 and a positive voltage is applied to the second TSG 252 to activate TX2 219, thereby transferring the first image charge from the first storage node 210 to the second storage node 220. After sufficient time has elapsed to allow the first image charge to transfer to second storage node 220 , a negative voltage is applied to second TSG 252 to trap and store the first image charge beneath second TSG 252 within second storage node 220 .

In process block 315, photodiode 205 is reset by the activated global shutter gate 290, which pre-charges photodiode 205 back to voltage VDD 299. After photodiode 205 is reset, it begins accumulating a second image charge during a second accumulation period (process block 320). Following the second accumulation period, the second image charge is transferred to first storage node 210 by activating TX1 209 via first TSG 251 (process block 325). After sufficient time has elapsed to allow the second image charge to transfer to first storage node 210, a negative voltage is applied to first TSG 251 to trap and store the second image charge beneath first TSG 251 within first storage node 200. Thus, pixel 207 is able to generate and store the first image charge in second storage node 220 during the first accumulation period, while also generating and storing the second image charge in first storage node 210 using photodiode 205 during the second accumulation period. This allows pixel 207 to quickly capture image signals from two different exposures (e.g., a first accumulation period and a second accumulation period) without being limited by the speed of the readout sequence to capture two different exposures. Furthermore, pixel 207 can capture two image signals using a single photodiode 205 and a reduced number of transistors compared to having two separate pixels. This reduced number of transistors allows for increased photodiode area (and therefore increased quantum efficiency) and reduced transistor area in pixel array 102, which improves the imaging capabilities of image sensor 100.

Before reading out pixel 207, a negative voltage can be applied to both first TSG 251 and second TSG 252 while the first image charge is stored in second storage node 220 and while the second image charge is stored in first storage node 210. Photodiode 205 can generate a third image charge in response to a third image light while the first and second image charges are stored within pixel 207 for readout. It should be understood that a third cascade transfer storage gate can be added in series with first TSG 251 and second TSG 252 to increase the ability to store the third image charge from the third accumulation period.

To read out pixel 207, in process block 330, the first image charge is transferred from second storage node 220 to floating diffusion 230 for readout using transistors 241, 242, and 243, as described above. As described above, CDS can be performed by sampling the baseline readout from floating diffusion 230 to establish a baseline signal from pixel 207. Notably, CDS can still be implemented using pixel 207 by resetting floating diffusion 230 while still maintaining both the first and second image charges beneath first and second TSGs 251, 252, respectively.

After process block 330, in process block 335, the second image charge is transferred from first storage node 210 to floating diffusion 230. The second image charge flows through second storage node 220 to floating diffusion 230 during the transfer. TX2 219 is activated via second TSG 252 to transfer the second image charge from first storage node 210 to second storage node 220, and TX3 229 is activated via output gate 280 to transfer the second image charge from second storage node 220 to floating diffusion 230. TX2 219 and TX3 229 may be activated simultaneously to facilitate the transfer of the second image signal to floating diffusion 230.

2A , a first storage node 210 is illustrated as being buried in substrate 203, with a layer of P-type doped substrate disposed between first storage node 210 and first TSG 251. Similarly, a second storage node 220 is illustrated as being buried in substrate 203, with a layer of P-type doped substrate disposed between second storage node 220 and second TSG 252. Because respective image charges are stored in their respective storage nodes (which are buried storage nodes), the stored image charges are less susceptible to dark current flowing along the interface between substrate 203 and the insulating layer (not illustrated) isolating the gates of TX1 209, TX2 219, and TX3 229 from substrate 203. In contrast, a charge-coupled device (“CCD”), for example, cannot effectively store image charge beneath its gate because the image charge dissipates due to dark current. Because a negative gate voltage drives the image charge (in the form of electrons) away from dark current at the substrate-insulator interface, applying a negative voltage to the first TSG 251 and the second TSG 252 while the image charge is stored beneath the gates also preserves the image charge beneath the first TSG 251 and the second TSG 252. Positioning the first TSG 251 over a substantial portion (at least a larger portion) of the first storage node 210 allows the negative voltage applied to the first TSG 251 to have a greater influence on the location of the second image charge stored in the first storage node 210. Similarly, positioning the second TSG 252 over a substantial portion (at least a larger portion) of the second storage node 220 allows the negative voltage applied to the second TSG 252 to have a greater influence on the location of the second image charge stored in the second storage node 220.

The characteristics of pixel 207 can be utilized to capture an HDR image, wherein the first image charge in pixel 207 of pixel array 102 (captured during a first accumulation period) is used to create a first image, and wherein the second image charge in pixel 207 of array 102 (captured during a second, subsequent accumulation period) is used to create a second image. An HDR image can then be generated using the first and second images. Thus, the first and second accumulation periods can have different durations to capture different exposures to generate an HDR image. Advantageously, the first and second image charges can be captured in a very short time between the first and second accumulation periods because pixel 207 can store the first and second image charges within pixel 207 for capturing subsequent images without being limited by the speed of readout circuitry 104.

In addition to capturing a common HDR image, pixel 207 can also be used to generate an infrared-illuminated HDR image. For example, infrared-illuminated HDR images have applications in automotive and surveillance imaging. To generate an infrared-illuminated HDR image using imaging system 100, light source 175 emits a first pulse of infrared light to illuminate a scene or subject. Control circuit 108 activates a first global shutter to pixel 107 to capture the first pulse of infrared light reflected from the scene during a first exposure period. The infrared light from the first pulse reflected from the scene is the first image light. Control circuit 108 is coupled to light source 175 to generate the first pulse of infrared light and is coupled to generate a first global shutter signal (which momentarily activates global shutter transistor TX0 289 to reset photodiode 205) synchronously with the first pulse of infrared light to capture the first image light. Subsequently, light source 175 generates a second pulse of infrared light to be reflected from the scene or subject. Control circuit 108 activates a second global shutter to pixel 107 to capture the second pulse of infrared light reflected from the scene during a second exposure period. The infrared light from the second pulse reflected by the scene is the second image light. Control circuit 108 is coupled to light source 175 to generate the second pulse of infrared light and is coupled to generate a second global shutter signal (which momentarily activates global shutter transistor TX0 289 to reset photodiode 205) in synchronization with the generation of the second pulse of infrared light to capture the second image light.

The first infrared pulse and the second infrared pulse may have different intensities. The first infrared pulse and the second infrared pulse may also have different durations. The duration of a first exposure period for capturing the first image light and the duration of a second exposure period for capturing the second image light may correspond to the duration of the first infrared pulse and the duration of the second infrared pulse, respectively.

Pixel 207 generates a first image charge in response to the first image light from the transmitted first infrared light pulse, and generates a second image charge in response to the second image light from the second infrared light pulse. The first image charge is transferred to the second storage node 220 of pixel 207 for storage, as described above. Similarly, the second image charge can be transferred to the first storage node 210 for storage. The storage of the first and second image charges within pixel 207 allows for a very short time period between the first exposure period and the second exposure period, thereby reducing motion artifacts between the first infrared illumination image and the second infrared illumination image. Readout of the first and second image charges from pixel 207 can also be performed according to embodiments of the present invention to generate first and second infrared illumination images for use in the generation of an infrared illumination HDR image.

In the context of gesture recognition, pixels 207 in pixel array 102 can also be used to generate ambient light-adjusted images. To generate an ambient light-adjusted image using imaging system 100, light source 175 emits a first pulse of infrared light to illuminate a scene or subject. Control circuit 108 activates a first global shutter to pixel 207 to capture the first pulse of infrared light reflected from the scene during a first exposure period. The infrared light from the first pulse reflected from the scene is first image light. Control circuit 108 is coupled to light source 175 to generate the first pulse of infrared light and is coupled to generate a first global shutter signal (which momentarily activates global shutter transistor TX0 289 to reset photodiode 205) in synchronization with the generation of the first pulse of infrared light to capture the first image light. The first image light includes both infrared light from the infrared pulse and ambient light from the scene.

In the second exposure following the first exposure cycle, no infrared light is emitted from light source 175, and control circuitry 108 activates a second global shutter to pixel 107 to capture only ambient light from the scene as second image light for the second image. The second exposure cycle lasts the same duration as the first exposure cycle. To produce an ambient-light-adjusted image, the first image is subtracted from the second image to remove ambient light from the scene, leaving only an infrared-light image. Isolating infrared light from the scene in the ambient-light-adjusted image helps image recognition algorithms better determine gesture inputs in strong ambient light environments. Image sensors including pixel 207 are particularly useful in the context of gesture recognition because pixel 207 can capture two consecutive images with a very short time between the first and second exposure cycles, which reduces motion blur artifacts and improves gesture recognition clarity.

The processes explained above are described in terms of computer software and hardware. The described techniques may constitute machine-executable instructions embodied in a tangible or non-transitory machine (e.g., computer) readable storage medium, which, when executed by a machine, will cause the machine to perform the described operations. In addition, the processes may be embodied in hardware, such as an application-specific integrated circuit ("ASIC") or other hardware.

Tangible, non-transitory machine-readable storage media include any mechanism that provides (e.g., stores) information in a form accessible by a machine (e.g., a computer, a network device, a personal digital assistant, a manufacturing tool, any device having a collection of one or more processors, etc.). For example, machine-readable storage media include recordable/non-recordable media (e.g., read-only memory (ROM), random-access memory (RAM), magnetic disk storage media, optical storage media, flash memory devices, etc.).

The above description of the illustrated embodiments of the present invention (including what is described in the Abstract) is not intended to be exhaustive or to limit the invention to the precise forms disclosed. Although specific embodiments of the invention and examples thereof have been described herein for illustrative purposes, those skilled in the art will recognize that various modifications are possible within the scope of the invention.

These modifications may be made to the invention in light of the above detailed description. The terms used in the following claims should not be construed to limit the invention to the specific embodiments disclosed in the specification. Rather, the scope of the invention is to be determined entirely by the following claims, which are to be construed in accordance with established doctrines of claim interpretation.

Claims (18)

1. An image sensor pixel, comprising: A photodiode, used to generate image charge in response to image light; First storage node; The second storage node, wherein the first storage node, the second storage node, and the photodiode have a first doping polarity; A first transfer storage gate (TSG) is coupled to transfer the image charge from the photodiode to the first storage node, wherein the first TSG is disposed over a larger portion of the first storage node; A second TSG is coupled to transfer the image charge from the first storage node to the second storage node, wherein the second TSG is disposed above a larger portion of the second storage node; Floating diffusion; and An output gate, which is coupled to transfer the image charge from the second storage node to the floating diffusion. 2. The image sensor pixel of claim 1, wherein the second storage node and the second TSG are coupled to store the image charge below the second TSG, while the photodiode generates additional image charge in response to additional image light, and wherein the first storage node and the second TSG are coupled to store the additional image charge below the first TSG, and the image charge is stored below the second TSG. 3. The image sensor pixel of claim 1, wherein the first and second storage nodes are buried in a substrate of a second doped polarity, such that the layer of the second doped polarity is disposed between the first storage node and the first TSG and between the second storage node and the second TSG, wherein the first doping polarity is opposite to the second doping polarity. 4. The image sensor pixel according to claim 1, further comprising: A reset transistor, coupled to reset the floating diffusion; and A source follower transistor that transfers floating diffused charge from the floating diffuse to the readout line. 5. The image sensor pixel according to claim 1, further comprising: A global shutter gate, which is coupled to selectively reset the photodiode. 6. An imaging system comprising: A light source that is coupled to emit non-visible light; An image sensor having a pixel array, wherein each imaging sensor pixel contains: A photodiode, used to generate image charge in response to image light; A shutter transistor, which is coupled to reset the photodiode; First storage node; The second storage node, wherein the first storage node, the second storage node, and the photodiode have a first doping polarity; A first transfer storage gate (TSG) is coupled to transfer the image charge from the photodiode to the first storage node, wherein the first TSG is disposed over a larger portion of the first storage node; A second TSG is coupled to transfer the image charge from the first storage node to the second storage node, wherein the second TSG is disposed above a larger portion of the second storage node; Floating diffusion; and An output gate, coupled to transfer the image charge from the second storage node to the floating diffusion; and A controller coupled to the light source to generate pulses of the non-visible light and coupled to activate the shutter transistor to synchronously reset the photodiode with the pulses that generate the non-visible light. 7. The imaging system of claim 6, wherein the second storage node and the second TSG are coupled to store the image charge below the second TSG, while the photodiode generates additional image charge in response to additional image light, and wherein the first storage node and the second TSG are coupled to store the additional image charge below the first TSG and the image charge is stored below the second TSG. 8. The imaging system of claim 6, wherein the first and second memory nodes are buried in a substrate of a second doped polarity, such that the layer of the second doped polarity is disposed between the first memory node and the first TSG and between the second memory node and the second TSG, wherein the first doped polarity is opposite to the second doped polarity. 9. The imaging system according to claim 6, further comprising: A reset transistor, coupled to reset the floating diffusion; and A source follower transistor that transfers floating diffused charge from the floating diffuse to the readout line. 10. A method for capturing an image, wherein the method is performed at each image sensor pixel in an array of image sensor pixels, the method comprising: The first image charge is accumulated using a photodiode in response to first image light; The first image charge is transferred from the photodiode to the second storage node, wherein the first image charge flows through the first storage node to the second storage node during the transfer; After transferring the first image charge to the second storage node, the photodiode is reset using a global shutter signal; The photodiode is used to accumulate a second image charge in response to a second image light, wherein the accumulation of the second image charge occurs after the photodiode is reset; The second image charge is transferred to the first storage node, while the first image charge is stored in the second storage node; The first image charge is transferred from the second storage node to a floating diffuser for readout, wherein the second storage node is coupled between the first storage node and the floating diffuser; and The second image charge is transferred from the first storage node to the floating diffuser for readout, wherein the second image charge flows through the second storage node to the floating diffuser during the transfer. 11. The method of claim 10, wherein a negative voltage is applied to a first transfer storage gate (TSG) and a positive voltage is applied to a second TSG, while the first image charge is transferred from the photodiode to the second storage node, wherein the first TSG is coupled to transfer the first image charge from the photodiode to the first storage node, and wherein the second TSG is coupled to transfer the second image charge from the second storage node to the floating diffusion. 12. The method of claim 10, wherein a negative voltage is applied to a first transfer storage gate (TSG) and a positive voltage is applied to a second TSG, while the first image charge is transferred from the first storage node to the floating diffusion, wherein the first TSG is coupled to transfer the first image charge from the photodiode to the first storage node, and wherein the second TSG is coupled to transfer the second image charge from the second storage node to the floating diffusion. 13. The method of claim 10, further comprising: After the second image charge is transferred to the first storage node and before the first image charge is transferred from the second storage node to the floating diffusion, a negative voltage is applied to a first transfer storage gate (TSG) and a second storage gate, wherein the first TSG is coupled to transfer the first image charge from the photodiode to the first storage node, and wherein the second TSG is coupled to transfer the second image charge from the second storage node to the floating diffusion. 14. The method of claim 13, wherein the first TSG is disposed over a larger portion of the first storage node, and wherein the second TSG is disposed over a larger portion of the second storage node. 15. The method of claim 10, further comprising: Generate a first non-visible light pulse to be reflected by the scene as the first image light; and A second non-visible light pulse is generated to be reflected by the scene as the second image light, wherein the first non-visible light pulse and the second non-visible light pulse have different intensities. 16. The method of claim 10, further comprising: A first non-visible light pulse is generated to be reflected by the scene as the first image light; The representation of the second image charge is subtracted from the representation of the first image charge to produce an image without ambient light components. 17. The method of claim 10, further comprising: Generate a first non-visible light pulse to be reflected by the scene as the second image light; and The representation of the first image charge is subtracted from the representation of the second image charge to produce an image without ambient light. 18. The method of claim 10, further comprising: Between transferring the second image charge to the first storage node and transferring the first image charge to the floating diffusion, a negative voltage is applied to both the first transfer storage gate (TSG) and the second TSG.