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HK1218991B - An interconnect system comprising an interconnect having a plurality of metal cores at least partially surrounded by a dielectric layer - Google Patents

An interconnect system comprising an interconnect having a plurality of metal cores at least partially surrounded by a dielectric layer Download PDF

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Publication number
HK1218991B
HK1218991B HK16106942.8A HK16106942A HK1218991B HK 1218991 B HK1218991 B HK 1218991B HK 16106942 A HK16106942 A HK 16106942A HK 1218991 B HK1218991 B HK 1218991B
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HK
Hong Kong
Prior art keywords
die
dielectric
interconnect system
leads
package
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HK16106942.8A
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Chinese (zh)
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HK1218991A1 (en
Inventor
S‧S‧卡希尔
E‧A‧圣胡安
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罗森伯格高频技术有限及两合公司
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Priority claimed from PCT/EP2014/001823 external-priority patent/WO2015000594A1/en
Publication of HK1218991A1 publication Critical patent/HK1218991A1/en
Publication of HK1218991B publication Critical patent/HK1218991B/en

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Description

Interconnect system including an interconnect having a plurality of metal cores at least partially surrounded by a dielectric layer
Technical Field
The present invention relates to improved die-to-die or die-to-substrate interconnects including both discrete packaged dies and the same packaged die. Furthermore, the invention relates to a slot line for improved interconnection between sources and loads of different impedances.
Further, a thermal transfer interconnect structure that facilitates thermal transfer away from a die is described. These interconnect structures are particularly useful in multi-die packages and stacked die packages.
Background
Electronic devices and components are operating at ever increasing speeds and in higher and higher frequency ranges. A popular type of semiconductor package uses wire bonds that can be connected to a substrate or lead frame that can be connected to second level interconnects, through holes, substrate or package traces, or solder balls, etc., to a Printed Circuit Board (PCB) of an electronic device.
However, the lead wire may not have suitable mechanical properties including rigidity and strength. In other embodiments, particularly with dielectric layer thicknesses, the die pitch limitations may not allow for coating different leads with non-overlapping dielectric layers.
Furthermore, conventional package leads may not be optimized for specific electrical characteristics including interconnections between sources and loads of differing impedances.
Furthermore, as speed increases, power requirements and the need to transfer waste heat away from the die also increase. This becomes a particular problem for stacked dies, where the top and bottom of the inner die in the stack are effectively insulated with the substrate material or other heat generating die.
Disclosure of Invention
In view of these problems and deficiencies of the prior art, it is therefore an object of the present invention to provide an interconnect system for interconnecting semiconductor die packages having at least one die, wherein the system improves the mechanical properties of the connecting leads with minimal impact on the electrical characteristics.
The mechanical properties of the leads used with the die package can be improved by melting the dielectric layer to the metal coating tape with minimal impact on the electrical characteristics.
The above and other objects, which will be apparent to those skilled in the art, are achieved in the present invention, which is directed to an interconnect system for interconnecting semiconductor die packages, the interconnect system comprising: a first die having a plurality of connection pads; and a ribbon lead extending from the first die, the ribbon lead including a plurality of metal cores having a core diameter, a dielectric layer having a dielectric thickness surrounding the metal cores, and a ground-mounted outer metal layer, wherein at least a portion of the dielectric is fused between adjacent metal cores along a length of the plurality of metal cores.
According to the present invention, the mechanical properties of the leads used for the die package can be improved by melting the dielectric layer to the metal coating tape with minimal impact on the electrical characteristics.
Furthermore, the slotline may be created by partially or fully melting a dielectric layer to a partially or fully coated metal strip. This enables improved interconnection between sources and loads of different impedances and better signal transfer characteristics to package or substrate mounted antennas, including patch antennas.
Further, the thermal transfer tape interconnect structure may facilitate heat transfer away from the die. Such tape interconnect structures are particularly useful in multi-die packages and stacked die packages.
The interconnect system may be a multi-die interconnect system including a first die and a second die, each die having a plurality of connection pads, respectively, wherein the ribbon leads extend from the first die to the second die.
The interconnect system may be a slot line interconnect system including a first die and a second die, each die having a plurality of connection pads, respectively, wherein a ribbon lead extends from the first die to the second die.
The interconnect system may be a slot line interconnect system that includes a package substrate having a plurality of connection pads, wherein the ribbon leads extend from the package substrate toward the first die.
The outer metal layer may be exposed to ambient conditions to facilitate heat transfer. Additionally or alternatively, the ribbon leads can extend from the first die to the heat sink.
The dependent claims relate to advantageous embodiments of the invention.
Drawings
Fig. 1 is an illustration of a die-to-die interconnect structure composed of dielectric and metal coated leads incorporated into a tape for improved mechanical performance and acceptable electrical characteristics;
FIG. 2 is an illustration of a large die to small die interconnect structure comprised of dielectric and metal coated leads, wherein at least a portion of the leads along the length are merged into a strip as the pitch of the smaller die is reduced;
fig. 3 and 4 show both package-to-package interconnects and die-to-die interconnects with tape leads in plan view and side view, respectively;
FIG. 5 illustrates method steps for fabricating a dielectric coated lead with an external ground metal;
FIG. 6 illustrates a subtractive process for fabricating a dielectric coated lead with an externally grounded metal;
FIG. 7 shows a BGA package including dielectric coated leads with external ground metal;
FIG. 8 shows a portion of a leadframe package including dielectric coated leads with an outer ground metal;
FIG. 9 is an illustration of a structure and method for forming dielectric coated and partially or fully metal coated leads optimized for interconnect requirements;
fig. 10 shows in plan view two dies connected to each other by fully metalized dielectric coated leads merged into a partially metalized slotline;
FIG. 11 illustrates a packaged die-to-die slot line interconnect and a separate slot line interconnect to mount an antenna to a substrate;
fig. 12 is an illustration of a die-to-die interconnect structure comprised of dielectric and metal coated leads incorporated into a tape and an exposed exterior of a package for improved thermal transfer performance;
fig. 13 is an illustration of a stacked die package including a die-to-die and die-to-external connected interconnect tape structure within the package consisting of dielectric and metal coated leads for improved thermal transfer performance; and
fig. 14 and 15 show package-to-package strap interconnects in plan view and side view, respectively, passing to an active or passive heat sink.
Detailed Description
As seen in fig. 1, ribbon leads suitable for interconnecting semiconductor die packages may be comprised of leads having a dielectric-coated metal core, wherein the dielectric coating is melted in whole or in part along the length of the lead. The dielectric coating is externally covered with a grounded metal to provide the desired electrical properties while also improving mechanical properties and resistance to polymeric degradation through oxidation or other chemical effects. As can be seen with respect to fig. 1, the first die 1 and the second die 2, each having connection pads 3, are connected to each other via two separate strips 10,20 comprising a molten dielectric coating 15 encapsulated with metal. The process for forming the ribbon interconnect begins with the attachment of the metal core 12 of the lead to the die and substrate attach pad 3. Metal core 12 is coated with dielectric 15 and metal core 12 is metallized with a grounded metal (thereby possibly requiring a separate laser ablation or other dielectric removal step to enable access to the ground connection pad). For cavity packages, the die may be fitted with a hermetic lid or other cover. In other cases, the die may be covered with a molding compound, epoxy dome, or other suitable encapsulation material, extending separately (with tape leads) out of the encapsulation material or co-extending into one multi-die package as desired.
As seen in fig. 2, a ribbon lead suitable for interconnecting semiconductor die packages may be comprised of a lead having a dielectric-coated metal core 12, wherein the dielectric coating 15 is only partially melted along the length of the lead. In fig. 2, the smaller pitch of the smaller die causes the dielectric material to melt near the smaller die. This may reduce the uniformity of the electrical characteristics compared to different and separate leads, since the electrical environment of the edge leads is much different compared to the inner leads, but the variation is minimal if only the leads have molten dielectric in a limited length near the smaller die.
Fig. 3 and 4 illustrate package-to-package connections using ribbon leads 30, as discussed with respect to fig. 1, and die-to-die interconnects 32 and die-to-substrate ribbon connections 34 in a common molded package, in plan and side views, respectively. As can be seen from fig. 4, a stacked package 36 showing strips extending between the stacked dies is also supported.
The embodiments of the present invention shown in FIGS. 9-11 will be described below. Partially metallized tape leads, including antennas, suitable for interconnecting semiconductor dies or other active or passive components may be constructed of leads having a dielectric coated metal core, where the dielectric coating is completely or partially melted along the length of the lead. The dielectric coating is only partially covered by the outer grounding metal to provide the desired slot line electrical characteristics. The process for forming the ribbon interconnect begins with attaching the metal core of the lead to the die and substrate connection pads. The metal core is coated with a dielectric and metallized with a metal that is connected to ground (a separate laser ablation or other dielectric removal step may be required to enable access to the ground connection pad).
As seen in fig. 9, leads 45, 46, 47 suitable for a semiconductor die package may be positioned on the substrate 40 and may be comprised of a dielectric coated metal core 42 having an outer ground metal 41. As seen with respect to fig. 9, a non-uniform (or uniform in certain embodiments) dielectric coating may be selectively metallized to adjust the electrical characteristics, including impedance. Selected portions of the metal may occur for individual leads, groups of leads, or all leads in the package as desired. In fig. 9, a collection of partially metallized molten dielectric strips 43 surrounding a metal core 42 is shown, along with a single partially metallized lead 46 and a uniform dielectric metallized lead 47 all connectable to the same die. Portions of the slot line leads may be connected to other dies, connection pads supported by the substrate 40, or other active or passive devices including patch or other antennas. In some embodiments, a single lead may define a slot line to an antenna system including, but not limited to, a transmit antenna. In practice, reduced or entirely removed metal leads 45, 46 are formed along a portion of the lead length (typically the underside of the lead adjacent to substrate 40) to selectively modify the electrical characteristics of the leads.
Fig. 10 shows in plan view two dies 48, 49 interconnected by fully metallized dielectric coated wires merged into a partially metallized slot line. Near the smaller die 49, the molten dielectric 44 shadows the underside (located near the substrate) during metallization, which results in an interconnect with completely separate and fully metallized leads for ground connections near the larger die and molten and partially metallized slot lines near the smaller leads. As should be appreciated, slotline interconnects to stacked dies or packages may also be made.
Fig. 11 shows a packaged die-to-die slot line interconnect 60 and a separate slot line interconnect 62 that mounts an antenna 64 to a substrate. The slot line connection 62 to the antenna 64 may be advantageous for providing an intermediate impedance connection between the low source and the high antenna.
The embodiments of the present invention shown in FIGS. 12-15 will be described in particular below. As seen in fig. 12, one or more high thermal conductivity leads suitable for interconnecting semiconductor die packages 70 can be comprised of leads 71 having a dielectric coated metal core 72, where the dielectric coating is fully melted, partially melted, or unmelted along the length of the leads 71. Embodiments in which the dielectric is fully or partially melted may be characterized as "ribbon" leads 71, while unmelted leads may be referred to as leads or single leads. The ribbon or individual leads may extend outside of the package 70 into the ambient air to help transfer heat away from the package. Alternatively, the leads may be cooled convectively or by contact by active or passive thermal heat sinks including flowing gases or liquids, metals or other heat sinks of high thermal conductivity, thermal pastes or thermally permeable adhesives, or active coolants such as piezoelectric coolants.
The dielectric coating 73 is covered by an outer grounded metal that provides the desired thermal and electrical properties while also improving the mechanical properties or resistance to polymer degradation through oxidation or other chemical effects. As seen with respect to fig. 12, the first die 74 and the second die 75, each having connection pads, are connected to each other via two separate strips 71 comprising a fused dielectric coating 73 encapsulated with metal. The process for forming the ribbon interconnect begins with attaching the metal core 72 of the lead to the die substrate connection pad. Metal core 72 is coated with dielectric 73 and metallized by metal grounding (a separate laser ablation or other dielectric removal step may be required to enable access to the ground connection pad). For cavity packages, the die may be fitted with a hermetic lid or other cover. In other cases, the die may be covered with a molding compound, epoxy dome, or other suitable encapsulation material, extending separately (with tape leads) out of the encapsulation material or co-extending into the multi-die package as desired. In particular embodiments, TiW or other metal or metal stack with good adhesion properties may be used to overcoat previously deposited metal prior to encapsulation. For example, the ground plane metal may comprise a stack of TiW-Cu-TiW metals.
As seen in fig. 13, ribbon leads suitable for interconnecting semiconductor die packages 80 or extending between dies within a package are particularly useful in embodiments of stacked dies 82. The die substrate 83 required for redistribution is typically composed of a poorly thermally conductive, electrically insulating material. Using a ribbon lead 85 composed of a molten dielectric coated metal core with an outermost metal layer that can be grounded, heat can be removed from the inner die and transferred from the die to the substrate.
Fig. 14 and 15 illustrate package-to-package connections 90 using ribbon leads 95, such as discussed with respect to fig. 12, and die-to-die connections and die-to-substrate ribbon connections in a common molded package, in plan view and side view, respectively. As can be seen from fig. 15, the stacked package 96 showing the strips 97 extending between the stacked dies is also supported. As seen in fig. 14 and 15, a tape 95 interconnecting the packages is attached to a "finned" heat sink copper or aluminum sheet or block 99 to improve heat transfer and dissipation. Where desired, active or passive gas or liquid cooling may be used to remove heat from the flap-like mass.
In at least some of the embodiments described above, the electrical characteristics of the tape can be adjusted by forming the dielectric coated leads used in the semiconductor die package to have varying dielectric thicknesses. Thick, thin and intermediate thicknesses can be achieved by varying the number of dielectric coatings and fabrication steps. Both the core diameter and the dielectric thickness may vary. In particular embodiments, the composition of the deposited dielectric may vary, with, for example, a different dielectric material surrounding the metal core, with the dielectric material being surrounded by a metal coating that may be grounded. This enables, for example, thin deposition of a high performance dielectric having an excellent moisture barrier or resistance to oxygen degradation, etc., on a thick layer formed of a low cost dielectric material. In other embodiments, the multilayered dielectrics of varying thickness are separated by thin metal layers grounded to the outermost metal layer.
Typically, a thin dielectric layer will provide low impedance to fit the power lines, a thick dielectric layer is beneficial for signal integrity, and the outer metal layer is connected to the same ground. Note that a combination of core diameter and dielectric thickness is possible, and a series of these steps may be performed to achieve more than two impedances. In certain embodiments, it may be desirable to have a large core on the power line to increase power handling capability, reduce power line temperature, and/or further reduce power supply and any inductance on the ground line that would exacerbate ground bounce or power droop. Intermediate thickness dielectric layers are also useful because many packages can benefit from leads having more than three (3) different dielectric thicknesses. For example, a lead having an intermediate dielectric thickness may be used to connect sources and loads of substantially different impedances to maximize power transfer. For example, a 10 ohm source may be connected to a 40 ohm load with a 20 ohm lead. Furthermore, since the cost of the dielectric may be high, a thick dielectric may be used to interconnect important signal paths, where less important leads, such as condition or reset, may be coated with a dielectric layer having a thickness greater than the power leads but smaller (intermediate) than the important signal leads. Advantageously, this may reduce the cost and time of dielectric deposition materials.
The precise thickness of the dielectric coating may be selected in combination with the bond wire diameter to achieve a particularly desired impedance value for each lead.
The characteristic impedance of the coaxial line is given in equation (1), where: l is inductance per unit length, C is capacitance per unit length, a is diameter of bonding wireB is the outer diameter of the dielectric, and εrIs the relative permittivity of the coaxial dielectric.
As shown in fig. 5, in one embodiment, the fabrication of a dielectric coated lead with an external ground metal may be performed using the following steps. The die and the connection pads on the substrate are cleaned (50) and the die is connected to the connection pads (51) using a wire bonding machine. Optionally, wires of a second diameter (e.g., larger diameter wires suitable for power connections) may be mounted (52), or areas of the die may be masked (53) or protected to allow selective deposition. One or more layers of the same or different composition dielectric may be deposited (54), followed by selective laser or thermal ablation or chemical removal of a portion of the dielectric to enable access to the ground contact (55) covered in the dielectric deposition step. This step is optional because, in some embodiments, ground vias are not required. This is particularly true for dies operating at higher frequencies, since the virtual RF ground can be established by capacitive coupling. Metallization is then performed (57) to cover the dielectric with a metal layer forming the outermost metallization layer of the lead and also to ground the lead. The entire process (58) may be repeated multiple times for embodiments using selective deposition techniques, and particularly for embodiments supporting multiple dies or complex and varying impedance leads. In a final step, for non-cavity packages, the leads (59) may be encapsulated using overmolding. Alternative embodiments and additional or variant method steps are also described in US20120066894 and US patent 6,770,822, the contents of both of which are incorporated herein by reference in their entirety.
In certain embodiments, modifications and additions to the processes described may be made. For example, providing a conformal coating of a dielectric can be achieved by various methods using chemical (electrophoresis), mechanical (surface tension), contact reaction (primer), electromagnetic [ UV, IR ], electron beam, other suitable techniques. Electrophoretic polymers are particularly advantageous because they may rely on self-limiting reactions that can readily deposit precise thicknesses by adjusting process parameters and/or simple additive, concentration, chemical, thermal or timing changes to the electrophoretic coating solution.
In other embodiments, a dielectric pre-wirebond may be used to form the leads. Although commercially available coated wires are typically thinner in dielectric thickness than wires required to create, for example, 50 ohm leads, the dielectric deposition steps discussed above may be used to increase the dielectric thickness to set the desired impedance. The use of these pre-coat lines can simplify the other process steps required to create a coaxial axis and can make the layer of vapor deposited dielectric required thinner and faster processing time to create a ground via. Pre-applied weld lines may be used to prevent short circuiting of narrowly spaced or crossing leads. In a particular embodiment, the pre-existing bonding wires may have a dielectric made of a photosensitive material to enable selective patterning techniques.
In other embodiments, a dielectric parylene may be used. Parylene (Parylene) is the trade name for various chemical vapor deposited poly (p-xylylene) polymers used as moisture barriers and dielectric barriers. Parylene may be formed in a growth-limited condensation reaction using a modified parylene deposition system in which the die, substrate and leads are aligned with the photographic plate so that EM radiation (IR, UV or otherwise) can be incident in a precise manner, which results in a selective growth rate of the dielectric. Advantageously, this minimizes or eliminates the need for processes to create contact vias, bulk removal of parylene, and the like.
Parylene and other dielectrics are known to degrade in the presence of oxygen, water vapor and heat due to oxygen breakdown. The damage may be limited by the formation of a metal layer with a good oxygen vapor barrier, wherein a thin layer with a thickness of 3-5 μm is capable of forming a truly hermetic interface. Alternatively, if the metal is selectively removed, or due to electricityGas, heat or manufacturing requirements so that metal is not deposited in a particular area, various polymer-based vapor oxygen barrier layers may be used, with polyvinyl alcohol (PVA) being a widely used polymer. These polymers can be top-sealed, screen printed, stenciled, gate dispensed, sprayed to be exposed to oxygen or H2O vapor environment on the parylene surface. Advantageously, the use of vapor barrier polymers may be part of a cost reduction strategy, as high cost parylene or other thicker layers sensitive to oxygen may be required.
As should be appreciated, all of the process steps described benefit entirely from the various selective deposition techniques. The selective deposition may be by physical masking, direct polymer deposition, photoresist, or any other suitable method for ensuring a differential deposition thickness on the metal core, dielectric layer, or other outermost layer at the time of deposition. While selective deposition allows for the use of additive methods to build the leads, it also allows for the use of subtractive techniques that remove dielectric or metal to form a plurality of impedance interconnects. For example, a package filled with one or more dies may be wire bonded as appropriate to interconnect all of the packages and device pads. As seen in fig. 5 for illustrating the steps and structures used in the fabrication of a die package, dielectric coating 200 may be deposited (step a) onto wire bond metal conductor 202 at a thickness X-a, where a is the thickness of the dielectric required for secondary interconnect impedance. The secondary impedance wire bond dielectric may be removed (step B), for example, by an etching step, followed by deposition of the second coating 204 (step C), followed by metallization of the two interconnects (step D). This subtractive process will create two bond wires of significantly different impedance.
In the embodiment shown with respect to fig. 7, a Ball Grid Array (BGA) package is illustrated that includes dielectric and metal coated leads 212, 214 in which some or all of the dielectric melting is performed on selected leads to improve mechanical properties or provide adequate electrical interconnection. Alternatively, the dielectric and metal coated leads 212, 214 can be formed as partially metallized leads or slotlines. Alternatively or additionally, the dielectric and metal coated leads 212, 214 can support improved heat transfer.
BGAs are widely used in surface mount packaging of integrated circuits and, because the entire bottom surface of the BGA can be used to connect to the bond pads, the BGA can typically provide more interconnect pins than dual in-line, lead frame, or other flat packages. In many types of BGA packages, die 216 is mounted to substrate 218 with fillable vias 220 connected to connecting pads. Wire bonds 212, 214 may be used to connect top side die 216 to bond pads/vias 220, resulting in providing electrical connections from the top side of the substrate to the bottom. In a BGA package, solder balls 222 are attached to the bottom of the package using a viscous solder and held in place until soldered to a printed circuit board or other substrate. As described herein, the wire bonds of a conventional BGA package may be replaced with modified leads having a dielectric layer and an externally connectable ground metal layer. The leads may have varying dielectric thicknesses within the inner core and outer metal layers, and may be selectively optimized to have a particular impedance, and thus may be selected to be different or well matched based at least in part on the dielectric layer thickness. As seen from fig. 7, both long leads 212 and short leads 214 are supported.
In more detail, the assembly of the improved BGA package may require the die to be mounted face up to the substrate to support the connection pads in the substrate formed in an abutting manner around the through holes. The assembly is wire bonded appropriately for each interconnect desired, with wire bonds formed between connection pads on the substrate and connection pads on the die. The low frequency and power inputs are connected to the low frequency signal leads and the high frequency inputs and outputs are connected to the high frequency signal leads. In some embodiments, the thickness of the low frequency and power input may be different than the thickness of the high frequency signal leads. The assembly is then coated with any substantially conformal dielectric material. Parylene may be used due to its low cost, ease of vacuum deposition, and excellent performance characteristics. A small portion of the dielectric layer near the leadframe attachment point may be selectively removed by etching, thermal degradation, or laser ablation to form an electrical connection to a ground contact or ground shield. Also, a small portion of the dielectric layer may be removed near the die attach pad to allow for a ground connection. The ground is grounded in the structure after the metallization layer is applied on top of the dielectric layer, thereby forming a ground shield. The thickness of the preferred metal layer should be selected in consideration of skin depth and DC resistance issues, and should include primarily good electrical conductors such as silver, copper or gold. For most applications, a coating thickness of 1 micron is sufficient for functionality, but thicker coatings help to minimize cross-talk between leads. These coatings can be added in defined areas by a combination of photolithography or other masking methods and plating or other selective deposition methods. The package may be completed by placing an overmold or lid on the die, followed by dicing (singulation) and testing.
Alternatively, in the embodiment illustrated with respect to fig. 7, a die package 300 including a low cost based lead frame extending from the die to the lead frame may be fabricated by forming a lead frame strip containing a two-dimensional array of individual package sites and outer frame portions. Leadframe fabrication is conventional and may include the formation of individual leads by etching, stamping, or electrodeposition. The lead frame strip may be placed in a mold including, but not limited to, an injection molding or transfer molding apparatus. A suitable dielectric material, preferably such as a commercially available epoxy molding compound, is injected, pumped or otherwise transferred into the mold to achieve a lead frame/mold material composite structure. The properties of the mold materials are important for the dielectric constant, loss tangent, and electro-chromatic properties of these mold materials, as well as the temperature, humidity, and other mechanical performance attributes of these mold materials.
Each package site on the composite lead frame strip thus obtained is cleaned of mold release material and/or flash and is ready for deposition of a metal finish on the exposed metal portions of the lead frames. This may be achieved by plating techniques such as immersion or electroplating, and these metals will be selected for corrosion inhibition and ease of wire bonding. An example of such a finish is a thin nickel layer (for protection) followed by a gold layer (adding protection and power to the wire bond). Each package site of the molded lead frame strip thus obtained may then be filled with a desired die attached to a substrate, wherein the die attach material is selected for the mechanical and thermal properties of the particular package application. The assembly thus obtained is then wire bonded appropriately for each interconnection required, with wire bonds formed between the leads on the lead frame and the connection pads on the die. The low frequency and power inputs are connected to the low frequency signal leads and the high frequency inputs and outputs are connected to the high frequency signal leads. In some embodiments, the thickness of the low frequency and power input may be different than the thickness of the high frequency signal leads.
The filled lead frame strip is then coated with any substantially conformal dielectric material, including parylene, as with BGA package 210 described above. In the case of parylene, the bottom of the package may preferably be masked with tape or similar material, such as vacuum compatible polyimide with acrylic adhesive, to prevent deposition onto the areas of the leads that will ultimately be attached to the PCB. This will facilitate easier welding in subsequent steps. A small portion of the dielectric layer near the leadframe attachment point may be selectively removed by etching, thermal degradation, or laser ablation to form an electrical connection to a ground contact or ground shield. Also, a small portion of the dielectric layer may be removed near the die attach pad to allow for a ground connection. The ground is grounded in the structure after the metallization layer is applied on top of the dielectric layer, thereby forming a ground shield. The thickness of the preferred metal layer should be selected in consideration of skin depth and DC resistance issues, and should include primarily good electrical conductors such as silver, copper or gold. For most applications, a coating thickness of 1 micron is sufficient for functionality, but thicker coatings help to minimize cross-talk between leads. These coatings can be added in defined areas by a combination of photolithography or other masking methods and plating or other selective deposition methods. The package may be completed by placing an overmold or lid on the die, followed by dicing (singulation) and testing.
Example 1-the use of one or more leads for thermal transfer or thermal transfer structures within a package from a die to a substrate is illustrated in the figures. As shown, a single or ribbon lead according to the present invention may be used to transfer heat from stacked dies.
In particular, the invention relates to a multi-die interconnect system comprising: the semiconductor device comprises a first bare chip and a second bare chip, wherein each bare chip is respectively provided with a plurality of connecting pressure welding points; and a ribbon lead extending from the first die to the second die, wherein the ribbon lead comprises a plurality of metal cores having a core diameter, a dielectric layer having a dielectric thickness surrounding the metal cores, and a ground-mounted outer metal layer, wherein at least a portion of the dielectric is fused between adjacent metal cores along a length of the plurality of metal cores.
Furthermore, the present invention relates to a slot line interconnection system comprising: a first die having a plurality of connection pads; a package substrate having a plurality of connection pads; and a ribbon lead extending from the package substrate toward the first die, wherein the ribbon lead includes a plurality of metal cores having a core diameter, a dielectric layer having a dielectric thickness including the metal cores, and an outer metal layer only partially covering the melted dielectric and attached to ground, wherein at least a portion of the dielectric is melted between adjacent metal cores along a length of the plurality of metal cores.
Furthermore, the present invention relates to a slot line interconnection system comprising: the semiconductor device comprises a first bare chip and a second bare chip, wherein each bare chip is respectively provided with a plurality of connecting pressure welding points; and a ribbon lead extending from the first die to the second die, wherein the ribbon lead comprises a plurality of metal cores having a core diameter, a dielectric layer having a dielectric thickness surrounding the metal cores, and an outer metal layer only partially covering the molten dielectric and attached to ground, wherein at least a portion of the dielectric is molten between adjacent metal cores along a length of the plurality of metal cores.
Furthermore, the invention relates to the following: die package to die package, stacked die package, BGA package, lead frame package, die-to-die connections in a common package, packaged die to package, large pitch to small pitch interconnect with fan-in, large die to small die interconnect with fan-in, partial slot line with large pitch to small pitch, and die-to-antenna injection structure.
Furthermore, the invention relates to a multi-die interconnect system comprising: the semiconductor device comprises a first bare chip and a second bare chip, wherein each bare chip is respectively provided with a plurality of connecting pressure welding points; and a lead extending from the first die to the second die, wherein the lead comprises a plurality of metal cores having a core diameter, a dielectric layer having a dielectric thickness surrounding the metal cores, and an outer metal layer attached to ground and exposed to ambient conditions for thermal transfer, wherein at least a portion of the dielectric is fused between adjacent metal cores along the length of the plurality of metal cores.
Furthermore, the invention relates to die package, stacked die package, BGA package, lead frame package, die to die connection in a common package, packaged die to substrate connection, heat sink or block connection, fluid cooling to ribbon leads directly or with a heat sink.
Furthermore, the invention relates to a thermal transfer system for packaging a die, comprising: a die having a plurality of connection pads; and a lead extending from the first die to the heat sink, wherein the lead comprises a plurality of metal cores having a core diameter, a dielectric layer having a dielectric thickness surrounding the metal cores, and a ground-engaging outer metal layer, wherein at least a portion of the dielectric is fused between adjacent metal cores along a length of the plurality of metal cores
Finally, the invention relates to stacked dies, heat sinks in the form of substrates, adhesive layers, thermally conductive pastes, metal blocks, devices for heat transfer within a package, and tape leads.

Claims (19)

1. An interconnect system comprising:
a first die (1) having a plurality of connection pads (3); and
a ribbon lead (10,20) extending from the first die (1), the ribbon lead (20,30) comprising a plurality of metal cores (12) having a core diameter, a dielectric layer (15) having a dielectric thickness surrounding the metal cores, and an outer metal layer that is ground-mounted, wherein at least a portion of the dielectric is fused between adjacent metal cores along a length of the plurality of metal cores,
wherein the leads are cooled convectively or by contact by active and/or passive heat sinks and/or active coolants, or
Wherein the leads extend from the first die to a heat sink.
2. An interconnect system according to claim 1, characterized in that the interconnect system is a multi-die interconnect system comprising a first die (1) and a second die (2), each die (1,2) having a plurality of connection pads (3), respectively, wherein the ribbon leads extend from the first die (1) to the second die (2).
3. The interconnect system of claim 1, wherein the interconnect system is a slot line interconnect system comprising a first die and a second die, each die having a plurality of connection pads, wherein the ribbon lead extends from the first die to the second die.
4. The interconnect system of claim 1, wherein the interconnect system is a slotline interconnect system including a package substrate having a plurality of connection pads, wherein the ribbon leads extend from the package substrate to the first die.
5. The interconnect system of any of claims 1 to 4, wherein the outer metal layer only partially covers the molten dielectric.
6. Interconnect system according to any of claims 1 to 4, characterized in that the dielectric is completely or only partially melted along the length of the leads.
7. The interconnect system of claim 2 or 3, wherein the second die is smaller than the first die, wherein only a limited length of leads near the smaller die has melted dielectric.
8. The interconnect system of any of claims 1 to 4, wherein at least one of a first die and a second die is a stacked die, wherein the ribbon lead extends from the first die to the second die, from the first die to another die that is not part of the stacked die, and/or to a die substrate.
9. The interconnect system of any of claims 1 to 4, wherein a first die package and a second die package, wherein the ribbon leads extend from the first die package to the second die package.
10. The interconnect system of any of claims 1 to 4, wherein at least one active or passive component, wherein the ribbon lead extends from the first die to the active or passive component.
11. An interconnection system according to claim 10, wherein the active or passive element is an antenna or antenna system.
12. The interconnect system of any of claims 1 to 4, wherein a large die to small die interconnect structure is employed, wherein at least a portion of one or more leads along a length form a ribbon lead.
13. The interconnection system of any of claims 1 to 4, wherein the dielectric layer surrounding the first core has a first thickness and the dielectric layer comprising the second core has a second thickness different from the first thickness.
14. The interconnect system of any of claims 1 to 4, wherein the outer metal layer is exposed to ambient conditions to facilitate heat transfer.
15. The interconnect system of any of claims 1 to 4, wherein the wire is cooled by flowing at least one of a gas or liquid, a high thermal conductivity metal, a thermal paste, a thermally transmissive adhesive, and a piezoelectric coolant.
16. A Ball Grid Array (BGA) package comprising the interconnection system of any of claims 1 to 15.
17. A leadframe package comprising the interconnect system of any one of claims 1 to 15.
18. A thermal transfer system for packaging dies, comprising the interconnect system of any of claims 1 to 15, wherein the leads extend from the first die to a heat sink.
19. The heat transfer system of claim 18, wherein the heat sink is a substrate, an adhesive layer, a thermally conductive paste, and/or a metal block.
HK16106942.8A 2013-07-03 2014-07-02 An interconnect system comprising an interconnect having a plurality of metal cores at least partially surrounded by a dielectric layer HK1218991B (en)

Applications Claiming Priority (7)

Application Number Priority Date Filing Date Title
US201361842954P 2013-07-03 2013-07-03
US201361842948P 2013-07-03 2013-07-03
US201361842949P 2013-07-03 2013-07-03
US61/842,948 2013-07-03
US61/842,949 2013-07-03
US61/842,954 2013-07-03
PCT/EP2014/001823 WO2015000594A1 (en) 2013-07-03 2014-07-02 An interconnect system comprising an interconnect having a plurality of metal cores at least partially surrounded by a dielectric layer

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HK1218991A1 HK1218991A1 (en) 2017-03-17
HK1218991B true HK1218991B (en) 2019-02-01

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