HK1262355B - High dynamic range imaging sensor array - Google Patents

Description

High dynamic range imaging sensor array

Technical Field

The present invention relates to high dynamic range imaging sensor arrays.

Background Art

CMOS cameras typically form an image of a scene by imaging the light from the scene onto an array of pixel sensors. Typically, each pixel sensor has one or more photodetectors. Each photodetector converts the light received during exposure into an electrical signal. The electrical signal is then digitized by an analog-to-digital converter (ADC) to produce a digital value representing the amount of light received during the exposure period. The array is typically a two-dimensional array with thousands of columns and rows of pixels. Each row uses a separate column amplifier and ADC, and the array is read out one row at a time.

Typically, photodiodes have a range where the signal from the photodiode is a monotonically increasing function of the light received during the exposure period. At the bottom of this range, the accuracy of determining light intensity from the generated signal is limited by various noise sources. Above this range, the photodiode's output saturates, and therefore, intensities above this range cannot be accurately measured. With current photodiodes, the range of available signals is smaller than the signal range required to measure all intensities in many images. If the exposure is set to detect low-level light signals, bright areas of the image will be outside this range and therefore saturated.

Prior art solutions for extending the high range of pixel sensors typically utilize a second exposure or a second photodiode. In such a solution, the first exposure or photodiode is set to detect low-light pixels. Pixel sensors subjected to high light intensities are saturated and therefore cannot provide useful information about the light intensity in those high-light intensity areas of the image. A second measurement is made by capturing high-light intensity areas at the expense of low-light intensity areas. The second measurement can be a second photodiode in the pixel sensor, which uses the same photodiode with much lower light sensitivity or a second, shorter exposure. The latter solution is not preferred in moving image systems because the time difference between the two exposures can cause motion artifacts. A disadvantage of the dual photodiode solution is that a larger pixel sensor is required. However, recent developments in photodiodes have provided a second, low-sensitivity photodiode within a conventional photodiode without significantly increasing the size of the pixel sensor.

While providing a second photodiode in each pixel sensor extends the high-intensity response of the pixel sensor, various noise sources limit the extent to which low-light areas can be imaged with reasonable exposure times. While shot noise represents the minimum achievable noise floor, other noise sources remain significant and need to be reduced to further increase the dynamic range of the image sensor.

Summary of the Invention

The present invention includes a device having a rectangular imaging array, characterized by a plurality of pixel sensors and a plurality of readout lines. The device includes a plurality of column processing circuits, each coupled to a corresponding one of the readout lines, and a plurality of signal injectors, one coupled to each readout line. Each signal injector couples one of a predetermined number of voltages to the readout line. A controller determines the exposure of each pixel sensor during each of a plurality of image recording cycles. The controller also causes the signal injectors to inject a plurality of calibration voltages into the readout lines during each of a plurality of calibration cycles, and determines a gain function of an amplifier in one of the column processing circuits by measuring the output of the amplifier for the plurality of calibration voltages, the calibration cycles occurring between image recording cycles.

In one aspect of the present invention, a controller causes a signal injector to inject a signal having a value that a pixel sensor would produce if not exposed to light, and the controller determines a column offset value for each column processing circuit. In another aspect, there are multiple rows of signal injectors, with each column processing circuit connected to multiple signal injectors. The controller averages the amplifier offset values generated by the signal injectors when determining the column offset value. In another aspect of the present invention, the column offset value is determined during a calibration cycle.

In yet another aspect of the present invention, each pixel sensor includes first and second photodiodes, the first photodiode being characterized by a different light conversion efficiency than the second photodiode. In one exemplary embodiment, the second photodiode has a light conversion efficiency that is less than 1/30 that of the first photodiode. In another aspect, the second photodiode includes a parasitic photodiode including a floating diffusion node that is further configured to convert charge generated by the first photodiode into a voltage.

In another aspect, a controller determines a ratio of a light conversion efficiency of the first photodiode to a light conversion efficiency of the second photodiode during an image recording period. In one aspect of the present invention, the controller determines the ratio by averaging signals from a plurality of pixel sensors in which the second photodiode generates a signal within a calibration range. In another aspect of the present invention, the calibration range excludes pixel sensors in which the second photodiode has a dark current greater than a dark current threshold.

In another aspect of the invention, the pixel sensors are divided into color channels, each color channel having a corresponding color filter on the pixel sensors in that color channel, and the controller determines the ratio for each color channel separately.

In yet another aspect of the invention, the first photodiode measures exposure between a first exposure and a second exposure, and wherein the second photodiode may measure exposure between a third exposure and a fourth exposure, the third exposure being less than the second exposure, and the fourth exposure being greater than the second exposure.

In another aspect of the invention, a controller uses a first photodiode to measure an exposure less than a second exposure and uses a second photodiode to measure an exposure greater than the second exposure, thereby simulating a single photodiode that can measure an exposure between a first and a fourth exposure. In another aspect of the invention, the simulated single photodiode produces a first exposure value that is a linear function of exposure and is independent of variations in light conversion efficiency of the first and second photodiodes and column processing circuitry of each pixel sensor. In yet another aspect of the invention, the first exposure value is characterized by a shot noise value, and the controller outputs a second exposure value for each pixel sensor, the second exposure value being determined by the first exposure value, requiring fewer bits to output, and differing from the first exposure value by less than the shot noise value.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG1 shows a two-dimensional imaging array according to one embodiment of the present invention.

FIG2 shows a prior art pixel sensor.

Figure 3 shows a pixel sensor where a parasitic photodiode is used for image measurement.

FIG4 shows a column amplifier and an ADC according to one embodiment of the present invention.

FIG. 5 shows a signal injector for readout on readout line 83 in response to a row select signal on line 197 .

DETAILED DESCRIPTION

To simplify the following discussion, a pixel sensor is defined as a circuit that converts light incident on it into an electrical signal, the magnitude of which is determined by the amount of light incident on the circuit over a period of time, called the exposure. The pixel sensor has a gate that couples this electrical signal to a readout line in response to a signal on a row select line.

A rectangular imaging array is defined as a plurality of pixel sensors organized into a plurality of rows and columns of pixel sensors. The rectangular array includes a plurality of readout lines and a plurality of row select lines, with each pixel sensor connected to one row select line and one readout line, and an electrical signal generated by the pixel in response to a signal on the row select line associated with the pixel sensor being connected to the readout line associated with the pixel.

The manner in which the present invention provides its advantages may be more readily understood with reference to FIG1 , which illustrates a two-dimensional imaging array according to one embodiment of the present invention. A rectangular imaging array 80 includes pixel sensors 81. Each pixel sensor has a primary photodiode 86 and a parasitic photodiode 91. The manner in which the pixel sensors operate will be discussed in greater detail below. Reset circuitry and amplifier circuitry in each pixel are shown at 87. The pixel sensors are arranged in a plurality of rows and columns. Exemplary rows are shown at 94 and 95. Each pixel sensor in a column is connected to a readout line 83, which is shared by all of the pixel sensors in the column. Each pixel sensor in a row is connected to a row select line 82, which determines whether the pixel sensors in the row are connected to a corresponding readout line.

The operation of rectangular imaging array 80 is controlled by controller 92, which receives pixel addresses to be read out. Controller 92 generates row select addresses, which are used by row decoder 85 to read out pixel sensors on corresponding rows in rectangular imaging array 80. Column amplifiers are included in an array of column amplifiers 84 that implement the readout algorithm, which will be discussed in more detail below. All pixel sensors in a given row are read out in parallel; therefore, there is one column amplifier and ADC circuit for each readout line 83. The column processing circuitry will be discussed in more detail below.

When the rectangular imaging array 80 is reset and then exposed during an imaging exposure, each photodiode accumulates a charge that depends on the exposure and light conversion efficiency of the photodiode. When the row of pixel sensors associated with that photodiode is read out, this charge is converted to a voltage by the reset and amplification circuit 87 in that pixel sensor. This voltage is coupled to the corresponding readout line 83 and processed by the amplification and ADC circuitry associated with that readout line to produce a digital value representing the amount of light incident on the pixel sensor during the imaging exposure.

Ideally, each pixel sensor is identical to every other pixel sensor, is reset to the same voltage during readout, and produces a zero signal value when no light is impinging on the rectangular imaging array 80. Furthermore, under ideal conditions, each column application circuit is identical to each other column amplifier circuit. There are four analog conversion factors in the processing chain from the exposure of the photodiode to the final digital value. These are the light-to-charge conversion efficiency of the photodiode. The charge-to-voltage conversion is in the pixel reset and amplifier circuit 87, and there is a voltage amplifier circuit in the column processing circuit. The difference in these analog conversion factors results in fixed pattern noise (FPN). FPN can depend on parameters that vary over time and also on the temperature of the imaging array when the exposure is made.

In addition to FPN, other noise factors must also be reduced to obtain a noise factor that is smaller than shot noise. Reset noise is an example of such noise. The way reset noise is generated can be more easily understood with reference to Figure 2, which shows a pixel sensor of the prior art. Figure 2 is a schematic diagram of a typical prior art pixel sensor in a column of pixel sensors in an imaging array. Pixel sensor 21 includes a photodiode 22, which measures the light intensity at the corresponding pixel in the image. First, the photodiode 22 is reset by placing gate 25 in an on state and connecting the floating diffusion node 23 to a reset voltage Vr. Gate 25 is then closed and the photodiode 22 is allowed to accumulate photoelectrons. The potential on gate 27 sets the maximum amount of charge that can be accumulated on the photodiode 22. If more charge accumulates than the potential on gate 27 allows, the excess charge is shunted to ground through gate 27.

After photodiode 22 has been exposed to light, the charge accumulated in photodiode 22 is typically measured by recording the change in voltage on floating diffusion node 23 as the accumulated charge from photodiode 22 is transferred to floating diffusion node 23. Floating diffusion node 23 is characterized by a capacitance represented by capacitor 23'. In practice, before floating diffusion node 23 is connected to photodiode 22, capacitor 23' is charged to voltage Vr and isolated by pulsing the reset line of gate 24. When gate 25 is opened, the charge accumulated on photodiode 22 is transferred to floating diffusion node 23. The voltage on floating diffusion node 23 is sufficient to remove all of this charge, reducing the voltage on floating diffusion node 23 by an amount that depends on the amount of charge transferred and the capacitance of capacitor 23'. Therefore, by measuring the change in voltage on floating diffusion node 23 after gate 25 is opened, the accumulated charge can be determined.

If the reset voltage on floating diffusion node 23 is sufficiently reproducible, a single measurement of the voltage on the floating diffusion node after reset is sufficient. However, noise causes small variations in the reset voltage. If this noise is significant, a correlated double sampling algorithm is used. In this algorithm, floating diffusion node 23 is first reset to Vr using reset gate 24. Then, the potential on floating diffusion node 23 is measured by applying a select signal to line 28 to the readout gate, connecting source follower 26 to readout line 31. This reset potential is stored in column amplifier 32. Next, gate 25 is turned on, and the charge accumulated in photodiode 22 is transferred to floating diffusion node 23. It should be noted that floating diffusion node 23 is actually a capacitor charged to Vr. Therefore, the charge leaving photodiode 22 reduces the voltage on floating diffusion node 23 by an amount that depends on the capacitance of floating diffusion node 23 and the amount of charge transferred. The voltage on floating diffusion node 23 is measured again after the transfer. The voltage difference is then used to calculate the amount of charge accumulated during the exposure.

The present invention is based on the observation that a pixel of the type described above can be modified to include a second parasitic photodiode that is part of the floating diffusion node and has significant photodiode detection efficiency. This second photodetector does not significantly increase the size of the pixel. Thus, the present invention provides the advantages of a dual-photodiode pixel without significantly increasing the pixel size.

To distinguish the parasitic photodiode from the photodiode 22, the photodiode 22 and the photodiode used for analog functions will be referred to as "conventional photodiodes." Reference is now made to FIG3, which illustrates a pixel sensor in which the parasitic photodiode is used for image measurement. To simplify the following discussion, those elements of the pixel sensor 41 that serve functions similar to those discussed above with reference to FIG1 have been given the same reference numerals and will not be discussed further unless such discussion is necessary to illustrate the novel manner in which these components are used. Typically, the detection efficiency of the parasitic photodiode 42 is significantly less than the detection efficiency of the photodiode 22. Methods for adjusting the ratio of the photodiode detection efficiencies of the two photodiodes are discussed in more detail in U.S. patent application Ser. No. 14/591,873, filed on July 1, 2015. In one exemplary embodiment, the ratio of the conversion efficiency of the main photodiode to the parasitic photodiode is 30:1. Other embodiments in which this ratio is 20:1 or 15:1 are useful.

The manner in which pixel intensity is measured using pixel sensor 41 in one embodiment of the present invention will now be explained in more detail. The process can be more easily understood by resetting the pixel after the last image readout operation is completed. First, the main photodiode 22 is reset to Vr and the gate 25 is closed. This also resets the floating diffusion node 43 to Vr. If a correlated double sampling measurement is to be performed, this voltage is measured at the beginning of the exposure by connecting the floating diffusion node 43 to the column amplifier 170. Otherwise, the previous voltage measurement of the reset voltage is used. During image exposure, the parasitic photodiode 42 generates photoelectrons that are stored on the floating diffusion node 43. These photoelectrons lower the potential on the floating diffusion node 43. At the end of the exposure, the voltage on the floating diffusion node 43 is measured by connecting the output of the source follower 26 to the column amplifier 170. The amount of charge generated by the parasitic photodiode 42 is determined to provide a first pixel intensity value. Next, the floating diffusion node 43 is reset to Vr again and the potential on the floating diffusion node 43 is measured by connecting the output of the source follower 26 to the column amplifier 170. Gate 25 is then placed in a conductive state and the photoelectrons accumulated by the main photodiode are transferred to floating diffusion node 43. The voltage on floating diffusion node 43 is then measured again and column amplifier 170 uses it to calculate a second pixel intensity value.

If the light intensity at the corresponding pixel is high, the main photodiode 22 will overflow; however, the parasitic photodiode 42, which has a much lower conversion efficiency, will have a value within the required range. On the other hand, if the light intensity is low, the photoelectrons accumulated on the parasitic photodiode 42 are insufficient to provide a reliable estimate, and the measurement from the main photodiode 22 will be used.

Double-correlated sampling corrects for reset noise. In addition to reset noise, noise is also generated by the ADC associated with the readout line when it converts the analog voltage on readout line 83 into a digital value. In the simplest case, the ADC converts the input voltage into a digital value related to voltage V via V=NS, where N is the digital value and S is the ADC step size. Given known values for N and S, the reconstructed voltage value will differ from the original value by half the step size. In the following discussion, this error causes noise that will be referred to as digitization noise. In the final digital representation of the exposure for each pixel, this digitization noise is added to the shot noise. Shot noise is approximately equal to the square root of the number of photons converted into photoelectrons in the photodiode. Therefore, shot noise increases with increasing exposure. In low-light conditions, the absolute value of shot noise is small, so if S is small, the digitization noise can be large. However, if S is small, the number of bits required to represent the entire input voltage range in the ADC becomes larger. Considering the large number of ADCs in an imaging array, the increase in cost becomes significant.

In principle, it is possible to digitize the column voltages using an ADC with a variable step size. However, the additional circuitry required to change the step size based on the input voltage increases the cost of the ADC. In such an arrangement, the ADC output is a nonlinear function of the input voltage, with small input voltages digitized with smaller step sizes. While this arrangement allows the system to maintain digitization noise at a low level compared to shot noise, the ADC must be able to operate over the entire range of voltage values that may be present in any image.

The present invention avoids these problems by using a dual-gain amplifier to amplify the signal on the corresponding readout line 83. A single ADC then digitizes the output of the amplifier. Changing the amplification factor is equivalent to changing the step size of the ADC. In addition, the voltage range over which the ADC must operate is reduced. Now refer to Figure 4, which shows a column amplifier and ADC according to one embodiment of the present invention. The column processing circuit is discussed in more detail in U.S. patent application Ser. No. 14/097,162, filed on April 12, 2013, which is incorporated herein by reference. For the purposes of this discussion, the column processing circuit 70 amplifies and processes the signal on the bit line 37. The capacitive mutual impedance amplifier 50 is composed of an operational amplifier 51 and two feedback capacitors shown at 52 and 53 with capacitances _C52 and _C53 , respectively. When switch 54 is open, the gain of the capacitive mutual impedance amplifier 50 is proportional to _C56 / _C52 , where _C56 is the capacitance of capacitor 56. When switch 54 is closed, capacitors 52 and 53 are connected in parallel, and the gain of capacitive transimpedance amplifier 50 is proportional to _C56 /( _C52 + _C53 ). The state of switch 54 is set by latching comparator 68, which compares the output of capacitive transimpedance amplifier 50 with reference voltage _V2 . In one embodiment, _C56 /( _C52 + _C53 ) is approximately 1, and _C56 / _C52 is 20 to 30.

In operation, switch 54 is controlled by the output of a latching comparator, shown at 68, and the output of controller 92, shown in FIG1 . Prior to each voltage measurement on bit line 37, latching comparator 68 is reset and switch 55 is closed to short-circuit the input and output of operational amplifier 51. Initially, switch 54 is open, and operational amplifier 51 has its maximum gain. As the signal is transferred to capacitor 56 for measurement, the output of operational amplifier 51 rises. If the output of operational amplifier 51 exceeds V ₂ , latching comparator 68 is set, generating a signal on line 67 to close switch 54. Consequently, the gain of capacitive transimpedance amplifier 50 is reduced to a low value. After capacitive transimpedance amplifier 50 stabilizes, the output voltage is stored on capacitor 63 or capacitor 64 in dual sampling circuit 60, depending on the state of switches 61 and 62, respectively. When the reset value and the value representing the stored charge on the photodiode in the pixel currently connected to bit line 37 are stored on capacitors 64 and 63, respectively, the potential difference is digitized by ADC 65 and the output value on line 66 along with a value indicating the gain value of the capacitive transimpedance amplifier 50 on line 67.

When the light level stored in the pixel connected to the bit line 37 is low, the capacitive transimpedance amplifier 50 and the associated correlated double sampling circuit behave as conventional column processing circuits because the gain of the capacitive transimpedance amplifier 50 is at a high value for the reset and measurement phases of the correlated double sampling. However, when the light level is high, the gain used to measure the reset potential will be different from the gain used to measure the charge transferred from the photodiode. Therefore, the difference calculation will be erroneous. In many cases, this will not cause a significant problem because the correlated double sampling calculation only provides a significant difference from the value obtained by measuring the charge stored in the photodiode when the photodiode charge is small. However, if correction for this error is required, a modified double sampling circuit can be used in which the observed reset value is divided by an appropriate factor that depends on the difference in the two-phase gain.

Capacitive transimpedance amplifier 50 can be viewed as a capacitive transimpedance amplifier with a variable capacitance feedback circuit as a feedback loop. The feedback capacitance is set to maintain the output signal below a predetermined signal level. Although the embodiment shown in FIG4 has two gain levels, additional gain levels can be set by providing more feedback capacitors, each with a separately activated switch. As will be described in more detail below, in one embodiment of the present invention, capacitive transimpedance amplifier 50 has four gain levels. Two gains are used to process signals from the parasitic photodiode, and two gains are used to process signals from the main photodiode.

As described above, an ideal pixel sensor will produce a zero signal when no light is directed onto the imaging array. However, in reality, even dark pixel signals have some small signal. This dark signal can vary from exposure to exposure in response to temperature changes and other factors. In addition, the readout circuitry including amplifiers, correlated double sampling, and ADCs in each row can have a non-zero offset. In principle, this source of noise can be reduced by including one or more optically dark rows in the imaging array by masking the pixel sensors in those rows. An exemplary optically black row is shown at 94 in Figure 1. In this type of correction scheme, when processing each pixel sensor in a row, the signal from that row, or the average of the signals from multiple such rows, is subtracted from the signals generated by the other non-black pixel sensors.

Unfortunately, adequately masking the pixel sensors to provide optically black rows presents significant challenges because light can be reflected from other portions of the imaging array into the pixel sensors in the optically dark rows. While this source of noise is acceptable in conventional imaging arrays, it presents a significant problem in imaging arrays having the dynamic range of the imaging arrays according to the present invention.

The present invention provides a second "black" signal that can be used to correct for offsets in the column processing circuitry. This signal is generated by the column calibration circuitry 96 shown in FIG1 . In one aspect of the invention, the calibration circuitry includes multiple rows of signal injectors. Referring to FIG5 , there is shown a signal injector that is responsive to a row select signal on line 197 and thereby read out on readout line 83. Signal injector 196 includes a source follower 191 and a select gate 192 that are identical to the corresponding elements in the pixel sensor. Signal injector 196 receives a test signal on bus 193 that is coupled to the gate of source follower 191. Thus, the output of signal injector 196 is a voltage that reflects the voltage generated by the pixel sensor having a voltage V _test at its gate.

The resulting signal on readout line 83 is processed by the corresponding column processing circuitry in the same manner as the signal from the pixel sensor. Specifically, correlated double sampling is applied during signal processing. That is, _Vtest is first set to the reset voltage Vr and the signal is processed. Next, _Vtest is set to another voltage to provide a test signal that is processed after subtracting the previous signal. If the signal is set to Vr during both steps, the resulting signal at the ADC in the column processing circuitry should be zero, which would be the result of the pixel not receiving any light. Therefore, this value is referred to as electrically black (EB).

In one aspect of the present invention, there are several such signal injectors connected to each readout line. The resulting EB signals are averaged to provide an average EB signal that is subtracted from the signals of the normal pixel sensors, thereby producing a final pixel sensor value that reflects the actual exposure received by each pixel sensor. The average EB value has reduced noise. The EB value can change slowly with environmental variables such as temperature. Therefore, a running average of the EB values is maintained for each column of pixel sensors. At predetermined time intervals, additional EB values are measured and added to this running average, and the previous EB values are discarded.

The signal injector is also used to calibrate the column processing circuitry during operation of the imaging sensor. As described above, variations in the amplifiers, ADCs, and other components across the columns in the readout processing circuitry lead to column fixed pattern noise (CFPN) in CMOS sensors. CFPN is a major cause of image quality degradation in low-light and/or low-contrast (e.g., illuminated white paper) scenes. CFPN can be considered to have two components, offset CFPN and gain CFPN. The column amplifier amplifies the input signal and adds some offset to the amplified signal. The present invention is based on the observation that the offset CFPN is independent of the input signal to the column amplifier; however, the gain CFPN depends on the input signal amplitude and the individual amplifiers, as the gain is not completely constant over the voltage range presented on the corresponding readout line. The gain function of an amplifier is defined as the gain of the amplifier as a function of the input voltage to the amplifier. In addition, the gain and offset CFPN vary with time and environmental variables (e.g., the temperature of the imaging array).

Subtraction of the mean EB signal for a column corrects for the offset CFPN in that column. This is part of the per-frame processing and therefore takes into account the fixed offset CFPN and its variation over time as well as other slowly varying environmental factors.

In prior art imaging arrays, after offset CFPN correction is performed, gain CFPN is corrected using precalibrated coefficients for each column. This calibration step is typically completed at the factory and remains constant throughout the camera's life. Therefore, this approach cannot correct for temporal gain variations. As a result, significant gain CFPN still exists.

In addition to offset CFPN correction, the present invention also includes a dynamic gain CFPN compensation scheme. The amplifier in the column processing circuit has four nominal gain settings. Two of these gain settings, referred to as the high and low main photodiode gain settings, are used to process signals from the main photodiode. Similarly, two of these gain settings, referred to as the high and low parasitic photodiode gain settings, are used to process signals from the parasitic photodiode. Therefore, the four amplifier gains must be calibrated, as well as the gain as a function of the voltage stored in each amplifier gain.

Referring again to FIG. 1 , the rectangular imaging array 80 includes column calibration circuitry 96, which generates calibration signals that are fed to the column amplifiers and downstream circuitry when the amplifiers are set to each gain setting. In one aspect of the present invention, the injectors discussed above are used to generate known voltages on the readout lines to provide calibration signals. The calibration signals are also processed using double-correlated sampling; however, the second voltage in the sequence is set to a voltage lower than Vr to provide a signal of known amplitude, allowing the processed value of the signal processed by the column processing circuitry to be determined. The generated offset and gain profiles are stored in memory that is part of the system controller. While the sensor is operating, different calibration signal levels are generated in the background. These stored profiles are then used to apply a correction algorithm to correct for CFPN. Because these profiles are generated dynamically and the correction algorithm runs in the background while the sensor is operating, the system controller is able to track column variations and apply appropriate compensation as sensor operating conditions (e.g., temperature, supply voltage, etc.) change.

As described above, in the pixel sensor utilized in the present invention, each pixel sensor has two photodiodes: a primary photodiode and a parasitic photodiode. The primary photodiode is suitable for low-light detection and, therefore, has high light conversion gain, and is a PIN-type photodiode to reduce noise. The parasitic photodiode is suitable for high-light detection and has low light conversion gain. Furthermore, the signal from each photodiode can be the result of two different column gain levels. These results are combined to produce a digital light measurement, which can be obtained if the primary photodiode has an extended range and the signal from this photodiode is processed using a single amplification gain.

The signal from the low-sensitivity parasitic photodiode extends the useful range of the pixel sensor. When the parasitic photodiode provides light intensity values, if the primary photodiode is not saturated, the parasitic photodiode measurement must be converted to the value obtained from the primary photodiode. To provide this extension, the relative gains of the two photodiodes must be known. The ratio of the two gains depends on the average wavelength of light received by the photodiodes and must therefore be calibrated for the different color channels in the imaging array. However, even within a given color channel, there are variations depending on the color temperature of the incident light. Therefore, in the present invention, the ratio is calibrated for each image.

The relative sensitivities of the primary and parasitic photodiodes are set so that a range of incident light intensities exists that provides a useful signal for both photodiodes in the same pixel sensor. To be suitable for calibration, the light intensity must be between a first intensity value that is less than the intensity at which the primary photodiode saturates and a second intensity value that is greater than the minimum intensity at which the parasitic photodiode provides a meaningful signal. During readout of the imaging array, the EB offset is removed from the column signal, and those signals within the calibration range are identified. The ratio of the two photodiode signals for these pixels is calculated and added to a running average calibration ratio, which is used to calculate the light intensity for all pixel sensors in that color channel for which the parasitic photodiode signal provides light measurement.

In one aspect of the present invention, each pixel in the final image is calculated from the outputs of four adjacent pixel sensors. Two pixel sensors, G1 and G2, are covered by green filters, and the remaining two pixel sensors, R and B, are covered by red and blue filters, respectively. Pixel sensors covered by the same color pixels within the imaging array are referred to as "color channels." Pixel sensors have a certain degree of crosstalk. That is, light input in the red spectral region produces a non-zero response in the other color pixel sensors in the four pixel group. It has been observed that the crosstalk for G1 and G2 is different. Therefore, a calibration ratio is calculated separately for each green sensor; that is, in this aspect of the present invention, the two green sensors are treated as separate color channels.

The calibration ratio of the primary photodiode to the parasitic photodiode relies on negligible dark current in both photodiodes. While this assumption holds true for the primary photodiode, the dark current in the parasitic photodiode may exceed acceptable limits. Pixel sensors where the parasitic photodiode has a large dark current are referred to as "hot pixels." These pixels must be excluded from the running average of the calibration ratio in each color channel. In one aspect of the present invention, calibration ratio values that are outliers in the statistical distribution of calibration ratio values are not used to calculate the running average.

If a particular embodiment of an imaging array according to the present invention has sufficient memory, the controller may store a list of hot pixels determined by a calibration process performed at the factory. In this case, the calibration ratios of these pixels are never used to provide a running average.

For each pixel sensor, the parasitic and primary photodiode signals are digitized. The digital value includes the amplifier gain applied by the column amplifier prior to digitization. The amplifier gain is assumed to be constant over the corresponding input voltage range. The light intensity is then the product of the "step size" associated with the gain and the digital value from the ADC. As mentioned above, for a given amplifier gain, the gain is not necessarily constant but depends to some extent on the input voltage and, therefore, the digital value. Controller 92 stores a gain table for each column amplifier.

As described above, the purpose of mixing the outputs from the main photodiode and the parasitic photodiode is to provide a signal value that is a linear function of the exposure at the corresponding pixel sensor. The dynamic range of an image sensor according to the present invention can be as high as 10 ⁶ . In order to fully represent this linear value over the entire exposure range, a 24-bit integer is required. Therefore, the output bus from controller 92 needs to be a 24-bit bus. The power required to drive such a large bus at the speeds required by surveillance or other cinema cameras is significant. Therefore, in one aspect of the present invention, the final exposure value is compressed to a much smaller number of bits.

At low exposures, the highest bit of the digital value is zero. At high exposures, the highest bit values are important; however, the lowest bit values are dominated by shot noise and therefore provide little information. Therefore, these values can be replaced by zero or any other value without significantly changing the exposure value. In one aspect of the present invention, the linear exposure value is converted to a compressed exposure value using a nonlinear transformation selected so that the highest compressed digital value requires significantly fewer bits than the uncompressed digital value.

Consider a table of threshold values for V _i . If the digital exposure V is greater than or equal to V _i and less than V _i+1 , then V is replaced by i. Here, i = 1 to Nt. During decompression, V is replaced by V _i . The table value V _i is selected so that the difference between V _i and V _i+1 is less than the shot noise in the signal with value V _i . Furthermore, the number of entries in the table is selected so that Nt << V _max , where V _max is the maximum pixel signal. In an exemplary embodiment, the linear exposure value requires 24 bits, but the maximum value of i requires only 14 bits. Thus, a significant reduction in the number of output values is achieved.

The above-described embodiments utilize pixel sensors having a primary photodiode and a parasitic photodiode. However, the teachings of the present invention can be applied to reducing CFPN in imaging arrays in which the pixel sensor has two conventional photodiodes. Typically, a first photodiode can measure exposure in a first exposure band characterized by first and second exposure limits. A second photodiode measures exposure in a second exposure band characterized by third and fourth exposure limits. The first and second bands overlap; that is, the third exposure limit is greater than the first exposure limit and less than the second exposure limit, and the fourth exposure limit is greater than the second exposure limit. The present invention preferably uses a parasitic photodiode as the second photodiode because the resulting imaging sensor is significantly smaller and, therefore, less expensive than an imaging sensor that uses two conventional photodiodes and an additional internal gate to determine which photodiode is currently connected to the floating diffusion node.

The above-described embodiments of the present invention have been provided to illustrate various aspects of the present invention. However, it should be understood that different aspects of the present invention shown in different specific embodiments may be combined to provide other embodiments of the present invention. In addition, various modifications to the present invention will become apparent from the foregoing description and accompanying drawings. Therefore, the present invention is limited only by the scope of the appended claims.

Claims (15)

1. An imaging sensor array device, comprising: A rectangular imaging array, characterized by having multiple pixel sensors and multiple readout lines; Multiple column processing circuits, each of the multiple column processing circuits being connected to a corresponding one of the multiple readout lines; Multiple signal injectors, one signal injector connected to each of the read lines, each signal injector coupling one of a predetermined number of voltages to that read line; and A controller that determines the exposure of each of the plurality of pixel sensors during each of a plurality of image recording cycles, such that the signal injector injects a plurality of calibration voltages into the readout line during each of a plurality of calibration cycles, and determines the gain function of the amplifier by measuring the output of an amplifier in one of the plurality of column processing circuits during the plurality of calibration cycles between the image recording cycles. 2. The imaging sensor array device of claim 1, wherein the controller causes the signal injector to inject a signal having a value that the pixel sensor would produce if the pixel sensor were not exposed, and the controller determines a column offset value for each of the plurality of column processing circuits. 3. The imaging sensor array device of claim 2 further includes multiple rows of signal injectors, each column processing circuit being connected to multiple of the signal injectors, wherein when determining the column offset value, the controller averages the column offset values generated by the signal injectors. 4. The imaging sensor array device of claim 2, wherein the column offset value is determined during a plurality of said calibration cycles. 5. The imaging sensor array device of claim 1, wherein each of the plurality of pixel sensors includes first and second photodiodes, the first photodiode being characterized by having a different light conversion efficiency than the second photodiode. 6. The imaging sensor array device as claimed in claim 5, wherein the light conversion efficiency of the second photodiode is less than 1/30 of that of the first photodiode. 7. The imaging sensor array device of claim 6, wherein the second photodiode includes a parasitic photodiode, the parasitic photodiode including a floating diffusion node, the floating diffusion node further being configured to convert the charge generated by the first photodiode into a voltage. 8. The imaging sensor array device of claim 5, wherein the controller determines, during the plurality of image recording cycles, the ratio between the light conversion efficiency of the first photodiode and the light conversion efficiency of the second photodiode. 9. The imaging sensor array device of claim 8, wherein the controller determines the ratio by averaging signals from a plurality of pixel sensors, wherein the second photodiode in the pixel sensors generates a signal within a calibration range. 10. The imaging sensor array device of claim 9, wherein the calibration range does not include a pixel sensor, and wherein the second photodiode has a dark current greater than a dark current threshold. 11. The imaging sensor array device of claim 8, wherein the plurality of pixel sensors are divided into color channels, each color channel having a corresponding color filter on the pixel sensor in the color channel, and wherein the controller determines the ratio for each of the color channels. 12. The imaging sensor array device of claim 5, wherein the first photodiode measures the exposure between a first exposure and a second exposure, and wherein the second photodiode can measure the exposure between a third exposure and a fourth exposure, wherein the third exposure is less than the second exposure and the fourth exposure is greater than the second exposure. 13. The imaging sensor array device of claim 12, wherein the controller uses the first photodiode to measure an exposure less than the second exposure, and the second photodiode to measure an exposure greater than the second exposure, thereby simulating a single photodiode capable of measuring the exposure between the first and fourth exposures. 14. The imaging sensor array device of claim 13, wherein the simulated single photodiode generates a first exposure value that is a linear function of the exposure and is independent of the light conversion efficiency of the first and second photodiodes and variations in the plurality of column processing circuits. 15. The imaging sensor array apparatus of claim 14, wherein the first exposure is characterized by having shot noise, and the controller outputs a second exposure value for each of the plurality of pixel sensors, the second exposure value being determined by the first exposure value, the second exposure value requiring fewer bits to output and the difference between the second exposure value and the first exposure value being less than the value of the shot noise.