HK1259023B - Enablement of device power-on with proper assembly - Google Patents

Description

Enablement of device power-up with appropriate components

Background Art

Battery packs in battery-powered devices can provide high power and are often protected using a protection circuit module or a protection circuit board.

Summary of the Invention

An electronic device is configured with subassemblies including a main logic board, a flexible printed circuit, and dual battery packs, the subassemblies being assembled together using electrical connectors to enable power from the battery packs to flow on power buses distributed along the flexible printed circuit and the main logic board. A protection circuit module (PCM) in each battery pack is configured to determine the status of each of the connections between the subassemblies (i.e., whether they are properly assembled to provide electrical continuity through the connectors) so that power from the battery pack is connected to the power bus only when electrical continuity is verified at each of the connectors. In the event that any connection is faulty, for example, due to misalignment of the connectors during assembly (which prevents electrical continuity from being established through the connectors), the PCM will not connect power to the power bus. By enabling power-on only when the connectors are properly assembled, the PCM can mitigate safety hazards and damage to the battery pack, the flexible printed circuit, the main logic board, and the constituent devices and circuits that can be caused by faults in the power bus resulting from improper assembly.

In various illustrative examples, each PCM generates a low power sense signal that can be received by the other PCMs on a sense circuit that forms a loop from the battery pack through each of the connectors, the flexible printed circuit, and the main logic board to the battery pack. When each of the PCMs detects the sense signal generated by the other PCMs on the sense circuit, electrical continuity in the connector is verified. The PCM can then switch power from the battery cells in each corresponding group to the power bus to thereby power on the device. In the event of a fault, the sense circuit can be configured in some implementations to enable identification of improperly assembled connectors. Such a fault location capability can be used, for example, during equipment assembly in a factory setting or during equipment repair in the field.

This disclosure is provided to introduce in simplified form a series of concepts that are further described below in specific implementations. This disclosure is not intended to identify the key features or essential features of the claimed subject matter, nor is it intended to be used as an aid in determining the scope of the claimed subject matter. In addition, the claimed subject matter is not limited to implementations that address any or all of the advantages mentioned in any part of this disclosure. These and various other features will become apparent from reading the following detailed description and examining the associated drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

1 and 2 show respective three-quarter and top views of illustrative examples of small form factor electronic devices, such as wearable virtual reality or augmented reality head-mounted display (FDVID) devices;

3 , 4 , and 5 are functional block diagrams of respective illustrative embodiments of components that may be used in an electronic device;

6 is a table showing illustrative conditions to be satisfied before power-up is enabled by a protection circuit module in an electronic device;

7 and 8 are functional block diagrams of respective illustrative embodiments of components that may be used in an electronic device;

9, 10, and 11 are functional block diagrams of another illustrative embodiment of components that may be used in an electronic device;

FIG12 is a flow chart of an illustrative method for assembling subassemblies in an electronic device;

13 is a diagram showing additional details of the illustrative virtual reality or augmented reality HMD device shown in FIGS. 1 and 2 ;

FIG. 14 shows a functional block diagram of an illustrative example of the virtual reality or augmented reality HMD device shown in FIG. 1 , FIG. 2 , and FIG. 13 ; and

15 shows a block diagram of an illustrative electronic device that includes a virtual reality or augmented reality display system.

Like reference numerals indicate like elements in the drawings. Elements are not drawn to scale unless otherwise indicated.

DETAILED DESCRIPTION

FIG1 and FIG2 show respective three-quarter and top views of an illustrative example of a small form factor electronic device, such as a currently-enabled wearable virtual reality or augmented reality head-mounted display (HMD) device 100, which can be powered using appropriate components. However, this arrangement is in no way limited to HMD devices. The eyeglass form factor of HMD device 100 is illustrative, and other form factors may be used depending on the needs of a particular implementation. For example, the HMD device may utilize a band that is incorporated into a cap/hat, helmet, goggles, hood, brim, etc., that surrounds the user's head. In this example, HMD device 100 includes a front portion 105 positioned proximate to the user's eyes, and left and right portions 110, 115, respectively, positioned proximate to the sides of the user when device 100 is worn. Each of portions 105, 110, and 115 of HMD device 100 is configured to house and/or support various devices, components, and circuits, as described below.

In a common implementation, the HMD device 100 is battery-powered, allowing it to operate without being tethered to other devices. However, it can also be configured to operate using, for example, a wired connection to a remote power source. In one illustrative example, the HMD device 100 employs dual battery packs to provide sufficient power storage to enable the device to operate within its design objectives. One battery pack in the dual battery pack arrangement is located in the left side portion 110 of the HMD device 100, and the other battery pack is located in the right side portion 115. The location of the battery packs in the sides of the HMD device can, in some implementations, allow for good packaging and weight distribution, and can enable the HMD device to meet specific ergonomic goals and other design criteria. For example, the location of the packs can help maintain good balance and weight distribution of the HMD device, which can be important design criteria when the HMD is worn on the user's head.

FIG3 is a functional block diagram of an assembly 300 of subassemblies that may be used in an illustrative embodiment of the HMD device 100 ( FIG1 ). Four subassemblies are provided, including a main logic circuit subassembly 305, an intermediate circuit subassembly 310, a first battery pack 315, and a second battery pack 320. The main logic circuit subassembly 305 and the intermediate circuit subassembly 310 may include printed circuit boards, flexible printed circuits, rigid flexible printed circuits, or a combination thereof, and may support various components and circuits, as indicated by reference numerals 325 and 330 , respectively. Each battery pack includes a protection circuit module (PCM) 1 and a PCM 2, as indicated by reference numerals 335 and 340 , respectively, and one or more rechargeable battery cells, as indicated by reference numerals 345 and 350 , respectively, which are arranged in parallel within each battery pack in this example. The battery packs may interface with an external charger 355 , which is configured to provide charging current to the battery cells under certain circumstances.

The battery cells 345 and 350 may generally include lithium-ion (Li-Ion) and/or lithium-polymer (Li-Po) batteries, which may utilize various architectures. When the battery cells support high energy density, the PCM is used to prevent damage to the battery and other components and circuits in the HMD device and provide relief from electrical overstress that may occur through overcurrent conditions and/or charging and discharging that exceeds safety/design limits. Each PCM 335 and 340 may monitor the battery cell voltage and current flow in its corresponding battery pack. Each PCM may include an integrated circuit (IC) that controls the on/off state of one or more switches 360 and 365, which may be implemented, for example, as field-effect transistors (FETs) or metal-oxide-semiconductor field-effect transistors (MOSFETs). The PCMs 335 and 340 also include gates 370 and 375 configured to allow external on/off control of the FET switches 360 and 365, as described in more detail below.

Subassemblies 305, 310, 315, and 320 are assembled into assembly 300 using connectors 380, 385, and 390. More specifically, first battery pack subassembly 315 is operatively coupled to intermediate circuit subassembly 310 using connector 380; second battery pack subassembly 320 is operatively coupled to intermediate circuit subassembly 310 using connector 385; and intermediate circuit subassembly 310 is operatively coupled to main logic circuit subassembly 305 using connector 390. Each of the connectors can be the same or different types and can generally include multiple parts, each configured with mating features. Each connector can support one or more conductors, as shown by reference numeral 395, to enable signal paths to be established using electrical continuity through the connectors between the operatively coupled subassemblies.

4 is a functional block diagram of an assembly 400 of components that may be used in another illustrative embodiment of an electronic device, such as HMD device 100 ( FIG. 1 ). In this example, a main logic board 405 is operatively coupled to a flexible printed circuit 410 using a connector 490. The flexible printed circuit 410 is operatively coupled to a first battery pack 415 using a connector 480 and to a second battery pack 420 using a connector 485.

In response to signals received at gates 470 and 475 (as described in more detail below), PCM 1 and PCM 2 (440) (indicated by reference numeral 435) are each configured to switch power from the respective battery cells 445 and 450 to the main power bus 402, which is arranged along the flexible printed circuit 410 and the main logic board 405 and extends from the FET switches 460 and 465 to the components and circuitry 425 on the main logic board through three connectors 480, 485 and 490.

In some implementations, the main power bus can take on alternative configurations. For example, as shown in the functional block diagram of assembly 500 of components in FIG. 5 , the main power bus 502 can be configured to supply power to various components and circuits that can be distributed throughout the HMD device 100. Here, the main power bus 502 can supply power to components and circuits 504 disposed on the flexible printed circuit 410 and components and circuits 425 disposed on the main logic board 405. In some implementations, the main power bus 502 can be extended to additional components and circuits 506 in other subassemblies, such as a flexible printed circuit 508 that is operatively coupled to the main logic board 405 using a connector 510. For example, the flexible printed circuit 508 can support peripheral devices 512, such as image sensors or other sensors, that can be powered by the main power bus 502.

The HMD device 100 can be configured so that the PCM has awareness of the status of each of the three connectors used in the assembly shown in Figures 3, 4, and 5. That is, each PCM is configured to detect whether the battery pack, flexible printed circuit, and main logic board are properly assembled at each of the three connectors. The PCM is configured to enable powering on the HMD device 100 when certain status conditions are met. As shown in table 600 in Figure 6, in one illustrative embodiment, PCM 1 confirms (identified by reference numerals 605, 610, 615 and 620) that four conditions are met in order to power on, including: 1) the connection between PCM 1 and the flexible printed circuit (abbreviated as FPC in the figure) is confirmed to be good, thereby establishing electrical continuity on one or more signal paths; 2) the connection between the main logic board (abbreviated as MLB in the figure) and the flexible printed circuit is confirmed to be good, thereby establishing electrical continuity on one or more signal paths between PCM 1 and the main logic board through the flexible printed circuit; 3) the connection between PCM 2 and the flexible printed circuit is confirmed to be good, thereby establishing electrical continuity on one or more signal paths; and 4) the connection between the main logic board and the flexible printed circuit is confirmed to be good, thereby establishing electrical continuity on one or more signal paths between PCM 2 and the main logic board through the flexible printed circuit.

Similarly, PCM 2 confirms (identified by reference numerals 625, 630, 635, and 640) that four conditions are met in order to power on, including: 1) the connection between PCM 2 and the flexible printed circuit is confirmed to be good, thereby establishing electrical continuity on one or more signal paths; 2) the connection between the main logic board and the flexible printed circuit is confirmed to be good, thereby establishing electrical continuity on one or more signal paths between PCM 2 and the main logic board through the flexible printed circuit; 3) the connection between PCM 1 and the flexible printed circuit is confirmed to be good, thereby establishing electrical continuity on one or more signal paths; and 4) the connection between the main logic board and the flexible printed circuit is confirmed to be good, thereby establishing electrical continuity on one or more signal paths between PCM 1 and the main logic board through the flexible printed circuit.

As shown in table 600 in FIG6 , a PCM will not connect power to the main power bus unless both PCMs confirm connector integrity at each connector used in the assembly. Thus, for example, if it cannot be confirmed that PCM 2 is properly assembled at the connector along with the flexible printed circuit, and that the flexible printed circuit is properly assembled at the connector along with the main logic board, PCM 1 will not attempt to power on. Even if the connector conditions are such that PCM 1 itself has a good path to the main logic board through the flexible printed circuit, PCM 1 will not attempt to power on.

FIG7 shows an illustrative path 705 in a low-power sensing circuit 702 that can be used by PCM 1 in the first battery pack 415 to determine connector status. FIG8 shows an illustrative path 805 in a low-power sensing circuit that can be used by PCM 2 in the second battery pack 420 to determine connector status. In some implementations, each path 705 and 805 can use one or more conductors 395 ( FIG3 ), and the paths can overlap and share conductors. In some implementations, each path can also be configured to use conductors from the main power bus. Each path 705 and 805 traverses connectors 480 , 485 , and 490 at least once. Referring to FIG7 , path 705 extends from a low-power source Vb (indicated by reference numeral 710) provided in PCM 2 to the main logic board 405 through connector 485 and flexible printed circuit 410. Path 705 extends from the main logic board 405 through flexible printed circuit 410 and connector 480 to gate 470 in PCM 1.

The low power source Vb is typically configured to supply a limited current so that the sensing circuit itself does not present a hazard or cause a short circuit or other fault if the connector is incorrectly connected. Although Vb is shown as being drawn from the PCM 2 on path 705, Vb can also be configured to be provided by other components in the second battery pack, as indicated by reference numeral 715. For example, Vb can be supplied by a component that interoperates with the external charger 355 (Figure 3). The power controller 720 can optionally be provided in the main logic board 405 and is used to control the signal to the gate 470 in some cases. The controller 720 can also be configured to maintain awareness of the connector status to supplement or replace the connector status awareness maintained by the PCM.

Referring to FIG8 , path 805 extends from a low-power source Vb (indicated by reference numeral 810) provided in PCM 1 through connector 480 and flexible printed circuit 410 to main logic board 405. Although Vb is shown as being drawn from PCM 1 on path 805, Vb can also be configured to be provided by other components in the first battery pack, as indicated by reference numeral 815. A power controller 720 may optionally be used to control the signal to gate 475 in some circumstances. Path 805 extends from main logic board 405 through flexible printed circuit 410 and connector 485 to gate 475 in PCM 2. When gates 470 and 475 in the respective first and second battery packs sense the Vb signal via the low-power sensing circuit, the conditions shown in table 600 in FIG6 are satisfied as the sensing circuit path traverses each of the connectors. Consequently, the FET switches in each PCM enable power to flow to the main power bus for energization. An incorrect connection in any connector that interrupts the continuity in the sensing circuit prevents the Vb signal from triggering the gate in the PCM.

Figures 9, 10, and 11 illustrate an alternative illustrative embodiment of an assembly 900 of components that can be used in an electronic device, such as HMD device 100 (Figure 1). In this embodiment, a first battery pack 915 and a second battery pack 920 include respective PCMs 935 and 940 and one or more battery cells 945 and 950. PCMs 935 and 940 are operatively coupled to a main logic subassembly 905, which includes various components and circuits 925, via respective connectors 980 and 985. Main logic subassembly 905 can include a printed circuit board, a flexible printed circuit, a rigid flexible printed circuit, or a combination thereof. PCMs 935 and 940 include respective switches 960 and 965 (such as FETs), whose on/off states can be controlled by gates 970 and 975.

10 , in response to signals received at gates 970 and 975, PCMs 935 and 940 are configured to each switch power from respective battery cells 945 and 950 to a main power bus 1002, which is provided in the main logic circuit assembly and extends from FET switches 960 and 965 to components and circuits 925 via connectors 980 and 985. A power controller (not shown) may optionally be provided in the main logic circuit subassembly 905 and used to control the signals to gates 970 and 975 in some circumstances.

In a manner similar to the illustrative three-connector embodiment shown in Figures 7 and 8 and described in the accompanying text, PCM 935 or 940 will not energize the main power bus 1002 unless both PCMs confirm the connector integrity at each connector 980 and 985 used in assembly 900. Figure 11 shows illustrative paths 962 and 964 in a low-power sensing circuit 1102 that can be used by the PCM to determine connector status. In some implementations, each of paths 962 and 964 can use one or more conductors and the paths can overlap and share conductors. In some implementations, each path can also be configured to use conductors in the main power bus. Each path traverses connectors 980 and 985 at least once.

As shown, path 962 extends from low power source Vb 910 provided in PCM 2 through connector 985, main logic circuit subassembly 905, and connector 980 to gate 970 in PCM 1. Although Vb is shown as being drawn from PCM 2 on path 962, Vb can also be configured to be provided by other components in the second battery pack, as indicated by reference numeral 1115. Path 964 extends from low power source Vb 912 provided in PCM 1 through connector 980, main logic circuit subassembly 905, and connector 985 to gate 975 in PCM 2. Although Vb is shown as being drawn from PCM 1 on path 965, Vb can also be configured to be provided by other components in the first battery pack, as indicated by reference numeral 1114.

When gates 970 and 975 in the respective first and second battery packs sense the Vb signal on the low-power sense circuit, the connector integrity at connectors 980 and 985 is confirmed as the sense circuit path traverses each of the connectors. Thus, the FET switches in each PCM can enable power to flow to the main power bus 1002 ( FIG. 10 ) for power-up. An incorrect connection in any connector that interrupts continuity in the sense circuit prevents the Vb signal from triggering the gates in the PCM.

FIG12 is a flowchart of an illustrative method 1200 for assembling subassemblies that can be used in an electronic device, such as HMD device 100 ( FIG1 ). Method 1200 can be performed in a factory environment, for example, by a human operator, a machine, or a combination of an operator and a machine, when the device is assembled in a factory setting. Alternatively, method 1200 can be used in the field when the device is typically repaired or maintained by a human operator. Unless otherwise stated, the methods or steps shown in flowchart 1200 and described in the accompanying text are not limited to a specific order or sequence. In addition, some of the methods or steps can occur or be performed simultaneously, and not all methods or steps must be performed in a given implementation, depending on the requirements of such implementation, and some methods or steps can be used alternatively.

At step 1205, the first battery pack is operatively coupled to an intermediate circuit subassembly (e.g., flexible printed circuit 410 in FIG. 4 ) using a first connector. At step 1210, the second battery pack is operatively coupled to the intermediate circuit subassembly using a second connector. At step 1215, the intermediate circuit subassembly is operatively coupled to a main logic circuit subassembly (e.g., main logic board 405 in FIG. 4 ) using a third connector.

At step 1220, after the subassemblies and battery packs are connected, an attempt may be made to power on the main logic circuit assembly. The main logic circuit assembly, the intermediate circuit subassembly, or one or more of the battery packs may include on-board components such as a display, an indicator, a code generator, or other suitable devices that indicate successful power on. Alternatively, one or more of the subassemblies may be configured with a port or other suitable interface that communicates with an external diagnostic and/or monitoring device that may be configured to indicate a power-on status. Various tests may be performed to verify proper assembly and connector integrity. At step 1225, if power on is unsuccessful, one or more of the three connectors may be disconnected and then reconnected, and power on may be reattempted at step 1230.

As discussed above, the present implementation of powering a device with appropriate components can be incorporated into one or more systems used in a virtual or mixed reality display device. Such a device can take any suitable form, including but not limited to a near-eye device such as an HMD device. A see-through display can be used in some implementations, while an opaque (i.e., non-see-through) display using a camera-based see-through or outward-facing sensor, for example, can be used in other implementations.

FIG13 is a diagram showing additional details of the illustrative virtual reality or augmented reality HMD device 100 shown in FIG1 and FIG2 , and FIG14 shows a functional block diagram of device 100. HMD device 100 includes one or more lenses 1302 forming part of a see-through display subsystem 1304, such that images can be displayed using lenses 1302 (e.g., using projection onto lenses 1302, one or more waveguide systems incorporated into lenses 1302, and/or in any other suitable manner). HMD device 100 also includes one or more outward-facing image sensors 1306 configured to capture images of a background scene and/or physical environment being viewed by a user, and may include one or more microphones configured to detect sounds, such as voice commands from the user. Outward-facing image sensors 1306 may include one or more depth sensors and/or one or more two-dimensional image sensors. In an alternative arrangement, as noted above, instead of including a see-through display subsystem, the augmented reality or virtual reality HMD device may display augmented reality or virtual reality images using a viewfinder mode for the outward-facing image sensors.

The HMD device 100 may also include a gaze detection subsystem 1310, which, as described above, is configured to detect the direction of gaze, or the direction or location of focus, of each of the user's eyes. The gaze detection subsystem 1310 can be configured to determine the direction of gaze for each of the user's eyes in any suitable manner. For example, in the illustrative example shown, the gaze detection subsystem 1310 includes: one or more glint sources 1312 (such as infrared light sources) configured to reflect a flash of light from each of the user's eyes; and one or more image sensors 1314 (such as inward-facing sensors) configured to capture an image of each of the user's eyes. Changes in light from the user's eyes and/or the position of the user's pupils, as determined from image data collected using the image sensor(s) 1314, can be used to determine the direction of gaze.

Additionally, the location where the line of sight projected from the user's eye intersects the external display can be used to determine the object (displayed virtual object and/or real background object) the user is looking at. The line of sight detection subsystem 1310 can have any suitable number and arrangement of light sources and image sensors. In some implementations, the line of sight detection subsystem 1310 can be omitted.

The HMD device 100 may also include additional sensors. For example, the HMD device 100 may include a global positioning system (GPS) subsystem 1316 to allow the location of the HMD device 100 to be determined. This may help identify real-world objects that may be located in the user's immediate physical environment, such as buildings.

The HMD device 100 may also include one or more motion sensors 1318 (e.g., inertial, multi-axis gyroscopes, or accelerometers) to detect movement and position/orientation/pose of the user's head when the user wears the system as part of an augmented reality or virtual reality HMD device. The motion data can be used, possibly along with eye tracking flash data and external-facing image data, for gaze tracking and for image stabilization to help correct blur in images from the external-facing image sensor(s) 1306. The use of motion data can allow changes in gaze position to be tracked even when image data from the external-facing image sensor(s) 1306 cannot be resolved.

In addition, motion sensors 1318, as well as microphone(s) 1308 and gaze detection subsystem 1310, may also be used as user input devices, allowing a user to interact with HMD device 100 via gestures of the eyes, neck, and/or head, and in some cases, via verbal commands. It will be appreciated that the sensors illustrated in Figures 13 and 14 and described in the accompanying text are included for purposes of example and are not intended to be limiting in any way, as any other suitable sensor and/or combination of sensors may be used to meet the needs of a particular implementation. For example, biometric sensors (e.g., for detecting heart and respiratory rate, blood pressure, brain activity, body temperature, etc.) or environmental sensors (e.g., for detecting temperature, humidity, altitude, UV (ultraviolet) light levels, etc.) may be used in some implementations.

The HMD device 100 may also include a controller 1320 having a logic subsystem 1322 and a data storage subsystem 1322 that communicate with sensors, a gaze detection subsystem 1310, a display subsystem 1304, and/or other components via a communication subsystem 1326. The communication subsystem 1326 may also enable the HMD device to operate in conjunction with remotely located resources such as processing, storage, power, data, and services. That is, in some implementations, the HMD device may be operated as part of a system that distributes resources and capabilities across different components and subsystems.

The storage subsystem 1324 may include instructions stored thereon that are executable by the logic subsystem 1322 to, for example, receive and interpret input from sensors, identify the user's position and movement, identify real objects using surface reconstruction and other techniques, and dim/fade the display based on the distance to the object so that the object can be seen by the user, among other tasks.

The HMD device 100 is configured with one or more audio transducers 1328 (e.g., speakers, headphones, etc.) so that audio can be used as part of an augmented reality or virtual reality experience. The power management subsystem 1330 may include one or more batteries 1332 and/or a protection circuit module (PCM) and an associated charger interface 1334 and/or a remote power interface for supplying power to components in the HMD device 100.

It will be appreciated that the HMD device 100 is described for purposes of example and is not intended to be limiting. It will also be appreciated that the display device may include additional and/or alternative sensors, cameras, microphones, input devices, output devices, etc., in addition to those shown, without departing from the scope of the present arrangement. Additionally, the physical configuration of the display device and its various sensors and subcomponents may take a variety of different forms without departing from the scope of the present arrangement.

15 , the presently enabled augmented reality or virtual reality display system, powered by a device utilizing appropriate components, may be used in a mobile or portable electronic device 1500, such as a mobile phone, smartphone, personal digital assistant (PDA), communicator, portable internet appliance, handheld computer, digital video or still camera, wearable computer, computer gaming device, professional visual presentation product for viewing, or other portable electronic device. As shown, the portable device 1500 includes a housing 1505 to house a communication module 1510 for receiving and transmitting information to an external device or remote system or service (not shown).

The portable device 1500 may also include an image processing module 1515 for processing received and transmitted information, and a virtual display system 1520 that supports viewing images. The virtual display system 1520 may include a microdisplay or imager 1525 and an optical engine 1530. The image processing module 1515 may be operatively connected to the optical engine 1530 to provide image data, such as video data, to the imager 1525 for displaying images thereon. An exit pupil expander (EPE) 1535 may be optically linked to the optical engine 1530. The EPE may include or be part of a display system that supports augmented reality or virtual reality images.

The present enablement of device power-up with appropriate components may also be used in augmented reality or virtual reality display systems for use in non-portable devices such as gaming devices, multimedia consoles, personal computers, vending machines, smart appliances, internet-connected devices, and household appliances such as ovens, microwave ovens and other appliances, as well as other non-portable devices.

The present enablement of device power-up with appropriate components may also be used in augmented reality or virtual reality display systems for use in non-portable devices such as gaming devices, multimedia consoles, personal computers, vending machines, smart appliances, internet-connected devices, and household appliances such as ovens, microwave ovens and other appliances, as well as other non-portable devices.

Various exemplary embodiments of powering the present device utilizing appropriate components are now presented by way of illustration and not as an exhaustive list of all embodiments. The examples include a wearable electronic device comprising: a first connector, a second connector, and a third connector; a flexible printed circuit; a first battery pack operatively coupled to the flexible printed circuit utilizing the first connector; a second battery pack operatively coupled to the flexible printed circuit utilizing the second connector; a main logic board operatively coupled to the flexible printed circuit utilizing the third connector; a first protection circuit module disposed in the first battery pack and configured to selectively enable and disable power output from the first battery pack; a second protection circuit module disposed in the second battery pack and configured to selectively enable and disable power output from the second battery pack; and a sensing circuit disposed along the flexible printed circuit and the main logic board and comprising one or more sensing signal paths, the one or more sensing signal paths passing through the first connector, the second connector, and the third connector. Each of the three connectors is used to couple a first protection circuit module and a second protection circuit module, wherein the first battery pack provides a first sensing signal on the sensing circuit and the second battery pack is configured to provide a second sensing signal on the sensing circuit, and when the first protection circuit module detects the second sensing signal on the sensing circuit, the first protection circuit module enables power output from the first battery pack, and when the first protection circuit module fails to detect the second sensing signal on the sensing circuit, the first protection circuit module disables power output from the first battery pack, and when the second protection circuit module detects the first sensing signal on the sensing circuit, the second protection circuit module enables power output from the second battery pack, and when the second protection circuit module fails to detect the first sensing signal on the sensing circuit, the second protection circuit module disables power output from the second battery pack.

In another example, the main logic board is disposed in the front of the wearable electronic device, the front being configured to be positioned close to the user's face or forehead when the wearable electronic device is worn by the user. In another example, at least a portion of the flexible printed circuit is disposed in the front of the wearable electronic device. In another example, the first battery pack and the second battery pack are disposed in the left and right sides of the wearable electronic device, respectively, the left side being positioned close to the left side of the user's head when the wearable electronic device is worn by the user, and the right side being positioned close to the right side of the user's head when the wearable electronic device is worn by the user. In another example, the first connector is positioned close to the junction between the front and the left side and the second connector is positioned close to the junction between the front and the right side. In another example, the wearable electronic device further includes one or more field effect transistors (FETs) in each of the first protection circuit module and the second protection circuit module. In another example, the one or more sensing signal paths are low power paths. In another example, each of the protection circuit modules includes logic configured to implement state awareness of connector integrity. In another example, the wearable electronic device further includes a main power bus distributed on the flexible printed circuit and the main logic board, wherein power from the first battery pack and the second battery pack is output from the corresponding first protection circuit module and the second protection circuit module to the main power bus. In another example, the wearable electronic device is implemented in a head-mounted display device.

Another example includes an assembly configured for use in an electronic device, comprising: an intermediate circuit subassembly including a flexible printed circuit or a printed circuit board; a first battery pack including a first group of one or more battery cells and a first protection circuit module, the first protection circuit module being configured to switch power on and off from the first battery pack; a second battery pack including a second group of one or more battery cells and a second protection circuit module, the second protection circuit module being configured to switch power on and off from the second battery pack; a power bus disposed in the intermediate circuit subassembly; and a first connector configured to operatively couple the first battery pack to a first terminal. The first protection circuit module and the second protection circuit module are each configured to verify the following as a condition to be met before output power to the power bus is connected: at the first connector, electrical continuity is established between the first battery pack and the intermediate circuit subassembly, and at the second connector, electrical continuity is established between the second battery pack and the intermediate circuit subassembly.

In another example, the assembly further includes: a main logic circuit subassembly including a second flexible printed circuit or a second printed circuit board; and a third connector configured to operatively couple the intermediate circuit subassembly to the main logic circuit subassembly and provide at least one electrical connection between a portion of the power bus on the intermediate circuit subassembly and a portion of the bus disposed on the main logic circuit subassembly, wherein electrical continuity is established between the intermediate circuit subassembly and the main logic circuit subassembly at the third connector as a condition to be satisfied before power output to the power bus is connected. In another example, each of the battery cells in each of the first and second battery packs supplies a rated voltage, and the battery cells are arranged in a parallel configuration such that the power bus operates at the rated voltage when the assembly is energized. In another example, verification at each of the first and second protection circuit modules is performed by receiving a sense signal from the other battery pack on a sense circuit having a signal path including each of the first, second, and third connectors, the sense signal being received when each of the subassemblies is properly assembled at the corresponding first, second, and third connectors. In another example, the sensing signal is generated when the first battery pack and the second battery pack are coupled to an external charger. In another example, the assembly further includes a controller disposed in the main logic circuit subassembly, the controller configured to control operation of the sensing circuit. In another example, the controller is configured to maintain awareness of a connector state for each of the first connector, the second connector, and the third connector.

Another example includes a method of assembling a subassembly that can be used in an electronic device, the method comprising: using a first connector to electrically connect a first battery pack to an intermediate circuit subassembly including one or more of a first flexible printed circuit or a first printed circuit board, the first battery pack including a first protection circuit module and a first group of one or more battery cells; using a second connector to electrically connect a second battery pack to the intermediate circuit subassembly, the second battery pack including a second protection circuit module and a second group of one or more battery cells; using a third connector to electrically connect the intermediate circuit subassembly to a main logic circuit subassembly, the main logic circuit subassembly including one or more of a second flexible printed circuit or a second printed circuit board; attempting to power on the main logic circuit subassembly; and if power on is unsuccessful, disconnecting and reconnecting one or more of the first connector, the second connector, and the third connector, and reattempting power on, wherein each of the first protection circuit module and the second protection circuit module is configured to: sense a state of connection integrity at each of the first connector, the second connector, and the third connector, and enable power on when the connection integrity at each of the first connector, the second connector, and the third connector is verified by each of the first protection circuit module and the second protection circuit module.

In another example, the first protection circuit module and the second protection circuit module sense a status of connector integrity via a sensing circuit disposed along the intermediate circuit subassembly and the main logic circuit subassembly, the sensing circuit including one or more sensing signal paths coupling the first protection circuit module and the second protection circuit module through each of the first connector, the second connector, and the third connector. In another example, the method further includes observing a code or message indicating a status of connection integrity in the assembled subassembly.

The technical solutions described above are provided by way of illustration only and should not be construed as limiting. Various modifications and changes may be made to the technical solutions described herein without following the illustrated and described example configurations and applications, and without departing from the true spirit and scope of the present invention as set forth in the appended claims.

Claims (10)

1. A wearable electronic device, comprising: First connector, second connector, and third connector; Flexible printed circuits; The first battery pack is operatively coupled to the flexible printed circuit via the first connector; The second battery pack is operatively coupled to the flexible printed circuit via the second connector; The main logic board is operatively coupled to the flexible printed circuit via the third connector; A first protection circuit module is disposed in the first battery pack and configured to selectively enable and disable power output from the first battery pack; A second protection circuit module is disposed in the second battery pack and configured to selectively enable and disable power output from the second battery pack; and A sensing circuit is disposed along the flexible printed circuit and the main logic board, and includes one or more sensing signal paths that couple the first protection circuit module and the second protection circuit module through each of the first connector, the second connector, and the third connector. The first battery pack provides a first sensing signal on the sensing circuit, and the second battery pack is configured to provide a second sensing signal on the sensing circuit. When the first protection circuit module detects the second sensing signal on the sensing circuit, the first protection circuit module enables power output from the first battery pack; and when the first protection circuit module fails to detect the second sensing signal on the sensing circuit, the first protection circuit module disables power output from the first battery pack. When the second protection circuit module detects the first sensing signal on the sensing circuit, the second protection circuit module enables the power output from the second battery pack, and when the second protection circuit module fails to detect the first sensing signal on the sensing circuit, the second protection circuit module disables the power output from the second battery pack. 2. The wearable electronic device of claim 1, wherein the main logic board is disposed in the front portion of the wearable electronic device, the front portion being configured to be positioned close to the user's face or forehead when the wearable electronic device is worn by the user. 3. The wearable electronic device of claim 2, wherein at least a portion of the flexible printed circuit is disposed in the front portion of the wearable electronic device. 4. The wearable electronic device according to claim 1, wherein the first battery pack and the second battery pack are respectively disposed in the left side and right side of the wearable electronic device, wherein when the wearable electronic device is worn by a user, the left side is positioned close to the left side of the user's head, and when the wearable electronic device is worn by the user, the right side is positioned close to the right side of the user's head. 5. The wearable electronic device of claim 4, wherein the first connector is positioned near the junction between the front portion and the left side portion of the wearable electronic device, and the second connector is positioned near the junction between the front portion and the right side portion. 6. The wearable electronic device of claim 1, further comprising one or more field-effect transistors (FETs) in each of the first and second protection circuit modules. 7. The wearable electronic device of claim 1, wherein the one or more sensing signal paths are low-power paths. 8. The wearable electronic device of claim 1, wherein each of the protection circuit modules includes state awareness logic configured to implement connector integrity. 9. The wearable electronic device according to claim 1 further includes a main power bus distributed on the flexible printed circuit and the main logic board, wherein power from the first battery pack and the second battery pack is output to the main power bus from corresponding first protection circuit modules and second protection circuit modules. 10. The wearable electronic device according to claim 1, wherein the wearable electronic device is implemented in a head-mounted display device.