HK1245453B - Apparatus and scheme for io-pin-less calibration or trimming of on-chip regulators - Google Patents

Description

Device and solution for IO pinless calibration or fine-tuning of on-chip regulator

Cross-application of related applications

This application claims priority to U.S. non-provisional patent application No. 14/820,380, filed on August 6, 2015, entitled “Apparatus and Scheme for IO-Pin-Less Calibration or Trimming of On-Chip Regulators,” which is incorporated herein by reference in its entirety.

Technical Field

The present invention generally relates to a system and method for pinless calibration or trimming of an on-chip I/O regulator, and in a specific embodiment, to a system and method for pinless calibration or trimming of an on-chip low dropout voltage regulator (OCLDO).

Background Art

Many mobile devices use multi-core or multi-processor systems for high performance and low power operation. These mobile devices have many power domains on the chip, and on-chip low dropout voltage regulators (LDOs) are widely used to supply these power domains.

Summary of the Invention

According to an embodiment of the present invention, a method for controlling a power supply voltage includes: providing a first periodic signal by providing a reference voltage to an oscillator, providing a second periodic signal by providing the power supply voltage (V _out ) of a voltage source to the oscillator, providing a first count by measuring a first period of the first periodic signal, providing a second count by measuring a second period of the second periodic signal, and comparing the first count with the second count.

According to another embodiment of the present invention, a circuit includes: an oscillator for providing a first periodic signal from a first incoming signal and a second periodic signal from a second incoming signal; a counter for counting a first period of the first periodic signal and a second period of the second periodic signal; and a comparator for comparing the first count with the second count.

According to another embodiment of the present invention, a chip includes: a first processing unit, a first on-chip low dropout voltage regulator (OCLDO) that provides an output voltage for the first processing unit, and a voltage control circuit electrically connected to the first processing unit and the first OCLDO, wherein the voltage control circuit is used to control the output voltage of the OCLDO and does not provide a signal to a pin of the chip.

BRIEF DESCRIPTION OF THE DRAWINGS

For a more complete understanding of the present invention and its advantages, reference is now made to the following description taken in conjunction with the accompanying drawings, in which:

FIG1 shows a voltage measurement circuit according to an embodiment;

FIG2 shows a ring oscillator according to an embodiment;

FIG3 shows a clock signal provided by a ring oscillator according to one embodiment;

FIG4 shows a digital frequency counter according to an embodiment; and

FIG5 shows a method for measuring a voltage signal according to an embodiment.

DETAILED DESCRIPTION

Conventional on-chip LDOs (or OCLDOs) present the following problem: how to test the output signals of these OCLDOs without routing them out of the chip along a specific route. For example, when the output signal of an LDO (e.g., IDLE_OCLDO) is not controlled, the accuracy of the output signal is significantly affected, and the chip energy saving is correspondingly affected. Providing one or more additional pins requires real substrate space, which is not allowed by existing scale. Alternatively, there are many advantages to using available pins, not just providing test functions. However, without testing and calibration, the accuracy of the voltage regulator becomes unacceptable due to its high power consumption. An embodiment of the present invention provides a pinless measurement, control, and calibration circuit for a voltage regulator. An embodiment of the present invention also provides a method for measuring, controlling, and calibrating a voltage regulator.

The power consumption of a (battery-powered) chip may need to be controlled to provide efficient power management. A chip typically uses a voltage regulator to provide a specific voltage domain. The chip may operate most efficiently at a specific operating point or operating range. These operating points/operating ranges may depend on the supply voltage and other environmental parameters, such as the chip's temperature and load. To operate the chip more accurately and efficiently, the supply voltage of the voltage regulator, among other parameters, may need to be controlled and adjusted as needed.

Modern chips may include multiple processors, each of which may include multiple execution units (cores) or controllers and may require several voltage domains. Voltage regulators provide these voltage domains, and each voltage regulator may need to be controlled, adjusted, calibrated, or fine-tuned.

In some embodiments, the voltage regulator is a capless on-chip LDO (OCLDO), and the measurement circuit is a pinless measurement or control circuit. Therefore, no additional pins are required for fine-tuning or calibration of the capless OCLDO. In other words, no additional pins are required to control, measure, calibrate, and fine-tune the voltage regulator.

FIG1 shows an integrated chip (IC) 100 including a controller 105, a voltage regulator (e.g., OCLDO) 110, and a voltage control or measurement circuit 115. The voltage control circuit 115 includes an oscillator such as a ring oscillator 120, a selector 130, a first counter 140, a second counter 150, a comparator 160, and another selector 170. The controller 105 may be part of a calibration circuit that calibrates the supply voltage (output voltage) of the voltage regulator 110. The controller 105 may calibrate or fine-tune the voltage regulator 110 so that the operating range or operating point of the IC 100 is accurately set and controlled regardless of process, temperature, power supply, and load variations.

The voltage regulator 110 may have three terminals. A first terminal may provide an unregulated input voltage V _DDIN , a second terminal may provide a reference voltage, and a third terminal may provide a regulated output (power supply voltage) V _OUT . The oscillator 120 may have at least two terminals. The first terminal may be an input terminal that can be connected to an output terminal of the voltage regulator 110 via a selector 130 or to a reference voltage V _REF , also via the selector 130. The second terminal may be an output terminal that can provide an output signal including a cyclic or periodic signal, such as a voltage having a certain frequency.

Selector 130 may be a multiplexer (MUX). Alternatively, the selector may be a switch or a combination of switches. The MUX may selectively connect the output terminal of voltage regulator 110 to oscillator 120 or the reference voltage V _REF to oscillator 120. Optionally, when switch S2 is closed and switch S1 is open, oscillator 120 is connected to the output terminal of voltage regulator 110 and provided with output voltage V _OUT . When switch S2 is open and switch S1 is closed, oscillator 120 is connected to the reference voltage input terminal and provided with reference voltage V _REF . The switches may be switched such that the reference voltage is connected to oscillator 120 during a first time period and to the output voltage of voltage regulator 110 during a second time period. These time periods may not overlap.

Switches S1 and S2 may be the same or different. Switches S1, S2 may be semiconductor switches or other suitable types of switches. However, these devices are for illustration purposes and other selection devices may be used.

The output terminal of oscillator 120 is connected to counters 140 and 150. Counters 140 and 150 can be two counters or a single integrated counter. The output terminal of oscillator 120 can be connected to counters 140 and 150 via another selector 170. Selector 170 can be a demultiplexer (DEMUX). Alternatively, another selector 170 can be a switch or a combination of switches. Similar to input selector 130, output selector 170 can include a first switch and a second switch. These switches can be the same or different. These switches can be semiconductor switches or other suitable types of switches. However, these devices are for illustrative purposes, and other selection devices can be used.

Oscillator 120 provides an analog output signal having a cyclic or periodic signal, such as a voltage having a certain frequency. This frequency may depend on the voltage applied to the input terminal of oscillator 120. The higher the input voltage, the higher the frequency of the output of oscillator 120, while the lower the input voltage, the lower the frequency of the output voltage of oscillator 120. When selector 130 (e.g., switch S1 is closed) connects the reference terminal (V _REF ) to oscillator 120, selector (e.g., DEMUX) 170 may connect the output terminal of oscillator 120 to the input terminal of first counter 140. When selector (e.g., second switch S2 is closed) connects the output voltage (V _OUT ) of voltage regulator 110 to oscillator 120, selector (e.g., DEMUX) 170 may connect the output terminal of oscillator 120 to the second counter 150.

Counters 140 and 150 may be digital counters that count the frequency of the analog output signal of oscillator 120 and provide digital output signals, such as n-bit numbers. These numbers are compared in comparator 160. If the numbers match, for example, if they meet a predetermined value, the corresponding input voltage V _DDIN is recorded. Comparator 160 may provide an output signal based on a pass/fail analysis. The output signal of comparator 160 may be provided to controller 105. Controller 105 may control the input signal (V _DDIN ) provided to voltage regulator 110. If the compared numbers do not match the input voltage, V _DDIN is adjusted, for example, by being lowered. Based on the output voltage (V _OUT ) of voltage regulator 110, the output frequency of oscillator 120 is remeasured by counter 150 and compared to reference voltage V _REF at comparator 160. This process is iterated until the output numbers of counters 140 and 150 match.

Matching can include a range. In practice, oscillator 120 and counters 140 and 150 perform an analog-to-digital conversion (ADC). A portion of the ADC is quantized into a continuous range. X is mapped to a lower set of numbers within range Y, and the quantization error (resolution), typically in bits, depends on the design and its specifications. For example, an 8-bit design can provide 100mV resolution, while a 16-bit design can provide 10mV resolution. Since the input to comparator 160 is digital, it is similar to an n-bit number. In other words, the "match" of comparator 160 can depend on the resolution of oscillator 120 and counters 140 and 150. Therefore, a match (or, in fact, a pass) can mean that the measured V _OUT is within 200mV or 500mV of the reference voltage V _REF . Alternatively, a match can mean that the measured V _OUT is within 20mV or 50mV of the reference voltage V REF.

The different components of circuit 100 (voltage regulator 110, oscillator 120, counters 140, 150, etc.) can be connected by wires or a bus system. In some embodiments, these components can be directly connected to each other without any intermediate components.

The voltage regulator 110 can be a low dropout linear regulator (LOD) or a standard linear regulator. In other embodiments, the voltage regulator 110 includes other regulators. The LDO can regulate the output voltage from a higher voltage input. The LDO may require a smaller voltage across the regulator to maintain regulation.

Oscillator 120 may be a ring oscillator. In other embodiments, the oscillator includes an RC oscillator or an LC oscillator. FIG2 illustrates an embodiment of ring oscillator 120. Ring oscillator 120 may be a multi-stage ring oscillator. Ring oscillator 120 includes an odd number of inverters connected in series to form a closed loop with positive feedback. In some embodiments, ring oscillator 120 may include three stages, including a first inverter 202, a second inverter 204, and a third inverter 206. All inverters 202 through 206 are powered by a power supply voltage _VDD , or in implementations, by _VREF or _VOUT . The output terminal of first inverter 202 is connected to the input terminal of second inverter 204, and the output terminal of second inverter 204 is connected to the input terminal of third inverter 206. The output signal of the last inverter 206 is fed back to first inverter 202.

When power is supplied to ring oscillator 120, the output terminal of third inverter 206 provides a frequency signal, such as a clock signal CLK. The oscillation frequency of signal CLK depends on power supply voltage _VDD . FIG3 illustrates an exemplary clock signal CLK provided at the output terminal of oscillator 120. The clock signal may include any other periodic or cyclic signal, such as a sinusoidal signal. In some embodiments, ring oscillator 120 includes a NAND or NOR element.

Counters 140 and 150 may be digital frequency counters. In other embodiments, counters 140 and 150 may be analog counters, timers, or other devices that count the frequency of a cyclic signal. FIG4 illustrates an embodiment of a digital frequency counter. Digital frequency counters 140 and 150 count the frequency output of an oscillator. The counter value directly corresponds to the frequency output of the oscillator.

A digital frequency counter can be based on the principle of counting the zero crossings of a (continuous) signal. In alternative embodiments, other principles can be used to count a continuous or periodic signal (e.g., frequency). The digital frequency counter can include a mixer, an internal or external local oscillator frequency, one or more multipliers, and a digital counter. The counter in Figure 4 includes three input terminals and one output terminal. One of the input terminals receives the output signal of an oscillator, such as oscillator 120. The other input terminals can be used for resetting and starting/stopping. The output terminal can provide a number, such as an n-bit number.

Comparator 160 can be an n-bit comparator. For example, the n-bit comparator can compare the output of a digital frequency counter. If the two values of the counter output are the same, a "1" is output, and if the two values are different, a "0" is output. The output signal (logic signal) of the comparator can be routed to controller 105. Controller 105 can store the relevant voltage (the input voltage (V _DDIN ) of voltage regulator 110) in an on-chip register or memory. In some embodiments, the relevant voltage can be routed to the outside of the chip (IC) via any multiplexed digital signal pin for monitoring on a tester.

In some embodiments, the control circuit 115 can be dynamically connected to multiple voltage regulators (e.g., LDOs) on the chip (IC) 100. Thus, the control circuit 115 can control multiple LDOs. For example, a first LDO that provides a first voltage to a first voltage domain is connected to the control circuit 115 (via a switch, etc.) during a first time period, where the control circuit 115 measures and compares the output voltage of the first LDO. Subsequently, a second LDO that provides a second voltage to a second voltage domain is connected to the control circuit 115 via a second switch, etc., during a second time period, where the control circuit 115 measures and compares the output voltage of the second LDO, and so on. In some embodiments, the control circuit 115 can be implemented in software, hardware, or a combination of software and hardware.

Control circuit 115 may not include I/O pins. Voltages may be tested and controlled within chip (IC) 100 without routing test signals (through I/O pins) off the chip.

In other embodiments, circuit 115 can be used to test mode on-chip signals. For example, circuit 115 can be modified by replacing on-chip LDO 110 with an on-chip voltage regulator (IVR) or an on-chip switch-mode power supply (SMPS). Circuit 115 can be used to measure or test any reference voltage, such as a bandgap reference voltage or any voltage domain. This architecture offers the following advantages: reduced test costs and simplified system.

The circuit 100 can be integrated with other devices or components and placed as a module or component in a smartphone, a mobile device, a battery-powered mobile device, a battery-powered wearable device, a portable device, or a wireless device, to name a few.

FIG5 illustrates a method 500 for calibrating and fine-tuning the output voltage of a voltage regulator, such as a low dropout voltage regulator (LDO) or an on-chip LDO (OCLDO). The process begins with a first step 502 where an oscillator, such as a ring oscillator, is connected to the output voltage (V _OUT ) of the voltage regulator via a selector (e.g., a multiplexer, a switch, etc.). For example, switch S2 disconnects the oscillator from the output terminal of the voltage regulator, while switch S1 connects the oscillator to a reference terminal providing a reference voltage (V _REF ). The oscillator generates an output frequency based on the reference voltage (V _REF ). At the next step 504, the output frequency of the oscillator is measured by a first counter, such as a first digital counter. The first counter provides a first count (e.g., an n-bit number) of the output frequency of the oscillator to a comparator.

At the next step 506, the oscillator is switched so that the reference voltage is disconnected from the reference voltage terminal and connected to the output voltage terminal of the voltage regulator. For example, the oscillator is disconnected from the reference voltage terminal via switch S1 and connected to the output voltage terminal of the voltage regulator via switch S2. The oscillator then operates based on the input voltage ( _VOUT ) of the voltage regulator and provides a second output frequency. The higher the input voltage provided to the oscillator (the output voltage of the voltage regulator), the higher the output frequency of the oscillator, while the lower the input voltage, the lower the output frequency of the oscillator. The second output frequency is measured again, this time using a second counter, such as a second digital counter. This is shown in process step 508. A second count (e.g., another n-bit number) of the measured second output frequency is provided to the comparator.

Next, the comparator compares the two counts in decision block 510. When the first count and the second count are the same, the input V _DDIN provided to the voltage regulator is recorded in step 512. When the first count and the second count are different, the input voltage V _DDIN is adjusted in step 514. When the input voltage V _DDIN is adjusted (e.g., decreased), the second counter remeasures the oscillator frequency of the input voltage V _DDIN and forwards the second count to the comparator, which recompares the first count (based on the reference voltage V _REF ) with the second count (based on the output voltage V _OUT of the voltage regulator). When the first count and the second count match, the input voltage V _DDIN is recorded; when the two counts do not match, the process iterates through processing/decision blocks 508 / 510 until the two values match.

Although the present invention has been described with reference to illustrative embodiments, this description is not intended to limit the invention. Various modifications and combinations of the illustrative embodiments, as well as other embodiments of the invention, will become apparent to those skilled in the art upon reference to this description. Accordingly, the appended claims are intended to cover any such modifications or embodiments.

Claims (6)

1. A method for controlling power supply voltage, characterized in that the method comprises: A first periodic signal is provided by providing a reference voltage to the oscillator, and a first count is provided by measuring the first periodic signal. A second periodic signal is provided by supplying a power supply voltage (VOUT) to the oscillator, and a second count is provided by measuring the second period of the second periodic signal; wherein the voltage source is a voltage regulator; and Compare the first count with the second count; When the first count matches the second count, the input voltage of the voltage regulator is stored; When the first count and the second count do not match, adjust the input voltage of the voltage regulator; The method further includes: A second cycle signal is provided by supplying another output voltage from another voltage source to the oscillator; A second count is provided by measuring another second cycle of the second cycle signal; and The first count is compared with the second count. 2. The method according to claim 1, wherein adjusting the input voltage of the voltage regulator includes reducing the input voltage. 3. The method according to claim 1, wherein the voltage regulator is an on-chip low dropout voltage regulator (OCLDO). 4. The method according to claim 1, wherein the oscillator is a ring oscillator. 5. A circuit, characterized in that it comprises: An oscillator is used to provide a first-period signal from a first input signal and a second-period signal from a second input signal; A counter is used to count the first period of the first periodic signal and the second period of the second periodic signal; and A comparator is used to compare the first count with the second count; A voltage regulator, wherein the voltage regulator is configured to receive an input signal and provide a second input signal, the second input signal being a voltage output signal; A first selector is configured to: provide the first input signal to the oscillator and not provide the voltage output signal to the oscillator during a first time period, and provide the voltage output signal to the oscillator and not provide the first input signal to the oscillator during a second time period; the first input signal is a reference signal (VREF). A second selector is used to provide the first period signal to the first counter and the second period signal to the second counter; A controller connected to the comparator, wherein the controller adjusts the input signal when the first count and the second count do not match, and the controller stores the input signal when the first count and the second count match. 6. A chip, characterized in that it comprises: First processing unit; A first on-chip low dropout voltage regulator (OCLDO) provides the output voltage to the first processing circuit; and A voltage control circuit electrically connected to the first processing unit and the first on-chip low dropout voltage regulator, wherein the voltage control circuit is used to control the output voltage of the first on-chip low dropout voltage regulator, and the voltage control circuit does not provide signals to the pins of the chip; The voltage control circuit includes a ring oscillator, a digital counter, and a comparator, wherein the ring oscillator is used to: provide a first periodic signal based on a reference signal, and provide a second periodic signal based on the output voltage of the first on-chip low-dropout voltage regulator; the first digital counter is used to provide a first digital signal based on the first periodic signal; the second digital counter is used to provide a second digital signal based on the second periodic signal; and the comparator is used to compare the first digital signal with the second digital signal. Second processing unit; A second on-chip low dropout voltage regulator (OCLDO) provides a second voltage to the second processing unit; and Selector, wherein the voltage control circuit is selectively electrically connected to the first processing unit and the first on-chip low-dropout voltage regulator or the second processing unit and the second on-chip low-dropout voltage regulator, the voltage control circuit being used to control the output voltage of the first on-chip low-dropout voltage regulator or the output voltage of the second on-chip low-dropout voltage regulator.