HK1135797B - Low forward voltage drop transient voltage suppressor and method of fabricating - Google Patents

Description

Low forward voltage drop transient voltage suppressor and method of making same

Cross Reference to Related Applications

This application claims priority to provisional application No.60/805689 filed 2006, 6, 23, § 119, hereby incorporated herein by reference in its entirety.

Background

The invention relates to a low forward voltage drop transient voltage suppressor and a method of manufacturing the same.

Schottky rectifiers typically have special barrier metal contacts within the device to achieve a low forward voltage drop, and are widely used in circuits to conduct forward current without significant conduction power loss. However, since the characteristics of metal barrier and barrier are degraded at high surface electric fields, schottky rectifiers have long been criticized as being serious barrier lowering devices with strong surface electric fields due to their high reverse leakage at rated reverse voltages, especially for low barrier height and low reverse voltage schottky devices. On the other hand, PN structure diodes generally have lower reverse leakage performance than schottky diodes. Therefore, due to the nature of the built-in potential in the PN junction in the device, the disadvantage of high forward voltage drop cannot be avoided even at low current densities. The application of rectifiers then becomes a compromise decision for circuit designers limited by forward conduction losses or reverse power losses.

As a result, in applications such as hard disk control circuit design, for example, a higher voltage rated schottky rectifier and a lower reverse voltage rated Transient Voltage Suppressor (TVS) are connected in parallel to achieve a low forward voltage drop (polarity protection) while preventing reverse surge at both ends. The presence of the schottky device is primarily for polarity protection to ensure the connection across the terminals in the correct direction by its low forward voltage drop. However, such a circuit is expensive to manufacture due to the need for two actual devices in the control circuit, namely a schottky rectifier and a reverse voltage rated TVS (transient voltage suppressor). Accordingly, it would be desirable to make improvements in the art to reduce the cost of such devices.

In view of the above, it is a primary object, feature, or advantage of the present invention to improve over the state of the art.

It is another object, feature, or advantage of the present invention to provide a low forward voltage drop transient voltage suppressor and method of making the same.

Another object, feature, or advantage of the present invention is a low reverse leakage device and method for a low rated reverse breakdown voltage schottky rectifier.

It is another object, feature, or advantage of the present invention to provide a low barrier height and low reverse leakage device and method for a schottky rectifier.

Another object, feature, or advantage of the present invention is to provide a high current rated schottky rectifier.

It is another object, feature, or advantage of the present invention to provide a low forward voltage drop transient voltage suppressor and method of making the same that utilizes a unipolar diode to reduce the forward voltage gap (voltage gap) of a bipolar diode.

It is another object, feature, or advantage of the present invention to provide a low forward voltage drop transient voltage suppressor that is inexpensive to manufacture, robust, and efficient to operate.

It is another object, feature, or advantage of the present invention to provide a method of making an improved low forward voltage drop transient voltage suppressor.

One or more of these and/or other features or advantages of the present invention will become apparent from the following description and claims. It is to be understood that no single embodiment is necessarily required to exhibit all or any of these objects, features or advantages.

Disclosure of Invention

A low forward voltage drop transient voltage suppressor is comprised of a low reverse voltage rated PN diode and a high reverse voltage rated Schottky rectifier electrically connected in parallel with the PN diode in a single integrated circuit device.

According to another feature, the invention consists of a circuit electrically connected to a suppressor for protecting the circuit from reverse polarity and reverse power surges.

According to another feature of the invention, the hard disk assembly is electrically connected to the circuit such that the transient voltage suppressor electrically protects the hard disk.

According to another feature of the present invention, the voltage suppressor is a schottky rectifier combined with a P-I-N schottky rectifier.

According to another feature of the present invention, the schottky rectifier has a P region primarily for carrier injection during forward bias.

According to another feature of the invention, the schottky rectifier has a PN diffusion profile for voltage control and surge protection.

According to another feature of the present invention, the integrated circuit device is constructed on a silicon substrate.

According to another feature of the present invention, the substrate has an implant doping.

According to another feature of the invention, the PN diode has an enlarged guard ring that dominates reverse voltage performance due to the electric field at the junction region of the PN diode away from the die surface of the transient voltage suppressor.

According to another feature of the invention, the transient voltage suppressor is constructed using first and second epitaxial layers with high resistance epitaxy for forming schottky barriers, but the voltage rating of the suppressor is derived from the PN interface of the first epitaxial layer.

According to another feature of the present invention, the concentration of the first epitaxial layer is higher than the concentration of the second epitaxial layer.

According to another feature of the present invention, the transient voltage suppressor is constructed using a punch through design (punch through design) of a PN diode by a base region (base) compression, wherein the schottky rectifier has a longer base width than the PN diode.

According to another feature of the invention, the transient voltage suppressor of the schottky rectifier has the reverse voltage rating of the PN diode connected in parallel so that the surface electric field of the schottky will be much lower than the critical field of the PN diode when the PN diode is in breakdown state.

The method of the invention comprises the following steps: a PN diode with low reverse rated voltage is formed on a substrate, and a Schottky rectifier with high reverse rated voltage electrically connected with the PN diode in parallel is formed on the substrate.

According to another feature of the above method, the voltage suppressor is packaged for automatic placement in the circuit.

According to another feature of the method, first and second epitaxial layers are formed within the suppressor to have a high resistance epitaxy for the schottky rectifier, the suppressor generating a voltage rating from a PN interface with the first epitaxial layer.

According to the method of the present invention, the suppressor is fabricated using a punch-through design of the PN diode such that the schottky rectifier has a base width that is longer than the base width of the PN diode, wherein the punch-through design utilizes base width compression.

According to another method of the invention, the schottky rectifier is formed to have a higher reverse voltage than that of the parallel connected PN diodes.

According to another feature of the invention, the transient voltage suppressor is configured such that the suppressor has forward conduction through the schottky rectifier at low current densities and reverse breakdown is controlled only by the PN diode.

Drawings

Fig. 1 is a screen display showing a cross-sectional view of a low reverse leakage schottky (left), the SRP curve of the schottky (center), and the low reverse voltage rating PN (right).

Fig. 2 is a screen display showing schottky under reverse bias when the PN diode breaks down. For Schottky, the critical electric field occurs at the bottom of the PN junction (Ec 4.5e5V/cm, in the middle), and the surface field of the Schottky barrier is only about 1/3 of Ec (bottom, Es 1.5e 5V/cm).

Fig. 3 shows the current lines that occur for schottky only when the device is under forward bias (left, VF < 0.7V) and through the PN junction when reverse bias is applied (right).

Fig. 4 is a screen display showing the performance (from left to right) and inverted I-V characteristics of MPS chips with 120, 180, and 240 minute drive-in times. As the drive-in time increases, the depth of the junction increases and the reverse voltage decreases.

Fig. 5 is a graph showing a comparison of reverse leakage between 13V and 50V schottky cells (simulations).

Fig. 6 shows a functional block diagram of an embodiment of the present invention having a high reverse voltage rated schottky rectifier electrically connected in parallel with a low reverse voltage rated transient voltage suppressor in a single IC device.

Fig. 7 through 14 illustrate one embodiment of a fabrication process for an integrated circuit of the present invention.

Detailed Description

The present invention provides a single integrated circuit TVS (transient voltage suppressor) that combines a low reverse voltage rated PN diode in parallel with a high reverse voltage rated schottky rectifier. The invention can be applied to STD (standard deviation) schottky products to prevent reverse leakage and increase the Tj (junction temperature of the device). Based on the test results, the present invention can be tested without failure by a Tj 150C HTRB (where Tj is the junction temperature of the device and HTRB is a high temperature reverse bias, which is a device qualification test method for reverse accelerated and aged devices). Typically, schottky rectifiers require a high barrier (BH > 770meV) and low concentration epitaxy with barrier heights in excess of 770 millielectron volts to pass the same Hi-rel test. The present invention can operate efficiently to protect control circuitry, such as but not limited to hard disk components or other applications where sensitive electronics need to be protected from voltage transients. The present invention protects a CMOS (complementary metal oxide semiconductor) integrated circuit from voltage spikes of both polarities with a specific low forward voltage drop for protection from undershoot.

In modern hard disk control circuit designs, a higher voltage rated schottky rectifier and a lower reverse voltage rated transient voltage suppressor are connected in parallel with discrete components to achieve low forward voltage drop polarity protection while preventing reverse surges across the circuit. The schottky rectifier is used primarily for polarity protection and the connection across the protection circuit is in the correct direction by its lower forward voltage drop. The present invention manufactures an improved integrated circuit device by merging all electrical characteristic requirements into a single module.

Generally, in a merged P-I-N schottky (MPS) rectifier, the P region is mainly used for carrier injection during forward bias to obtain better conduction performance. However, in the present invention, the P/N diffusion profile is used for reverse voltage control and surge protection of transient voltage suppressors of lower reverse voltage ratings. Higher VR (reverse voltage drop) schottky rectifiers use current conduction at low forward voltage drops as polarity protection devices. The present invention is used as a low VF (forward voltage drop) transient voltage suppressor device to protect the circuit as a polarity and reverse surge protection. The doping concentration of the device must be controlled within a certain range, preferably using implantation doping, to ensure that diffusion profiles and current conduction capabilities meeting the forward and reverse requirements can be achieved. Because the parallel-connected schottky rectifiers are designed to have a much higher rated reverse voltage performance than the transient voltage suppressor, the barrier height of the schottky rectifiers can be as low as possible to achieve the best forward performance and low current density without increasing the reverse leakage too much. Since the schottky diode is surrounded by the transient voltage suppressor, no additional termination design is required.

Construction and operation

Reduction of surface electric field

For most commercial schottky rectifiers, the chip surface is mostly covered by a metal barrier and surrounded by one or more termination designs such as PN guard rings or field plates at the edge. However, in the present invention, the diffusion depth and area of the PN guard ring is greatly increased and dominates the reverse voltage performance due to the critical electric field at the junction region of the PN interface away from the die surface.

The low reverse voltage of the PN rectifier can be achieved by methods such as using a double epitaxial layer with a higher concentration of epitaxial layer at the bottom or using a punch-through design of the PN diode by base width compression. The first method preserves the high resistance epitaxy to form the schottky barrier, but the voltage rating of the chip is determined by the PN interface of the bottom concentrated epitaxial layer. The second method allows the schottky rectifier to have a longer base width than the PN. Both methods achieve the same effect; the reverse voltage of the schottky must be higher than the parallel connected PN. Thus, the chip has forward conduction through the schottky rectifier at low current density (the metal barrier conducts current before the forward voltage drop reaches the PN built-in potential of 0.7V) and reverse breakdown is controlled by the PN junction.

The schottky rectifier has a higher reverse voltage rating than a parallel connected PN diode, and the surface electric field of the schottky will be much lower than the critical field of the PN diode when the PN diode breaks down. The barrier lowering phenomenon becomes insignificant and unexpectedly results in low reverse leakage current before the PN diode breaks down.

Voltage control

Fig. 1, 2 and 3 provide computer simulations of a first method using a double epitaxial layer with a higher concentration of epitaxial layer at the bottom. Fig. 1 shows the epitaxial construction and how the schottky rectifier is connected in parallel to the PN diode. Figure 2 shows the electric field simulation and SRP when the chip is under reverse bias. As shown in fig. 2, when the critical electric field in silicon occurs at the bottom of the PN junction (E)_c4.5E5), wherein E_cFor critical electric fields in silicon, the electric field on the schottky surface is only about E_c1/3 (E)_s，Schottky1.5E5), wherein E_sIs the surface electric field in silicon. FIG. 3 shows current lines for one embodiment of a chip when under forward bias (VF < 0.7V), where VF is the forward voltage drop and V is the reverse bias. The current lines obtained from the simulation clearly show the function of two diodes connected in parallel.

Fig. 4 shows voltage control using a second approach to the breakdown design of PN diodes by base width compression. With increasing drive-in time (1100C/120 min, 1100C/180 min, 1100C/240 min), the breakdown voltage dropped (43V, 34V, and 25V). The location of the critical electric field, the current flow under forward and reverse bias, and the lower electric field at the schottky surface are the same as in the first method except for voltage control.

Entire schottky area in one chip

The schottky barrier height and current density are the main concerns of the forward voltage drop performance of the present invention. In order not to affect surge performance, a safety guard band is used to reduce the schottky area to meet the forward voltage drop requirement at a specific current density.

Schottky rectifiers are considered to have higher reverse leakage performance than PN junction diodes due to the barrier properties. The leakage of schottky is proportional to the schottky area in the chip, so reducing the contact area of schottky is also an effective way to suppress the reverse leakage. The suppression of leakage comes not only from the reduction of the surface electric field but also from the reduction of the schottky contact area. It has also been found that by increasing the PN area by reducing the schottky area, the breakdown voltage is not affected and reverse leakage is greatly reduced.

Table 1 provides the results of measurements of samples prepared using the second method, in which breakdown voltage control was used. The samples had a chip size of 80mil by 80mil, and the specific voltage rating of the device was targeted at V_z@1mA ═ 14V, where Vz is the reverse voltage at which the reverse current is 1 mA. Table 1 illustrates the properties. It is clear from table 1 that the VF performance of this WS is very small due to the assistance of parallel connected schottky, and that VF @1A ═ 0.448 also breaks the inherent limit of built-in potential of PN junction of 0.7V.

TABLE 1

The samples in table 1 have the ability to IR @12V ═ 0.668uA and VF @1.0A ═ 0.448V

Evidence of improved leakage is seen by comparing the leakage of the schottky initial performance (50V schottky), the 13V schottky and the invention (schottky + PN). Fig. 5 shows a cell (unitcell) reverse leakage comparison obtained by simulation. From this data, it can be seen that the 13V Schottky has a 7.89e-12A/um reverse bias at 12V²Leakage (equal to 32.57uA for an 80mil chip), 50V Schottky has 8.03e-13A/um at the same reverse breakdown voltage²Leakage (equal to 3.31uA for an 80mil by 80mil chip).

The leakage of the conventional 13V schottky is 9.78 times higher than the 50V schottky under the same reverse bias (12V). By appropriately reducing the area of the schottky in this example, this example is 20.18% (0.668/3.31) of a conventional 50V schottky and only 2.05% (0.668/32.57) of a conventional 13V schottky when the leakage current is measured at 12V.

Fig. 7 to 14 show an example of a method of constructing the device of the present invention. In fig. 7, an EPI wafer is provided having an N-type substrate 22 and an N-type epitaxial layer having a resistivity of about 0.5 to 0.6Ohm-cm and a thickness of about 3.4 to 3.8 μm. In fig. 8, initial oxidation is performed, thereby forming initial oxide layers 24A, 24B. In fig. 9, ion implantation is performed to form a transient voltage suppression region (TVS) 26. Next, as shown in fig. 10, a boron drive-in step is performed to form Schottky (SKY) oxide 30. Next, an etching step, such as photolithography, is performed in fig. 11 to etch the oxide layer. In fig. 12, a cleaning step is carried out after sintering and a barrier layer 32, for example made of NiCr/Pt alloy, is applied. Next, as shown in fig. 13, Ti/Ni/Ag evaporation is performed, and additional etching may be performed to form terminals 36A, 36B and layer 34. The back side may be ground, metallized, or other conventional fabrication steps may be performed. Fig. 14 provides a side view of one embodiment of a single integrated circuit device 10 in which the transient voltage suppression feature 14 and the schottky feature 12 are provided in a single package.

While the invention has been shown and described with respect to the preferred embodiments, it should be understood that many modifications, substitutions, and additions may be made which are within the intended spirit and scope of the invention. The invention is not limited to the specific embodiments described, as variations in design methodology, dimensions, ratings and characteristics, application, and other variations are contemplated.

Claims (20)

1. A low forward voltage drop transient voltage suppressor comprising:

a PN diode of low reverse rated voltage; and

a high reverse voltage rated schottky rectifier electrically connected in parallel with said PN diode in a single integrated circuit device;

wherein the PN diode is configured to dominate reverse voltage performance such that forward conduction is through the Schottky rectifier at low current density while reverse breakdown is controlled by the PN diode.

2. The transient voltage suppressor of claim 1, further comprising a circuit electrically connected to the suppressor for protecting the circuit from reverse polarity and reverse power surges.

3. The transient voltage suppressor of claim 2, further comprising a hard disk assembly electrically connected to the circuit such that the transient voltage suppressor electrically protects the hard disk.

4. The transient voltage suppressor of claim 1 wherein said schottky rectifier is a merged P-I-N schottky rectifier.

5. The transient voltage suppressor of claim 4 wherein said Schottky rectifier has a P region primarily for carrier injection during forward bias.

6. The transient voltage suppressor of claim 4 wherein said Schottky rectifier has a P/N diffusion profile for reverse voltage control and surge protection.

7. The transient voltage suppressor of claim 1 wherein said integrated circuit device is constructed on a silicone substrate.

8. The transient voltage suppressor of claim 7, wherein said substrate has an implant doping.

9. The transient voltage suppressor of claim 1, wherein said PN diode has an enlarged guard ring that dominates reverse voltage performance due to an electric field at a junction region of said PN diode away from a die surface of said transient voltage suppressor.

10. The transient voltage suppressor of claim 1 wherein said transient voltage suppressor is constructed using first and second epitaxial layers having high resistance epitaxy for forming a schottky barrier, but the voltage rating of said suppressor is derived from the PN interface of said first epitaxial layer.

11. The transient voltage suppressor of claim 10, wherein a concentration of the first epitaxial layer is higher than a concentration of the second epitaxial layer.

12. The transient voltage suppressor of claim 1 wherein said transient voltage suppressor is constructed using a punch-through design of a PN diode by base width compression, wherein said schottky rectifier has a longer base width than said PN diode.

13. The transient voltage suppressor of claim 1 wherein said schottky rectifier has a higher reverse voltage rating than a parallel connected PN diode such that the surface electric field of said schottky will be much lower than the critical field of said PN diode when said PN diode is in a breakdown state.

14. A single chip low forward voltage drop transient voltage suppressor comprising: a PN diode having a PN junction; and a schottky rectifier electrically connected in parallel with said PN diode, wherein said PN diode is configured to dominate reverse voltage performance such that forward conduction is performed through said schottky rectifier at low current density, while reverse breakdown is controlled by said PN junction.

15. A method of making a low forward voltage drop transient voltage suppressor comprising the steps of:

forming a PN diode with low reverse rated voltage on a substrate; and

forming a high reverse rated voltage schottky rectifier electrically connected in parallel with the PN diode on the substrate;

wherein the PN diode is configured to dominate reverse voltage performance such that forward conduction is through the Schottky rectifier at low current density while reverse breakdown is controlled by the PN diode.

16. The method of claim 15, further comprising packaging the voltage suppressor for automatic placement of the voltage suppressor in a circuit.

17. The method of claim 15, further comprising forming first and second epitaxial (epi) layers within the suppressor to have a high resistance epi for the schottky rectifier, the suppressor generating a voltage rating from a PN interface with the first epi.

18. The method of claim 15, wherein a suppressor is fabricated using a punch-through design of the PN diode such that the schottky rectifier has a base width that is longer than a base width of the PN diode, wherein the punch-through design utilizes base width compression.

19. The method of claim 15, wherein the schottky rectifier is formed to have a higher reverse voltage than a reverse voltage of a parallel connected PN diode.

20. The method of claim 15 wherein the transient voltage suppressor is configured such that the suppressor has forward conduction through the schottky rectifier at low current density, while reverse breakdown is controlled only by the PN diode.