HK1125489B - Schottky diode and method therefor - Google Patents

Description

Schottky diode and forming method thereof

Technical Field

The present invention relates generally to electronic devices and, more particularly, to methods and structures for forming semiconductor devices.

Background

In the past, the semiconductor industry utilized various methods and structures to form schottky diodes. Due to the increasing ability to integrate various components on a single integrated circuit, it is desirable to integrate schottky diodes with other semiconductor components on a semiconductor substrate. Examples of such schottky diodes are provided in U.S. patent No. 5,418,185 issued to Todd et al on 23.5.1995 and U.S. patent No. 7,019,377 issued to Hideaki Tsuchiko on 28.3.2006. In some applications, a schottky diode with a high breakdown voltage, low forward resistance, and low forward voltage is desired. However, it is very difficult to integrate a schottky diode on a semiconductor substrate and also provide a high breakdown voltage (e.g., 500V or more), a low forward voltage, and a low forward resistance (e.g., less than about 100 ohms).

Therefore, it is desirable to integrate a schottky diode together with other semiconductor elements on a semiconductor substrate and form a schottky diode having a high breakdown voltage and a low forward resistance.

Disclosure of Invention

The invention discloses a Schottky diode, which comprises: a substrate of a first conductivity type having a first doping concentration and having a surface; a first doped region of a second conductivity type having a second doping concentration and formed on the surface of the substrate; a second doped region of the second conductivity type having a third doping concentration greater than the second doping concentration, the second doped region being formed on the surface of the substrate and overlapping the first doped region; a third doped region of the second conductivity type having a fourth doping concentration greater than the second doping concentration, the third doped region being formed on the surface of the substrate and overlapping the first doped region, wherein the third doped region is separated from the second doped region by a first distance; a first conductor formed on the second doped region and forming a Schottky junction therewith; and a second conductor configured to form an ohmic contact with the third doped region.

The invention also discloses a method for forming the Schottky diode, which comprises the following steps: forming a first region of a first conductivity type having a first doping concentration on a semiconductor substrate; forming a schottky junction overlying a portion of the first region; forming a guard ring on the semiconductor substrate and surrounding an outer edge of the Schottky junction; and forming a MOS gate overlying a surface of the semiconductor substrate and located between the guard ring and a portion of the field oxide region.

The invention also discloses a method for forming the Schottky diode, which comprises the following steps: providing a substrate of a first conductivity type having a first doping concentration; forming a first doped region of a second conductivity type having a second doping concentration on a surface of the substrate; forming a second doped region of the second conductivity type overlapping the first doped region with a third doping concentration, the third doping concentration being greater than the second doping concentration; forming a Schottky junction overlying a portion of the first doped region and spaced apart from the second doped region; and forming a third doped region of the first conductivity type in the second doped region and spaced apart from the schottky junction by a first distance having a fourth doping concentration, the fourth doping concentration being greater than the second doping concentration.

Drawings

Fig. 1 shows an enlarged plan view of an embodiment of a portion of a semiconductor device including a schottky diode according to the present invention; and

fig. 2 shows an enlarged cross-sectional view of a portion of the schottky diode of fig. 1 in accordance with the present invention.

For simplicity and clarity of illustration, elements in the figures are not necessarily to scale, and the same reference numbers in different figures denote the same elements. Moreover, descriptions and details of well-known steps and elements are omitted for simplicity of the description. As used herein, current carrying electrode refers to an element of a device that carries current through the device, such as a source or drain of an MOS transistor, or an emitter or collector of a bipolar transistor, or an anode or cathode of a diode, and a control electrode refers to an element of a device that controls current through the device, such as a gate of an MOS transistor or a base of a bipolar transistor. For clarity of the drawings, the doped regions of the device structure are shown as having generally straight edges and precise corners. However, it will be appreciated by those skilled in the art that due to the diffusion and movement of dopants, the edges of the doped regions are generally not straight lines and the corners are not precise angles.

Detailed Description

Fig. 1 schematically illustrates an enlarged plan view of a portion of an exemplary form of an integrated circuit 10 including a schottky diode 25. Diode 25 is integrated on a semiconductor substrate 28 along with other semiconductor elements such as MOS transistors 12 and 17. Transistors 12 and 17 are shown in simplified form for clarity of the drawing. MOS transistor 12 includes a source region 13 and a drain region 14 formed as doped portions of substrate 28, and also includes a MOS gate 15. Similarly, MOS transistor 17 includes a source region 18 and a drain region 20 formed as doped portions of substrate 28, and includes a MOS gate 19. In a preferred embodiment, transistors 12 and 17, including drain regions 14 and 20, are formed as part of region 29 (fig. 2) of diode 25. Other transistors, such as MOS transistors 22 and 23, may also be formed on other portions of substrate 28.

Fig. 2 shows an enlarged cross-sectional view of diode 25 taken along cross-sectional line 2-2 shown in fig. 1. The diode 25 is formed to have a high breakdown voltage, typically greater than about 500 volts (V). The substrate 28 with the diode 25 formed thereon is formed to have a thickness of 1-5 x 10¹⁴atom/cm³A lightly doped P-type substrate with a doping concentration in the range of (atoms/cubic centimeter). The light doping of substrate 28 facilitates the formation of other types of semiconductor devices, such as transistors 22 and 23, along with diode 25, on substrate 28. An N-type doped region 29 is formed to extend from the surface of substrate 28 into substrate 28. The doping concentration of region 29 is typically about 1-2 x 10¹⁵atom/cm³. Diode 25 also includes N-type doped regions 30 and 31 that are generally formed to overlap respective first and second portions of region 29. Regions 30 and 31 are formed with a doping concentration greater than that of region 29 and are spaced apart by a distance 32. Regions 30 and 31 generally extend through region 29 into substrate 28. A portion 33 of region 29 extends a distance 32 between regions 30 and 31. The combination of different doping concentrations between regions 29 to 30 and 31, along with distance 32, helps to increase impactAcross the voltage and reduce the forward resistance of the diode 25. An anode conductor 49 is formed on the surface of substrate 28 and is in electrical contact with at least a portion of region 30 so as to form a schottky junction along the interface of conductor 49 and region 30. Conductor 49 acts as the anode of diode 25, while the cathode is formed by regions 30, 29, 31 and reaches conductor 60 through ohmic contacts. P-type guard rings are formed as doped regions 36 and 37 extending from the surface into substrate 28 and into region 30. The guard rings of regions 36 and 37 extend along the outer edges of the schottky junction and reduce the electric field at the edges of the schottky junction, thereby helping to increase the breakdown voltage. As can be seen in the plan view of fig. 1, doped regions 36 and 37 are generally one continuous doped region that surrounds the outer edge of the schottky junction formed at the interface between conductor 49 and region 30. In general, regions 36 and 37 overlap the outer interface between conductor 49 and region 30 to help increase the breakdown voltage of diode 25. The doping concentration of regions 36 and 37 is typically greater than the doping concentration of regions 30 and 31, which forms a junction that helps reduce the electric field at the edges of the schottky junction. The formation of P-type doped region 39 in region 31 also helps to increase the breakdown voltage of diode 25. The doping concentration of region 39 is typically greater than the doping concentration of regions 30 and 31 and also helps to increase the breakdown voltage. The charge of region 39 is typically about half the charge of region 31. The width of region 39 is generally less than the width of region 31 such that region 39 is spaced a distance 61 from region 59 and is also spaced a distance 38 from the opposite edge of region 31. These spacings also help to increase the breakdown voltage. A field oxide region 40 is formed on the surface of substrate 28. A portion of field oxide region 40 is formed to extend from region 59 to an outer or distal edge of region 31. A second portion of field oxide region 40 extends from region 59 across the surface of substrate 28 covering regions 31 and 39 beyond the inner edge of region 31. A third portion of field oxide region 40 extends from outside the distal edges of regions 29 and 30, extending to cover at least a portion of region 30 adjacent the distal edges. A thin insulator 41 is formed to extend between the edge of region 36 and the edge of oxidized region 40 near region 36. Conductor 46 is formed on insulator 41, and a portion of conductor 46 may cover a portion of oxide region 40. The insulator 41 and a portion of the conductor 46 overlying the insulator 41 form a MOS gate. Another thin insulator 42, similar to insulator 41, covers a portion of region 29, which portion 29 extends from region 37 to the edge of a portion of oxide region 40 adjacent to region 31. Another conductor 47 is formed on insulator 42 and may partially overlie oxide region 40. A portion of conductor 47 overlying insulator 42 forms another MOS gate. As will be seen further hereinafter, the MOS gate helps to increase the breakdown voltage and forward resistance of diode 25. Those skilled in the art will recognize that insulators 41 and 42 need not cover the entire distance between oxide region 40 and the respective region 36 or 37. For example, the distance between region 36 and adjacent oxide region 40 may be much smaller than the distance between region 37 and adjacent oxide region 40, and thus, insulator 41 and the MOS gate resulting therefrom may be much shorter than insulator 42 and the MOS gate resulting therefrom. An insulator material is applied to the surface of substrate 28 and patterned to form an inner dielectric comprising inner dielectrics 51, 52 and 53. One portion of dielectric 51 and dielectric 52 insulate anode conductor 49 from conductors 46 and 47, while another portion of dielectric 52, along with dielectric 53, insulates conductor 60 from the rest of diode 25. Conductor 68 is formed over a portion of oxide region 40 to form a MOS capacitor covering at least a portion of distance 61. Conductor 68 has a length 69 and is positioned near the adjacent edge of region 59 to help increase the breakdown voltage. Feed-through conductors (Feed-through)55, 56 and 57 provide electrical connections between conductor 49 and conductors 46 and 47 and between conductors 60 and 68, respectively, to provide electrical potential to the MOS gate and MOS capacitor. Heavily doped region 64 is formed on substrate 28 to form an ohmic contact with substrate 28. Conductor 65 provides a connection to substrate 28 through region 64.

The MOS gate receives a voltage from conductor 49 when diode 25 is forward biased. A voltage applied to the MOS gate including insulator 42 forms a region of accumulation within portion 33 of region 29 and near the surface thereof. The pile-up region helps to direct current from region 30 across a portion of region 29 between regions 30 and 31. Current continues to flow from region 29 through region 31 to region 59 and conductor 60. In addition to the pile-up region, the low resistance of regions 30 and 31 helps keep the forward resistance of diode 25 low. Thus, even if a portion of region 29 separates regions 30 and 31, the pile-up region still helps to reduce the forward resistance. The drift region of diode 25 extends from the edge of region 59 through region 31, through a portion of region 29 between regions 30 and 31, as indicated by distance 44, and through region 30 to the edge of the schottky junction. Note that the accumulation region is also formed under the insulator 41, but it has little effect on current conduction.

Several features of diode 25 combine to help increase the breakdown voltage of diode 25 when diode 25 is reverse biased. In the reverse biased case, the connection to conductor 49 ensures that the accumulation region under the MOS gate will not form under insulators 41 and 42, but that this region will be depleted. Thus, the MOS gate helps to increase the breakdown voltage of the diode 25. The reverse voltage applied to diode 25 expands the P-N junctions formed between substrate 28 and regions 29, 30, 31, thereby forming a depletion region that spreads the electric field and helps increase the breakdown voltage. Spacing the cathode electrode formed by region 59 and conductor 60 a distance 44 from the anode electrode formed by conductor 49 also spreads the electric field over distance 44 and increases the breakdown voltage. Spacing region 39 a distance 61 from region 59 and spacing region 39 a distance 35 from the edge of oxide region 40 minimizes field edge crowding and also increases breakdown voltage. Locating region 30 a distance 34 from the edge of field oxide region 40 also reduces the strength of the electric field near the edge of oxide region 40 and helps to improve breakdown voltage. Spacing region 30 a distance 32 from region 31 also reduces the electric field near the edge of oxide region 40 and improves the breakdown voltage. Extending conductors 46 and 47 onto various portions of oxide region 40 helps reduce the electric field at the edge of oxide region 40. Further, lengthening conductor 49 to extend distance 50 beyond the edge of oxide region 40 eliminates (smooth) the electric field near the lower edge of oxide region 40. Similarly, extending conductor 60 beyond the edge of oxide region 40 also eliminates the electric field near the lower edge of oxide region 40. In addition, forming regions 36 and 37 with a higher doping concentration than region 30 reduces the injection efficiency by suppressing the injection of minority carriers. Typically, the doping concentration of regions 36 and 37 is no greater than about 100 times the doping concentration of region 30. This provides a fast switching time for the diode 25 and also reduces substrate current and power drain. The adjustment of the doping concentration of regions 30 and 31 in conjunction with spacing 32 minimizes reverse leakage current and provides diode 25 with more desirable reverse leakage current characteristics.

As will be appreciated by those skilled in the art, certain portions of the diode 25 are scaled according to the desired breakdown voltage value. The distances 38, 50, 62 and length 69 are selected according to the desired breakdown voltage. In one exemplary embodiment, diode 25 is formed to have a breakdown voltage of no less than about 700 volts (V). For this exemplary embodiment, distances 32, 34, 35, 44, 50, 61, 62, and length 69 are approximately 19 microns, 10 microns, 12 microns, 70 microns, 11 microns, 6.5 microns, 22, and 11 microns, respectively. In addition, the doping of regions 36 and 37 is about 1-2X 10¹⁷atom/cm³And region 39 has a doping concentration of about 1-2 x 10¹⁶atom/cm³. In addition, conductors 46, 47 and associated insulators 41 and 42, regions 30, 31, and 39 are optional and may be omitted. Further, conductor 49 is typically a metal and may be a barrier metal (barrier) comprising a titanium/titanium nitride layer.

In other exemplary embodiments, diode 25 is formed to have a breakdown voltage of no less than about 850 volts (V). For this exemplary embodiment, distances 32, 34, 35, 44, 50, 61, 62, and length 69 are approximately 19 microns, 10 microns, 12 microns, 100 microns, 11 microns, 6.5 microns, 42, and 31 microns, respectively. In addition, the doping of regions 36 and 37 is about 1-2X 10¹⁷atom/cm³And region 39 has a doping concentration of about 1-2 x 10¹⁶atom/cm³。

While the subject matter of the present invention has been described in terms of specific preferred embodiments, many alternatives and modifications will be apparent to those skilled in the semiconductor arts. For example, regions 36 and 37 may be spaced apart from the schottky junction. Region 29 may be formed in an epitaxial layer formed on a semiconductor substrate. The thickness of insulators 41 and 42 may be any selected value. Further, the words "about" or "approximately" mean that the value of an element has a parameter that is expected to be very close to a specified value or position. However, as is well known in the art, there is always a slight variation in the blocking value or position exactly as specified. It is well established in the art that a change of up to about 10% is considered a reasonable change from the ideal goal exactly as described.

Claims (2)

1. A method of forming a schottky diode, comprising:

providing a semiconductor substrate of a first conductivity type having a first doping concentration and having a surface;

forming a first region of a second conductivity type having a second doping concentration on the semiconductor substrate;

forming a second region of the second conductivity type having a third doping concentration higher than the second doping concentration, including forming the second region on the surface of the semiconductor substrate and overlapping the first region;

forming a conductor on the second region to form a Schottky junction, the Schottky junction overlying a portion of the first region;

forming a guard ring on the semiconductor substrate and surrounding an outer edge of the Schottky junction; and

and forming a MOS gate which covers the surface of the semiconductor substrate and is positioned between the protection ring and a part of the field oxide region.

2. The method of claim 1, further comprising: forming a third doped region of the second conductivity type overlapping the first region and spaced apart from the second region by a first distance having a fourth doping concentration, wherein the fourth doping concentration is greater than the second doping concentration.