HK1124172B - Semiconductor structure and method of manufacturing a semiconductor structure - Google Patents

Description

Semiconductor structure and method for manufacturing semiconductor structure

Technical Field

The present invention relates generally to a semiconductor structure having enhanced light diffusion properties for use as part of a light emitting device. More particularly, the present semiconductor structure is comprised of a group III metal nitride having a wurtzite crystal structure and is vapor grown on a (0001) oriented substrate, which is formed of a semiconductor structure material or a foreign material. The invention also relates to a method of manufacturing such a structure.

Background

The design of semiconductor structures for light emitting diodes affects the overall efficiency of the diode by two main parameters: i.e. the efficiency of conversion of electrical power to optical power in the light-generating region and the efficiency of emission of light generated in that region of the structure. The light emitting structure is composed of a group III metal nitride grown in the vapor phase on a foreign substrate with a reflectivity less than that of the structure material, and in which a significant portion of the generated light propagates inside the structure due to reflections occurring at the structure/substrate and structure/surrounding interfaces. Only a portion of the light propagating within a certain critical angle, defined according to Snell's law and related to the surface normal direction, can leave the structure through the structure surface. This critical angle depends on the refractive indices of the surrounding materials, the substrate and the structural material. Since the difference between the refractive index of the substrate (e.g., sapphire index of about 1.8) and the refractive index of the surrounding material (e.g., typical resin encapsulation index of about 1.5) is significant, this critical angle is relatively small compared to the refractive index of the structural material (≈ 2.5-3). As a waveguide, more than two-thirds of the light can propagate in the structural layer. On a light emitting diode chip (chip), this light potentially has the potential to exit through the chip surface. However, since there are many loss mechanisms for the structural layers and electrodes, most of the light is lost before it leaves the chip surface. As a result, the efficiency with which light is emitted from the structure is significantly reduced, which can result in a reduction in the overall efficiency of the device.

Many of the methods involve ex-situ processing and constitute an important part of the invention focusing on this problem. One way to improve the performance of light emitted from the structure is to make the light emitting surface semicircular. This method, disclosed by Scifres and Burnham in U.S. patent No. 3,954,534, involves the formation of a semicircular recess in a substrate, and the subsequent growth of a semiconductor layer on the substrate and removal of the substrate. Another solution is disclosed by Krames and Kish Jr in us patent 5,779,924. This method proposes to achieve an increase in the overall optical power transmission from the structure to the surroundings by making a regular surface structure. Such a structure reduces fresnel reflections at the interface between the structure and the surroundings and increases the critical angle, within which light can propagate, by leaving the structure through the surface. Kish Jr and Stockman in U.S. patent 5,793,062 propose embedding a non-absorbing, distributed bragg reflector inside the structure, designed to redirect light away from the absorbing structure, such as the chip internal contact. In fact, it is difficult to create a horizontally distributed bragg reflector for group III nitrogen metals. Gardner et al, in us patent 6,847,057B 1, disclose a light emitting device in which improved light spreading is provided by structuring the substrate surface, or the structured surface, or some internal structural interface. The invention also proposes to polarize the photons emitted by the active region using an optional polarization selection layer. The polarization selection layer may be a wire grid polarizer (wire grid polarizer) that may be formed on the side of the substrate opposite the device layer. The wire grid polarizer reflects those polarized photons that are parallel to the borderlines and transmits those polarized photons that are perpendicular to the borderlines. The combination of the wire grid polarizer and the reflective structured surface should recycle photons until they reach a certain polarity. As mentioned above, a common disadvantage of these methods is: although they provide efficient light diffusion, they require many transposition operations, which can lead to complex manufacturing processes.

Several in situ (in situ) methods have been proposed. Krames et al, in U.S. patent 6,649,440B 1, discloses an in situ method of fabricating a light emitting device with improved light extraction efficiency. This approach utilizes a thick multi-layer epitaxial structure that increases the efficiency of light extraction from the device. The multilayer structure does not absorb light and its increased thickness allows light confined within the waveguide to exit the light emitting device through the face of the structure with less reflection, thereby avoiding loss of light within the active region and electrodes. One disadvantage of this approach is that the multilayer structure must be thicker than the light emitting region to provide significant improvement in light extraction from the device, and therefore, compared to conventional structuresThis leads to significantly longer growth times and increased costs for such structures. In addition, the thick multi-layer structure may cause significant strain (strain) in the light emitting structure. Krames et al, U.S. Pat. No. 6,683,327B 2, disclose a light emitting device that includes a nucleation layer comprising aluminum. The thickness and aluminum composition of the nucleation layer are selected to meet the refractive index requirements of the substrate and the device layer such that 90% of the light from the device layer incident on the nucleation layer is extracted into the substrate. One disadvantage of this approach is that: since the nucleation layer has a thickness required to provide effective light diffusion, it is difficult to vapor-phase-grow a light-emitting structure on such a nucleation layer without deteriorating the structural quality of the above-described grown layer. Thibeault et al disclose in U.S. patent 6,821,804 several methods based on the creation of an array of light extraction elements formed within a structure or on a substrate prior to epitaxial growth. Since the array of light extraction elements is formed to provide a spatial variation in refractive index, light confined to the waveguide changes direction of propagation by interacting with the array and can exit the light emitting device. These methods significantly improve the performance of light emission from the structure. However, the inclusion of foreign materials may introduce other defects in the structural layer. Another proposed approach is to insert a scattering layer, which is formed inside the structure or on the substrate before epitaxial growth. However, in order to provide a sufficiently large refractive index difference for efficient light refraction, the layer made of group iii metal nitride should have a thickness and composition that can introduce significant additional strain in the structure. Shen et al, in U.S. patent 6,903,376B 2, disclose a light emitting device that includes a light emitting region and a reflective surface separated from the light emitting region by one or more layers. The distance between the light emitting region and the reflecting contact surface is 0.5 lambda_nAnd 0.9 lambda_nInter or λ_nAnd 1.4. lambda._nAnd so on, where λ_nIs the wavelength of light emitted from the light emitting region where the device separates the light emitting region from the reflective contact surface. According to the present invention, the light extraction efficiency of the upper flux is a function of the separation distance, which has some maxima, due to the phase shift of the light reflected from the reflective contact and the interference of the light directly emitted from the light emitting region with the light reflected from the contact. In practice, however, this phenomenon is only for single atomsWell regions are effective, and less so when the resulting light emitting region has several atomic well regions. A common disadvantage of all the in situ processes described above is that: they cause additional strain in the structure with a consequent increase in defect density.

One approach that has been recently addressed is disclosed by Lee et al in U.S. patent application 2005/0082546 a 1. The method comprises the composition of a substrate having at least one protrusion with a curved surface, wherein the same uniform stress can be obtained. Although this device retains the same defect density in the structure, it improves light extraction. One disadvantage of this approach is that, although it provides efficient light diffusion, it requires a complex manufacturing process, including transposition operations.

Object of the Invention

The object of the present invention is to eliminate the above-mentioned disadvantages of the prior art.

In particular, it is an object of the present invention to disclose a novel semiconductor structure having improved light diffusion properties without forming additional strain-induced dislocations (dislocations), thereby greatly increasing the luminance of a light emitting device using the semiconductor structure formed of a group iii metal nitride having a wurtzite crystal structure and vapor-phase-grown on a (0001) oriented substrate formed of a semiconductor structure material or a foreign material.

It is another object of the present invention to disclose a new, efficient, and easily fully controllable in-situ method for fabricating a semiconductor structure of the above type.

Disclosure of Invention

The semiconductor structure according to the invention is characterized in what will be described below. The structure is formed of a group III metal nitride having a wurtzite crystal structure and vapor-phase grown on a (0001) oriented semiconductor substrate. The substrate may be formed of a semiconductor construction material or some other heterogeneous material. The semiconductor structure includes a bottom cladding layer and a top cladding layer, with a planar upper surface grown on the bottom cladding layer. The lattice constant of the top cladding layer is the same as the lattice constant of the bottom cladding layer. The different lattice constants of the cladding layers can lead to the formation of strain induction in the structure. An important part of the structure is a diffusion region, located between the bottom cladding layer and the top cladding layer, for diffusing light propagating in the semiconductor structure. The diffusion region has a different refractive index than the cladding layer and an uneven surface to form a light diffusion interface between the diffusion region and the cladding layer. The uneven surface may provide diffusion interfaces in different directions. Such a surface enables light emitted by light emitting device layers grown over the structure to randomly change their direction of propagation, so that the probability of having one direction that may leave the device is improved. Therefore, the luminance of the light emitting device is improved. During the growth of the top cladding layer, the uneven upper surface of the diffusion region is deformed into a flat surface. Such a planar surface is well suited for further epitaxial growth of light emitting device layers thereon. The term "layer" as used herein generally refers to a single crystalline epitaxial layer. The term "diffuse" refers to all kinds of mechanisms that change the direction of light propagation at an interface, including reflection, diffusion and refraction.

According to the invention, the diffusion region comprises a plurality of diffusion layers, the composition and thickness of which are selected to avoid the formation of strain-induced dislocations in the diffusion region. Preferably, each diffusion layer has an uneven surface to maximize diffusion efficiency. It is important to avoid the formation of dislocations because dislocations can degrade the properties of light emitting device layers that are subsequently grown over semiconductor structures. Dislocations can be avoided by providing effective strain relaxation inside the structure. Also according to the present invention, the refractive indices of the adjacent diffusion layers are different to further enhance the diffusion efficiency by increasing the number of contact faces of the diffusion layers. The total thickness of the diffusion layer is selected to provide efficient light diffusion. The greater the difference in refractive index between the diffusion layer and the cladding layer, the smaller the total thickness of the diffusion region required. The structure of the present invention provides enhanced light diffusion properties such that the brightness of a light emitting device grown on top of the structure is greatly enhanced without introducing additional dislocations in the layers. There is a need in the art for providing light diffusion by inserting a separate diffusion layer, in contrast to which the present invention represents a significant advance.

The basic idea of the invention is applicable to different materials. In a preferred embodiment, the group III metal nitride is Al_xGa_1-x-yIn_yN, wherein x is 0. ltoreq. x.ltoreq.1 and y is 0. ltoreq. y.ltoreq.1.

In a preferred embodiment, the bottom cladding and the top cladding are the same material. In this case, the diffusion layer is preferably lattice-matched to the cladding layer. Thus, the insertion of the diffusion regions does not result in the creation of elastic misfit stresses in the layers, and misfit dislocations are formed at the layer interfaces. Alternatively, the diffusion layers are lattice mismatched to the bottom and top cladding layers, and the thickness of each individual diffusion layer is less than the Matthews-Blakeslee critical thickness, which is the maximum thickness without dislocations. The theory based on Matthews-Blakeslee critical thickness will be explained later herein. In addition, in this embodiment, one of the two adjacent diffusion layers has a positive lattice mismatch and the other has a negative lattice mismatch with respect to the cladding layer, thereby avoiding strain accumulation in the diffusion region. This feature, coupled with the thickness limitation at the Matthews-Blakeslee critical thickness, allows the diffusion region to have sufficient thickness without additional strain induced dislocations. For example, if a stack is made up of a pair of first and second diffusion layers having the same thickness and opposite lattice misfits of the same magnitude, the total strain of the stack is zero.

In a particularly preferred embodiment, the bottom cladding layer and the diffusion layer have upper surfaces with crystallographic planes having a crystallographic ratio different from (0001) and of the type {1100 }. The diffusion region thus replicates a crystallographic plane at the upper surface of the bottom cladding layer. This structure having a specific inclined crystal plane can effectively realize light diffusion.

The method of fabricating a semiconductor structure of the present invention is characterized by what is shown below. The structure is formed from a group III metal nitride having a wurtzite crystal structure and is vapor grown on a (0001) oriented semiconductor substrate, which may be formed from a semiconductor structure material or from a foreign material. After placing the substrate in the reactor, the method first comprises a step of vapor-phase growing a bottom cladding layer. This is followed by a step of vapor growing a diffusion region over the bottom cladding layer for diffusing the propagated light within the semiconductor structure, the diffusion region having a different index of refraction than the bottom cladding layer and the uneven surface. Finally, the method includes the step of vapor growing a top cladding layer over the diffusion region, the top cladding layer having a flat upper surface and a refractive index different from the refractive index of the diffusion region and a lattice constant the same as the bottom cladding layer. The vapor phase growth process may be realized by a vapor phase epitaxy reflector, for example based on metal organic vapor phase epitaxy or hydride vapor phase epitaxy.

According to the invention, the growth of the diffusion region comprises the step of growing a plurality of diffusion layers, the composition and thickness of the diffusion layers being selected to avoid the formation of strain-induced dislocations at the interface between the layers, adjacent diffusion layers having different refractive indices to further enhance diffusion efficiency. Thus, in contrast to the above-described prior art method using a single diffusion layer insertion, the method of the present invention aims to efficiently achieve light diffusion in the structure without introducing additional dislocations between the layers.

More suitably, the group III metal nitrogen compound is Al_xGa_1-x-yIn_yN, wherein x is 0. ltoreq. x.ltoreq.1 and y is 0. ltoreq. y.ltoreq.1.

In a preferred embodiment, the bottom and top cladding layers are of the same material. In this case, it is preferable to grow a diffusion layer having the same lattice constant as the cladding layer. No strain is generated at the interface between layers and thus no strain-induced dislocations are generated. It is also possible to grow diffusion layers with lattice constants different from the cladding layers, each layer having a thickness smaller than the Matthews-Blakeslee critical thickness, and one of two adjacent diffusion layers having a lattice constant larger than the lattice constant of the cladding layer and the other having a lattice constant smaller than the lattice constant of the cladding layer. In this case, strain is generated between layers due to lattice mismatch. However, dislocations are avoided by selecting the layer thickness to be below the Matthews-Blakeslee critical thickness and selecting adjacent diffusion layers for cladding layers with opposite lattice misfits to avoid strain accumulation. The Matthews-Blakeslee critical thickness is the maximum thickness of the dislocation-free layer and will be described in detail later in this document.

In a particularly preferred embodiment, a bottom cladding layer and a diffusion layer are grown having upper surfaces with crystallographic planes having crystallographic indices different from (0001) and type {1100 }. The diffusion region regenerates a crystal plane at the upper surface of the bottom cladding layer. This structure has a specific inclined crystal plane, and efficient light diffusion can be achieved. The growth of the facets of the diffusion region and the bottom cladding layer may be achieved by utilizing preferential growth of the facets. As known to those skilled in the art, process parameters such as time, gas flow, temperature and pressure may be selected to grow crystal planes having these crystallization rates. However, each reactor has its own independent parameters, so a universal set of parameter values cannot be given. Separately, a top cladding layer with a flat upper surface can be produced by preferential growth of a planar crystal plane with a crystallinity (0001).

The growth of the bottom cladding layer having said facets on its upper surface preferably comprises the step of forming precipitates (14) on the (0001) oriented surface, said precipitates having a height of 0.1 μm to 0.5 μm and a surface density of 10⁷-10⁸cm^-2. The formation of precipitates is a common phenomenon in the initial stage of growing group III metal nitride layers on (0001) oriented surfaces. The precipitates generally have a pyramidal shape with said crystal planes. By generating precipitates having the above-mentioned specific characteristics, it is possible to ensure that sufficiently large crystal planes suitable for further preferential growth of the diffusion layer are provided. Typically, precipitates are formed during low temperature deposition of the material, and subsequently the material will recrystallize at high temperatures. However, this technique typically results in the formation of many small precipitates, which tend to fuse at high densities before the desired height is reached. According to the invention, preferably, but not exclusively, during the successive short cryogenic precipitations, precipitates are formed which are carried out at a temperature in the range 450C-700C, followed byAnd entering a high-temperature layer annealing stage, wherein the execution temperature is 900-1150 ℃. The exact temperature depends on the materials used and the type of reactor. The duration of the short cryogenic precipitation may be, for example, several tens of seconds. At each annealing stage, a portion of the precipitated material is removed from the surface. The processing parameters of the annealing stage, such as temperature gradient and annealing time, are selected to completely remove small precipitates while retaining large precipitates. Therefore, only the predominant growth of the largest precipitates occurs. The precipitate can be grown directly on a (0001) oriented semiconductor substrate. It is also possible to grow a portion of the underlayer with a (0001) surface first and to grow the precipitate on that surface.

In contrast to many prior art methods involving unnecessary, complex transposition stages, the entire method of the present invention can be achieved by in situ processing steps.

An important feature of the invention described above is that the insertion of a sufficiently thick diffusion region does not introduce additional interlayer dislocations. In general, insertion of lattice-mismatched layers results in a large number of lattice mismatches between the layers, resulting in elastic mismatch stresses (tensile or compressive) being generated between the layers. These stresses can be mitigated by the formation of misfit dislocations at the interface. In most cases, misfit dislocations are associated with threading dislocations. Threading dislocations are derivatives of misfit dislocations, but can be made to penetrate the film into the free surface. Threading dislocations are detrimental to device performance. The most desirable solution is to provide efficient light diffusion without introducing additional dislocations between the layers. It will be appreciated by those skilled in the art that the thickness of the layer at the lattice mismatch is less than the Matthews-Blakeslee critical thickness h for misfit dislocations_cIn this case, no dislocation occurs. The critical thickness may come from consideration of the energy of the synthetic thread/misfit dislocation structure in the stressed film, and may also be approximated by the value h_c≈b/ε_mWhere b is the magnitude of the dislocation burgers vector, ε_mIs a mismatch parameter. For group III metal nitrides having a wurtzite crystal structure, possible Burgers vectors include + -c and + -a_i(i ═ 1, 2, 3) lattice translation vectors and their sum ± c ± a_i. Expression h in terms of critical thickness_c≈a/ε_m＝a²A, the translation c is greater than the translation a_iWhere a is the in-plane lattice constant and Δ a is the difference in the in-plane lattice constant between the layers.

In summary, by means of the invention, several advantages are obtained compared to the prior art. A structure is realized that efficiently achieves light diffusion properties with reasonable shallow diffusion region thicknesses without causing detrimental dislocations. The manufacturing process only includes in-situ processing steps, which makes the process very convenient and allows for high productivity.

Drawings

The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention. And in part will be described herein to explain the principles of the invention.

Fig. 1 shows a schematic cross-sectional view of a semiconductor structure in accordance with the present invention.

Figure 2 shows a schematic cross-sectional view of a substrate grown by a prior art method.

Figure 3 shows a flow chart of an embodiment of the method according to the invention.

Detailed Description

Reference will now be made in detail to embodiments and examples of the present invention, examples of which are illustrated in the accompanying drawings.

The semiconductor structure 1 in fig. 1 consists of a substrate 2 formed of a semiconductor structure material or a substrate 3 formed of a foreign material, a bottom cladding layer 4, a top cladding layer 5, a diffusion region, a surface 8 of the bottom cladding layer 4 having a crystallographic plane 11 with a different crystallinity from (0001) and of type {1100}, the top cladding layer 5 having a planar surface 9, the diffusion region consisting of two pairs of a first diffusion layer 6 and a second diffusion layer 7, respectively. The dashed lines indicate precipitates 14 during growth of the bottom cladding layer. The top cladding layer has the same lattice constant as the bottom cladding layer. The diffusion layer has a different refractive index than the cladding layer. In addition, the refractive index of the first diffusion layer 6 is different from that of the second diffusion layer 7. The first diffusion layers 6 may have different refractive indices. The same is true of the second diffusion layer 7. The diffusion layers 6 and 7 are not flat, but they can regenerate the facets 11 at the surface of the bottom cladding layer. The composition and thickness of the diffusion layers 6 and 7 have been selected in order to achieve effective stress relaxation in the structure 1 without formation of misfit dislocations in the layer interfaces. More precisely, the thickness of each diffusion layer is smaller than the Matthews-Blakeslee critical thickness. Also, the first and second diffusion layers having the same thickness have the same magnitude of inverse lattice mismatch with respect to the cladding layer. The direction of strain for each layer is illustrated by the arrows. The opposite strains compensate each other, so that a build-up of strain is avoided. The total thickness of the diffusion region is selected to provide efficient light diffusion. The greater the difference in refractive index between the diffusion region and the cladding layer, the smaller the total diffusion region thickness required. The semiconductor structure 1 improves light diffusion properties without introducing additional dislocations in the layers. In addition, the top cladding layer surface 9, which constitutes the surface of the semiconductor structure, has a high crystalline quality and is also very suitable for further growth of the device layer.

Figure 2 illustrates a prior art solution to in-situ operation by growing an intermediate single crystal epitaxial semiconductor layer 12, or by insertion of inclusions of an amorphous material 13 (figure 2b), to achieve light diffusion, the layer 12 having a refractive index and lattice constant different from those of the bottom and top layers (figure 2 a). As can be seen from fig. 2a, the thickness of the monolayer should be thin to avoid the formation of strain-induced dislocations. And this results in inefficient diffusion. Although structurally improving light diffusion, the structure in FIG. 2b still results in elastic mismatch stress in the layers and formation of mismatch dislocations at the interface. Other prior art methods necessarily require a transposition process step, which complicates the manufacturing process.

FIG. 3 depicts a manufacturing method in accordance with an embodiment of the present inventionThe method comprises three main steps. First, a bottom cladding layer is grown. The second step is to grow a plurality of at least two pairs of first and second diffusion layers having crystal planes on the surface characterized by a different crystallinity from (0001) and a type {1100}, and the refractive index of the first diffusion layer is different from the refractive index of the second diffusion layer. The first diffusion layer has a positive lattice mismatch and the second diffusion layer has a negative lattice mismatch with respect to the cladding layer, and both preferably have the same magnitude. The thickness of each individual diffusion layer is preferably less than the Matthews-Blakeslee critical thickness h_c，To avoid the generation of misfit dislocations. The third step is to grow a top cladding layer with a flat surface, which is the same material as the bottom cladding layer. The method provides for the growth of a semiconductor structure with efficient light diffusion without introducing additional dislocations in the layers.

It is obvious to a person skilled in the art that with the advancement of technology, the basic idea of the invention may be implemented in various ways. The invention and its embodiments are thus not limited to the examples described above but may vary within the scope of the claims.

Claims (20)

1. A semiconductor structure (1) formed from a group III metal nitride having a wurtzite crystal structure and grown in the vapour phase on a (0001) oriented semiconductor substrate (2, 3), comprising

A bottom cladding (4);

a top cladding layer (5) having a planar upper surface (9) grown over the bottom cladding layer, the top cladding layer having the same lattice constant as the bottom cladding layer; and

a diffusion region located between the bottom cladding layer (4) and the top cladding layer (5) to diffuse light propagating within the semiconductor structure (1), the diffusion region having a different index of refraction than the cladding layers and an uneven surface to provide an optical diffusion interface between the diffusion region and the cladding layers,

the semiconductor structure is characterized in that the diffusion region comprises a plurality of diffusion layers (6, 7), the composition and thickness of the diffusion layers being selected to avoid the formation of strain-induced dislocations in the diffusion region, and in order to further increase the diffusion efficiency, adjacent diffusion layers (6, 7) have different refractive indices.

2. A semiconductor structure (1) according to claim 1, characterized in that said nitride is Al_xGa_1-x-yIn_yN form, where 0. ltoreq. X.ltoreq.1 and 0. ltoreq. y.ltoreq.1.

3. A semiconductor structure (1) as claimed in claim 1, characterized in that the bottom cladding layer and the top cladding layer are of the same material.

4. A semiconductor structure (1) as claimed in claim 2, characterized in that the bottom cladding layer and the top cladding layer are of the same material.

5. A semiconductor structure (1) as claimed in claim 3, characterized in that the diffusion layers (6, 7) are lattice-matched to the cladding layers (4, 5).

6. A semiconductor structure (1) as claimed in claim 4, characterized in that the diffusion layers (6, 7) are lattice-matched to the cladding layers (4, 5).

7. A semiconductor structure (1) according to claim 3, characterized in that said diffusion layers (6, 7) are lattice mismatched to said bottom cladding layer (4) and said top cladding layer (5), each diffusion layer having a thickness smaller than the Matthews-Blakeslee critical thickness, in order to avoid strain accumulation in said diffusion layers, one of two adjacent diffusion layers having a positive lattice mismatch and the other having a negative lattice mismatch for said cladding layers (4, 5).

8. A semiconductor structure (1) according to claim 4, characterized in that said diffusion layers (6, 7) are lattice mismatched to said bottom cladding layer (4) and said top cladding layer (5), each diffusion layer having a thickness smaller than the Matthews-Blakeslee critical thickness, in order to avoid strain accumulation in said diffusion layers, one of two adjacent diffusion layers having a positive lattice mismatch and the other having a negative lattice mismatch for said cladding layers (4, 5).

9. A semiconductor structure (1) according to any of claims 1-8, characterized in that said bottom cladding layer and said diffusion layer have upper surfaces having crystallographic planes with a crystallographic ratio different from (0001) and of type {1100 }.

10. A method of manufacturing a semiconductor structure (1) consisting of a group III metal nitride having a wurtzite crystal structure and grown in the vapour phase on a (0001) oriented semiconductor substrate (2, 3), said method comprising the steps of

Vapor-growing a bottom cladding layer (4);

vapor growing a diffusion region over the bottom cladding layer to diffuse light propagating inside the semiconductor structure (1), the diffusion region having a different refractive index than the bottom cladding layer and an uneven surface; and

vapor growing a top cladding layer (5) over the diffusion region, the top cladding layer having a flat upper surface (9), a refractive index different from the refractive index of the diffusion region, and a lattice constant the same as the lattice constant of the bottom cladding layer,

the method is characterized in that the growth of the diffusion zone comprises the step of growing a plurality of diffusion layers (6, 7) whose composition and thickness are selected so as to avoid the formation of strain-induced dislocations at the layer interfaces, and in that adjacent diffusion layers (6, 7) have different refractive indices in order to further increase the diffusion efficiency.

11. The method of claim 10, wherein said nitride is Al_xGa_1-x-yIn_yForm N, where x is 0. ltoreq. x.ltoreq.1 and y is 0. ltoreq. y.ltoreq.1.

12. The method of claim 10, wherein said bottom cladding and said top cladding are of the same material.

13. The method of claim 11, wherein said bottom cladding and said top cladding are of the same material.

14. A method according to claim 12, characterized by growing a diffusion layer (6, 7) having the same lattice constant as the cladding layer (4, 5).

15. A method according to claim 13, characterized by growing a diffusion layer (6, 7) having the same lattice constant as the cladding layer (4, 5).

16. A method according to claim 12, characterized by growing diffusion layers (6, 7), each having a different lattice constant from said cladding layers (4, 5), a thickness smaller than the Matthews-Blakeslee critical thickness, one of two adjacent diffusion layers (6, 7) having a lattice constant larger than that of said cladding layers (4, 5) and the other having a lattice constant smaller than that of said cladding layers (4, 5) in order to avoid strain accumulation in said diffusion layers.

17. Method according to claim 13, characterized in that diffusion layers (6, 7) are grown, each of said diffusion layers having a different lattice constant from said cladding layers (4, 5), a thickness smaller than the Matthews-Blakeslee critical thickness, one of two adjacent diffusion layers (6, 7) having a lattice constant larger than the lattice constant of said cladding layers (4, 5) and the other having a lattice constant smaller than the lattice constant of said cladding layers (4, 5) in order to avoid strain accumulation in said diffusion layers.

18. A method as claimed in any one of claims 10 to 17, characterized by growing a bottom cladding layer and a diffusion layer, each of said bottom cladding layer and said diffusion layer having an upper surface with a crystallographic plane having a crystallographic ratio different from (0001) and of type {1100 }.

19. The method according to claim 18, wherein said step of growing said bottom cladding layer comprises the step of forming precipitates (14) at a (0001) oriented surface, said precipitates having a height of 0.1 μm to 0.5 μm and a surface density of 10⁷-10⁸cm^-2。

20. The method according to claim 19, characterized in that said precipitate (14) is formed by a treatment consisting of a series of short low temperature depositions, carried out in a temperature range of 450 ℃ -700 ℃, followed by a high temperature layer annealing phase, carried out in a temperature range of 900 ℃ -1150 ℃.