HK1120672B - Method and system for processing multi-rate audio from a plurality of audio processing sources - Google Patents

Description

Method and system for processing multi-rate audio from multiple audio processing sources

Technical Field

The present invention relates to audio signal processing, and more particularly, to a system and method for processing multi-rate audio from multiple audio processing sources.

Background

In audio applications, a system providing audio interface and processing functions may need to support duplex operation, which may include the following functions: the processed signals can also be used to drive a speaker, earpiece, or other type of output device while audio information is being collected by a sensor, microphone, or other type of input device. To perform these operations, the system may use an audio encoding and decoding (codec) device that may provide suitable gain, filtering, and/or analog-to-digital conversion in the uplink direction towards circuitry and/or software that provides audio processing, and may also provide suitable gain, filtering, and/or digital-to-analog conversion in the downlink direction towards an output device.

As audio applications expand, for example, as new video and/or audio compression techniques and formats are deployed and implanted in wireless systems (e.g., mobile phones), new codec devices are needed that provide suitable processing capabilities to handle a wide range of audio signals and audio signal sources. In this regard, additional functionality and/or capacity is also needed to provide users with the flexibility offered by new communication and multimedia technologies. In addition, these added functions and/or capabilities need to be implemented in a flexible and efficient manner, which complicates the operational requirements, communication technology, and the wide range of audio signal sources supported by the mobile phone.

Further limitations and disadvantages of conventional and traditional approaches will become apparent to one of skill in the art, through comparison of such systems with some aspects of the present invention as set forth in the remainder of the present application with reference to the drawings.

Disclosure of Invention

A system and/or method for processing multi-rate audio from a plurality of audio processing sources, substantially as shown in and/or described in connection with at least one of the figures, as set forth more completely in the claims.

According to one aspect of the invention, a method for signal processing comprises:

upsampling two or more audio signals to a same data sample rate in an integrated circuit of a wireless device, wherein each of the audio signals is received at a plurality of data sample rates within the integrated circuit;

mixing left and right channels of the up-sampled audio signal, respectively;

the mixed left and right channels are up-sampled for subsequent delivery to an output device communicatively coupled to the integrated circuit.

Preferably, the audio signal may include digital audio data, digital voice (vioce) data, and digital polyphonic ring tone (polyringer) data.

Preferably, the method further comprises up-sampling the audio signal by at least one half-band interpolation operation.

Preferably, the method further comprises down-sampling the up-sampled mixed left and right channels for transmission to a bluetooth radio.

Preferably, the method further comprises dynamically adjusting a gain on at least one of the left and right channels of the up-sampled audio signal.

Preferably, the method further comprises programming a ramp up or a ramp down of the dynamically adjusted gain.

Preferably, the method further comprises multi-band equalizing the audio signal prior to upsampling the audio signal to the same data sample rate.

Preferably, the method further comprises selecting a Finite Impulse Response (FIR) filter for compensating the multi-band equalized audio signal before upsampling the audio signal to the same data sample rate.

According to one aspect of the present invention, there is provided a machine readable storage, having stored thereon, a computer program comprising at least one code section for signal processing, the execution of the at least one code section by a machine causing the machine to perform the steps of:

upsampling two or more audio signals to a same data sample rate in an integrated circuit of a wireless device, wherein each of the audio signals is received at a plurality of data sample rates within the integrated circuit;

mixing left and right channels of the up-sampled audio signal, respectively;

the mixed left and right channels are up-sampled for subsequent delivery to an output device communicatively coupled to the integrated circuit.

Preferably, the audio signal includes digital audio data, digital voice data, and digital polyphonic ring tone data.

Preferably, the machine-readable storage further comprises code for upsampling the audio signal by at least one half-band blanking operation.

Preferably, the machine-readable storage further comprises code for down-sampling the up-sampled mixed left and right channels for transmission to a bluetooth radio.

Preferably, the machine-readable storage further comprises code for dynamically adjusting a gain on at least one of the left and right channels of the up-sampled audio signal.

Preferably, the machine-readable storage further comprises code for programming a ramp up or a ramp down of the dynamically adjusted gain.

Preferably, the machine-readable storage further comprises code for multi-band equalizing the audio signal prior to upsampling the audio signal to the same data sample rate.

Preferably, the machine-readable storage further comprises code for selecting a Finite Impulse Response (FIR) filter for compensating the multi-band equalized audio signal before upsampling the audio signal to the same data sample rate.

According to one aspect of the invention, a system for signal processing comprises:

an integrated circuit in a wireless device, the integrated circuit to upsample two or more audio signals to a same data sample rate, wherein each of the audio signals is received within the integrated circuit at a plurality of data sample rates;

the integrated circuit separately mixes left and right channels of the up-sampled audio signal;

the integrated circuit upsamples the mixed left and right channels for delivery to an output device communicatively coupled to the integrated circuit.

Preferably, the audio signal includes digital audio data, digital voice data, and digital polyphonic ring tone data.

Preferably, the integrated circuit up-samples the audio signal by at least one half-band interpolation operation.

Preferably, the integrated circuit down-samples the up-sampled mixed left and right channels for transmission to a bluetooth radio.

Preferably, the integrated circuit dynamically adjusts a gain on at least one of the left and right channels of the up-sampled audio signal.

Preferably, the integrated circuit programs a ramp up or a ramp down of the dynamically adjusted gain.

Preferably, the integrated circuit multi-band equalizes the audio signal before upsampling the audio signal to the same data sample rate.

Preferably, the integrated circuit selects a Finite Impulse Response (FIR) filter for compensating the multi-band equalized audio signal before upsampling the audio signal to the same data sample rate.

According to one aspect of the invention, a method for signal processing comprises:

signal sampling rates from multiple signal sources are converted to the same sampling rate in two stages, where the first stage reduces the sampling rate to a set of reduced sampling rates using multiple double-by-two upsampling filters (upsample-by-two filters), and the second stage converts the set of reduced sampling rates to the same sampling rate using an N-order polynomial interpolator.

Preferably, the order of the N-order polynomial interpolator is less than or equal to 4;

preferably, the method further comprises the operation of replacing a first filter of the plurality of double upsampling filters with an IIR filter.

Preferably, the method further comprises compensating the IIR filter to shorten the response time.

Various advantages, aspects and novel features of the invention, as well as details of an illustrated embodiment thereof, will be more fully described with reference to the following description and drawings.

Drawings

The invention will be further described with reference to the accompanying drawings and examples, in which:

FIG. 1 is an exemplary block diagram of a multimedia baseband processor for processing multiple wireless protocols in accordance with an embodiment of the present invention;

FIG. 2A is an exemplary block diagram of a multimedia baseband processor communicatively coupled to a Bluetooth radio in accordance with an embodiment of the present invention;

FIG. 2B is an exemplary block diagram of an audio codec in a multimedia baseband processor according to an embodiment of the present invention;

FIG. 2C is an exemplary block diagram of an analog processing unit in a multimedia baseband processor according to an embodiment of the present invention;

FIG. 2D is a flowchart illustrating exemplary steps for data mixing in an audio codec according to an embodiment of the present invention;

FIG. 3A is an exemplary block diagram of a multi-band equalizer according to an embodiment of the present invention;

FIG. 3B is an exemplary block diagram of a multi-band equalizer using biquad bandpass filtering according to an embodiment of the invention;

FIG. 4A is an exemplary block diagram of a compensation operation in an audio codec according to an embodiment of the present invention;

FIG. 4B is an exemplary block diagram of an audio processing data path according to an embodiment of the present invention;

FIG. 5A is an exemplary block diagram of a GSM voice usage scenario in accordance with an embodiment of the present invention;

FIG. 5B is an exemplary block diagram of a GSM voice usage scenario through a Bluetooth radio in accordance with an embodiment of the present invention;

FIG. 5C is an exemplary block diagram of a usage scenario for GSM voice and audio mixing according to an embodiment of the present invention;

fig. 5D is an exemplary block diagram of a usage scheme for GSM voice and audio mixing by a bluetooth radio in accordance with an embodiment of the present invention.

Detailed Description

The present invention relates to a method and system for processing multi-rate audio from a plurality of audio processing sources. Various aspects of the disclosure may include an audio encoder/decoder (codec) in a wireless device for upsampling two or more audio signals to a same data sample rate. Each audio signal may be received at one of a plurality of data sample rates, such as digital audio, digital speech, and digital polyphonic ring tones (ringer). These audio signals may be equalized and/or compensated using an FIR filter or an IIR filter prior to upsampling. Upsampling may be implemented using a multiple half-band interpolation operation. For example, the gain of the obtained upsampled data may be dynamically adjusted using a ramp up or a ramp down to reduce the noise impact. The left and right channels of the up-sampled audio signal may be mixed, and later further up-sampled for transmission to an output device. The up-sampled mixed audio signal may be down-sampled for communication to, for example, a bluetooth radio.

Fig. 1 is an exemplary block diagram of a multimedia baseband processor for processing multiple wireless protocols according to an embodiment of the present invention. Referring to fig. 1, a wireless system 100 is shown that may correspond to, for example, a wireless handheld device. In this regard, U.S. patent application No.11/345,704, filed on 2006, 2/14, discloses a system and method for a processor that processes multiple wireless access communication protocols, which is incorporated herein by reference in its entirety. The wireless system 100 may include a baseband processor 102 and a plurality of RF subsystems 104. In this regard, for example, the RF subsystem may correspond to a WCDMA/HSDPA RF subsystem or a GSM/GPRS/EDGE RF subsystem. The wireless system 100 may also include a bluetooth radio 196, a plurality of antennas 192 and 194, a TV 119, a High Speed Infrared (HSIR) device 121, a PC debug module 123, a plurality of crystal oscillators 125 and 127, a SDRAM module 129, a NAND module 131, a Power Management Unit (PMU)133, a battery 135, a charger 137, a backlight 139, and a vibrator 141. A bluetooth radio 196 may be connected to the antenna 194. The bluetooth radio 196 may be integrated on a single chip. The wireless system 100 may further include an audio module 188, one or more of, for example, a speaker 190, one or more USB interfaces (e.g., USB devices 117 and 119), a Microphone (MIC)113, a speakerphone (speakerphone) 111, a keypad 109, one or more displays (e.g., LCD 107), one or more cameras (e.g., cameras 103 and 105), a removable memory (e.g., memory stick 101), and a UMTS Subscriber Identity Module (USIM) 198.

The baseband processor 102 may include a TV output module 108, an Infrared (IR) module 110, a universal asynchronous receiver/transmitter (UART)112, a Clock (CLK)114, a memory interface 116, a power control module 118, a slow clock module 176, an OTP memory module 178, a timer module 180, an inter-integrated circuit voice (I2S) interface module 182, an inter-integrated circuit (I2C) interface module 184, and an interference control module 186. The baseband processor 102 may further include a USB OTG (on-the-go) module 174, an AUXADC module 172, a general purpose I/o (gpio) module 170, an LCD module 168, a camera module 166, an SDIO module 164, a SIM interface 162, a Pulse Code Modulation (PCM) module 160. The baseband processor 102 may communicate with the bluetooth radio 196 through the PCM module 160 and, in some embodiments, may communicate with the bluetooth radio 196 through the UART 112 and/or the I2S module 182.

The baseband processor 102 may further include a plurality of transmit (Tx) digital-to-analog converters (DACs) 120, 126, a plurality of RF controllers 122, a., 128, and a plurality of receive (Rx) analog-to-digital converters (ADCs) 124, 130 for the in-phase (I) and quadrature (Q) signal components. In this regard, the receiving, controlling and/or transmitting operations are based on the type of transmission technology, such as EDGE, HSDPA and/or WCDMA. The baseband processor 102 may also include an SRAM module 152, an external memory control module 154, a security engine (security engine) module 156, a CRC generator module 158, a system interconnect 150, a modem accelerator 132, a modem control module 134, a stack processor module 136, a DSP subsystem 138, a DMAC module 140, a multimedia subsystem 142, a graphics accelerator 144, an MPEG accelerator 146, a JPEG accelerator 148. Although fig. 1 discloses a wireless system 100, the various aspects of the invention are not limited in this regard.

Fig. 2A is an exemplary block diagram of a multimedia baseband processor communicatively coupled to a bluetooth radio in accordance with an embodiment of the present invention. Referring to fig. 2A, a wireless system 200 is shown that includes a baseband processor 205, antennas 201a and 201b, a bluetooth radio 206, an output device driver 202, an output device 203, an input device 204, and a multimedia device 224. The wireless system 200 may include similar components as disclosed in fig. 1. The baseband processor 205 may include a modem 207, a Digital Signal Processor (DSP)215, a common memory 217, a core processor 218, an audio encoding/decoding unit (codec) 209, an analog processing unit 208, and a master clock 216. For example, the core processor 218 may be an ARM processor integrated in the baseband processor 205. The DSP215 may include a speech codec 211, an audio player 212, a PCM module 213, and an audio codec hardware controller 210. The core processor 218 may include an I2S module 221, a UART and Serial peripheral interface (UART/SPI) module 222, and a sub-band coding (SBC) codec 223. The bluetooth radio 206 may include a PCM module 214, an I2S module 219, and a UART 220.

The antennas 201a and 201b may comprise suitable logic, circuitry, and/or code that may enable the transmission and/or reception of wireless signals. The output device driver 202 may comprise suitable logic, circuitry, and/or code that may enable controlling the operation of the output device 203. In this regard, the output device driver 202 may receive at least one signal from the DSP215 and/or at least one signal generated using the analog processing unit 208. The output device 203 may comprise suitable logic, circuitry, and/or code that may enable playing, storing, and/or transmitting analog audio, voice, polyphonic ring tone, and/or mixing signals from the analog processing unit 208. For example, output device 203 may include speakers, a speakerphone, stereo speakers, headphones, and/or an audio storage device (e.g., a sound tape). The input device 204 may comprise suitable logic, circuitry, and/or code that may be enabled to receive analog audio and/or voice data and to communicate it to the analog processing unit 208 for processing. For example, input device 204 may include one or more microphones and/or auxiliary microphones. The multimedia device 224 may comprise suitable logic, circuitry, and/or code that may enable transmission of multimedia data to and from the core processor 218 of the baseband processor 205. For example, the multimedia device 224 may include a camera, a video recorder, a video display, and/or a storage device (e.g., a memory stick).

The bluetooth radio 206 may comprise suitable logic, circuitry, and/or code that may enable transmission, reception, and/or processing of information using a bluetooth radio protocol. In this regard, for example, the bluetooth radio 206 may support amplification, filtering, modulation, and/or demodulation operations. For example, the bluetooth radio 206 may transmit data from and/or to the baseband processor 205 through the PCM module 214, the I2S module 219, and/or the UART 220. In this regard, the Bluetooth radio 206 may communicate with the DSP215 via the PCM module 214 and with the core processor 218 via the I2S module 221 and the UART/SPI module 222.

The modem 207 in the baseband processor 205 may comprise suitable logic, circuitry, and/or code that may enable modulation or demodulation of signals transmitted via the antenna 201 a. The modem 207 may communicate with the DSP 205. The shared memory 217 may comprise suitable logic, circuitry, and/or code that may enable storage of data. The shared memory 217 may be used to transfer data between the DSP215 and the core processor 218. The master clock 216 may comprise suitable logic, circuitry, and/or code that may enable generation of at least one clock signal for various components of the baseband processor 205. For example, the master clock 216 may generate at least one clock signal for use by the analog processing unit 208, the audio codec 209, the DSP215, and/or the core processor 218.

The core processor 218 may comprise suitable logic, circuitry, and/or code that may enable processing of audio and/or voice signals that may be communicated to the DSP215 via the shared memory 217. The core processor 218 may comprise suitable logic, circuitry, and/or code that may enable processing of multimedia information communicated with the multimedia device 224. In this regard, for example, the core processor 218 may also control at least a portion of the operation of the multimedia device 224, such as generating signals for controlling data transmission. The core processor 218 may be used to communicate with the bluetooth radio 206 via the I2S module 221 and/or the UART/SPI module 22. For example, the core processor 218 may also be used to control at least a portion of the operation of the baseband processor 205. The SBC codec 223 in the core processor 218 may comprise suitable logic, circuitry, and/or code that may enable encoding and/or decoding of audio signals, such as music or mixed audio data, that may be communicated to the bluetooth radio 206.

For example, the DSP215 may comprise suitable logic, circuitry, and/or code that may be adapted to process a plurality of audio signals such as general purpose digital audio data, digital voice data, and/or digital polyphonic ring tone data. In this regard, the DSP215 may also generate data polyphonic ring tone data. For example, the DSP215 may also be used to generate at least one signal for controlling the operation of the output device driver 202 and/or the audio codec 209. The DSP215 may be used to communicate the processed audio and/or voice data to the core processor 218 and/or the bluetooth radio 206. The DSP215 may also be used to receive audio data and/or voice data from the bluetooth radio 206 and/or the multimedia device 224 through the core processor 218 and the common memory 217.

The speech codec 211 may comprise suitable logic, circuitry, and/or code that may enable encoding and/or decoding of speech data. The audio player 212 may comprise suitable logic, circuitry, and/or code that may enable encoding and/or decoding of audio or music data. For example, the audio player 212 may be used to process digital audio encoding formats such as MP3, WAV, AAC, uLAW/AU, AIFF, AMR, and MIMD. The audio codec hardware controller 210 may comprise suitable logic, circuitry, and/or code that may enable communication with the audio codec 209. In this regard, the DSP215 may transmit more than one audio signal for processing to the audio codec 209. Further, the DSP215 may transmit more than one signal for controlling the operation of the audio codec 209.

The audio codec 209 may comprise suitable logic, circuitry, and/or code that may enable processing of audio signals received from the DSP215 and/or the input device 204 via the analog processing unit 208. For example, the audio codec 209 may use multiple digital audio inputs, such as 16 or 18-bit inputs. The audio codec 209 may use multiple data sample rate inputs. For example, the audio codec 209 may accept digital audio signals sampled at a sample rate of, for example, 8kHz, 11.025kHz, 12kHz, 16kHz, 22.05kHz, 24kHz, 32kHz, 44.1kHz, and/or 48 kHz. The audio codec 209 may also support mixing of multiple audio sources. For example, the audio codec 209 may support at least three audio sources, such as general audio, polyphonic ringer (polyphonic ringer), and voice. In this regard, for example, generic audio and polyphonic ring sources may support multiple sampling rates that are acceptable to the audio codec 209, while voice sources may support some of the multiple sampling rates, such as 8kHz and 16 kHz.

The audio codec 209 may support independent and dynamic digital volume and gain control for each audio source it supports. The audio codec 209 may also support muting operations that may be applied to each audio source individually. For example, the audio codec 209 may support adjustable and programmable ramp up and ramp down operations for volume control to reduce the effects of clicks and/or other noise. The audio codec 209 may also be used to download and/or program a multi-band equalizer to be used in a portion of the audio source. For example, a 5-band equalizer may be used for audio signals received from general audio and/or polyphonic ring sound sources.

The audio codec 209 may also use a programmable wireless impulse response (IIR) filter and/or a programmable Finite Impulse Response (FIR) filter on at least a portion of the audio sources to compensate for passband magnitude and phase fluctuations among the different output devices. In this regard, the filter coefficients may be dynamically set or programmed based on the current operation. Also, for example, the filter coefficients may be switched all within one time slot, or switched sequentially. For example, audio codec 209 may also encode a digital output signal for analog processing using a modulator, such as a delta-sigma (delta-sigma) modulator.

In operation, the audio codec 209 in the wireless system 200 communicates with the DSP215 to communicate audio data and control signals. Control registers for the audio codec 209 may be located in the DSP 215. For voice data, the audio sample samples do not need to be buffered between the DSP215 and the audio codec 209. For generic audio data and polyphonic ringtone paths, audio sample samples from the DSP215 may be written to the FIFO and then the audio codec 209 may extract the data sample samples. The DSP215 and the core processor 218 may exchange audio signals and control information through the shared memory 217. The core processor 218 may write the PCM audio directly to the common memory 217. The core processor 218 may also transmit encoded audio data to be subjected to precision calculation processing to the DSP 215. In this regard, the DSP215 may decode the data and write back the PCM audio signals to the shared memory 217 for access by the core processor 218. In addition, the DSP215 may decode the data and transmit the decoded data to the audio codec 209. The core processor 218 may communicate with the audio codec 209 through the DSP 215. Although fig. 2A discloses a wireless system 200, the various aspects of the invention are not limited in this regard.

Fig. 2B is an exemplary block diagram of an audio codec in a multimedia baseband processor according to an embodiment of the present invention. Referring to fig. 2B, an audio codec 230 corresponding to the audio codec 209 disclosed in fig. 2A is shown. The audio codec 230 may include a first portion for transmitting data from a DSP (e.g., DSP 215) to an output device (e.g., output device 203) and/or a bluetooth radio (e.g., bluetooth radio 206), and a second portion for transmitting data from an input device (e.g., input device 204) to the DSP 215.

The first portion of the audio codec 230 may include a general audio path from the DSP215, a voice path from the DSP215, and a polyphonic ring tone or polyphonic ring tone path from the DSP 215. In this regard, the audio codec 230 may use separate processing paths before mixing each audio source or audio source type that may be supported. The general audio path may include a FIFO 231A, a left/right (L/R) channel mixer 233A, a left channel audio processing module 235A, and a right channel audio processing module 235B. The voice path may include a voice processing module 232 and a left/right (L/R) channel selector 234. The multi-tone ringtone path may include a FIFO231B, an L/R mixer 233B, a left channel audio processing module 235C, and a right channel audio processing module 235D.

For the generic audio path and the polyphonic ring tone path, FIFOs 231A and 231B may comprise suitable logic, circuitry, and/or code that may enable storage of left and right channel audio signals from a generic audio source and a polyphonic ring sound source, respectively. In this regard, each audio signal may be sampled at one of a plurality of sampling rates supported by the audio codec 230 for general audio data and/or polyphonic ring tone data. L/R mixer 233A may comprise suitable logic, circuitry, and/or code that may enable mixing of the input right and left channels from FIFO 231A to generate mixed left and right channel outputs that may be communicated to audio processing modules 235A and 235B, respectively. L/R mixer 233B may comprise suitable logic, circuitry, and/or code that may enable mixing of the input right and left channels from FIFO231B to generate mixed left and right channel outputs for transmission to audio processing modules 235C and 235D, respectively. The audio processing modules 235A, 235B, 235C, and 235D may comprise suitable logic, circuitry, and/or code that may enable processing of audio signals. In this regard, for example, audio processing modules 235A, 235B, 235C, and/or 235D may support equalization operations, compensation operations, rate adaptation operations, and/or volume control operations. The output of the audio processing modules 235A and 235C may be passed to a left channel side branch mixer 237A. The outputs of audio processing modules 235B and 235D may be passed to right channel side branch mixer 237B. When the audio processing modules 235A, 235B, 235C, and 235D pass their outputs to the mixers 237A and 237B, the rate adaptation operation serves to bring the outputs to the same sample rate.

For the voice path, the voice processing module 232 may comprise suitable logic, circuitry, and/or code that may enable processing of voice received from the DSP215 at one of a plurality of voice sample rates supported by the audio codec 230. In this regard, for example, the speech processing module 232 may support compensation operations, rate adaptation operations, and/or volume control operations. The L/R selector 234 may comprise suitable logic, circuitry, and/or code that may enable separation of speech signal content into a right channel signal that may be communicated to the mixer 237B and a left channel signal that may be communicated to the mixer 237A. When the speech processing module 232 passes its output to the mixers 237A and 237B, the rate adaptation operation serves to place the output at the same sample rate as the output of the audio processing modules 235A, 235B, 235C, and 235D. For example, the input signals to the mixers 237A and 237B may be adjusted to have the same sampling rate by up-and/or down-sampling within the audio processing modules 235A, 235B, 235C, and 235D and the speech processing module 232.

The mixer 237A may comprise suitable logic, circuitry, and/or code that may enable mixing of the outputs of the audio processing blocks 235A and 235C and the left channel output of the L/R selector 234. The mixer 237B may comprise suitable logic, circuitry, and/or code that may enable mixing of the outputs of the audio processing blocks 235B and 235D and the right channel output of the L/R selector 234. The output of mixer 237A may be coupled to the left channel branch of audio codec 230 and the output of mixer 237B may be coupled to the right channel branch of audio codec 230. Interpolator 238A, sample rate converter 239A, FIFO 242A, delta sigma modulator 241A, and interpolation filter 240A are also coupled to the left channel branch. Interpolator 238B, sample rate converter 239B, FIFO 242B, delta-sigma modulator 241B, and interpolation filter 240B are also connected to the right channel branch. The interpolation filters 240A and 240B are optional and may be used for testing, such as in connection with audio testing tools that use an audio precision interface and/or any other interface suitable for use.

The interpolators 238A and 238B may comprise suitable logic, circuitry, and/or code that may enable up-sampling of the outputs of the mixers 237A and 237B. The sample rate converters 239A and 239B may comprise suitable logic, circuitry, and/or code that may enable adjustment of the output signals from the nulls 238A and 238B to a sample rate that may be used by the DSP215 and/or the core processor 218 for communication with the bluetooth radio 206. At this point, for example, the sample rate converters 239A and 239B may adjust the sample rate to 44.1kHz or 48kHz for subsequent transmission to the bluetooth radio 206. For example, the sample rate converters 239A and 239B may be implemented as interpolators, such as linear interpolators, or using more accurate or complex decimation filters. The audio and/or voice signal output from the sample rate converters 239A and 239B may be passed to FIFOs 242A and 242B before being passed to the DSP215 and/or core processor 218 and then to the bluetooth radio 206. The delta sigma modulators 241A and 214B may comprise suitable logic, circuitry, and/or code that may be operable to further reduce the bit width of the outputs of the interpolators 238A and 238B to obtain a particular level of output signal. For example, the delta sigma modulators 241A and 214B may receive 23-bit 6.5MHz signals from the interpolators 238A and 238B and further reduce the signal level to generate 6.5MHz 17-level signals.

The second portion of the audio codec 230 may include a digital decimation filter 236. The digital decimation filter 236 may comprise suitable logic, circuitry, and/or code and may, for example, be operable to process signals received from the analog processing unit 208 and then pass the processed audio signals to the DSP 215. For example, the digital decimation filter 236 may include, for example, an FIR decimation filter and/or a CIC decimation filter, followed by a plurality of IIR compensation and decimation filters.

Fig. 2C is an exemplary block diagram of an analog processing unit in a multimedia baseband processor according to an embodiment of the present invention. Referring to fig. 2C, an analog processing unit 250 is shown that corresponds to the analog processing unit 208 disclosed in fig. 2A. The analog processing unit 250 may include a first part for digital-to-analog conversion and a second part for analog-to-digital conversion. The first portion may comprise a first digital-to-analog converter (DAC)251A and a second DAC251B, each comprising suitable logic, circuitry, and/or code that may be operable to convert digital signals from the left and right mixer branches of the audio codec 230, respectively, to analog signals. The output of DAC 251A may be communicated to variable gain amplifiers 253A and 235B. The output of DAC251B may be communicated to variable gain amplifiers 253C and 235D. The variable gain amplifiers 253A, 235B, 253C, and 235D may comprise suitable logic, circuitry, and/or code, respectively, that may enable dynamic changes in the gain to be applied to their corresponding input signals. For example, the output of amplifier 253A can be communicated to at least one left speaker, while the output of amplifier 253D can be communicated to at least one right speaker. For example, the outputs of amplifiers 253B and 253C may be combined and transmitted to a set of headphones.

The second portion of analog processing unit 250 may include a Multiplexer (MUX)254, a variable gain amplifier 255, and a multi-stage delta-sigma analog-to-digital converter (ADC) 252. The MUX 254 may comprise suitable logic, circuitry, and/or code that may enable selection of an input analog signal from a microphone or an auxiliary microphone. The variable gain amplifier 255 may comprise suitable logic, circuitry, and/or code that may enable dynamic changes in the gain applied to the analog output of the MUX 254. The multi-stage delta-sigma ADC 252 may comprise suitable logic, circuitry, and/or code that may enable conversion of the amplified output of the variable gain amplifier 255 into a digital signal that may be passed to the digital decimation filter 236 within the audio codec 230 disclosed in fig. 2B. In some examples, the multi-stage delta-sigma ADC 252 may be implemented as a 3-stage delta-sigma ADC. Although fig. 2C discloses an exemplary analog processing unit 250, aspects of the invention are not limited in this regard.

Fig. 2D is a flowchart of exemplary steps for data mixing in an audio codec according to an embodiment of the present invention. Referring to fig. 2D, a flow 270 is shown. After the initial step 272, in step 274, the audio codec 230 disclosed in fig. 2B may receive two or more audio signals from a general audio source, a polyphonic ring tone audio source, and/or a voice audio source, for example, through the DSP 215. In step 276, the audio codec 230 may be used to select two or more of the received audio signals for mixing. In this regard, various portions of the audio codec 230 may be programmed, adjusted, and/or controlled to mix selected audio signals. For example, a muting operation may be used to determine the audio signal to be mixed in the audio codec 230.

In step 278, when the signal to be mixed includes general audio and/or polyphonic ring tone audio, the signal may be processed in the audio processing modules 235A, 235B, 235C, and 235D, where an equalization operation, a compensation operation, a rate adaptation operation, and/or a volume control operation may be performed on the signal. For rate adaptation operations, the data sample rate of the incoming generic audio or polyphonic ringtone audio signals may be matched to the particular sample rate used for mixing. In step 280, when speech is included in the audio signal to be mixed, the speech signal is processed in the speech processing module 232, where a compensation operation, a rate adaptation operation, and/or a volume control operation may be performed on the speech signal. For rate adaptation operations, the data sample rate of the input speech signal may be matched to the particular sample rate used for mixing.

In step 282, the left channel general audio and polyphonic ringtone signals generated by the audio processing modules 235A and 235C are mixed with the left channel speech signal generated by the L/R selector 234 in the mixer 237A. Likewise, the right-channel general audio and polyphonic ringtone signals generated by the audio processing modules 235B and 235D are mixed with the right-channel speech signal generated by the L/R selector 234 in the mixer 237B. In step 284, the outputs of the mixers 237A and 237B corresponding to the mixed left and right channel channels are upsampled by the interpolators 238A and 238B, respectively. The implementation of the sample rate converters 239A and 239B may be simplified by generating signals with higher sample rates after mixing.

In step 286, when transmitting the up-sampled mixed left and right channel signals to an output device (such as output device 203 disclosed in fig. 2A), audio codec 230 may use delta sigma modulators 241A and 214B to reduce the digital audio signal to a signal having a fewer but most suitable number of stages. At this point, the output signals may be delivered to DACs 251A and 251B and to variable gain amplifiers 253A, 253B, 253C and 253D, respectively, disclosed in fig. 2C for analog conversion and signal gain, respectively. In step 288, when transmitting the up-sampled mixed left and right channel signals to the bluetooth radio 206, the audio codec 230 may down-sample the audio signals using the sample rate converters 239A and 239B, then transmit the down-sampled signals to the FIFOs 242A and 242B. The DSP215 may extract the downsampled audio signal from the FIFOs 242A and 242B and then communicate the digital audio signal to the bluetooth wireless transceiver device 206. Although fig. 2D discloses exemplary steps for mixing audio sources, aspects of the invention are not limited in this regard.

Fig. 3A is an exemplary block diagram of a multi-band equalizer according to an embodiment of the present invention. Referring to fig. 3A, a multi-band equalizer 300 is shown that may be used for equalization operations in the audio processing modules 235A, 235B, 235C, and/or 235D as disclosed in fig. 2B. The multi-band equalizer 300 may include a plurality of band pass filters/low pass filters (BPF/LPF)302, a plurality of delays 304, a plurality of variable gain amplifiers 306, a first summer 308, and a second summer 310. The multi-band equalizer 300 may include multiple paths, where a first path may be considered a direct path without the use of filters. Each BPF/LPF 302 may comprise suitable logic, circuitry, and/or code that may be operable to filter the input signal to a particular frequency band. In this regard, each BPF/LPF 302 may be set to have a different bandwidth and a different center frequency. Each of the plurality of delays 304 may comprise suitable logic, circuitry, and/or code that may be adapted to match the group delay error between different frequency bands. For example, for band 2, delay T2 may be used, while for band N, delay T (N +1) may be used. The plurality of variable gain amplifiers 306 may comprise suitable logic, circuitry, and/or code that may enable adjusting the gain for the corresponding frequency band. At this point, according to the operation of the multiband equalizer 300, for example, when the gain is positive, the gain of the corresponding frequency band may be increased, and for example, when the gain is negative, the gain of the corresponding frequency band may be decreased. For example, the BPF/LPF 302, the delay 304, and/or the variable gain amplifier 306 may be programmed and dynamically adjusted. The adders 308 and 310 may comprise suitable logic, circuitry, and/or code that may enable the outputs of the variable gain amplifier 306 to be added to generate an equalized output signal.

In operation, an input signal may be passed to each path in the multi-band equalizer 300 for processing. The first path does not use a filter and the input signal can be delayed directly by T1 and then amplified by gain g1 provided by variable gain amplifier 306 connected to the first path. In the second and subsequent paths, the input signal is filtered by the respective BPF/LPF 302 connected to each path, then delayed by the corresponding delay value T2, …, T (N +1) connected to each path, and amplified by the corresponding gain g2, …, g (N +1) connected to each path. The outputs of the variable gain amplifiers 306 connected to paths 2, …, N +1 are summed by the summer 306. The output of adder 306 and the output of variable gain amplifier 302 connected to the first path are added by adder 310 to generate an equalized output signal.

Each BPF/LPF 302 may be implemented using an FIR filter, an IIR filter, or a combination of FIR and IIR. In some examples, when implemented using FIR filters and using the same filter length for each band, delay adjustment may be used only on paths that do not use filters. Moreover, the data store for one filter may be shared among at least a portion of the remaining filters. When implemented using an IIR filter, the group delay will be frequency dependent and need not be uniform across the entire passband. In this regard, the amount of delay may be modified to an average group delay. Although fig. 3A discloses a typical multi-band equalizer, the various aspects of the invention are not limited in this regard.

Fig. 3B is an exemplary block diagram of a multi-band equalizer using biquad bandpass filtering according to an embodiment of the invention. Referring to fig. 3B, a multi-band equalizer 320 is shown in which each BPF/LPF 302 is implemented using a biquad filter 324 and a ring buffer 322 is used to implement the delay. In this regard, variable gain amplifier 330 and adders 332 and 334 may correspond to variable gain amplifier 306 and adders 308 and 310 disclosed in fig. 3A. Each biquad filter 324 may include four adders 326 and two delays 328 to provide suitable filtering operations. In this regard, the filter coefficients a11, b11, a12, b12, and b10 may be set to provide suitable filtering operations. Each biquad filter 324 may be programmed and dynamically adjusted. The ring buffer 322 may comprise suitable logic, circuitry, and/or code that may enable sharing of data storage to provide suitable delay for each path in the multi-band equalizer 320.

Fig. 4A is an exemplary block diagram of a compensation operation in an audio codec according to an embodiment of the present invention. Referring to fig. 4A, a portion of the audio processing modules 235A, 235B, 235C, and/or 235D disclosed in fig. 2B is shown, including an equalizer 402 and an IIR compensation filter 404. The equalizer 402 may correspond to the multi-band equalizers 300 and 320 disclosed in fig. 3A-3B, respectively. IIR compensation filter 404 may comprise suitable logic, circuitry, and/or code that may enable further adjustment of the audio signal from a generic audio and/or polyphonic ring sound source by providing frequency response compensation for distortion introduced by an audio output device, such as a speaker or earbud. For example, IIR compensation filter 404 may be implemented using a biquad filter. The FIR compensation filter 406 disclosed in fig. 4A may be used as an alternative filter to the IIR compensation filter 404. In this regard, the FIR compensation filter 406 may comprise suitable logic, circuitry and/or code that may enable frequency response compensation of distortion introduced by the audio output device. FIR compensation filter 406 may include nonlinear phases and the filter coefficients need not be symmetric around the center branch. For example, the selection of either the IIR compensation filter 404 or the FIR compensation filter 406 may be programmable and dynamically adjustable.

For IIR compensation filter 404 and FIR compensation filter 406, it may be necessary to adjust or reset the filter coefficients and filter length as the sampling rate changes. Also, the filter coefficients and filter length must be adjusted or reset when the audio output device changes (e.g., switches between headphones and loudspeakers). At this point, the filter storage may be set to 0, for example, at power-on or reset. Although fig. 4A discloses an exemplary compensation operation, aspects of the present invention are not limited thereto.

Fig. 4B is an exemplary block diagram of an audio processing data path according to an embodiment of the present invention. Referring to fig. 4B, an audio data path 410 is shown including an audio processing module 412, a mixer 431, an interpolator 433, a delta-sigma modulator 435, and a sample rate converter 437. The audio processing module 412 may be the same or substantially the same as the audio processing modules 235A, 235B, 235C, and 235D disclosed in fig. 2B. Likewise, the mixer 431, interpolator 433, delta-sigma modulator 435, and sample rate converter 437 may be the same or substantially the same as the corresponding devices disclosed in fig. 2B.

The audio processing module 412 may include an equalizer 411, a compensation filter 413, an interpolator module 415, half-band interpolation filters 417, 419, 421, 423, and 425, a rate adapter 427, a buffer 428, and a variable gain amplifier 429. The equalizer 411 may be the same as or substantially the same as the equalizer 402 disclosed in fig. 4A. The compensation filter 413 may comprise a cascaded biquad filter 413A and a FIR filter 413B. The interpolator module 415 may include a half-band interpolator filter (HBIF)415A and an Infinite Impulse Response (IIR) interpolator 415B. The digital audio input signal 414 from the equalizer 411 may be passed to a compensation filter 413. The output of the compensation filter 413 may be passed to an interpolator module 415 and then to the HBIF 1417. The output of HBIF1417 is passed to HBIF 2419, then similarly to HBIF 3421, HBIF 4423 and HBIF 5425. For example, the output of the HBIF 5425 may be passed to the next circuits, such as the rate adapter 427, buffer 428, and variable gain amplifier 429. The output of variable gain amplifier 429 may be passed to further circuitry such as mixer 431, interpolator 433, sample rate converter 437 and delta-sigma modulator 435. The output of the delta sigma modulator 435 may be communicated to an output device and the output of the sample rate converter 437 may be communicated to a bluetooth radio.

The compensation filter 413 may comprise suitable logic, circuitry, and/or code that may enable, for example, compensation for distortion introduced by an output device, such as a speaker and/or an ear bud. In one embodiment of the invention, a cascaded biquad filter 413A or FIR filter 413B may be used for distortion compensation. In this regard, the cascaded biquad filter 413A or FIR filter 413B may be selected to compensate for distortion of the digital audio input signal 414. In embodiments where cascaded biquad filters 413A are available, signals may be sent to their inputs, and conversely, in embodiments where FIR filters 413B are available, input signals may be sent to their inputs. For example, cascaded biquad filters 413A may be used for speech signals. FIR filter 413B may be used for compensation of high quality audio distortion in digital audio input signal 414.

The interpolator modules 415, 417, 419, 421, 423, and 425 may comprise suitable logic, circuitry, and/or code that may enable up-conversion of the input digital audio signal by a factor of two at each stage. Table 1 below shows the sample rate in kHz for each stage in a 5-stage interpolator, according to an embodiment of the invention, up-conversion of which begins with the input audio signal entering the interpolator module 415 and then ascending through each interpolator to the HBIF 5425.

As shown in the example in table 1, the sampling rate supported for the digital audio input signal may be doubled at each stage to rise to a certain sampling rate, thereby reducing the number of sampling rates from 9 to 3. In the example where the sample rate reaches the final value at a level before HBIF5, such as the sample rates of 512, 705.6, or 768kHz at HBIF3 or HBIF4 shown in table 1, the subsequent HBIF stages will not be enabled. For example, the number of sampling rates may be further reduced using rate adaptor 427. Although fig. 4B discloses exemplary compensation filter 413 and data rate interpolator modules 415, 417, 419, 421, 423, and 425, rate adaptor 427, buffer 428, and variable gain amplifier 429, aspects of the present invention are not limited in this respect.

Input (kHz)	IIR/HBIF0	HBIF1	HBIF2	HBIF3	HBIF4	HBIF5
							8	16	32	64	128	256	512
12	24	48	96	192	384	768
							16	32	64	128	256	512	512
24	48	96	192	384	768	768
							32	64	128	256	512	512	512
48	96	192	384	768	768	768

Input (kHz)	IIR/HBIF0	HBIF1	HBIF2	HBIF3	HBIF4	HBIF5
							11.025	22.05	44.1	88.2	176.4	352.8	705.6
22.05	44.1	88.2	176.4	352.8	705.6	705.6
							44.1	88.2	176.4	352.8	705.6	705.6	705.6

TABLE 1

Fig. 5A is an exemplary block diagram of a GSM voice usage scenario in accordance with an embodiment of the present invention. Referring to fig. 5A, a typical usage scenario is shown for the wireless system 200 disclosed in fig. 2A for GSM voice applications. In this exemplary use scenario, a receive signal path, such as the illustrated signal path 504, may include receiving a GSM voice signal via an antenna 201a communicatively coupled to the baseband processor 205. The signal path 504 may include processing GSM voice signals in the modem 207, the voice codec 211, the audio codec hardware control 210, the audio codec 209, and the analog processing unit 208. In this regard, the processing provided by the audio codec 209 and the analog processing unit 208 may be the same as or substantially similar to the audio codec 230 disclosed in fig. 2B and the audio processing unit 250 disclosed in fig. 2C. The signal path 504 may also include transmitting the analog signal generated by the analog processing unit 208 to the output device 203.

Also included in this exemplary use scenario is a transmit signal path, such as the illustrated signal path 502, which may be used to convey analog speech signals generated by the input device 204 to the analog processing unit 208 in the baseband processor 205. The signal path 502 may also be used to process voice signals in the audio codec 209, audio codec hardware control 210, voice codec 211, and modem 207. In this regard, the processing provided by the audio codec 209 and the analog processing unit 208 may be the same as or substantially similar to the audio codec 230 disclosed in fig. 2B and the audio processing unit 250 disclosed in fig. 2C. For example, signal path 502 may also be used to broadcast processed voice signals through antenna 201a in accordance with the GSM communication protocol. In this scheme, the audio codec 209 may process the speech signal directly without mixing it with the audio signal of any other source. Although fig. 5A discloses a typical use of an audio codec for GSM speech signals, the various aspects of the invention are not limited in this regard.

Fig. 5B is an exemplary block diagram of a GSM voice usage scenario with a bluetooth radio in accordance with an embodiment of the present invention. Referring to fig. 5B, a typical usage scenario is shown for the wireless system 200 disclosed in fig. 2A for GSM voice applications via the bluetooth radio 206. In this exemplary use scenario, a receive signal path, such as signal path 508 shown, may receive GSM voice signals via antenna 201a communicatively coupled to baseband processor 205. The signal path 508 may also be used to process GSM signals in the modem 207 and the voice codec 211. Signal path 508 may also be used to transmit processed voice signals through PCM module 213 in DSP215 to PCM module 214 in Bluetooth radio 206. In this usage scenario, the audio codec 209 and the analog processing unit 208 do not need to process the audio signal.

Also included in this exemplary use scenario is a transmit signal path, shown as signal path 506, which may be used to convey analog voice signals from PCM module 214 in bluetooth radio 206 to PCM module 213 in DSP 215. The signal path 506 may also be used to process voice signals in the voice codec 211 and the modem 207. For example, signal path 506 may also be used to broadcast processed voice signals through antenna 201a in accordance with the GSM communication protocol. In this scheme, the audio codec 209 and the analog processing unit 208 do not need to process the speech signal. Although fig. 5B discloses an exemplary use scenario for GSM voice signals via bluetooth radio 206, the various aspects of the present invention are not limited in this regard.

Fig. 5C is an exemplary block diagram of a usage scenario for GSM voice and audio mixing according to an embodiment of the present invention. Referring to fig. 5C, a typical usage scenario of the wireless system 200 disclosed in fig. 2A for GSM voice and audio mixing applications is shown. In this exemplary use scenario, there may be a voice receive signal path, shown as signal path 512, and an audio receive signal path, shown as signal path 510. The signal path 512 may be used to receive GSM voice signals through the antenna 201a communicatively coupled to the baseband processor 205. The signal path 512 may also be used to process GSM voice signals in the modem 207, the voice codec 211, and the audio codec hardware control 210. The signal path 512 may also be used to mix the speech signal with the audio signal from the signal path 510 in the audio codec 209 and process the mixed signal in the analog processing unit 208. In this regard, the processing provided by the audio codec 209 and the analog processing unit 208 may be the same as or substantially similar to that provided by the audio codec 230 disclosed in fig. 2B and the audio processing unit 250 disclosed in fig. 2C. Signal path 512 may also be used to communicate the mixed analog voice and audio signals generated by analog processing unit 208 to output device 203.

In this exemplary use scenario, signal path 510 may also be used to receive audio signals, such as music signals, via antenna 201a communicatively coupled to baseband processor 205. The signal path 510 may also be used to process audio signals in the modem 207, audio player 212, and audio codec hardware control 210. The signal path 510 may also be used to mix the audio signal with the GSM speech signal from the signal path 512 in the audio codec 209 and process the mixed signal in the analog processing unit 208. In this regard, the processing provided by the audio codec 209 and the analog processing unit 208 may be the same as or substantially similar to that provided by the audio codec 230 disclosed in fig. 2B and the audio processing unit 250 disclosed in fig. 2C. Signal path 510 may also be used to communicate the mixed analog voice and audio signals generated by analog processing unit 208 to output device 203. Although fig. 5C discloses a typical usage scheme for mixing GSM speech and audio signals in an audio codec, the various aspects of the invention are not limited in this regard.

Fig. 5D is an exemplary block diagram of a usage scheme for GSM voice and audio mixing by a bluetooth radio in accordance with an embodiment of the present invention. Referring to fig. 5D, a typical usage scenario is shown for the wireless system 200 disclosed in fig. 2A for GSM voice and audio mixing applications via the bluetooth radio 206. In this exemplary use scenario, there may be a voice receive signal path, as shown signal path 516, and an audio receive signal path, as shown signal path 514, and a mixing signal path, as shown signal path 518. Signal path 516 may be used to receive GSM voice signals through antenna 201a communicatively coupled to baseband processor 205. The signal path 516 may also be used to process GSM voice signals in the modem 207, the voice codec 211, and the audio codec hardware control 210. The signal path 516 may also be used to mix the speech signal with the audio signal from the signal path 514 in the audio codec 209. In this regard, the audio codec 209 may be the same as or substantially similar to the audio codec 230 disclosed in fig. 2B.

In this exemplary use scenario, signal path 514 may be used to receive audio signals, such as music signals, via antenna 201a communicatively coupled to baseband processor 205. The signal path 514 may also be used to process audio signals in the modem 207, audio player 212, and audio codec hardware control 210. The signal path 514 may also be used to mix the audio signal with the GSM speech signal from the signal path 516 in the audio codec 209. In this regard, the processing provided by the audio codec 209 and the analog processing unit 208 may be the same as or substantially similar to the audio codec 230 disclosed in fig. 2B.

In this typical usage scenario, a signal path 518 may be used to mix the speech and audio signals generated by the audio codec 209 to the shared memory 217 and from the shared memory 217 to the SBC codec 223 in the core processor 218. Signal path 518 may also be used to transmit the output of SBC codec 223 to Bluetooth radio 206 through UART/SPI 222 in core processor 218 and UART 220 in Bluetooth radio 206. While fig. 5D discloses an exemplary use scenario for mixing GSM voice and audio signals in an audio codec via a bluetooth radio, the various aspects of the invention are not limited in this regard.

In one embodiment of the invention, the audio codec disclosed in fig. 2A and 2B may be an integrated circuit integrated in a wireless device, which may be used to up-sample two or more audio signals to the same data sample rate. Each audio signal received by the integrated circuit may be received at a plurality of data sample rates. The integrated circuit may be used to mix the left and right channels of the up-sampled audio signal separately. In addition, the integrated circuit may also be used to up-sample the mixed left and right channels for subsequent delivery to an output device communicatively coupled to the integrated circuit. For example, the audio signal may include digital audio data, digital voice data, and digital polyphonic ring tone data.

The integrated circuit may be configured to up-sample an audio signal by at least one half-band interpolation operation. The integrated circuit may also be used to downsample the upsampled mixed left and right channels for transmission to a bluetooth radio. The integrated circuit may dynamically adjust a gain of at least one of left and right channels of the up-sampled audio signal. In this regard, the integrated circuit may be used for programming of a ramp up or ramp down to dynamically adjust the gain. The integrated circuit may also perform multi-band equalization on the audio signal prior to upsampling the audio signal to the same data sample rate. Furthermore, the integrated circuit may be configured to select a Finite Impulse Response (FIR) filter for compensating the multi-channel equalized audio signal prior to upsampling the audio signal to the same data sample rate.

Accordingly, the present invention may be realized in hardware, software, or a combination of hardware and software. The present invention can be realized in a centralized fashion in at least one computer system, or in a distributed fashion where different elements are spread across several interconnected computer systems. Any kind of computer system or other apparatus adapted for carrying out the methods described herein is suited. A typical combination of hardware and software could be a general purpose computer system with a computer program that, when being loaded and executed, controls the computer system such that it carries out the methods described herein.

The present invention may also be implemented by a computer program product, comprising all the features enabling the implementation of the methods of the invention, when loaded in a computer system. The computer program in this document refers to: any expression, in any programming language, code or notation, of a set of instructions intended to cause a system having an information processing capability to perform a particular function either directly or after either or both of the following: a) conversion to other languages, codes or symbols; b) reproduced in a different format.

While the invention has been described with reference to specific embodiments, it will be understood by those skilled in the art that various changes may be made and equivalents may be substituted without departing from the scope of the invention. In addition, many modifications may be made to adapt a particular situation or material to the teachings of the invention without departing from its scope. Therefore, it is intended that the invention not be limited to the particular embodiment disclosed, but that the invention will include all embodiments falling within the scope of the appended claims.

Claims (8)

1. A method for audio signal processing, the method comprising:

upsampling a plurality of audio signals to a same data sample rate in an integrated circuit of a wireless device, wherein each of the audio signals is received at one of a plurality of data sample rates within the integrated circuit;

dynamically adjusting a gain of the obtained upsampled audio signal using a ramp up or a ramp down;

mixing left and right channels of the up-sampled audio signal, respectively;

the mixed left and right channels are up-sampled at the same sampling rate for subsequent delivery to an output device communicatively coupled to the integrated circuit.

2. The method for audio signal processing as claimed in claim 1, wherein the audio signal may comprise digital audio data, digital voice data and digital polyphonic ring tone data.

3. A method for audio signal processing according to claim 1, further comprising upsampling the audio signal by at least one half-band interpolation operation.

4. The method for audio signal processing according to claim 1, further comprising down-sampling the up-sampled mixed left and right channels for transmission to a bluetooth radio.

5. The method for audio signal processing according to claim 1, characterized in that the method further comprises dynamically adjusting a gain on at least one of the left and right channels of the up-sampled audio signal.

6. A system for audio signal processing, the system comprising:

an integrated circuit located in a wireless device, the integrated circuit comprising:

means for upsampling a plurality of audio signals to a same data sample rate, wherein each of said audio signals is received within said integrated circuit at one of a plurality of data sample rates;

means for dynamically adjusting a gain of the obtained upsampled audio signal using a ramp up or a ramp down;

means for mixing left and right channels of the up-sampled audio signal;

means for upsampling the mixed left and right channels at the same sample rate for delivery to an output device communicatively coupled to the integrated circuit.

7. The system for audio signal processing according to claim 6, wherein the audio signal comprises digital audio data, digital voice data, and digital polyphonic ring tone data.

8. The system according to claim 6, wherein said integrated circuit upsamples said audio signal by at least one half-band interpolation operation.