HK1119840B - Single chip microcontroller including battery management and protection - Google Patents

Abstract

A microcontroller is disclosed. The microcontroller comprises a processor system and a high voltage interface coupled to the processor system and adapted to be coupled to a battery. The microcontroller further includes a battery management system for monitoring the battery and managing the battery based upon th monitoring of the battery. The microcontroller is a single chip. This one-chip solution saves design cost and PCB space in addition to broadening the functionality of the smart battery application. With the accuracy of the microcontroller, the charge status of the battery can be predicted more accurately and therefore effectively increases actual battery capacity.

Description

Single chip microcontroller with battery management and protection

Technical Field

The present invention relates generally to microcontrollers, and more particularly to single chip microcontrollers incorporating a battery management and protection system.

Background

There is an increasing demand for portable applications such as notebook computers, cellular phones, and digital cameras. These applications are increasingly miniaturized, advanced and accompanied by more intense price competition. These strong demands can be circumvented without the use of components, the essential application power source, i.e. the battery, of course being no exception. The development of battery capacity is lagging behind the requirements of applications, and the control of chemical reactions in batteries is subject to strict safety requirements, which makes it difficult to break through the limitations of chemical technology. It is desirable for batteries to be smaller in size and less expensive than in applications, which makes it more difficult for battery manufacturers to keep their days.

Advanced batteries, or smart batteries, contain a large number of electronic components. This includes fail-safe circuitry to ensure that the battery cells are not damaged or endangered by the user; a monitoring function and logic for analyzing the battery condition and estimating the remaining capacity according to the battery load; and communication with the main program. Existing smart battery applications are implemented using at least two integrated circuits: a microcontroller for battery management and an analog front end to ensure battery protection and measurement. In addition, some require a third chip necessary for remaining charge estimation and other monitoring parameters, namely an EEPROM containing data specific to the battery chemistry. These solutions are costly and take up board space.

Also, rechargeable batteries generally have a low current capability. For applications requiring high instantaneous energy, this problem is overcome by using many cells in series. This results in a higher voltage, resulting in higher energy at lower currents. Higher voltages are a problem for standard semiconductors, as these semiconductors can typically handle voltages between 2-5 volts. Smart battery manufacturers address this high voltage input/output problem by using separate driver circuits. This adds to the cost, weight and complexity of the system.

Accordingly, there is a need for a system and method for overcoming the above-mentioned problems. The present invention addresses such a need.

Disclosure of Invention

A single chip microcontroller is disclosed. The single chip microcontroller includes a processor system and a high voltage interface coupled to the processor system, the high voltage interface adapted to couple to a battery. The microcontroller also includes a battery management system for monitoring the battery and managing the battery based on the battery monitoring. The microcontroller is a single chip. In addition to extending the functionality of the smart battery application, this single chip solution also saves design cost and PCB space. By virtue of the precision of the microcontroller, the state of charge of the battery can be predicted more accurately, thereby effectively increasing the actual battery capacity.

Drawings

Fig. 1 is a block diagram of a specific embodiment of a microcontroller according to the present invention.

Fig. 2 is a block diagram of an embodiment of a voltage regulator according to the present invention.

Fig. 3 is a block diagram of one embodiment of a FET control system according to the present invention.

Fig. 3A is a schematic diagram of an operating circuit using the FET control system according to the present invention.

Fig. 4 shows an embodiment of a cell-balanced FET layout according to the present invention.

Fig. 5 shows a specific embodiment of the voltage ADC according to the present invention.

FIG. 6 is a block diagram of a particular embodiment of a CC-ADC.

Fig. 7 shows an embodiment of a low power consumption bandgap reference voltage source according to the present invention.

Fig. 8 shows a specific embodiment of a battery protection CPU interface according to the present invention.

Detailed Description

The present invention relates generally to microcontrollers, and more particularly to single chip microcontrollers incorporating a battery management and protection system. The following description is presented to enable one of ordinary skill in the art to make and use the invention and is provided in the context of a patent application and its requirements. Various modifications to the preferred embodiments and the generic principles and features described herein will be readily apparent to those skilled in the art. Thus, the present invention is not intended to be limited to the particular embodiments shown, but is to be accorded the widest scope consistent with the principles and features described herein.

Systems and methods in accordance with the present invention provide a single chip device that includes battery management and protection. In a single die, the microcontroller includes a central processing unit and a voltage regulator that can be directly powered by the multi-cell battery. The microcontroller also includes an analog-to-digital converter for battery monitoring, a high voltage charge and discharge FET driver, a cell balancing function, and an independent battery protection circuit. In addition to extending the functionality of the smart battery application, this single chip solution also saves design cost and PCB space. By virtue of the accuracy of the microcontroller, the state of charge of the battery can be predicted more accurately. The more knowledge of the state of charge of the battery, the more the battery cell may be consumed before reaching a level at which the battery cell itself begins to fail. Thereby increasing the actual capacity of the battery.

The microcontroller has high voltage input/output, which greatly helps to reduce the total number of parts in the system. The microcontroller also includes a built-in voltage regulator. The regulator allows the microcontroller to operate within a predetermined voltage range (i.e., 4-25 volts). The analog-to-digital converter input channel can measure battery cell voltages up to 25 volts, thereby eliminating an external high voltage analog front end. The apparatus also provides a plurality of built-in FET drivers that can calculate the 25V level, so that no external FET drivers are required.

The battery monitoring function of the microcontroller is suitable for smart batteries. The battery monitoring function includes a voltage analog to digital converter with a Least Significant Bit (LSB) maximum error of + -1 at 12 volts dc, which provides a good voltage measurement of the entire battery cell. The dedicated fuel gauge current sensing ADC can perform continuous current monitoring with high resolution (e.g., 18-bit resolution) and high accuracy. An on-chip reference voltage source with a calibrated error of + -1% enables high accuracy of the microcontroller battery monitoring. For example, U.S. application No. 10/795,027 entitled "Method and Apparatus for an Integrated Circuit Chip Using On-Chip Sensors and computing Means", filed 3, 4, 2004 and incorporated herein by reference in its entirety, describes an example of such a calibration. The voltage and current measurements allow a very accurate estimation of the amount of remaining charge in the battery, allowing the application system to draw more energy from the battery. It is well known that a cell of a battery may be damaged if the cell is depleted below a certain voltage level. However, if the level is known exactly, it is safe to bring the depletion very close to the level without risking damage to the battery cell. If the battery state of charge is known exactly, it is possible to bring the aforementioned safety limits further towards exhaustion. When the accuracy of the measuring device is low, a safety band must be inserted into the estimate to ensure that the user can shut down safely. This safe band represents the energy that can be utilized when the estimation can indeed be trusted. The microcontroller according to the invention provides the precision required to utilize this energy.

Reference is now made to the following description taken in conjunction with the accompanying drawings to more particularly illustrate the features of the present invention. The invention is described in the context of a specific microcontroller; however, those skilled in the art will recognize that the features of the present invention can be utilized in a variety of devices and that such use falls within the spirit and scope of the present invention. Smart Battery AVR (ATmega 406) manufactured by Atmel corporation is a device incorporating features of the present invention. ATmega 406 is described in "ATmega 406 Preliminary complete Document" at 6.2005, which is incorporated herein by reference in its entirety.

Fig. 1 is a block diagram of an embodiment of a microcontroller 100 according to the present invention. The microcontroller 100 in one embodiment includes the following components: a processor, a data bus 118, an in-system programmable flash memory with read-while-write (read-write) functionality, an EEPROM134, an SRAM132, a plurality of general purpose working registers (not shown), a plurality of general purpose I/O lines (not shown), a plurality of general purpose high voltage I/O lines (not shown), an on-chip debug support and programming JTAG interface 139, two active timers/counters 147 and 148 with pulse width modulation and compare modes, a wakeup timer 136, a two-wire interface module 142 to accommodate a system management bus (SM-bus), internal and external interrupts, a programmable watchdog timer with built-in oscillator 124, and four software selectable power saving modes. The microcontroller 100 also includes an oscillation circuit/clock generation circuit 120, a power supply supervision circuit 126, and a charger detection circuit 128. The data bus 118 is coupled to ports 138, 140, 144, and 142.

The microcontroller 100 also includes a voltage regulator 102, a FET control circuit 104, a dedicated battery protection circuit 106, an integrated cell balancing FET 108, a high voltage analog front end, and two ADCs 110 and 114 with an on-chip reference voltage source 112 for battery fuel gauging.

In one embodiment, the CPU116 combines a rich instruction set with the plurality of general purpose working registers. These registers are all directly connected to an Arithmetic Logic Unit (ALU) (not shown) so that two independent registers can be accessed in a single instruction executed in one clock cycle. The resulting architecture has higher code efficiency and achieves a throughput ten times faster than existing CISC microcontrollers.

The idle mode stops the CPU116 while other chip functions continue to function. The power down mode allows the voltage regulator 102, battery protection circuit 106, watchdog timer 124, and wake-up timer 136 to run, while disabling all other chip functions until the next interrupt or hard start. In the power saving mode, the wake-up timer 136, the battery protection circuit 106, and the CC-ADC 114 continue to run.

The on-chip flash memory 130 allows the program memory to be reprogrammed on-system either by an existing non-volatile memory programmer or by an on-chip boot program running on the CPU 116. The boot program can download the application program in the flash memory using an arbitrary interface. When updating sectors of the application flash memory, the software in the boot flash 130 will continue to run, providing true simultaneous read and write operations. By combining the CPU116 with the flash memory 130, ADCs 110 and 114, dedicated battery protection circuit 106, cell balancing FET 108 and voltage regulator 102 on a single chip, the microcontroller 100 provides a highly flexible and cost effective battery application solution.

The voltage regulator 102 operates over a wide voltage range, such as 4.0-25 volts. This voltage is regulated to a constant nominal operating voltage, for example, typically 3.3 volts, for integrated logic circuits and analog functions.

The battery protection circuit 106 monitors the battery voltage and charge/discharge current to detect illegal conditions and protect the battery from these illegal conditions if necessary. The illegal conditions refer to deep under-voltage during discharge, short circuit during discharge, and over-current during charge and discharge.

The integrated cell balancing FET 108 enables the cell balancing algorithm to be executed in software.

Reference is now made to the following description taken in conjunction with the accompanying drawings to describe the features of microcontroller 100 in more detail.

High voltage I/O

Several high voltage inputs and outputs are provided for battery monitoring and management devices:

-input to a voltage regulator. The input supplies power to a device drawn directly from the battery, with a voltage range of 4-25 volts.

-input to a voltage ADC for each battery cell voltage measurement.

-an input to detect the presence of a battery charger.

High voltage Open Drain Output (PCO).

Output to charge, discharge and precharge FETs.

This high voltage technology makes it possible to integrate flash program memory and logic circuits and accurate analog circuits on the same die as a high voltage tolerant I/O. The microcontroller 100 can tolerate high voltages (25 volts) making it suitable for multi-cell batteries.

Voltage regulator 102

Fig. 2 is a block diagram of an embodiment of the voltage regulator 102 according to the present invention.

Modern semiconductors typically operate on power supplies in the 2-5 volt range. Therefore, batteries with voltages up to 25 volts cannot directly power the semiconductor. The microcontroller 100 is powered by the battery through a built-in voltage regulator 102. The voltage input to the regulator 102 is allowed to vary from 4 to 25 volts. This voltage is internally regulated to 3.3v for the built-in logic, low voltage I/O lines and analog circuitry. To minimize power consumption during idle periods, the voltage regulator optionally includes a power consumption control module 202. When the microcontroller 100 enters the low power mode, the voltage regulator 102 will reduce the power consumption of the voltage regulator itself, which in turn helps to reduce power consumption. An external decoupling capacitor 206 of 1, or more, is provided for operation of the voltage regulator 102.

Battery management

Not only does a smart battery monitor battery parameters, it will also manage the environment of the battery based on these parameters. The microcontroller 100 provides battery charging algorithms, cell balancing, and communication with a main program to manage and protect the battery.

FET control system 104

Fig. 3 is a block diagram of a particular embodiment of the FET control system 104 according to the present invention. Fig. 3A is a schematic diagram of an operating circuit utilizing an FED control system according to the present invention. Referring to fig. 1, 3 and 3A, in addition to the FET disable control signal from the battery protection circuit 106, the CPU may also disable the charge FET (C-FET)352, the discharge FET (D-FET)354 or both by writing to the FET control and status register 302. Note that the CPU116 must not be allowed to enable the FETs disabled by the battery protection circuit 106.

The Pulse Width Modulator (PWM) output from 8-bit timer/counter 0, signal OCOB, may be set to directly drive C-FET 352 via FET driver 310, a precharge FET (PC-FET), or both. This can be used to control the charging of the battery cells. The PWM is set to 2:0 bits in the register. Note that the OCOB pin need not be set as an output. This means that the PWM output can be used to drive C-FET 352 and/or PC-FET 350 without occupying the OCOB pin.

If C-FET 352 is disabled and D-FET 354 is enabled, discharge current will flow through the body-drain diode of C-FET 352 and vice versa. To avoid potential heating problems caused by this situation, the software must ensure that D-FET 354 is not deactivated when the charge current flows and C-FET 352 is not deactivated when the discharge current flows.

If the battery is deeply discharged, a large inrush current may be generated when connected to the charger. For this case, it is proposed to precharge the battery first via a current-limiting resistor. For this purpose, the microcontroller 100 is provided with a precharge FET 350(PC-FET) control output. The output is enabled by default.

If the microcontroller 100 has entered the power down mode, all FET control outputs will be disabled. When connected to a charger, the CPU116 wakes up. Upon waking from the power down mode, the C-FET 352 and D-FET 354 control outputs will remain disabled while the PC-FET 350 defaults to enabled. When the CPU116 detects that the cell voltage has risen sufficiently to allow normal charging, it enables the C-FET 352 and D-FET 354 control outputs and disables the PC-PEF 350 control output. If Current Battery Protection (CBP), as will be described in detail below, has been activated, the current protection timer will ensure a 1 second delay time before software can restart the external FET.

Cell balancing system 108

Fig. 4 shows one embodiment of a layout of a cell balancing FET 108 according to the present invention. The microcontroller 100 includes cell balancing FETs 402 a-402 d. The microcontroller 100 provides one cell balancing FET 402 a-402 d for each cell. The FETs 402 a-402 d are directly controlled by the application program, allowing the cell balancing algorithm to be implemented in software. In one embodiment, FETs 402 a-402 d are connected in parallel with each battery cell. The cell balancing FETs 402 a-402 d are disabled in the power down mode.

Equalizing the typical currents (T) of the FETs 402 a-402 d through the cells_CB) Is 2 mA. The cell balancing FETs 402 a-402 d are controlled by a cell balancing control register 406. In this embodiment, adjacent FETs cannot be enabled simultaneously. If an attempt is made to enable two adjacent FETs, both will be disabled.

SMBus ^TM 118

In PC battery applications, SMBus (System Management Bus) is the standard for communication with PCs. Microcontroller 100 provides a two-wire serial interface compatible with the SMBus standard.

Simple but powerful and flexible communication interface, requiring only two buses

Support of master-slave operation simultaneously

The-7 bit address space allows up to 128 different slave addresses

Support for Multi-master arbitration (Multi-master arbitration)

4MHz clock running, up to 100kHz data transmission speed

Slew rate limited output driver

-the noise suppression circuit prevents spikes on the bus line

Fully programmable slave address with general call support

-address recognition causes wake-up when the CPU is in sleep mode

The SMBus interface may be used to update program code using the self-programming functionality of the CPU.

Parameters of battery

As previously described, the microcontroller 100 includes an EEPROM134 that stores data. It is formed as an independent data space in which one byte can be read and written. This data space is used to store critical data that is critical to battery applications.

Voltage measurement

The individual cell voltages in the battery require differential ADC measurements. To adjust the level of the measured battery voltage to that of the ADC, a built-in gain is set. The single ended channel is used to measure other parameters such as regulated voltage and temperature at different locations within the cell.

Voltage ADC 110

Fig. 5 shows an embodiment of the voltage ADC 110 according to the present invention. The V-ADC 110 of this embodiment includes a plurality of differential channels, an input multiplexer 502 for receiving the differential channels, a 12-bit sigma-delta ADC 504, and a V-ADC control system 506 in communication with the input multiplexer 502 and the sigma-delta ADC 504. The V-ADC control and status register 508 receives data from the data bus 116 and provides data to the data bus 116. The V-ADC control and status register 508 also receives data from the V-ADC control system 506 and provides data to the V-ADC control system 506. The V-ADC 110 also includes a V-ADC data register 510 that receives data from the sigma-delta ADC 504 and provides the data to the data bus 116. The four differential channels for cell voltage measurement (PV1-NV, PV2-PV1, PV3-PV2, PV4-PV3) are scaled to fit the full scale of the V-ADC. In addition, there are six single-ended channels referenced to the ground signal. One channel is used to measure the built-in die temperature sensor (VTEMP), four channels (ADC 3-ADC 0) measure the pins of port a for battery cell temperature monitoring, and one channel (ADC4) measures the built-in regulated voltage VREG. The ADC-4 input is also scaled to fit the full scale of the V-ADC.

In order to accurately measure the battery voltage, a calibration register is arranged at the front end of the analog circuit for the voltage gain of each battery unit. Factory calibration values are stored in the register and the cell voltage V-ADC conversion is scaled with corresponding calibration values to correct gain errors in the analog front end. This calibration is typically performed by software.

Counting electronic device

PC batteries are often in overuse; it is often depleted and then recharged at several load levels. It is desirable that the smart battery can report at any given time how long it can still sustain the current load before it is depleted. To provide this service to the end user, the battery needs to know exactly how much energy the battery has discharged to deduct this amount from the full capacity of the battery. Once the remaining capacity of the battery is determined, the remaining charge algorithm can estimate the remaining time based on the existing load. The calibration of different voltage points on the charging curve is not accurate enough; the intelligent battery also needs to actively record and count the charging current and the discharging current of the battery.

As previously described, the microcontroller 100 also includes a dedicated coulometer digital-to-digital converter (CC-ADC)114 optimized for coulomb counting to sample the charge or discharge current flowing through the external sense resistor. Such an ADC is described in pending U.S. patent application 11/043,669[3446P ] entitled "Current Sensing Analog to Digital converter and Method of Use", assigned to the assignee of the present application.

FIG. 6 is a block diagram of an embodiment of CC-ADC 114. CC-ADC 114 includes sigma-delta modulator 602, decimation filters 604 and 606, current comparator 608, normal current IRQ level 610, control and status register 612, and 8-bit data bus 118. The sigma-delta modulator 602 provides data to a decimation filter 604. Decimation filter 604 provides data to decimation filter 606, current comparator 608, and 8-bit data bus 118. The normal current IRQ level 610 receives data from the 8-bit data bus 118 and provides data to the 8-bit data bus 118 and the current comparator 608. The control and status register 612 receives data from the 8-bit data bus 118 and provides data to the decimation filters 604 and 606. The decimation filter 606 receives data from the control and status register 612 and the decimation filter 604 and provides data to the 8-bit data bus 118. There are two different output values: instantaneous current and cumulative current. The instantaneous current output has a short switching time at the expense of lower resolution. The accumulated current output provides a highly accurate current measurement for coulomb counting.

The accumulated current output is a high resolution, high precision output with programmable switching times. The switching value is an accurate measure of the average current over a switching period. If the interrupt is enabled, CC-ADC 114 generates an interrupt each time a new accumulated current conversion is completed.

While the CC-ADC is converting, the CPU116 may enter a sleep mode and wait for an interrupt from the accumulated current conversion. After adding the new accumulated current value for coulomb counting, the CPU116 can again return to sleep mode. This reduces the workload of the CPU and allows more time in a low power mode, reducing power consumption.

If the result of the instantaneous current conversion is greater than the programmable threshold, the CC-ADC generates an interrupt. This allows detection of normal current conditions. This allows for ultra-low power operation when CC-ADC 114 may be set to enter a normal current sensing mode with a programmable current sampling interval. The CC-ADC 114 will repeatedly perform instantaneous current conversion before it is turned off at user software specified intervals. This allows the normal current sensing to be done while keeping the CC-ADC off most of the time.

Built-in reference voltage source 112

Fig. 7 shows a specific embodiment of the low power bandgap reference voltage source 112 according to the present invention. The low power bandgap reference voltage source 112 provides an accurate 1.100V on-chip reference voltage (Vbias) for the microcontroller_REF). The V is_REFAre used as the reference for on-chip voltage regulator 102, V-ADC 110, and CC-ADC 114 (fig. 1). In the preferred embodiment, the reference for both ADCs 110 and 114 uses a buffer 704 with an external decoupling capacitor 706 so that excellent noise performance is achieved with minimal power consumption. Reference voltage V of CC-ADC 114_{REF_P}/V_{REF_N}Scaled to match the full scale of the current sense input pin. Such an arrangement also allows both the V-ADC 110 and the CC-ADC to operate simultaneously.

To keep the temperature drift low after factory calibration, the microcontroller 100 includes a two-step calibration algorithm. Such an algorithm is described, for example, in the aforementioned U.S. application No. 10/795,027. A first predetermined temperature, such as 85 deg.c, and a second predetermined temperature, such as room temperature. Factory calibration defaults to 85 ℃, and the result is stored in the flash memory. The second calibration step may be performed by the user as instructions in the test flow. This step requires a precise input voltage and a stable room temperature. The calibration registers may also be modified at run-time to perform temperature compensation in software. Any temperature within the temperature range can be achieved with precision.

Also, in another embodiment the microcontroller 100 includes an on-chip temperature sensor (not shown) that monitors the die temperature. A voltage proportional to absolute temperature, VPART, is generated in a reference voltage source circuit and connected to the multiplexer at a V-ADC input. The temperature sensor may be used for run-time compensation of the reference voltage source and temperature drift in the on-chip oscillator 120.

Battery protection CPU interface

Fig. 8 shows a specific embodiment of a battery protection CPU interface according to the present invention. The battery protection CPU interface includes a Current Battery Protection Circuit (CBPC)804 and a Voltage Battery Protection Circuit (VBPC)802 and a plurality of battery protection parameter lockable registers 806, 808, 810, 812, and 814. The interface is connected to the FET control system 104 and the 8-bit data bus 118.

Various protections have interrupt flags. The CPU116 may read and clear each flag, with each flag having its own interrupt enable. All enabled flags are combined with a single battery protection interrupt request to the CPU 116. The interrupt can wake the CPU116 from any mode of operation other than a power-down mode. Writing a logical "1" from the CPU116 to the bit locations (bit locations) of the interrupt flag may clear the interrupt flag.

Neither a flag nor a status bit (status bits) indicates that microcontroller 100 has entered a power down mode. Because in this mode the CPU116 is powered down. However, by monitoring its restart flag when the CPU116 is re-running, the CPU116 may detect that it has just experienced a power-off condition.

The over-current and short-circuit protection parameters are reprogrammable to accommodate different types of batteries. The parameters are set by writing to the I/O register. The parameter registers may be locked after initial setup to prevent any further updates until the next hard start.

Secure parameter storage

In a preferred embodiment, the battery protection parameters set in the battery protection parameter register and the disable function set in the battery protection disable register may be locked to prevent further software updates. Once locked, these registers cannot be accessed until the next hard start. This provides a safe mode of protecting these registers from accidental modification due to software runaway. It is recommended that these registers be set by software immediately after restart and then protected from further updates.

A Current Battery Protection Circuit (CBPC)804 monitors the charging and discharging currents and disables the C-FETs, PC-FETs and D-FETs if an over-current or short circuit condition is detected. There are three different programmable detection levels: a discharge overcurrent detection level, a charge overcurrent detection level, and a short circuit detection level. An external filter at the PI/NI input pin may cause excessive short detection delay. Thus, a separate PPI/NNI input is used for current cell protection. There are two different programmable time delays for activating current battery protection: short circuit reaction time and overcurrent reaction time. After the current battery protection is activated, the application software must restart the FET. In one embodiment, the battery protection circuit 106 sets a lag time, such as 1 second, before the software can restart the discharge FET. This provides a safety safeguard in the event that the application software accidentally restarts the discharge FET prematurely.

Protection activation also issues interrupts to the CPU 116. The battery protection interrupt may be individually enabled or disabled by the CPU 116. The effect of the various battery protection types in this embodiment is shown in table 1.

TABLE 1 Effect of Battery protection types

Type of battery protection

Interrupt request

C-FET

D-FET

PC-FET

Cell balancing FET

MCU

Detecting depth undervoltage

CPU exit restart

Is out of use

Is out of use

Is out of use

Is out of use

Power off

Discharge over-current protection

Entry and exit

Is out of use

Is out of use

Is out of use

Operation of

Operation of

Charging over-current protection

Entry and exit

Is out of use

Is out of use

Is out of use

Operation of

Operation of

Short circuit protection

Entry and exit

Is out of use

Is out of use

Is out of use

Operation of

Operation of

To reduce power consumption, both short circuit and discharge overcurrent protection are automatically deactivated when the D-FET is deactivated. The charge over-current protection is also disabled when both the C-FET and the PC-FET are disabled. Note, however, that when either the C-FET or PC-FET is PWM controlled, the charge over-current protection is never automatically disabled.

Each of the above types of battery protection and their features are described in detail below.

Deep undervoltage protection

Deep under-voltage protection ensures that the battery cell discharge does not fall below a programmable deep under-voltage detection level. If the time that the voltage at the VFET pin falls below this level exceeds a programmable delay time, the FET is automatically switched off and the microcontroller enters a power down mode. A deep under-voltage early warning interrupt flag (DUVIF) in a battery protection interrupt register is set 250ms before the microcontroller enters a power-down mode. This gives the CPU116 the opportunity to take necessary measures before the power is cut off.

The microcontroller 100 will maintain the power-down mode until connected to the charger. When a charger is detected, a normal power-up sequence is initiated and the microcontroller 100 initializes to a default state.

The deep under-voltage delay time and the deep under-voltage detection level are set in a battery protection deep under-voltage register (BPDUV), which is part of a battery protection level register. The parameter registers may be locked to the next hard start after initial configuration to prevent further updates.

Discharge over-current protection

The current battery protection circuit samples and monitors the battery current through the voltage of the PPI/NNI input pin. The differential operational amplifier amplifies the voltage with a suitable gain. The output of the operational amplifier is compared to an accurate, programmable on-chip voltage reference by an analog comparator. The microcontroller 100 activates discharge overcurrent protection if the time that the shunt resistance voltage is above the discharge overcurrent detection level exceeds the overcurrent protection reaction time. Sampled systems locked by built-in ULP (ultra low power) oscillators are used for over-current and short-circuit protection. This ensures a reliable clock source, offset cancellation, and low power consumption.

When discharge overcurrent protection is activated, the external D-FETs, PC-FETs, and C-FETs are deactivated and the current protection timer is started. The timer ensures that the FET is deactivated for a predetermined period of time (i.e., 1 second). When considered safe, the application software must then set the DFE and CFE bits in the FET control and status registers to re-enable normal operation. If the D-FET is restarted while the load on the battery is still too large, the discharging overcurrent protection will be activated again.

Charging over-current protection

The microcontroller 100 activates the charge over-current protection if the time the voltage of the PPI/NNI pin is above the charge over-current detection level exceeds the over-current protection reaction time.

When the charge over-current protection is activated, the external D-FETs, PC-FETs, and C-FETs are deactivated and the current protection timer is started. The timer ensures that the FET is deactivated for at least 1 second. When considered safe, the DFE and CFE bits in FET control and status register 302 (fig. 3) are set to restart normal operation. If the C-FET is restarted and the current provided by the charger continues to be too high, the charge over-current protection will be activated again.

Short circuit protection

The second level of the high current detection is set to speed up the reaction time to the extremely large discharge current. If the time that the discharge current is greater than the short circuit detection level exceeds the short circuit reaction time, the short circuit protection is activated.

When short circuit protection is activated, the D-FETs, PC-FETs and C-FETs are disabled and the current protection timer is enabled. The timer ensures that the D-FETs, PC-FETs, and C-FETs are disabled for at least one second. When considered safe, the application software must then set the DFE and CFE bits in the FET control and status registers to re-enable normal operation. If the D-FET is restarted before the short circuit condition is removed, the short circuit protection will be activated again.

Electricity consumption

To avoid damaging the battery during long-term storage, it is important that the battery itself consumes as little power as possible. Single chip implementation helps to reduce system power consumption by eliminating external components and integrating all functionality into one single chip package. In addition, microcontroller 100 provides various low power modes known as sleep modes. The sleep mode allows the application to shut down unused modules in the microcontroller 100, thereby conserving power. The microcontroller 100 provides four sleep modes that allow the user to customize the power consumption according to the requirements of the application:

1. an idle mode in which the CPU116 is stopped but all peripheral functions continue to operate.

An ADC noise reduction mode that improves the noise environment of the ADC while conserving power. If the V-ADC 110 (FIG. 1) is enabled, the conversion automatically begins upon entering this mode.

3. A power saving mode in which the fast RC oscillator is deactivated. Only the battery protection circuit 106 and the low-speed oscillator as well as the measurement current CC-ADC 114 (fig. 1) remain operational.

4. A power down mode in which the fast RC and slow RC clocks are stopped. Battery protection, watchdog timer 124 (fig. 1) or external interrupt, or SMBus address matching can wake up the device.

5. The power-down mode allows the voltage regulator 102 (fig. 1) to shut off power to the CPU116, leaving only the voltage regulator 102 and the charge detection circuit 128 to continue operating. In this mode the microcontroller 100 ensures that the battery cell is not damaged even if the voltage is too low.

Table 2 shows important power consumption data for one embodiment of the microcontroller 100.

Condition of the condition	Consumption of electric current
		1MHz of operation	1.2mA
Free 1MHz	0.6mA
		Power saving	90μA
Power down	20μA
		Power off	2μA

Systems and methods according to the present invention provide a microcontroller with battery management and protection. The microcontroller provides a single chip device with battery protection and management. In addition to extending the functionality of the smart battery application, this single chip solution also saves design cost and PCB space. By virtue of the precision of the microcontroller, the state of charge of the battery can be predicted more accurately, thereby effectively increasing the actual battery capacity.

While the invention has been described in terms of the specific embodiments shown, one skilled in the art will readily recognize that there could be variations to the embodiments and those variations would be within the spirit and scope of the present invention. Accordingly, many modifications may be made by one of ordinary skill in the art without departing from the spirit and scope of the appended claims.

Claims (20)

1. A microcontroller, comprising:

a processor system including a data bus;

a high voltage interface connected to the processor system and adapted to connect with a battery, wherein the battery comprises a plurality of cells; and

a battery management system for monitoring the battery and managing the battery based on the monitoring of the battery,

wherein the battery management system includes a control system for controlling charging and discharging of the battery,

wherein the control system comprises a plurality of cell balancing FETs connected to the plurality of cells and the data bus,

wherein for each of the plurality of cells there is one cell balancing FET, an

Wherein each of the plurality of cell equalization FETs is directly controlled by reprogramming application software via a control register connected to the data bus; and

wherein, the microcontroller is a single chip.

2. The microcontroller of claim 1 wherein the battery management system includes a battery protection circuit to detect at least one illegal condition on the battery and protect the battery from the at least one illegal condition.

3. The microcontroller of claim 2 wherein the at least one illegal condition comprises at least one of the following conditions: deep undervoltage during discharge, short circuit during discharge, and overcurrent during charge or discharge.

4. The microcontroller of claim 1 wherein the processor system further comprises:

a Central Processing Unit (CPU).

5. The microcontroller of claim 1 wherein the battery management system further comprises:

a voltage regulator adapted to be connected to the battery via the high voltage interface, wherein the voltage regulator is adapted to regulate a supply voltage supplied to the microcontroller to a preset level.

6. The microcontroller of claim 5 wherein the input to the voltage regulator can be between substantially 4 volts and substantially 25 volts direct current, and wherein the predetermined level is substantially 3.3 volts.

7. The microcontroller of claim 1 wherein the battery management system further comprises:

a first analog-to-digital converter (ADC) for providing an instantaneous current output value and an accumulated current output value.

8. The microcontroller of claim 7 wherein the first ADC generates an interrupt to the microcontroller to allow low power operation if the instantaneous current output value is greater than a programmable threshold current.

9. The microcontroller of claim 7 wherein the battery management system further comprises:

a second analog-to-digital converter (ADC) for measuring a cell voltage, wherein the first and second ADCs are for providing continuous monitoring of voltage and current of each of the plurality of cells.

10. The microcontroller of claim 9 wherein the battery management system includes an on-chip reference voltage source connected to the first and second ADCs to provide accurate reference voltages for the first and second ADCs.

11. The microcontroller of claim 4 wherein the battery protection circuit further comprises a first current battery protection circuit to protect the battery from an over current condition or a short circuit condition by monitoring a charge current and a discharge current from the battery.

12. The microcontroller of claim 11 wherein the battery protection circuit further comprises a second battery protection circuit to protect the battery from discharging below a programmable deep undervoltage protection level.

13. A microcontroller, comprising:

a processor system comprising a data bus;

a high voltage interface connected to the processor system and adapted to connect with a battery, wherein the battery comprises a plurality of cells; and

a battery management system for monitoring the battery and managing the battery based on the monitoring of the battery, wherein the battery management system comprises:

a battery protection circuit for detecting at least one illegal condition on the battery and protecting the battery from the at least one illegal condition;

a first analog-to-digital converter (ADC) for providing an instantaneous current output value and a cumulative current output value, wherein if the instantaneous current output value is greater than a programmable threshold current, then the first ADC generates an interrupt to the microcontroller to allow low power operation;

a second analog-to-digital converter (ADC) for measuring a cell voltage, wherein the first and second ADCs are for providing continuous monitoring of each voltage and current of the plurality of cells;

an on-chip reference voltage source connected to the first and second ADCs to provide precise reference voltages for the first and second ADCs; and

a control system for said controlling charging and discharging of said battery, wherein said control system comprises a plurality of cell balancing FETs connected to said plurality of cells and said data bus, wherein there is one cell balancing FET for each of said plurality of cells, and wherein each of said plurality of cell balancing FETs is directly controlled by reprogramming application software via control registers connected to said data bus; and

wherein, the microcontroller is a single chip.

14. The microcontroller of claim 13 wherein the at least one illegal condition comprises at least one of the following conditions: deep undervoltage during discharge, short circuit during discharge, and overcurrent during charge or discharge.

15. The microcontroller of claim 13 wherein the processor system further comprises:

a Central Processing Unit (CPU).

16. The microcontroller of claim 13 wherein the battery management system further comprises:

a voltage regulator adapted to be connected to the battery via the high voltage interface, wherein the voltage regulator is adapted to regulate a supply voltage supplied to the microcontroller to a preset level.

17. The microcontroller of claim 16 wherein the input to the voltage regulator is between substantially 4 volts and substantially 25 volts direct current, and wherein the predetermined level is substantially 3.3 volts.

18. The microcontroller of claim 13 wherein the battery management system includes an on-chip reference voltage source connected to the first and second ADCs to provide accurate reference voltages for the first and second ADCs.

19. The microcontroller of claim 13 wherein the battery protection circuit further comprises a first current battery protection circuit to protect the battery from an over current condition or a short circuit condition by monitoring a charge current and a discharge current from the battery.

20. The microcontroller of claim 19 wherein the battery protection circuit further comprises a second battery protection circuit to protect the battery from discharging below a programmable deep undervoltage protection level.