HK1117653A - Dual-loop automatic frequency control for wireless communication - Google Patents

Description

Dual loop automatic frequency control for wireless communications

This application claims priority from provisional U.S. application SN.60/657,839 entitled "Method and Apparatus for Dual-Loop Automatic Frequency Control" filed on 3/1/2005 and U.S. patent application SN.60/660914 entitled "Automatic Frequency Controller" filed on 11/3/2005, both of which are assigned to the assignee of the present invention and are hereby incorporated by reference.

Background

I. Field of the invention

The present disclosure relates generally to communications, and more particularly to Automatic Frequency Control (AFC) for wireless communications.

II. background

In wireless communications, a transmitter modulates data onto a Radio Frequency (RF) carrier signal to generate an RF modulated signal that is more suitable for transmission. The transmitter then transmits the RF modulated signal to the receiver via a wireless channel. The transmitted signal may arrive at the receiver via one or more propagation paths, which may include a view path and/or a reflection path. The characteristics of the wireless channel may change over time due to various phenomena such as fading and multipath. As a result, the transmitted signal may experience different channel conditions and may be received at different amplitudes and/or phases over time.

The receiver receives the transmitted signal, downconverts the received signal with a Local Oscillator (LO) signal, and processes the downconverted signal to recover the data transmitted by the transmitter. The receiver typically performs frequency control (e.g., frequency acquisition or tracking) to estimate the frequency error in the LO signal and correct for this frequency error. This frequency error may be due to various factors such as receiver circuit component tolerances, temperature variations, and doppler effects due to movement of the transmitter and/or receiver. Frequency control can be challenging if the requirements on frequency accuracy are stringent. If the receiver intermittently receives data from the transmitter, the electronics may complicate frequency control.

Accordingly, there is a need in the art for techniques to quickly and reliably perform frequency control for wireless communications.

Summary of the invention

Techniques for performing frequency control using dual-loop AFC are described herein. The dual loop AFC includes an inner loop that corrects for short term frequency variations (e.g., due to doppler effects) and an outer loop that corrects for long term frequency variations (e.g., due to component tolerances and temperature variations). These techniques may be used for frequency control when receiving one or more communication systems, such as a broadcast system, a cellular system, and/or a satellite positioning system. These techniques may also be used for frequency control when receiving burst transmissions.

In one aspect, the dual-loop AFC is used for frequency control of multiple systems. In one embodiment, a first inner loop is implemented for frequency control of a first system (e.g., a broadcast system), a second inner loop is implemented for frequency control of a second system (e.g., a cellular system), and at least one outer loop is implemented for adjusting a reference frequency used to receive the first and second systems. The reference frequency may be generated by a reference oscillator (e.g., a TC-VCXO) and may be used for downconversion, sampling, and/or other purposes. The first inner loop estimates and corrects frequency errors in the first input signal for the first system. The second inner loop estimates and corrects frequency errors in the second input signal for the second system. The first and second inner rings may be enabled upon receipt of the first and second systems, respectively. Separate first and second outer loops may be implemented for the first and second systems, respectively, and one outer loop may be selected to update the reference frequency. Alternatively, a single outer ring may be implemented for both systems and updated with the first and/or second inner rings. Exemplary designs for the inner and outer rings are described below.

In another aspect, the dual-loop AFC is used for frequency control of burst transfers in which data is received in bursts. In one embodiment, the AFC inner loop is updated at each inner loop update instant during each data burst, and the AFC outer loop is updated at each outer loop update instant. The inner loop estimates and corrects the frequency error in each data burst. The outer loop estimates and corrects the frequency error in the reference frequency used to receive these data bursts. The inner loop may be updated with, for example, each OFDM symbol received during a data burst. The outer loop may be updated, for example, at the end of each data burst.

Various aspects and embodiments of the invention are described in further detail below.

Brief description of the drawings

The features and nature of the present invention will become more apparent from the detailed description set forth below when taken in conjunction with the drawings in which like reference characters identify correspondingly throughout.

Fig. 1 shows a terminal communicating with a plurality of systems.

Fig. 2 shows an exemplary superframe result.

Fig. 3 shows a block diagram of the terminal.

Fig. 4 shows a block diagram of an AFC unit.

FIG. 5 shows a block diagram of a dual-loop AFC for one system.

Fig. 6 shows a block diagram of an initial frequency error estimator.

Fig. 7 shows a block diagram of a frequency error estimator.

Fig. 8 shows a model of dual-loop AFC.

Fig. 9 shows a process of performing frequency control for a plurality of systems.

Fig. 10 shows an apparatus for performing frequency control for a plurality of systems.

Fig. 11 shows a process of performing frequency control for one system.

Fig. 12 shows an apparatus for performing frequency control for one system.

Fig. 13 shows a process of performing frequency control for burst data.

Fig. 14 shows an apparatus for performing frequency control for burst data.

Detailed description of the invention

The word "exemplary" is used herein to mean "serving as an example, instance, or illustration. Any embodiment described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments or designs.

Fig. 1 shows a terminal 110 capable of communicating with multiple communication systems. These systems may include cellular systems 120, broadcast systems 130, satellite positioning systems 140, Wireless Local Area Network (WLAN) systems (not shown in fig. 1), other systems, or any combination thereof.

Cellular system 120 may be a Code Division Multiple Access (CDMA) system, a Time Division Multiple Access (TDMA) system, a Frequency Division Multiple Access (FDMA) system, an Orthogonal Frequency Division Multiple Access (OFDMA) system, a single carrier FDMA (SC-FDMA) system, or some other cellular system. A CDMA system may use radio technologies such as CDMA2000, wideband CDMA (W-CDMA), and so on. cdma2000 covers IS-95, IS-2000 and IS-856 standards. TDMA systems may use radio technologies such as global system for mobile communications (GSM), digital advanced mobile phone system (D-AMPS), etc. D-AMPS covers the IS-136 and IS-54 standards. These various systems, radio technologies, and standards are well known in the art. Cellular system 120 may be a Universal Mobile Telecommunications System (UMTS) implementing W-CDMA, a CDMA 20001 x system implementing IS-2000 and/or IS-95, a CDMA 20001 xEV-DO system implementing IS-856, a GSM system, or some other system.

Broadcast system 130 may be a MediaFLO system, a digital video broadcasting-handheld (DVG-H) system, an integrated services digital broadcasting for terrestrial television broadcasting (ISDB-T) system, or some other broadcast system. Such broadcast systems are well known in the art.

The satellite positioning system 140 may be the United states Global Positioning System (GPS), the Russian Glonass system, the European Galileo system, or some other satellite positioning system. GPS is a constellation of 24 appropriately spaced satellites plus a number of spare satellites orbiting the earth. Each GPS satellite transmits an encoded signal that allows receivers on earth to accurately estimate their position based on measurements for a sufficient number of satellites (typically four) and the known positions of those satellites.

As shown in fig. 1, cellular system 120 includes a plurality of base stations 122 that support communication for terminals within its coverage area. A base station is generally a fixed station used for communicating with the terminals and may also be referred to as a Base Transceiver Subsystem (BTS), a node B, an access point, or the like. The broadcast system 130 includes a plurality of broadcast stations 132 that broadcast data to terminals within its coverage area. Base station 122 and broadcast station 132 may be located at different sites (as shown in fig. 1) or may be co-located at the same site (not shown in fig. 1). The satellite positioning system 140 includes a plurality of satellites 142 that transmit signals for position determination.

The terminal 110 may be fixed or mobile and may also be referred to as a mobile station, user equipment, mobile device, or the like. Terminal 110 may be a cellular telephone, a Personal Digital Assistant (PDA), a wireless modem, a wireless communication device, a handheld device, a user device, or the like. For clarity, much of the following description is directed to embodiments in which terminal 110 is capable of communicating with a CDMA system (which may be a UMTS system or a CDMA 1x system), a MediaFLO system, and GPS.

Fig. 2 illustrates an exemplary superframe structure 200 that may be used by the broadcast system 130. In the embodiment shown in fig. 2, the transmission timeline is divided into superframes, where each superframe has a particular duration, e.g., about 1 second. Each super-frame includes a field 212 for Time Division Multiplexed (TDM) pilot, a field 214 for overhead/control information, and a field 216 having N frames for traffic data, where N ≧ 1. The superframe may also include different and/or other fields not shown in fig. 2.

In the embodiment shown in FIG. 2, the TDM pilot is comprised of S identical pilot sequences, where each pilot sequence includes L time domain samples, where S > 1 and L > 1. The TDM pilot may be generated by (1) performing an L-point Inverse Fast Fourier Transform (IFFT) on the L modulation symbols to obtain a pilot sequence having L time-domain samples, and (2) repeating the pilot sequence S times. The TDM pilot may be used for signal detection, frame synchronization, initial frequency error estimation, coarse time synchronization, and/or other purposes.

The overhead information may convey the identity of the broadcast station sending the overhead information, where and how to send the data channel in the frames of the super-frame, and/or other information. Each data channel is transmitted in the N frames and at a frequency and time position indicated by the overhead information. Each data channel may carry any type of data such as video, audio, teletext, data, video/audio clips, and the like. The terminal 110 may want to receive one or more specific data channels from the broadcast system 130. Terminal 110 may determine where each desired data channel is transmitted based on, for example, overhead information and/or data transmitted on the data channel. Terminal 110 may go to sleep most of the time to conserve battery power and may wake up periodically to receive the desired data channel.

In the embodiment shown in fig. 2, the data is transmitted using Orthogonal Frequency Division Multiplexing (OFDM). OFDM divides the system bandwidth into multiple (K) orthogonal subcarriers, which are also referred to as tones, bins, and the like. Each subcarrier may be modulated with data. Each frame carries multiple (M) OFDM symbols. An OFDM symbol may be encoded by (1) performing a K-point IFFT on K modulation symbols to obtain K time-domain samples corresponding to a data portion of the OFDM symbol, and (2) copying the last C samples of the data portion to form a cyclic prefix corresponding to the OFDM symbol. The data portion is also referred to as the useful portion, transformed symbols, and the like. Windowing/filtering may also be performed on the cyclic prefix and data portions. An OFDM symbol may contain K + C samples without windowing, and may contain more than K + C samples with windowing.

In one embodiment, K4096, C512, and each OFDM symbol contains 4608 time-domain samples prior to windowing. In one embodiment, L-128, S-36, and the TDM pilot contains 36 identical pilot sequences of length 128. K. C, L and S may also use other values.

Fig. 2 shows a specific superframe structure. The frequency control techniques described herein may also be used for other frame and superframe structures.

Fig. 3 shows a block diagram of one embodiment of terminal 110. In this embodiment, terminal 110 includes an antenna 310a and a receiver 320a for receiving signals from a cellular system, and an antenna 310b and a receiver 320b for receiving signals from a broadcast system, and an antenna 310c and a receiver 320c for receiving signals from GPS satellites. In general, terminal 110 may include any number of antennas and any number of receivers for any number of systems. An antenna may be shared by multiple systems if the antenna provides suitable performance for those systems. Multiple systems may also share a receiver if they are not being received simultaneously. A given system may also use multiple antennas and/or multiple receivers to receive signals in, for example, different frequency bands (e.g., cellular and PCS bands).

For a broadcast system, antenna 310b receives a signal transmitted by a broadcast station and provides a received RF signal to receiver 320 b. Within receiver 320b, the received RF signal is amplified by a Low Noise Amplifier (LNA)332b and provides an amplified RF signal. The filter 322b filters the amplified RF signal to pass signal components in a desired frequency band and removes out-of-band noise and undesired signals. Downconverter 324B uses LO signal B from LO generator 344_LODownconverting the filtered RF signal and providing a downconverted signal. B is_LOThe signal frequency is selected such that signal components in a desired RF channel are down-convertedTo baseband or near baseband. The low pass filter 326b filters the down-converted signal to pass signal components in the desired RF channel and to remove noise and undesired signals. Amplifier 326b amplifies the filtered baseband signal and provides an output baseband signal. An analog-to-digital converter (ADC)328B digitizes the outgoing baseband signal and samples B of the output_inProvided to digital processor 330.

Antenna 310a and receiver 320a similarly receive and process signals transmitted by base stations in a cellular system and input samples C_inProvided to a data processor 330. Antenna 310c and receiver 320c receive and process signals transmitted by GPS satellites and provide input samples G_inProvided to a data processor 330. Although not shown in FIG. 3 for simplicity, sample B is input_in、C_inAnd G_inMay be complex-valued samples having in-phase (I) and quadrature (Q) components.

Fig. 3 shows a specific design of receivers 320a, 320b, and 320 c. In general, the receiver may implement a super-heterodyne architecture or a direct baseband architecture. In a super-heterodyne architecture, a received RF signal is downconverted in multiple stages, e.g., from RF to an Intermediate Frequency (IF) in one stage, and then from IF to baseband in another stage. In the direct baseband architecture shown in fig. 3, the received RF signal is directly down-converted from RF to baseband in one stage. The superheterodyne and direct baseband architectures may use different circuit blocks and different LO frequencies.

In general, a receiver may perform signal conditioning with one or more stages of amplifiers, filters, mixers, and the like. The receiver may include different and/or other circuit blocks not shown in fig. 3.

The data processor 330 processes the input samples B_in、C_inAnd G_inAnd provides output data for each system. The processing for each system depends on the radio technology used by the system and may include demodulation, decoding, and the like. The data processor 330 is shown in fig. 3 as a single processor, but may also comprise oneOr multiple Application Specific Integrated Circuits (ASICs), Digital Signal Processors (DSPs), processors, and the like.

The AFC unit 340 estimates the frequency error of the reference oscillator 342 and generates a frequency control signal F as will be described below_ctrl. Reference oscillator 342 generates a signal having a precise frequency f_refThe reference signal of (1). The reference oscillator 342 may be a voltage controlled crystal oscillator (VCXO), a temperature compensated crystal oscillator (TCXO), a voltage controlled TCXO (VC-TCXO), a Voltage Controlled Oscillator (VCO), or some other type of oscillator. LO generator 344 receives the reference signal and generates LO signals for receivers 320a, 320b, and 320 c. Clock generator 346 also receives the reference signal and generates sampling clocks for ADCs 328a, 328b, and 328 c. LO generator 344 and clock generator 346 may each be implemented with a VCO, a Phase Locked Loop (PLL), a frequency divider, etc., as is well known in the art.

A controller/processor 350 directs the operation of various units at terminal 110. Controller/processor 350 may determine which system to receive and which channel(s) to receive for each system. Memory 352 stores program codes and data for terminal 110.

In the embodiment shown in fig. 3, the reference oscillator 342 provides a reference frequency f for generating LO signals and a sampling clock for all systems_ref. The use of a single reference oscillator for all systems may reduce cost, power, and footprint, and may further simplify operations at terminal 110.

Each transmitter in each system (e.g., each base station, each broadcast station, and each satellite) typically transmits at a precise data rate on a precise RF frequency. The reference oscillator at the terminal is relatively accurate, but may produce frequency errors due to component tolerances, temperature variations, and other factors. Furthermore, there may be frequency errors between a given transmitter and a terminal due to doppler effects caused by movement of the terminal and/or the transmitter. The frequency error due to component tolerances and temperature variations typically varies at a slow rate and is common to all systems. The frequency error due to the doppler effect may vary at a faster rate and may be different for different transmitters.

In one aspect, dual loop AFC is used for frequency control at the terminal. The dual-loop AFC includes (1) an inner loop that corrects for short-term frequency variations due to, for example, doppler effects, etc., and (2) an outer loop that corrects for long-term frequency variations due to, for example, component tolerances and temperature variations, etc. The dual-loop AFC can be controlled so that all receiving systems achieve good performance regardless of which systems are receiving.

Fig. 4 illustrates a block diagram of one embodiment of AFC unit 340 in fig. 3. In this embodiment, AFC unit 340 implements an inner loop and an outer loop for the cellular system and an inner loop and an outer loop for the broadcast system. The reference oscillator is driven either by an outer loop corresponding to a cellular system or by an outer loop corresponding to a broadcast system.

Within AFC unit 340, inner loop unit 410a receives input samples C for the cellular system_inEstimating short-term frequency error between base station and terminal, correcting input sample C_inAnd samples C of the output_outIs provided to a cellular demodulator (Demod)450a and further provides a short term frequency error estimate F for the cellular system_Cin. Similarly, inner loop unit 410B receives input samples B for the broadcast system_inEstimating short-term frequency error between the broadcasting station and the terminal, correcting the input sample B_inAnd samples B of the output_outTo the broadcast demodulator 450b and further to provide a short-term frequency error estimate for the broadcast system. Units 410a and 410b implement inner loops corresponding to cellular and broadcast systems, respectively.

The outer loop unit 420a receives the short term frequency error estimate F for the cellular system_CinEstimating a long-term frequency error for the terminal and estimating the long-term frequency error F_CoutIs provided to the mode selector 430. Similarly, the outer loop unit 420b receives short term frequency error estimates for the broadcast systemF_BinEstimating a long-term frequency error for the terminal and estimating the long-term frequency error F_BoutIs provided to the mode selector 430. Selector 430 selects F based on the Mode _ sel control signal_CoutOr selecting F_BoutEstimating the frequency error and generating F for the reference oscillator_ctrlA control signal. F_ctrlThe signal may be an analog signal or a digital signal. Selector 430 may perform signal conditioning such as digital to analog conversion, level shifting, scaling, and the like. The selector 430 may also generate a Pulse Width Modulated (PWM) control signal.

Figure 4 illustrates one embodiment in which two outer loops are maintained for two systems, and the reference oscillator is adjusted based on the outer loop corresponding to one system. In another embodiment, a single outer loop is maintained for both systems and the reference oscillator is adjusted based on the single outer loop. The outer loop may receive a frequency error signal F from the inner loop corresponding to both systems_BinAnd F_CinAnd may generate a single F based on these frequency error estimates_out。

Table 1 lists two modes of operation of the terminal. In the cellular and broadcast mode, the terminal concurrently receives the cellular and broadcast systems. In broadcast only mode, the terminal receives the broadcast system but not the cellular system. The terminal may also operate in a cellular-only mode (not shown in table 1) in which the terminal receives a cellular system but does not receive a broadcast system. The terminal may also receive GPS in any mode of operation.

Table 1 also lists one embodiment of running the inner and outer rings for each mode of operation. In cellular and broadcast modes, the inner loop corresponding to the cellular system and the broadcast system is enabled and tracks the short term frequency error of these systems, and only the outer loop corresponding to the cellular system is enabled to control the reference oscillator. In the broadcast only mode, the inner and outer loops corresponding to the cellular system are disabled, the inner and outer loops corresponding to the broadcast system are enabled, and the reference oscillator is controlled by the outer loop corresponding to the broadcast system.

TABLE 1

	Cellular and broadcast	Broadcast only
			Control of a reference oscillator	Outer ring of slave honeycomb	From the broadcast outer ring
Honeycomb inner ring	Activation of	Disable
			Honeycomb outer ring	Activation of	Disable
Inner ring of broadcast	Activation of	Activation of
			Outer ring of broadcast	Disable	Activation of

Fig. 4 and table 1 show an embodiment in which the reference oscillator is controlled either by the cellular system or by the broadcast system. In other embodiments, the reference oscillator may be controlled by different and/or other systems. For example, if the terminal receives GPS but does not receive cellular or broadcast, the reference oscillator may be controlled by an AFC unit that operates based on the GPS signal. For clarity, the following description is directed to the embodiments shown in fig. 4 and table 1.

The inner and outer loops corresponding to the cellular system and the broadcast system may be implemented in various ways. An exemplary design corresponding to the inner and outer rings of the broadcast system will be described below.

Fig. 5 shows a block diagram of one embodiment of an inner loop unit 410b and an outer loop unit 420b corresponding to a broadcast system. In the inner loop unit 410B, sample B is input_inIs provided to a phase rotator 510 and an initial frequency error estimator 520. Estimator 520 derives an initial frequency error estimate each time it is instructed(e.g., based on the TDM pilot) and provides the initial error estimate to one input of a multiplexer (Mux) 546. Phase rotator 510 rotates each input sample B_inRotate the phase value θ from the phase accumulator 512_kAnd provides phase-rotated output samples B_out. Once the broadcast system achieves frequency lock, most of the short-term frequency error of the output samples is removed. Frequency error estimator 530 derives a frequency error estimate based on, for example, the received OFDM symbol. The frequency error estimate indicates a residual frequency error in the output samples. The frequency lock detector 532 determines whether the broadcasting system has achieved frequency lock.

Loop filter 540 versus frequency error estimationFiltering and providing an indication corresponding to the short term of the broadcast systemF of frequency error_Bin. Within loop filter 540, a multiplier 542 estimates the frequency errorMultiplied by the inner loop gain alpha. Adder 544 adds the output of multiplier 542 to the output of frequency register 548. Multiplexer 546 receives the output of summer 544 at another input and provides either the output of summer 544 or an initial frequency error estimate. Frequency register 548 stores the output of multiplexer 546 and provides a short term frequency error estimate F_Bin. Phase accumulator 512 accumulates the short-term frequency error estimates for each sample period and provides phase correction for each input sample.

Within outer loop unit 420b, frequency accumulator 550 accumulates frequency error estimate F from register 548_BinAnd provides the accumulated frequency error. Counter 552 for F_BinThe number of times accumulated in accumulator 550 is counted. Unit 554 divides the accumulated frequency error by the number of accumulations and provides an average frequency error estimateLoop filter 560 filters the average frequency error estimate and provides F indicative of the long term frequency error in the reference frequency_Bout. Within loop filter 560, multiplier 562 multiplies the average frequency error estimate by the outer loop gain β. Unit 564 may clip the output of multiplier 562 within a certain range to constrain the amount of adjustment to the outer loop in any update period. Unit 564 may also scale the output of multiplier 562. An adder 566 adds the output of the unit 564 to the output of the frequency register 570. Frequency register 570 stores the output of summer 566 and provides a long term frequency error estimate F_Bout。

The inner and outer loops corresponding to the broadcast system may operate as follows. When the terminal wakes up for the first time or tunes for the first timeTuned to the broadcast system, the estimator 520 derives an initial frequency error estimate that captures most of the short-term and long-term frequency errors at the terminal. Frequency register 548 stores the initial frequency error estimate. Phase accumulator 512 calculates the phase shift due to the frequency error from register 548 for each sample period. Phase rotator 510 rotates each input sample by the phase shift from phase accumulator 512. Thereafter, for each received OFDM symbol, estimator 530 derives a frequency error estimate based on the output samples corresponding to that OFDM symbol. The frequency error estimationScaled by inner loop gain α and accumulated by frequency register 548 via adder 544 and multiplexer 546. Thus, frequency register 548 is initialized with an initial frequency error estimate and then updated with the frequency error estimate from each received OFDM symbol.

In one embodiment, outer loop 420b is updated every frame. Frequency accumulator 550, counter 552, and frequency register 570 are reset to zero at the beginning of each frame. Thereafter, frequency accumulator 550 accumulates the output of frequency register 548 every OFDM symbol period and up to M times for the super frame structure shown in fig. 2. Each time the output of register 548 is accumulated by accumulator 550, counter 552 is incremented by 1. At the end of each frame, unit 554 computes an average frequency error estimateThe estimate is then scaled by the outer loop gain β, clipped and/or scaled by unit 564, and accumulated by frequency register 570 via adder 566. The frequency register 570 is updated in each frame by a scaled version of the average frequency error estimate.

In the embodiment described above, phase rotation is performed for each input sample, the inner loop is updated in each OFDM symbol period, and the outer loop is updated in each frame. The inner and outer rings may also be updated at other rates. In general, the inner loop may be updated whenever a frequency error estimate is available, and the outer loop may be updated whenever an average frequency error estimate is available. For example, the outer loop may be updated after receiving a data burst. The inner and outer loops may also be operated in different modes, such as an acquisition mode and a tracking mode, as will be described below.

The output samples for a broadcast system may be expressed as:

x(k)＝s(k)·e^/2πΔ/kT+φ+ n (k), formula (1)

Where s (k) is the sample transmitted in sampling period k, x (k) is the input sample corresponding to sampling period k, n (k) is the noise of input sample x (k), Δ f is the frequency error, φ is the arbitrary phase, and T is the frequency error_sIs one sampling period.

The TDM pilot contains S identical pilot sequences as shown in fig. 2. Thus, during TDM pilot, the transmitted samples are periodic and s (k) is s (k + L). In this case, the correlation on the input samples can be expressed as:

formula (2)

WhereinIs post-processed noise. Equation (2) indicates that the frequency error Δ f can be isolated by correlating the input samples x (k) with the delayed input samples x (k + L).

Delay correlation may be performed for each pilot sequence as follows:

formula (3)

Wherein x_l(i)＝x(i+l·L+k_s) Is the ith input sample of the ith pilot sequence,

k_sis the sample index of the start of the first pilot sequence, an

C_lIs the l pilot sequenceThe correlation result of (1).

The correlation results for multiple pilot sequences may be accumulated as follows:

formula (4)

Where S 'is the number of delay correlations performed, S' > S, and

C_initis the accumulated correlation result of all pilot sequences.

Equation (4) performs coherent accumulation on the S' correlation results and provides a complex value C_init。

An initial frequency error estimate may then be derived based on the accumulated correlation results as follows:

formula (5)

Wherein G is_LIs the detector gain, has G_L＝2π·L·T_s。

The start of the first pilot sequence may be determined by performing a sliding correlation on each input sample and detecting a peak in this sliding correlation. The input samples may be buffered and the delay correlation in equation (3) may be performed for all pilot sequences after the TDM pilot is detected. Alternatively, some of the pilot sequences may be used to detect the TDM pilots, and the remaining pilot sequences may be used to derive an initial frequency error estimate.

Fig. 6 shows a block diagram of one embodiment of initial frequency error estimator 520 of fig. 5. In this embodiment, the delay correlator 610 receives input samples B for the broadcast system_inAnd performs delay correlation shown in equation (4). Within the delay correlator 610, the incoming samples are provided to an L-sample delay line 612 and a multiplier 616. Delay line 612 delays each input sample by L sample periods, i.e., the length of the pilot sequence. Unit 614 provides the complex conjugate of each delayed sample from delay line 612. Multiplier 616 multiplies each input sample by a corresponding output from unit 614 and provides a product x in each sample period_l*(i)·x_l(i + L). Peak detector 620 detects the TDM pilot and provides a sample index k corresponding to the start of the first pilot sequence_s. Accumulator 618 accumulates the output of multiplier 616 over L sample periods corresponding to a pilot sequence and provides a correlation result C corresponding to each pilot sequence_l。

An accumulator 630 formed by an adder 632 and a register 634 accumulates correlation results corresponding to the S' pilot sequences from the delayed correlator 610 and provides an accumulated result C_init. The arctangent unit 640 calculates C_initThe arctangent of (c). Scaling unit 642 scales the output of arctangent unit 640 and provides an initial frequency error estimate

Each OFDM symbol contains the same cyclic prefix as the last C samples of the data portion as shown in fig. 2. Therefore, the sampling during the cyclic prefix period is periodic, whereby s (K) is s (K + K). A frequency error estimate may be calculated for each OFDM symbol based on the cyclic prefix as follows:

formula (6)

Wherein y is_m(i) Is the ith output sample of the mth OFDM symbol,

is a frequency error estimate for the mth OFDM symbol, and

c 'is the number of samples on which correlation is performed, where C' ≦ C.

The imaginary part Im [ ] in the formula (6) is an approximation of the arctangent in the formula (5). This approximation is quite accurate when the amount in brackets in equation (6) is small, which is usually the case once frequency locking is achieved.

The start of each OFDM symbol may be determined by a time tracking loop known in the art and not described herein. The accumulation in equation (6) may be performed on all or a subset of the C samples corresponding to the cyclic prefix.

Fig. 7 shows a block diagram of one embodiment of the frequency error estimator 530 in fig. 5. In this embodiment, delayed correlator 710 receives output sample B for the broadcast system_outAnd performs delay correlation shown in square brackets in equation (6). Delay correlator 710 includes a delay line 712, a complex conjugate unit 714, a multiplier 716, and an accumulator 718 that operate in a similar manner as units 612, 614, 616, and 618, respectively, within delay correlator 610 in fig. 6. However, the delay line 712 delays each input sample by K sample periods, i.e., the length of the data portion. Accumulator 718 accumulates the output of multiplier 716 over C' sample periods corresponding to the cyclic prefix and provides a correlation result C for each OFDM symbol_m. Unit 720 provides correlation result C_mAs an imaginary part of the frequency error estimate

Fig. 6 and 7 illustrate exemplary embodiments of frequency error estimates 520 and 530, respectively. The embodiment in fig. 6 relies on the periodic nature of the TDM pilot to derive the initial frequency error estimate. The embodiment in fig. 7 relies on the periodic nature of the cyclic prefix in each OFDM symbol to derive the frequency error estimate. In general, frequency error estimation may be performed in various ways based on the structure of the transmitted signal, the radio technology used by the transmitted signal, and/or other factors.

Returning to fig. 5, frequency register 548 provides a current frequency error estimate for the broadcast systemPhase accumulator 512 accumulates the frequency error estimate for each sampling period and provides a value that is given asThe phase value of (a). Phase rotator 510 may rotate each input sample as follows:

y_I(k)+jy_Q(k)＝[x_I(k)+jx_Q(k)]·[cosθ_k+jsinθ_k]in the formula (7)

Wherein x (k) x_I(k)+jx_Q(k) Is a complex valued input sample corresponding to a sampling period k, an

y(k)＝y_I(k)+jy_Q(k) Are complex valued output samples corresponding to a sampling period.

The complex multiplication in equation (7) may be performed with four real multiplications and two real additions.

Frequency lock detector 532 may detect frequency lock in various ways. In one embodiment, detector 532 first resets the counter to zero. Thereafter, detector 532 estimates each frequency error from estimator 530Comparison thresholdThe counter is incremented if the frequency error estimate is less than the threshold, otherwise the counter is decremented. The detector 532 declares a frequency lock if the counter reaches a maximum value and a lock loss if the counter reaches zero. Number of bits and threshold value of counterMay be selected to achieve good lock detection performance. Frequency lock may also be detected in other ways.

In one embodiment, AFC for a broadcast system may be operated in an acquisition mode or a tracking mode. Both loop modes are available when receiving both cellular and broadcast or when receiving only broadcast. For clarity, the following description is for the case of receiving only broadcasts.

In one embodiment, the inner and outer loops are operable in both acquisition and tracking modes, and different parameter values may be used for the inner and/or outer loops in both modes. For the inner loop, both modes may use the same inner loop gain α. Alternatively, the acquisition mode may use a larger inner loop gain and the tracking mode may use a smaller inner loop gain. For the outer loop, a larger outer loop gain β and/or larger clipping may be used in the acquisition mode, and the frequency register 570 may be updated by a larger amount in each update interval. In tracking mode, a smaller outer loop gain β and/or smaller clipping may be used, and the frequency register 570 may be updated by a smaller amount in each update interval.

In another embodiment, in the acquisition mode, the outer loop adjusts the reference oscillator to correct short-term and long-term frequency errors, and in the tracking mode both the inner and outer loops operate. In acquisition mode, the inner loop derives frequency error estimates based on the input samples (rather than the output samples) and provides these frequency error estimates to the outer loop. The outer loop drives the reference oscillator to the correct frequency. In the acquisition mode, the outer loop may be operated with a larger outer loop gain β and/or a larger limit. In this embodiment, the inner loop is substantially inoperative in the acquisition mode, and the outer loop attempts to quickly move the reference oscillator to the correct frequency. In tracking mode, the outer loop slowly updates the reference oscillator and the inner loop corrects for short term frequency errors.

The acquisition and tracking modes may also be implemented in other ways. Different and/or other modes may be supported by the terminal. For example, the terminal may also support a hold mode in which the inner loop and/or the outer loop are maintained fixed if the received signal quality is poor or some other condition is detected.

The terminal may start in acquisition mode at power-up, after waking from long sleep, when frequency lock is lost, and/or due to other conditions. The terminal may transition from acquisition mode to tracking mode when frequency lock is detected, if the adjustment applied to the frequency register 570 is below a certain value in the middle of several updates, and/or if certain other conditions are met.

The terminal may periodically receive data from the broadcast system. For example, each frame may carry multiple OFDM symbols (e.g., approximately 300 OFDM symbols), and a terminal may receive only a few OFDM symbols (if any) in each frame. In this case, the terminal may sleep for a significant portion of the frame, wake up several OFDM symbols before the first desired OFDM symbol, and process each OFDM symbol desired. In each OFDM symbol period, the terminal may update the inner loop when awake and may update the outer loop before falling asleep.

Fig. 8 shows a block diagram of a model 800 of dual-loop AFC for a broadcast system. Model 800 includes a portion 810 corresponding to an inner ring and a portion 820 corresponding to an outer ring. Model 800 represents the operation of the inner and outer loops during tracking mode.

Within outer loop portion 820, a summer 822 receives frequency f from_rxMinus the reference frequency f_refAnd provides an input frequency f_in. The reception frequency is the frequency of a signal received from a broadcasting system, the reference frequency is the frequency of a reference oscillator, and the input frequency is the input sample B_inThe frequency error of (2). Summer 822 models the down conversion by down converter 324b in FIG. 3.

Within inner loop portion 810, adder 812 inputs frequency from f_inMinus the rotator frequency f_rotAnd provides a frequency error f_err. Adder 812 models the phase rotation performed by unit 510 in fig. 5. Rotator frequency f_rotIs the frequency provided by register 548 and the frequency error f_errIs the residual frequency error estimated by the frequency error estimator 530 in fig. 5. Frequency error f_errScaled by multiplier 816 by inner loop gain α and accumulated by accumulator 814. The multiplier 816 corresponds to the multiplier 532 in fig. 5, and the accumulator814 correspond to an adder 544 and a frequency register 548. Accumulator 814 has a transfer function of 1/(z-1) in the z-domain.

In the outer ring part 820, the rotator frequency f_rotScaled by multiplier 826 with an outer loop gain β and accumulated by accumulator 824 to generate the reference frequency. Multiplier 826 corresponds to multiplier 562 in fig. 5, and accumulator 824 corresponds to adder 566 and frequency register 570.

Transfer function H corresponding to inner loop_in(z) can be expressed as:

formula (8)

Transfer function H corresponding to the outer loop_out(z) can be expressed as:

formula (9)

Since the sampling rate is typically much higher than the inner and outer loop bandwidths, the z-domain transfer functions in equations (8) and (9) can be converted to the s-domain using an approximation of z-1 ═ j ω ═ s, where ω is the normalized frequency. The s-domain transfer function can be expressed as:

andformula (10)

The bandwidth of the inner loop can be expressed as:

formula (11)

WhereinIs the natural frequency of the loop, and

is the damping factor of the loop.

The bandwidth of the outer loop can be expressed as:

formula (12)

In tracking mode, the outer loop bandwidth is typically much narrower than the inner loop bandwidth. The inner and outer loop bandwidths may be determined as follows. First, the desired inner loop bandwidth and the desired BW are selected_inAnd BW_outThe ratio of. Then based on BW using formulae (11) and (12)_inAnd BW_outThe ratio determines the damping factor ζ. Next, equation (11) is used based on the damping factor ζ and the inner loop bandwidth BW_inTo determine the natural frequency omega_n. The inner loop gain α is determined based on the inner loop bandwidth using equation (11). Based on inner loop gain alpha and natural frequency omega_nTo determine the outer loop gain beta. In an exemplary design, BW_in128 hertz (Hz), BW_out＝12.8 Hz，ξ＝3.2，ω_n0.062, α is 0.4, and β is 0.01. Other designs for the inner and outer rings may be used. In general, the inner and outer loops may be designed to achieve a desired frequency acquisition and tracking performance for a given operating scenario.

For clarity, the inner and outer rings are illustrated for a particular broadcast system. Other designs for the inner and outer rings of the broadcast system may be used. The inner and outer loops corresponding to cellular systems and/or other systems may be designed according to the structure of the signals transmitted by these systems and the radio technology used by these systems. For example, the frequency error estimate may be derived based on pilots transmitted by the system. The pilot may be transmitted continuously or periodically, and the inner loop may be updated each time the pilot is received.

Fig. 9 illustrates one embodiment of a process 900 for performing frequency control for multiple communication systems. Frequency control for the first communication system is performed with the first inner loop (block 912). Frequency control for the second communication system is performed with the second inner loop (block 914). The reference frequency used to receive the first and second communication systems is adjusted with the outer loop (block 916). The first system may be a broadcast system and the second system may be a cellular system. The first and second systems may utilize two different radio technologies. For example, the first system may be a broadcast system utilizing OFDM, and the second system may be a CDMA system. The reference frequency may also be used to receive a satellite positioning system such as GPS. The reference frequency may be used for down-conversion, sampling, and/or other purposes.

The first inner loop estimates and corrects frequency errors in the first input signal for the first system. The second inner loop estimates and corrects frequency errors in the second input signal for the second system. The first and second inner rings may be enabled upon receipt of the first and second systems, respectively.

In one embodiment, first and second outer rings may be implemented for first and second systems, respectively, and may be updated with first and second inner rings, respectively. The first inner ring and the second outer ring are operable when only the first system is received. The first and second inner rings and the second outer ring are operable upon receiving the first and second systems. In another embodiment, a single outer ring is implemented for both systems and may be updated with either the first inner ring or the second inner ring, or with both inner rings. In general, the outer loop of operation estimates the frequency error between the reference frequency and the frequency of the first and/or second system and updates the reference frequency.

Fig. 10 illustrates one embodiment of an apparatus 1000 that performs frequency control for multiple communication systems. The apparatus 1000 includes means for performing frequency control for a first control system with a first inner loop (block 1012), means for performing frequency control for a second communication system with a second inner loop (block 1014), and means for adjusting a reference frequency for receiving the first and second communication systems with an outer loop (block 916).

Fig. 11 illustrates one embodiment of a process 1100 for performing frequency control for a communication system. A frequency error for a first communication system (e.g., a broadcast system) is estimated and corrected in an inner loop (block 1112). A frequency error in a reference frequency used to receive a first system and a second communication system (e.g., a cellular system) is estimated and corrected in an outer loop (block 1114). The inner ring is enabled when the first system is received (block 1116). The outer loop is enabled (block 1118) if a first system is received and the outer loop is assigned to adjust the reference frequency.

The inner loop may include a phase rotator, first and second frequency error estimators, a loop filter, a frequency lock detector, or a combination thereof. The phase rotator corrects for frequency errors in the input samples for the first system and provides output samples. The first frequency error estimator derives a frequency error estimate indicative of a residual frequency error in the output samples. The first frequency error estimator may derive a frequency error estimate corresponding to each received OFDM symbol by correlating the cyclic prefix with the data portion. The second frequency error estimator derives an initial frequency error estimate indicative of a frequency error in the input samples. The second frequency error estimator may derive an initial frequency error estimate by correlating each periodic sequence in the signal received from the first system. The inner loop filter may be initialized with this initial frequency error estimate and may then filter the frequency error estimate from the first frequency error estimator to generate an output for the inner loop. The frequency lock detector determines whether the first system achieves frequency lock.

The outer loop may include the first and second modules, a loop filter, or a combination thereof. The first module calculates an average frequency error from the inner loop. The second module clips the input of the outer loop filter. An outer loop filter filters the average frequency error and provides an output for the outer loop. The outer loop may operate in an acquisition mode or a tracking mode. In the acquisition mode, the second module may clip the input to the outer loop filter within a first range and/or the outer loop filter may use a first gain value. In the tracking mode, the second module may limit the input to the outer loop filter to a second range that is less than the first range and/or the outer loop filter may use a second gain value that is less than the first gain value.

Fig. 12 illustrates one embodiment of an apparatus 1200 for performing frequency control for a communication system. Apparatus 1200 includes means for estimating and correcting frequency errors for the first communication system with an inner loop (block 1212), means for estimating and correcting frequency errors in a reference frequency with an outer loop (block 1214), means for enabling the inner loop upon receiving the first system (block 1216), and means for enabling the outer loop upon receiving the first system and if the outer loop is assigned to adjust the reference frequency (block 1218).

Fig. 13 illustrates one embodiment of a process 1300 to perform frequency control for burst transmission. The terminal receives data in bursts from, for example, a broadcast system, a cellular system, or some other system (block 1312). The terminal updates the inner loop for AFC in each inner loop update instant during each data burst (block 1314). The inner loop estimates and corrects the frequency error in the data burst. The terminal updates the outer loop for AFC in each outer loop update instant (block 1316). The outer loop estimates and corrects the frequency error in the reference frequency used to receive these data bursts. The terminal may receive at least one OFDM symbol in each data burst and may update the inner loop with each received OFDM symbol. The terminal may update the outer loop at the end of each data burst, or more or less frequently than this. The terminal may wake up before each data burst and may sleep between data bursts.

Fig. 14 shows an embodiment of an apparatus 1400 for performing frequency control for burst transmission. The device 1400 includes means for receiving data in bursts (block 1412), means for updating an inner loop for AFC in each inner loop update instant during each data burst (block 1414), and means for updating an outer loop for AFC in each outer loop update instant (block 1416).

The frequency control techniques described herein may be implemented by various means. For example, these techniques may be implemented in hardware, firmware, software, or a combination thereof. For a hardware implementation, the processing units used for frequency control may be implemented within one or more ASICs, DSPs, Digital Signal Processing Devices (DSPDs), Programmable Logic Devices (PLDs), Field Programmable Gate Arrays (FPGAs), processors, controllers, microcontrollers, microprocessors, electronic devices, other electronic units designed to perform the functions described herein, or a combination thereof.

For a firmware and/or software implementation, the techniques may be implemented with modules (e.g., procedures, functions, and so on) that perform the functions described herein. The firmware and/or software codes may be stored in a memory (e.g., memory 352 in fig. 3) and executed by a processor (e.g., processor 350). The memory may be implemented within the processor or may be external to the processor.

In one embodiment, the inner ring is implemented in hardware and the outer ring is implemented in software and/or firmware. In other embodiments, the inner and outer rings may be implemented in other combinations of hardware, software, and/or firmware.

The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (58)

1. An apparatus, comprising:

at least one processor configured to perform frequency control for a first communication system with a first inner loop, perform frequency control for a second communication system with a second inner loop, and adjust a reference frequency for an outer loop, the reference frequency being used to receive the first and second communication systems; and

a memory coupled to the at least one processor.

2. The apparatus of claim 1, wherein the at least one processor is configured to estimate and correct frequency error in a first input signal of the first communication system with the first inner loop, and to estimate and correct frequency error in a second input signal of the second communication system with the second inner loop.

3. The apparatus of claim 1, wherein the at least one processor is configured to estimate and correct a frequency error between the reference frequency and a frequency of the first or second communication system with the outer loop.

4. The apparatus of claim 1, wherein the at least one processor is configured to implement first and second outer loops for the first and second communication systems, respectively, to update the first and second outer loops with the first and second inner loops, respectively, and to select the first or second outer loop as the outer loop to adjust the reference frequency.

5. The apparatus of claim 4, wherein the at least one processor is configured to enable the first inner loop and the first outer loop when receiving only the first communication system, and to enable the first and second inner loops and the second outer loop when receiving the first and second communication systems.

6. The apparatus of claim 1, wherein the at least one processor is configured to update the outer ring with the first inner ring, or the second inner ring, or both the first and second inner rings.

7. The apparatus of claim 1, wherein the first communication system is a broadcast system and the second communication system is a cellular system.

8. The apparatus of claim 1, wherein the first and second communication systems use two different radio technologies.

9. The apparatus of claim 1, wherein the first communication system is a broadcast system using Orthogonal Frequency Division Multiplexing (OFDM) and the second communication system is a Code Division Multiple Access (CDMA) system.

10. The apparatus of claim 1, wherein the reference frequency is used to down-convert signals received from the first and second communication systems.

11. The apparatus of claim 1, wherein the reference frequency is used for signal sampling for the first and second communication systems.

12. The apparatus of claim 1, wherein the reference frequency is further used for a receiving satellite positioning system.

13. A processor is configured to perform frequency control for a first communication system with a first inner loop, perform frequency control for a second communication system with a second inner loop, and adjust a reference frequency with an outer loop, the reference frequency being used to receive the first and second communication systems.

14. The processor of claim 13, further configured to update the outer loop with the first inner loop to adjust the reference frequency when the first communication system is selected, and update the outer loop with the second inner loop to adjust the reference frequency when the second communication system is selected.

15. The processor of claim 13, further configured to enable the first inner loop when receiving the first communication system, and to enable the second inner loop when receiving the second communication system.

16. A method, comprising:

performing frequency control with the first inner loop as a first communication system;

performing frequency control with the second inner loop as a second communication system; and

adjusting a reference frequency with an outer loop, the reference frequency being used to receive the first and second communication systems.

17. The method of claim 16, further comprising:

updating the outer loop with the first inner loop to adjust the reference frequency when the first communication system is selected; and

updating the outer loop with the second inner loop to adjust the reference frequency when the second communication system is selected.

18. The method of claim 16, further comprising:

enabling the first inner loop when receiving the first communication system; and

enabling the second inner loop when receiving the second communication system.

19. An apparatus, comprising:

means for performing frequency control for the first communication system with the first inner loop;

means for performing frequency control for the second communication system with the second inner loop; and

means for adjusting a reference frequency with an outer loop, the reference frequency being used to receive the first and second communication systems.

20. The apparatus of claim 19, further comprising:

means for updating the outer loop with the first inner loop to adjust the reference frequency when the first communication system is selected; and

means for updating the outer loop with the second inner loop to adjust the reference frequency when the second communication system is selected.

21. The apparatus of claim 19, further comprising:

means for enabling the first inner ring upon receiving the first communication system; and

means for enabling the second inner ring upon receiving the second communication system.

22. A computer readable medium encoded with a computer program for:

performing frequency control with the first inner loop as a first communication system;

performing frequency control with the second inner loop as a second communication system; and

adjusting a reference frequency with an outer loop, the reference frequency being used to receive the first and second communication systems.

23. An apparatus, comprising:

at least one processor configured to estimate and correct a frequency error for a first communication system in an inner loop and to estimate and correct a frequency error in a reference frequency used to receive the first communication system and a second communication system in an outer loop; and

a memory coupled to the at least one processor.

24. The apparatus of claim 23, wherein the inner ring comprises:

a phase rotator for correcting frequency errors in input samples for the first communication system and providing output samples,

a first frequency error estimator for deriving a frequency error estimate based on the output samples, an

A loop filter for filtering the frequency error estimate and providing an inner loop output indicative of the frequency error of the first communication system and used to correct the frequency error in the input samples.

25. The apparatus of claim 24, wherein the first frequency error estimator derives a frequency error estimate for each received OFDM symbol by correlating a cyclic prefix with a data portion of each received OFDM symbol.

26. The apparatus of claim 24, wherein the inner ring further comprises

A second frequency error estimator configured to derive an initial frequency error estimate based on the input samples, and wherein the loop filter is initialized using the initial frequency error estimate.

27. The apparatus as recited in claim 26 wherein said second frequency error estimator derives said initial frequency error estimate by correlating periodic sequences in a signal received from said first communication system.

28. The apparatus of claim 26, wherein the second frequency error estimator is operated once when the inner loop is initially enabled, and wherein the first frequency error estimator is operated while the inner loop is enabled.

29. The apparatus of claim 24, wherein the inner loop further comprises a frequency lock detector configured to determine whether frequency lock has been achieved by the first communication system.

30. The apparatus of claim 23, wherein the outer ring comprises

A first module for calculating an average frequency error from the inner loop, an

A loop filter for filtering the average frequency error and providing an outer loop output for correcting the frequency error in the reference frequency.

31. The apparatus of claim 30, the outer loop further comprising a second module to clip an input for the loop filter.

32. The apparatus as recited in claim 31 wherein said outer loop is operable in an acquisition mode or a tracking mode, and said second module clips an input for said loop filter in a first range in said acquisition mode and a second range in said tracking mode, said second range being less than said first range.

33. The apparatus of claim 30, wherein the outer loop is operable in an acquisition mode or a tracking mode, and wherein the loop filter uses a first gain value in the acquisition mode and a second gain value in the tracking mode, the second gain value being less than the first gain value.

34. The apparatus of claim 23, wherein the first communication system is a broadcast system and the second communication system is a cellular system.

35. A processor configured to estimate and correct a frequency error for a first communication system with an inner loop; and estimating and correcting a frequency error in a reference frequency used for receiving the first communication system and a second communication system by an outer loop.

36. The processor of claim 35, wherein the inner ring comprises

A phase rotator for correcting frequency errors in input samples of the first communication system and providing output samples,

a first frequency error estimator for deriving a frequency error estimate based on the output samples, an

A loop filter for filtering the frequency error estimate and providing an inner loop output indicative of the frequency error of the first communication system and used to correct the frequency error in the input samples.

37. The processor as in claim 35 wherein the outer loop comprises

Means for calculating an average frequency error from the inner loop, an

A loop filter for filtering the average frequency error and providing an outer loop output for correcting the frequency error in the reference frequency.

38. A method, comprising:

estimating and correcting a frequency error by using the inner loop as a first communication system; and

estimating and correcting a frequency error in a reference frequency used to receive the first communication system and a second communication system with an outer loop.

39. The method as claimed in claim 38, wherein said estimating and correcting frequency error for the first communication system comprises:

correcting frequency errors in input samples of the first communication system to obtain output samples,

deriving a frequency error estimate based on the output samples, an

The frequency error estimate is filtered to obtain an inner loop output indicative of the frequency error of the first communication system and used to correct the frequency error in the input samples.

40. The method of claim 38, wherein estimating and correcting the frequency error in the reference frequency comprises:

calculating an average frequency error from the inner loop, an

Filtering the average frequency error to obtain an outer loop output for correcting the frequency error in the reference frequency.

41. An apparatus, comprising:

means for estimating and correcting a frequency error for the first communication system using the inner loop; and

means for estimating and correcting a frequency error in a reference frequency with an outer loop, the reference frequency being used to receive the first communication system and a second communication system.

42. The apparatus as claimed in claim 41, wherein said means for estimating and correcting frequency error for the first communication system comprises:

means for correcting frequency errors in input samples for the first communication system to obtain output samples,

means for deriving a frequency error estimate based on the output samples, an

Means for filtering the frequency error estimate to obtain an inner loop output indicative of the frequency error of the first communication system and used to correct the frequency error in the input samples.

43. The apparatus of claim 41, wherein the means for estimating and correcting the frequency error in the reference frequency comprises:

means for calculating an average frequency error from said inner loop, an

Means for filtering the average frequency error to obtain an outer loop output for correcting the frequency error in the reference frequency.

44. A computer readable medium encoded with a computer program for:

estimating and correcting a frequency error by using the inner loop as a first communication system; and

estimating and correcting a frequency error in a reference frequency used to receive the first communication system and a second communication system with an outer loop.

45. An apparatus, comprising:

at least one processor configured to receive data in bursts, update an inner loop at each inner loop update instant during each data burst, the inner loop for estimating and correcting frequency errors in the data burst, and update an outer loop at each outer loop update instant, the outer loop for estimating and correcting frequency errors in a reference frequency used to receive the data bursts; and

a memory coupled to the at least one processor.

46. The apparatus of claim 45, wherein each data burst comprises at least one OFDM symbol, and wherein the at least one processor is configured to update the inner loop with each received OFDM symbol.

47. The apparatus of claim 45, wherein the at least one processor is configured to update the outer loop at the end of each burst of data.

48. The apparatus of claim 45, wherein the at least one processor is configured to wake up before each burst of data and to sleep between bursts of data.

49. A processor configured to receive data in bursts, update an inner loop in each inner loop update instant during each data burst, the inner loop being used to estimate and correct frequency errors in the data burst, and update an outer loop in each outer loop update instant, the outer loop being used to estimate and correct frequency errors in a reference frequency used to receive the data bursts.

50. The processor of claim 49, further configured to update the inner loop with each OFDM symbol received in each data burst.

51. The processor of claim 49, further configured to update the outer loop at the end of each burst of data.

52. A method, comprising:

receiving data in bursts;

updating an inner loop at each inner loop update instant during each data burst, the inner loop being used to estimate and correct frequency errors in the data bursts; and

an outer loop is updated at each outer loop update instant, the outer loop being used to estimate and correct frequency errors in a reference frequency used to receive the data bursts.

53. The method of claim 52, wherein updating the inner ring comprises updating the inner ring

The inner loop is updated with each OFDM symbol received in each data burst.

54. The method of claim 52, wherein said updating the outer loop comprises

The outer loop is updated at the end of each data burst.

55. An apparatus, comprising:

means for receiving data in bursts;

means for updating an inner loop at each inner loop update instant during each data burst, the inner loop for estimating and correcting frequency errors in the data bursts; and

means for updating an outer loop at each outer loop update instant, the outer loop for estimating and correcting frequency errors in a reference frequency used to receive the data bursts.

56. The apparatus of claim 55, wherein the means for updating the inner loop comprises means for updating the inner loop with each OFDM symbol received in each data burst.

57. The apparatus of claim 55, wherein the means for updating the outer loop comprises means for updating the outer loop at the end of each burst of data.

58. A computer readable medium encoded with a computer program for:

updating an inner loop at each inner loop update instant during each data burst, the inner loop being used to estimate and correct frequency errors in the data bursts; and

an outer loop is updated at each outer loop update instant, the outer loop being used to estimate and correct frequency errors in a reference frequency used to receive the data bursts.