HK1116968B - Method and system for processing signal - Google Patents

Description

Method and system for processing signal

Technical Field

The present invention relates to communication systems, and more particularly, to a method, system, and machine-readable memory for processing signals.

Background

Historically, broadcast and telecommunications have each occupied different areas. In the past, broadcasts were carried primarily by the "over the air" medium, while telecommunications were carried by the wired medium. This distinction has been left out as both broadcast and telecommunications can be transmitted over wired or wireless media. Technological developments are improving broadcasting to make it more suitable for mobile services. One limitation encountered in this process is that broadcasting often requires the use of high bit rate data transmissions, which are higher than what existing mobile communication networks can provide.

Terrestrial television and radio broadcast networks use high power transmitters to cover a wider service area, which enables unidirectional distribution of content such as television and radio broadcasts to user equipment. In contrast, wireless telecommunications networks use low power transmitters which cover a relatively small area, referred to as a "cell". Unlike broadcast networks, wireless networks may provide two-way interactive services between users using user equipment (e.g., telephones and computer devices).

The Digital Television Terrestrial Broadcasting (DTTB) standard has been developed worldwide, and systems adopted vary with regions. The three most prominent DTTB systems are the Advanced Television Systems Committee (ATSC) system, the digital video broadcasting-terrestrial (DVB-T) system, and the integrated services digital broadcasting-terrestrial transmission (ISDB-T) system. The ATSC system is mainly applied to north america, south america, taiwan, and korea. The system uses trellis coding and 8-level vestigial sideband (8-VSB) modulation. DVB-T systems are used primarily in europe, the middle east, australia and parts of africa and asia. DVB-T systems use Coded Orthogonal Frequency Division Multiplexing (COFDM). The ISDB-T system is applied in japan, using band-segmented transmission orthogonal frequency division multiplexing (BST-OFDM).

While evolving, 3G systems may provide integrated voice, multimedia and data services to mobile user equipment, it may still be necessary to adapt the DTTB system to implement these functions. One important reason for this is that DTTB systems can support very high data rates. For example, in a wide area SFN (single frequency network), DVB-T may support a 15Mbits/s data rate in an 8MHz channel. Significant challenges also arise in delivering broadcast services to mobile user equipment. Due to form factor limitations, many hand-held portable devices will require minimizing the size of the PCB (printed circuit board) while minimizing the amount of power consumed in order to extend battery life to a level acceptable to the user. Another problem to be considered is the doppler effect in the mobile user equipment, which causes intersymbol interference in the received signal. In the three main DTTB systems, ISDB-T was originally designed to support the provision of broadcast services to mobile user equipment. Since DVB-T was not designed to support mobile broadcast services, many modifications have been made to enable it to provide mobile broadcast functionality. A modified version of DVB-T support for mobile broadcasting is commonly referred to as DVB handheld (DVB-H). The broadcast frequency in Europe is in the UHF band (band IV/V), and in the United states the 1670 and 1675MHz bands have been allocated for DVB-H operation. In addition, it is desirable to allocate additional spectrum in the L-band of the world.

DVB-S2 is a second generation standard for satellite broadband applications, developed by the Digital Video Broadcasting (DVB) engineering group. The DVB-S2 standard may be used to support Quadrature Phase Shift Keying (QPSK), 8PSK, 16-phase asymmetric phase shift keying (16APSK), and 32APSK modulation systems. The DVB-S2 standard may be used to support single or multiple streams of multiple formats, such as MPEG-2 transport streams, each of which is to be protected in a different manner.

Communication systems may use coding methods to ensure reliable communication across noisy communication channels. These communication channels have a fixed capacity, which can be expressed as bits per symbol at a certain signal-to-noise ratio (SNR), which has a theoretical upper limit, called the shannon limit. Thus, the goal of code design is to achieve rates approaching the shannon limit. One such encoding that can approach the shannon limit is Low Density Parity Check (LDPC) encoding.

LDPC coding techniques are very complex, with the generator matrix requiring the storage of a large non-sparse matrix. From an implementation point of view, the LDPC coding scheme involves establishing a connection network between several processing nodes of a decoder, which is critical in the implementation process. Furthermore, the computational burden in the decoding process, especially the check node operation, can present problems or challenges in terms of performance, complexity, and memory requirements.

The limitations and disadvantages of conventional and existing approaches will become apparent to one of skill in the art, through comparison of some aspects of the present system with those of the present system, after reading the following description and drawings.

Disclosure of Invention

A method and/or system for satellite communications, substantially as shown in at least one of the figures, as set forth more completely in the claims.

According to an aspect of the present invention, there is provided a method of processing a signal, comprising:

in a receiver processing digital video broadcasting, a spacing between one or more pilots in at least one frame is dynamically changed based on a determined symbol rate.

In the method of the present invention, the size of each of the received plurality of programs is determined.

In the method of the present invention, the method further comprises dynamically changing the interval between the one or more pilots based on the determined size of each of the received plurality of programs.

In the method of the present invention, the method further includes, when at least one selected program is included in the received plurality of programs and the selected program is received, activating the receiver.

In the method of the present invention, the method further comprises dynamically changing the size of the one or more pilots based on the determined symbol rate.

In the method of the present invention, the method further comprises modulating the at least one frame using at least one of the following modulation schemes: quadrature Phase Shift Keying (QPSK), 8 phase shift keying (8PSK), 16 asymmetric phase shift keying (16APSK), and 32-item asymmetric phase shift keying (32APSK) modulation schemes.

In the method of the present invention, the digital video broadcasting includes one of the DVB-S2 standard and the DVB-H standard.

According to one aspect of the invention, there is provided a system of processing systems, comprising:

one or more circuits in a receiver for processing digital video broadcasts for dynamically changing a spacing between one or more pilots in at least one frame based on a determined symbol rate.

In the system of the present invention, the one or more circuits are further configured to determine a size of each of the received plurality of programs.

In the system of the present invention, the one or more circuits are further configured to dynamically change the spacing between the one or more pilots based on the determined size of each of the plurality of received programs.

In the system of the present invention, the one or more circuits are further configured to activate the receiver when at least one selected program is included in the received plurality of programs and the selected program is being received.

In the system of the present invention, the one or more circuits are further configured to dynamically change a size of the one or more pilots based on the determined symbol rate.

In the system of the present invention, the one or more circuits modulate the at least one frame using at least one of the following modulation schemes: quadrature Phase Shift Keying (QPSK), 8 phase shift keying (8PSK), 16 asymmetric phase shift keying (16APSK), and 32-item asymmetric phase shift keying (32APSK) modulation schemes.

In the system of the present invention, the digital video broadcasting includes one of the DVB-S2 standard and the DVB-H standard.

According to one aspect of the present invention, there is provided a machine readable storage, having stored thereon, a computer program comprising at least one code section for processing a signal, which when executed by a machine performs the steps of:

in a receiver processing digital video broadcasting, a spacing between one or more pilots in at least one frame is dynamically changed based on a determined symbol rate.

In the machine-readable storage of the present invention, the at least one code segment comprises code for determining a size of each of the received plurality of programs.

In the machine readable storage of the present invention, said at least one code segment comprises code for dynamically changing the spacing between said one or more pilots based on said determined size of each of said plurality of received programs.

In the machine-readable storage of the present invention, the at least one code segment comprises code for enabling the receiver when at least one selected program is included in the received plurality of programs and the selected program is being received.

In the machine readable storage of the present invention, said at least one code section comprises code for dynamically changing the size of said one or more pilots based on said determined symbol rate.

In the machine-readable storage of the present invention, said at least one code section comprises code for modulating said at least one frame using at least one of the following modulation schemes: quadrature Phase Shift Keying (QPSK), 8 phase shift keying (8PSK), 16 asymmetric phase shift keying (16APSK), and 32-item asymmetric phase shift keying (32APSK) modulation schemes.

In the machine-readable storage according to the invention, the digital video broadcast comprises one of the DVB-S2 standard and the DVB-H standard.

Further features and advantages of the invention, as well as the architecture and operation of various embodiments of the invention, are described in detail below with reference to the accompanying drawings.

Drawings

FIG. 1A is a diagram of an exemplary mobile terminal in accordance with one embodiment of the present invention;

FIG. 1B is a diagram illustrating an exemplary communication process between a dual band RF receiver and a digital baseband processor in a mobile terminal according to one embodiment of the present invention;

FIG. 1C is a diagram of an exemplary satellite receiver according to one embodiment of the invention;

fig. 2A is a block diagram illustrating an exemplary QPSK modulation frame structure without pilots in accordance with an embodiment of the present invention;

FIG. 2B is a diagram of an exemplary 8PSK modulated frame structure without pilots, in accordance with one embodiment of the invention;

fig. 3A is a diagram of an exemplary QPSK modulation frame structure with pilot according to an embodiment of the present invention;

FIG. 3B is a diagram of an exemplary 8PSK modulated frame structure with pilots, in accordance with one embodiment of the invention;

FIG. 4A is a diagram of an exemplary 8PSK modulated frame structure with pilots, in accordance with one embodiment of the invention;

FIG. 4B is a diagram of an exemplary 8PSK modulated frame structure with variable pilots, in accordance with one embodiment of the invention;

FIG. 5 is a diagram of an exemplary frame structure for supporting mobile satellite video reception, in accordance with one embodiment of the present invention;

FIG. 6 is a flowchart illustrating exemplary steps for satellite communications, in accordance with one embodiment of the present invention.

Detailed Description

Particular embodiments of the present invention are directed to methods and systems for satellite communications. Features of the present method and system include a receiver for processing digital video broadcasts. The receiver may dynamically change the spacing between one or more pilots in at least one frame based on a determined symbol rate (symbol rate). The size of each received program may be determined, and the spacing between one or more pilots may be dynamically changed based on the determined size of each received program.

FIG. 1A is a diagram of an exemplary mobile terminal in accordance with one embodiment of the present invention. As shown in fig. 1A, a mobile terminal 150 is illustrated that may include an RF (radio frequency) receiver 153a, an RF transmitter 153b, a digital baseband processor 159, a processor 155, and a memory 157. The receive antenna 151a may be communicatively coupled to an RF receiver 153 a. The transmit antenna 151b may be communicatively coupled to the RF transmitter 153 b. Cellular networks and/or digital video broadcast networks in which mobile terminals may communicate are described in detail in U.S. patent application 11/385390 filed on 21/3/2006, which is also incorporated herein in its entirety. For example, mobile terminal 150 may communicate in a video broadcast network.

The RF receiver 153a may comprise suitable logic, circuitry, and/or code that may enable processing of a received RF signal. The RF receiver 153a may be used to receive RF signals of multiple frequency bands. For example, the RF receiver 153a may receive DVB-H transmission signals in the UHF band (470MHz-890MHz), 1670-1675MHz, and L-band (1400MHz-1700 MHz). RF receiver 153a may receive DVB-S2 transmission signals. In addition, the RF receiver 153a may receive cellular channel signals. Each frequency band supported by the RF receiver 153a has corresponding front end circuitry for low noise amplification and frequency down conversion operations. In this regard, the RF receiver 153a may be referred to as a multi-band receiver, which may support more than one frequency band. In another embodiment of the present invention, the mobile terminal 150 may include more than one RF receiver 153a, and each RF receiver 153a may be a single band or multi-band receiver.

The RF receiver 153a quadrature down-converts the received RF signal to a baseband frequency signal containing an in-phase (I) component and a quadrature (Q) component. The RF receiver 153a may also down-convert the received RF signal directly to a baseband frequency signal. In some cases, the RF receiver 153a may analog-to-digital convert the baseband signal components before sending them to the digital baseband processor 159. In other cases, the RF receiver 153a may transmit the baseband signal components using an analog format.

The digital baseband processor 159 may comprise suitable logic, circuitry, and/or code that may enable processing and/or operation of baseband frequency signals. In this regard, the digital baseband processor 159 may process or manipulate signals from the RF receiver 153a, and/or signals to be transmitted to the RF transmitter 153b (if the RF transmitter 153b is present), for transmission into the network. The digital baseband processor 159 may also provide control and/or feedback information to the RF receiver 153a and the RF transmitter 153b based on information in the processed signals. The digital baseband processor 159 may also forward information and/or data in the processed signal to the processor 155 and/or the memory 157. The digital baseband processor 159 also receives information from the processor 155 and/or memory 157 which is processed and then sent to the RF transmitter 153b for transmission into the network.

The RF transmitter 153b may comprise suitable logic, circuitry, and/or code that may enable processing of an RF signal for transmission. The RF transmitter 153b may transmit RF signals in multiple frequency bands. Further, for example, the RF transmitter 153b may transmit signals within a cellular frequency band. Each frequency band supported by the RF transmitter 153b has corresponding front end circuitry for handling amplification and up-conversion operations. In this regard, when it supports more than one frequency band, the RF transmitter 153b may be referred to as a multiband transmitter. In another embodiment of the present invention, the mobile terminal 150 may comprise more than one RF transmitter 153b, wherein each RF transmitter 153b may be a single band or multi band transmitter.

The RF transmitter 153b may quadrature up-convert the baseband frequency signal including the I/Q component into an RF signal. For example, the RF transmitter 153b may up-convert the baseband frequency signal directly to an RF signal. In some cases, the RF transmitter 153b may perform digital-to-analog conversion and then up-convert on the baseband signal components from the digital baseband processor 159. In other cases, the RF transmitter 153b may receive baseband signal components in analog form.

The processor 155 may comprise suitable logic, circuitry, and/or code that may enable control and/or data processing operations for the mobile terminal 150. The processor 155 may be used to control at least a portion of the RF receiver 153a, the RF transmitter 153b, the digital baseband processor 159, and/or the memory 157. In this regard, the processor 155 may generate at least one signal to control operations in the mobile terminal 150. Processor 155 may also execute some applications used by mobile terminal 150. For example, processor 155 may execute applications within mobile terminal 150 that display and/or interact with content received from DVB-H or DVB-S2 transmission signals.

The memory 157 may comprise suitable logic, circuitry, and/or code that may enable storage of data and/or other information for use by the mobile terminal 150. For example, the memory 157 may be used to store processed data generated by the digital baseband processor 159 and/or the processor 155. Memory 157 may also be used to store information, such as configuration information, that may be used to control the operation of at least one module in mobile terminal 150. For example, memory 157 may include the necessary information to configure RF receiver 153a so that RF receiver 153a can receive DVB-H or DVB-S2 transmissions on the appropriate frequency band.

Fig. 1B is a diagram illustrating an exemplary communication process between a dual band RF receiver and a digital baseband processor in a mobile terminal according to an embodiment of the present invention. As shown in fig. 1B, a dual band RF receiver 160, an analog to digital converter (ADC)164 and a digital baseband processor 162 are shown. The dual band RF receiver 160 may include a UHF front end 161a, an L band front end 161b, a baseband module 163a, a Received Signal Strength Indicator (RSSI) module 163b, and a synthesizer 163 c. The dual band RF receiver 160, analog-to-digital converter (ADC)164, and/or digital baseband processor 162 may be part of a mobile terminal, such as the mobile terminal 150 shown in fig. 1A.

The dual band RF receiver 160 may comprise suitable logic, circuitry and/or code that may enable processing of UHF and L band signals. The dual band RF receiver 160 may be enabled by an enable signal, such as the signal RxEN 169 a. In this regard, enabling the dual band RF receiver 160 with the signal RxEN 169a at a 1: 10 on/off ratio enables time slicing in DVB-H and reduces power consumption. At least a portion of the circuitry in the dual band RF receiver 160 may be controlled via the control interface 169 b. For example, control interface 169b may receive information from a processor (such as processor 155 in FIG. 1A) or digital baseband processor 162. The control interface 169b may include more than 1 bit. For example, when a 2-bit interface is employed, the control interface 169a may be an inter-integrated circuit (I2C) interface.

The UHF front end 161a may comprise suitable logic, circuitry, and/or code that may enable low noise amplification and direct down conversion of UHF signals. In this regard, UHF front end 161a may use an integrated Low Noise Amplifier (LNA) and mixer, such as a passive mixer. The UHF front end 161a may send the final baseband frequency signal to the baseband module 163a for further processing. The digital television environment is described in detail in U.S. patent application 11/385081, filed on 21/3/2006, the entire contents of which are incorporated herein by reference.

The L-band front end 161b may comprise suitable logic, circuitry, and/or code that may enable low noise amplification and direct down conversion of the L-band signal. In this regard, the L-band front end 161b may use an integrated LNA and mixer, such as a passive mixer. The L-band front end 161b may send the final baseband frequency signal to the baseband module 163a for further processing. The dual band RF receiver 160 may activate one of the UHF front end 161a and the L band front end 161b depending on current communication conditions.

The synthesizer 163c may comprise suitable logic, circuitry and/or code that may enable generation of a suitable Local Oscillation (LO) signal to perform direct down conversion in the UHF front end 161a or the L-band front end 161 b. Since the synthesizer 163c divides the source frequency by a fraction when generating the LO signal, a plurality of crystal oscillators may be used as the frequency source of the synthesizer 163 c. This approach may use the crystal oscillator already present on the mobile terminal PCB and thus may reduce the number of external components necessary to support the operation of the dual band RF receiver 160. Synthesizer 163c may generate a common LO signal for UHF front end 161a and L-band front end 161 b. In this regard, the UHF front end 161a and the L-band front end 161b may separate the LO signal to generate appropriate signals to perform down conversion from the UHF band and the L-band, respectively. In some cases, synthesizer 163c may include at least one integrated Voltage Controlled Oscillator (VCO) for generating the LO signal. In other cases, the VCO may be located external to synthesizer 163 c.

The baseband module 163a may comprise suitable logic, circuitry, and/or code that may enable processing of the I/Q components generated by the UHF front end 161a and the L-band front end 161b in a direct down conversion operation. Baseband module 163a may amplify and/or filter the I/Q components in analog form. Baseband module 163a may send the processed I component (i.e., signal 165a) and the processed Q component (i.e., signal 165c) to ADC 164 for digital conversion.

The RSSI block 163b may comprise suitable logic, circuitry and/or code that may enable detection of the strength of a received RF signal (UHF or L band signal), i.e., an RSSI value. The RSSI detection operation may be performed after the received RF signal is amplified by the UHF front end 161a or the L-band front end 161 b. The RSSI module 163b may send the analog RSSI measurements or signals 165e to the ADC 164 for digital conversion.

ADC 164 may comprise suitable logic, circuitry, and/or code that may enable digital conversion of signals 165a, 165c, and/or 165e to generate signals 165b, 165d, and/or 165f, respectively. In some cases, the ADC 164 may be integrated in the dual band RF receiver 160 or integrated in the digital baseband processor 162.

The digital baseband processor 162 may comprise suitable logic, circuitry, and/or code that may enable processing and/or operation of baseband frequency signals. In this regard, the digital baseband processor 162 may be the same as or very similar to the digital baseband processor 159 depicted in fig. 1A. The digital baseband processor 162 may be used to generate at least one signal, such as signals AGC _ BB 167a and AGC _ RF 167b, for adjusting the operation of the dual band RF receiver 160. For example, the signal AGC _ BB 167a may be used to adjust the gain of a baseband frequency signal (generated by the UHF front end 161a or the L-band front end 161 b) in the baseband module 163 a. In another embodiment, the signal AGC _ RF 167b may be used to adjust the gain provided by an LNA integrated in the UHF front end 161a or the L-band front end 161 b. In another embodiment, the digital baseband processor 162 may generate at least one control signal or control information and send to the dual band RF receiver 160 through the control interface 169b for adjusting the operation in the dual band RF receiver 160.

FIG. 1C is a diagram illustrating an exemplary satellite receiver according to an embodiment of the invention. As shown in fig. 1C, a digital satellite receiver system 100 is illustrated. The digital satellite receiver system 100 may include an antenna 102, a Low Noise Block (LNB)104, a direct conversion tuner 106, a digital receiver 108, and a back-end decoder 110. The LNB 104 may include a mixer 114 and a frequency synthesizer 116. The direct conversion tuner 106 may include a mixer 118, a frequency synthesizer 120, a Band Pass Filter (BPF)122, and a Low Noise Amplifier (LNA) 124. The digital receiver 108 may include an analog-to-digital converter (ADC)126, a mixer 128, a Finite Impulse Response (FIR) filter 130, an equalizer 134, a decoder 136, a physical frame acquisition module 138, and a Direct Digital Frequency Synthesizer (DDFS) 140. The back-end decoder 110 may include a transport demultiplexer 142 and an MPEG/AVC decoder 144.

The LNB 104 may comprise suitable logic, circuitry, and/or code that may enable receiving a plurality of signals from a satellite, amplifying the received signals, and then down converting to a lower frequency band. Antenna 102 may be used to receive multiple signals from one or more antennas. The mixer 114 may comprise suitable logic, circuitry, and/or code that may enable down-conversion of a received signal to a low frequency band. The frequency synthesizer 116 may comprise suitable logic, circuitry and/or code that may enable generation of multiple signals, such as a compromise (C) band, a Kurtz down (Ku) band or a Kurtz up (Ka) band signal, for mixing with the received multiple signals. The LNB 104 may be used to convert microwave frequencies received from a satellite to lower frequencies for transmission over a cable to the digital receiver 108.

The mixer 118 may comprise suitable logic, circuitry, and/or code that may enable conversion of a received signal to a different frequency band, such as the L-band. The frequency synthesizer 120 may comprise suitable logic, circuitry and/or code that may enable generation of a plurality of signals, such as L-band signals, that may be mixed with a plurality of received signals from the LNB 104. The band pass filter 122 may comprise suitable logic, circuitry, and/or code that may be operable to filter the received signals such that the plurality of received signals are in a particular frequency band. The low noise amplifier 124 may comprise suitable logic, circuitry, and/or code that may be operable to receive an input signal from the BPF 122, amplify the received signal, and attenuate additive noise.

The analog-to-digital converter (a/D)126 may comprise suitable logic, circuitry, and/or code that may be operable to convert a received analog signal to a digital signal. Analog-to-digital converter 126 may generate a filtered signal in sampled, digital form and send it to mixer 128 for processing. The mixer 128 may comprise suitable logic, circuitry, and/or code that may enable conversion of received signals to different frequency bands.

The DDFS 140 may comprise suitable logic, circuitry, and/or code that may enable changing a frequency of an output signal over a wide frequency range based on a single, fixed-frequency, precision reference clock. The DDFS 140 may also be phase adjustable. The FIR filter 130 may comprise suitable logic, circuitry, and/or code that may enable filtering of the output signal generated by the mixer 128. The equalizer 134 may comprise suitable logic, circuitry, and/or code that may enable reducing frequency distortion.

The decoder 136 may comprise suitable logic, circuitry, and/or code that may enable providing forward error correction for a received signal. The decoder 136 may be used to detect and correct any bit errors present in the received signal using Low Density Parity Check (LDPC) codes. Decoder 136 may comprise an outer Bose-Chaudhuri-hocquenghem (bch) decoder connected to an LDPC inner decoder. BCH decoders may be used to reduce the impact of error floor (error floor). According to an embodiment of the present invention, if an improved coding design with a shorter frame length (e.g., 43200 bits) is used, the BCH decoder may also be eliminated, which may reduce decoder latency.

The modulation mode and coding rate of the digital receiver 108 may vary in units of frames in the physical layer of the DVB-S2 signal. The frames may be assigned to different transport streams. For example, one symbol (symbol) represents 2 bits in a QPSK modulation scheme, and one symbol represents 3 bits in an 8PSK modulation scheme. Thus, for the same bandwidth, the 8PSK modulation scheme allows the digital receiver 108 to carry 50% more information than the QPSK modulation scheme, but requires a higher carrier-to-noise ratio during reception. The 8PSK modulation scheme is applicable to broadcasting applications of high-power satellites having low noise characteristics.

The physical frame acquisition module 138 may comprise suitable logic, circuitry, and/or code that may enable adding pilots to a received signal to assist in signal recovery. The physical frame of the received DVB-S2 signal may include a header and a payload. The header may include synchronization information related to the signaling. The digital receiver 108 may be used to optimize point-to-point applications using Adaptive Code Modulation (ACM). In the ACM mode, the digital receiver 108 may be connected to the transmitter by uplink communication. The return path may improve the signal-to-noise ratio (SNR) at the receiving side in the uplink base station (at the uplink) to adjust the coding and modulation methods to optimize bit rate throughput.

The transport demultiplexer 142 may comprise suitable logic, circuitry, and/or code that may enable demultiplexing of decoded signals received from the digital receiver 108. The MPEG/AVC decoder 144 may comprise suitable logic, circuitry, and/or code that may be enabled to decode the received signals into audio signals and video signals.

Fig. 2A is a diagram of an exemplary QPSK modulation frame structure without a pilot according to an embodiment of the present invention. As shown in fig. 2A, a QPSK modulated frame 202 without pilots is shown. Frame 202 may be, for example, a DVB-S2 frame or a DVB-H frame. Frame 202 may include, for example, 32490 symbols (symbols). Frame 202 may include a header 204. The header 204 may include synchronization information related to signaling.

Fig. 2B is a diagram illustrating an exemplary 8PSK modulated frame structure without a pilot in accordance with an embodiment of the present invention. As shown in fig. 2B, a 8PSK modulated frame 252 without pilots is shown. The frame 252 may be, for example, a DVB-S2 frame or a DVB-H frame. Frame 252 may include, for example, 21960 symbols. The frame 252 may include a header 254. The header 254 may include synchronization information related to signaling.

Fig. 3A is a diagram of an exemplary QPSK modulation frame structure with pilot according to an embodiment of the present invention. As shown in fig. 3A, a QPSK modulated frame 302 with pilots is shown. Frame 302 may be, for example, a DVB-S2 frame or a DVB-H frame. Frame 302 may include, for example, 33282 symbols. Frame 302 may include, for example, a header 304 and a plurality of pilots 308, as well as payload information 306 between each two of the plurality of pilots. Frame 302 may include, for example, 22 pilots, each having a width of, for example, 36 symbols. Frame 302 may include, for example, 792 pilot symbols.

Fig. 3B is a diagram of an exemplary 8PSK modulated frame structure with pilot in accordance with an embodiment of the present invention. As shown in fig. 3B, a 8PSK modulated frame 352 with pilots is shown. Frame 352 may be, for example, a DVB-S2 frame or a DVB-H frame. Frame 352 may include, for example, 22194 symbols. Frame 352 may include, for example, a header 354 and a plurality of pilots 358, as well as payload information 356 between each two of the plurality of pilots. Frame 352 may include, for example, 14 pilots, each having a width of, for example, 36 characters. Frame 352 may include, for example, 504 pilot symbols.

Fig. 4A is a diagram of an exemplary 8PSK modulated frame structure with pilot in accordance with an embodiment of the present invention. As shown in fig. 4A, a frame 402 with pilots is shown that is 8PSK modulated. Frame 402 may be, for example, a DVB-S2 frame or a DVB-H frame. Frame 402 may include, for example, 22194 symbols at 20 mbaud rate. Frame 402 may include, for example, a header 404, a plurality of pilots 408, and payload information 406 between each two of the plurality of pilots. Frame 402 may include, for example, 14 pilots, each having a width of, for example, 36 symbols. Frame 402 may include, for example, 504 pilot symbols. The header 404 may be, for example, 90 symbols wide.

Fig. 4B is a diagram of an exemplary 8PSK modulated frame structure with variable pilots, in accordance with an embodiment of the present invention. As shown in fig. 4B, a 8PSK modulated frame 452 with pilots is shown. The frame 452 may be, for example, a DVB-S2 frame or a DVB-H frame. Frame 452 may include, for example, 22194 symbols at 10M baud rate. Frame 452 may include a header 454 and a plurality of pilots, e.g., 458, 459, and a spacing 456 between each two of the plurality of pilots. The digital receiver 108 may be configured to dynamically vary the spacing between one or more pilots in at least one frame based on the determined symbol rate. The digital receiver 108 may process pilots having variable sizes based on the determined symbol rate. For example, frame 452 includes, for example, 28 pilots, each having a width of, for example, 18 symbols. Frame 452 may include, for example, 504 pilot symbols. The header 454 may be, for example, 90 symbols wide.

Fig. 5 is a diagram illustrating an exemplary frame structure for supporting mobile satellite video reception, in accordance with an embodiment of the present invention. As shown in fig. 5, a received packet stream 500 is illustrated. Packet stream 500 may include a plurality of frames, such as frame 1502. The frame 1502 may include a header 504 and a payload 506. The received packet stream 500 may be a DVB-S2 packet stream or a DVB-H packet stream. The packet stream 500 may include a plurality of programs, such as program #1 … … program # N. The digital receiver 108 may determine the size of each program received. The digital receiver 108 may dynamically change the spacing between one or more pilots based on the determined size of each program received. The spacing between pilots may be changed to accommodate the entire program (e.g., program #1) in a frame (e.g., frame 1502). The determination of whether to activate the digital receiver 108 may be based on whether at least one selected program is included in the received plurality of programs. The digital receiver 108 is enabled only during the time that the selected program is contained in the received frame, which saves power on the digital receiver. For example, the digital receiver 108 may be activated during frame 1502 containing a selected television program, such as program # 1.

FIG. 6 is a flowchart illustrating exemplary steps for satellite communications, in accordance with one embodiment of the present invention. As shown in fig. 6, exemplary steps begin at step 602. At step 604, the digital receiver 108 may determine the symbol rate of the received frame. In step 606, the digital receiver 108 may determine the size of each received program. At step 608, the digital receiver 108 may dynamically change the spacing (e.g., 456) between one or more pilots (e.g., pilot 458 and pilot 459) in at least one frame 452 based on the determined size of each received program (e.g., program # 1). At step 610, the digital receiver 108 may dynamically change the spacing (e.g., 456) between one or more pilots (e.g., pilot 458 and pilot 459) in at least one frame 452 based on the determined symbol rate (e.g., 10 mbaud). The digital receiver 108 may dynamically change the size of one or more pilots (e.g., 458) based on the determined symbol rate. At step 612, the digital receiver 108 modulates each frame (e.g., frame 452) using one of the following modulation schemes, including: quadrature Phase Shift Keying (QPSK), 8 phase shift keying (8PSK), 16 asymmetric phase shift keying (16APSK), and 32 asymmetric phase shift keying (32APSK) modulation schemes. At step 614, a decision may be made whether to activate the digital receiver 108 based on whether at least one selected program is included in the received plurality of programs. The digital receiver 108 is only activated when the selected program is contained in the received frame, which saves power on the digital receiver. For example, the digital receiver 108 may be enabled during frame 1502, with the selected television program, such as program #1, being contained in frame 1502. Finally, end step 616 is performed.

In accordance with one embodiment of the present invention, a method and system for satellite communications may include a digital receiver 108 that processes digital video broadcasts. The digital receiver 108 may dynamically change the spacing (e.g., 456) between one or more pilots (e.g., pilot 458 and pilot 459) in at least one frame 452 based on the determined symbol rate (e.g., 10 mbaud). The digital receiver 108 may determine the size of each received program. The digital receiver 108 may dynamically change the spacing (e.g., 456) between one or more pilots (e.g., pilots 458 and 459) based on the determined size of each received program (e.g., program # 1). The determination of whether to activate the digital receiver 108 may be based on whether at least one selected program is included in the received plurality of programs. The digital receiver 108 is only activated when the selected program is contained in the received frame, which saves power on the digital receiver. For example, the digital receiver 108 may be enabled during frame 1502, with the selected television program, such as program #1, being contained in frame 1502.

The digital receiver 108 may dynamically change the size of one or more pilots (e.g., 458) based on the determined symbol rate. The digital receiver 108 may modulate each frame (e.g., frame 452) using one of the following modulation schemes, including: quadrature Phase Shift Keying (QPSK), 8 phase shift keying (8PSK), 16 asymmetric phase shift keying (16APSK), and 32 asymmetric phase shift keying (32APSK) modulation schemes. The digital receiver 108 may be used to process digital video broadcasts including the DVB-S2 standard and the DVB-H standard.

Another embodiment of the present invention may provide a machine-readable storage, having stored thereon, a computer program having at least one code section executable by a machine for controlling the machine to perform the steps described above as applied to a satellite communications process.

The present invention can be realized in hardware, software, or a combination of hardware and software. The present invention can be realized in a centralized fashion in at least one computer system, or in a distributed fashion where different elements are spread across several interconnected computer systems. Any kind of computer system or other apparatus adapted for carrying out the methods described herein is suited. A typical combination of hardware and software could be a general purpose computer system with a computer program that, when being loaded and executed, controls the computer system such that it carries out the methods described herein. The method is implemented in a computer system using a processor and a memory unit.

The present invention can also be implemented by a computer program product, which comprises all the features enabling the implementation of the methods of the invention and which, when loaded in a computer system, is able to carry out these methods. The computer program in the present document refers to: any expression, in any programming language, code or notation, of a set of instructions intended to cause a system having an information processing capability to perform a particular function either directly or after either or both of the following a) conversion to another language, code or notation; b) reproduced in different formats to implement specific functions.

While the invention has been described with reference to several embodiments, it will be understood by those skilled in the art that various changes may be made and equivalents may be substituted without departing from the scope of the invention. In addition, many modifications may be made to adapt a particular situation or material to the teachings of the invention without departing from its scope. Therefore, it is intended that the invention not be limited to the particular embodiment disclosed, but that the invention will include all embodiments falling within the scope of the appended claims.

Claims (4)

1. A method of processing a signal, comprising:

in a receiver processing digital video broadcasting, dynamically changing an interval between one or more pilots in at least one frame based on a determined symbol rate;

determining a size of each of the received plurality of programs;

dynamically changing the spacing between the one or more pilots based on the determined size of each of the received plurality of programs.

2. The method of claim 1, further comprising activating the receiver when the received plurality of programs includes at least one selected program and the selected program is being received.

3. A system for processing a signal, comprising:

one or more circuits in a receiver for processing digital video broadcasts for dynamically changing a spacing between one or more pilots in at least one frame based on a determined symbol rate;

the one or more circuits are further configured to determine a size of each of the received plurality of programs;

the one or more circuits are further configured to dynamically change a spacing between the one or more pilots based on the determined size of each of the plurality of received programs.

4. The system according to claim 3, wherein said one or more circuits are further configured to enable said receiver when at least one selected program is included in said received plurality of programs and is being received.