HK1115700B - Method and system for processing video data - Google Patents
Method and system for processing video data Download PDFInfo
- Publication number
- HK1115700B HK1115700B HK08106005.2A HK08106005A HK1115700B HK 1115700 B HK1115700 B HK 1115700B HK 08106005 A HK08106005 A HK 08106005A HK 1115700 B HK1115700 B HK 1115700B
- Authority
- HK
- Hong Kong
- Prior art keywords
- vector
- video data
- received video
- iterative
- coding
- Prior art date
Links
Description
Technical Field
The present invention relates to encryption of video data, and more particularly, to a video compression method and system using an iterative encoding algorithm.
Background
Early video compression standards, such as MPEG-1, MPEG-2, H.263, MPEG-4, and H.264/MPEG-4 Advanced Video Coding (AVC), specified many consumer products. For example, these standards enable video CD and DVD to be played back on digital VCRs/set-top boxes and computers, enabling digital broadcast video to be distributed over terrestrial, cable or satellite networks, enabling digital television and HDTV. MPEG-1 provides coding of non-interlaced video at lower resolution and bit rate, providing video quality similar to VHS. MPEG-2 provides coding of interlaced video at higher resolution and bit rate, enabling digital television and HDTV (high definition television) with comparable video quality. H.263 provides video conferencing and video telephony applications. Development of MPEG-4 may provide a new generation of multimedia applications and services. The adoption of MPEG-4 presupposes interactive multimedia applications and services, such as interactive television, and internet video that require access to encoded audio and video objects. MPEG-4 also enables more efficient compression than MPEG-1 and MPEG-2. h.264/MPEG-4AVC is a new video coding standard in the prior art, meeting the increasing demand for higher compression to provide the best possible video quality and various practical applications, such as internet multimedia, wireless video, personal video recorders, video on demand and video conferencing.
The basic video compression structures of video compression standards such as MPEG-1, MPEG-2, H.263, MPEG-4, and H.264/MPEG-4 Advanced Video Coding (AVC) are very similar. This structure is commonly referred to as a motion compensated transform coding or compression structure. Compression of the video may be performed image-by-image. Each image to be encoded may first be divided into a plurality of slices (slices). Slices are independent coding units and can be further partitioned into micro-blocks and blocks to facilitate efficient coding operations. Motion compensation, block transform, and quantization operations may be applied to these encoded blocks, and entropy encoding may be performed on various compression elements such as motion vectors and quantized coefficients.
Further limitations and disadvantages of conventional and traditional approaches will become apparent to one of skill in the art, through comparison of such systems with some aspects of the present invention as set forth in the remainder of the present application with reference to the drawings.
Disclosure of Invention
A method and/or system for video compression using an iterative encoding algorithm, substantially as shown in and/or described in connection with at least one of the figures, as set forth more completely in the claims.
According to one aspect of the present invention, there is provided a method of processing video data, the method comprising:
reducing complexity using an iterative repetition coding algorithm in compressing received video data, designing a multi-rate programmable code by using a pruned tree structure coding or a shortened low density parity check code and dynamically adjusting a coding rate of at least a portion of the received video data based on at least one quantization vector;
the codeword indexes mapped to variable length codes are reordered by the iterative vector encoder based on changes in content and sent to the vector decoder, which performs programmable coding rate selection for an adaptive coding rate.
Preferably, the method further comprises: scaling the at least one quantization vector for the received video data.
Preferably, the method further comprises: in the compression process, the encoding rate of the received video data is adjusted using a pruned tree structure encoding or a shortened low density parity check code.
Preferably, the method further comprises: loop filtering (loop filtering) at least one macroblock in the received video data.
Preferably, the method further comprises:
dynamically selecting the at least one quantized vector during the compression process;
transmitting the selected at least one quantized vector to the vector decoder by compressing a bitstream.
Preferably, the method further comprises: generating the compressed bitstream after compressing the received video data.
Preferably, the method further comprises: indexing the at least one quantized vector.
Preferably, the method further comprises: ordering the at least one quantized vector.
According to another aspect of the invention, there is provided a machine readable storage, having stored thereon, a computer program having at least one code section for processing video data, the at least one code section being executable by a machine for causing the machine to perform the steps of:
in compressing received video data, an encoding rate of at least a portion of the received video data is dynamically adjusted based on at least one quantization vector.
Preferably, the machine-readable memory further comprises code for scaling the at least one quantization vector for the received video data.
Preferably, the machine-readable storage further comprises code for adjusting an encoding rate of the received video data in the compression process using at least one of: prune tree structure coding and shorten low density parity check codes.
Preferably, the machine-readable memory further comprises code for loop filtering at least one macroblock in the received video data.
Preferably, the machine-readable memory further comprises:
code for dynamically selecting the at least one quantized vector during the compression;
code for transmitting the selected at least one quantized vector to a decoder by compressing a bitstream.
Preferably, the machine-readable memory further comprises code for generating the compressed bitstream after compressing the received video data.
Preferably, the machine-readable memory further comprises code to index the at least one quantized vector.
Preferably, the machine-readable memory further comprises code for ordering the at least one quantized vector.
According to another aspect of the present invention, there is provided a system for processing video data, the system comprising:
circuitry for reducing complexity using an iterative repetition coding algorithm in compressing received video data and designing a multi-rate programmable code by using a pruned tree structure to encode or shorten a low density parity check code and dynamically adjusting an encoding rate of at least a portion of video data in the received video data based on at least one quantization vector,
the circuit further includes an iterative vector encoder and a vector decoder, wherein codeword indices mapped to variable length codes are reordered by the iterative vector encoder based on changes in content and sent to the vector decoder, the iterative vector encoder and vector decoder performing programmable coding rate selection for an adaptive coding rate.
Preferably, the circuitry scales the at least one quantization vector for the received video data.
Preferably, the circuitry adjusts the encoding rate of the received video data using pruned tree structure encoding or shortened low density parity check code in the compression process.
Preferably, the circuitry performs loop filtering on at least one macroblock in the received video data.
Preferably, the iterative vector encoder dynamically selects the at least one quantized vector during the compression process, and transmits the selected at least one quantized vector to the vector decoder by compressing a bitstream.
Preferably, the circuitry generates the compressed bitstream after compressing the received video data.
Preferably, the circuitry indexes the at least one quantized vector.
Drawings
Preferably, the circuitry orders the at least one quantized vector.
Various advantages, aspects and novel features of the invention, as well as details of an illustrated embodiment thereof, will be more fully described in the following description and drawings.
FIG. 1A is a block diagram of a video processing system according to an embodiment of the present invention;
FIG. lB is a block diagram of a video encoder used in conjunction with embodiments of the present invention;
FIG. 2 is a block diagram of a video decoder used in conjunction with an embodiment of the present invention;
FIG. 3 is a block diagram of a video compression encoder system according to an embodiment of the present invention;
Detailed Description
FIG. 4 is a block diagram of a video compression decoder system according to an embodiment of the present invention;
fig. 5 is a flow diagram of a method performed by a video compression system using iterative vector coding according to an embodiment of the present invention.
The invention will be further explained with reference to the following figures and examples:
the invention provides a video compression method and system using an iterative repetition coding algorithm. The method and system of the present invention comprise dynamically adjusting an encoding rate of at least a portion of received video data based on at least one quantization vector during bit rate compression of said received video data. At least one quantization vector may be adaptively selected and transmitted to a decoder via a compressed bitstream.
Fig. 1A is a block diagram of a video processing system according to an embodiment of the present invention. Referring to fig. 1A, the system 170 includes a processor 172, a video processing module 174, a memory 178, and a video source 176. The video processing module 174 includes an encoder 180. Video source 176 may comprise suitable circuitry, logic, and/or code and may be adapted to transmit raw video stream data to video processing module 174. The video processing module 174 may comprise suitable circuitry, logic, and/or code that may be operable to process raw video data received from a video source 176. For example, video processing module 174 may perform encoding/decoding operations on video data received from video source 176. In this regard, the video processing module 174 may be implemented as a particular video processing chip. The encoder 180 may comprise suitable logic, circuitry, and/or code that may be enabled to encode received video data based on a policy of the processor 172.
The processor 172 may comprise suitable circuitry, logic, and/or code that may enable control of the processing of video information by the video processing module 174. The processor 172 may include a system or host processor. The memory 178 may store raw or processed video data, such as video data processed by the video processing module 174. Further, memory 178 may store coding that is executed by processor 172 in connection with video processing tasks performed by video processing module 174.
Fig. 1B is a block diagram of a video encoder used in conjunction with an embodiment of the present invention. Referring to FIG. 1B, a video encoder 100 is shown that may be used for an H.264/MPEG-4AVC video bitstream. The video encoder 100 may include a forward transform and scaling module 104, a forward quantizer 106, a rate controller 108, an entropy coding and bitstream generator 110, an inverse quantizer 112, a sealer and inverse transform module 114, a summer 130, a subtractor 102, a deblocking filter 116, a multi-reference picture storage module 118, an intra predictor 120, an inter/intra selector module 122, an action compensation predictor 124, a multi-block action estimator 126, a switch 128, and a buffer 132.
The forward conversion and scaling module 104 may comprise suitable logic, circuitry, and/or code that may enable integer conversion of coefficients. For example, in AVC, a 4 × 4 integer transform may be used. Transform coding may use a prediction mechanism to construct a residual (residual). The pixel values in a Macroblock (MB) can be predicted from neighboring pixels in the same picture, in the case of intra macroblocks, or from pixels in one or two previously decoded reference pictures, in the case of inter macroblocks.
The forward quantizer 106 may comprise suitable logic, circuitry, and/or code that may be operable to scale and quantize each sub-block in the bitstream. The scaling factor of each element in each block will vary as a function of the quantization parameter associated with the macroblock containing the sub-block. The rate controller 108 may comprise suitable logic, circuitry, and/or code that may enable controlling the value of the quantization parameter.
The entropy encoding and bitstream generator 110 may comprise suitable logic, circuitry, and/or code that may be adapted to transform coefficient codes of quantized coefficients. The entropy encoding and bitstream generation 110 may use a variety of encoding methods, such as Exp-Golomb encoding, adaptive variable length coding (CAVLC), and adaptive binary algorithm coding (CABAC). The buffer 132 may comprise suitable logic, circuitry, and/or code that may enable buffering of the generated bitstream to generate an MPEG-4AVC bitstream.
The inverse quantizer 112 may comprise suitable logic, circuitry, and/or code that may be operable to scan and quantize the transform coefficients generated by the forward quantizer 106. The scaled up and down conversion module 114 may comprise suitable logic, circuitry, and/or code that may be operable to convert the inverse scanned and inverse quantized conversion coefficients.
Deblocking filter 116 may comprise suitable logic, circuitry, and/or code that may perform loop filtering on a macroblock after motion compensation and residual coding, depending on whether the macroblock is inter-coded or intra-coded. Deblocking filter 116 may operate on the macroblock in raster scan order.
The multi-reference picture storage module 118 may comprise suitable logic, circuitry, and/or code that may be operable to store the output of the deblocking filter 116. The loop filtering operation depends on the quantization parameters of the current and neighboring macroblocks, the magnitude of the motion vector, the macroblock coding type, and the values of the pixels to be filtered in the current and neighboring blocks and macroblocks.
The inter/intra selector module 122 may comprise suitable logic, circuitry, and/or code that may be operable to determine the particular coding mode to use for each macroblock. The output of the inter/intra selector module 122 is input to the switch 128. Switch 128 may comprise suitable logic and/or circuitry that may select between an intra-prediction encoding mode and a motion-compensated prediction mode based on input from inter/intra selector module 122.
The intra predictor 120 may comprise suitable logic, circuitry, and/or code that may enable prediction of pixel values based on linear interpolation of pixels from adjacent edges of neighboring macroblocks that have been previously decoded for the current macroblock. The interpolation may be directional, having multiple modes, each implying a predicted spatial direction.
The multi-block, multi-frame motion estimator 126 may comprise suitable logic, circuitry, and/or code that may enable prediction of a pixel array by selecting another approximately sized pixel array from a previously decoded reference picture.
The motion compensated predictor 124 may comprise suitable logic, circuitry, and/or code that may be operable to translate the reference array to the location of the current array. For example, in AVC, the pixel array predicted by the motion compensation predictor 124 may have a plurality of sizes, for example, 16 × 8, 8 × 16, 8 × 8, 8 × 4, 4 × 8, and 4 × 4 pixels.
In operation, one macroblock of each slice is encoded at a time and its prediction signal is subtracted therefrom. The prediction signal may be generated by selecting a particular prediction signal from a variety of possible candidate modes. The residual signal may be encoded using a 4 x 4 transform by the forward transform and scaler module 104 and then output to the forward quantizer 106. The forward quantizer 106 may quantize and scale the received signal before entropy encoding by the entropy encoding and bitstream generator 110.
The motion compensation predictor 124 may use a plurality of block sizes, for example, 16 × 16, 16 × 8, 8 × 16, 8 × 8, 8 × 4, 4 × 8, and 4 × 4, for motion compensation prediction. The predicted residual signal may be transform coded by the forward transform and scaler module 104 using a 4 x 4 block size. Deblocking filter 116 may be used in the loop to avoid blocking artifacts (blocking artifacts). The interlaced video may be encoded as frame pictures, field pictures, frame pictures with adaptive frames/fields (PicAFF), and frame pictures with macroblock adaptive frames/fields (MBAFF). The resulting bitstream may be buffered by buffer 132 to generate an MPEG-4AVC bitstream. The bitstream may be stored in raw form or formatted, or may be transmitted to an h.264 decoder over a particular network.
Fig. 2 is a block diagram of a video decoder used in conjunction with an embodiment of the present invention. Referring to FIG. 2, a video decoder 200 is shown that may be used for an H.264/MPEG-4AVC video bitstream. The video decoder 200 includes an entropy decoding and bitstream decompressor 202, an inverse quantizer 204, a sealer and inverse quantization module 206, a summer 208, an inverse quantizer 210, a multi-reference picture storage module 212, an intra predictor 214, a co-acting compensated predictor 216, and a switch 218. U.S. patent application No. 10/963677 (office code No. 15748US02), filed 2004, 10/13/10, describes in more detail a video decoder with a deblocker in the decoding loop and is incorporated herein by reference in its entirety.
The entropy decoding and bitstream decompressor 202 may comprise suitable logic, circuitry and/or code that may be operable to receive a video input and generate a decoded output to an inverse quantizer 204. The entropy decoding and bitstream decompressor 202 may use CABAC or CAVLC decoding algorithms to decode the input video.
The inverse quantizer 204 may comprise suitable logic, circuitry, and/or code that may enable scanning and quantizing transform coefficients generated by the entropy decoder and bitstream decompressor 202. The inverse transform module 206 may comprise suitable logic, circuitry, and/or code that may be operable to transform inverse scanned and inverse quantized transform coefficients.
Deblocking filter 210 may comprise suitable logic, circuitry, and/or code that may perform loop filtering on a macroblock after motion compensation and residual coding depending on whether the macroblock is inter-coded or intra-coded. Deblocking filter 210 may operate on macroblocks in raster scan order.
The multi-reference picture storage module 212 may comprise suitable logic, circuitry, and/or code that may enable storage of the output of the deblocking filter 210. The loop filtering operation depends on the quantization parameters of the current and neighboring macroblocks, the magnitude of the motion vector, the macroblock coding type, and the values of the pixels to be filtered in the current and neighboring blocks and macroblocks. Switch 218 may comprise suitable logic and/or circuitry that may be adapted to select between an intra prediction encoding mode and a motion compensation prediction mode.
The intra predictor 214 may comprise suitable logic, circuitry, and/or code that may enable prediction of pixel values based on linear interpolation of pixels from adjacent edges of neighboring macroblocks that have been previously decoded for the current macroblock. The interpolation may be directional, having multiple modes, each implying a predicted spatial direction. The intra predictor 214 may use past samples of pixels in the same picture to predict the current pixel.
The motion compensated predictor 216 may comprise suitable logic, circuitry, and/or code that may enable prediction of a pixel array by selecting another approximately sized pixel array from a previously decoded reference picture. The motion compensated predictor 216 may translate the reference array to the location of the current array. For example, in AVC, the pixel array predicted by the motion compensation predictor 216 may have a plurality of sizes, for example, 16 × 8, 8 × 16, 8 × 8, 8 × 4, 4 × 8, and 4 × 4 pixels. Motion compensator 216 may use pixel samples of past images to predict pixels of a current image.
For example, according to the type mode of the macroblock, the reference frame, the motion vector, and the decoded picture stored in the multi-reference picture storing module 212, an appropriate prediction signal such as an intra prediction signal or a motion compensation inter prediction signal may be added to the residual signal. The reconstructed video frame may be filtered by a deblocking filter 210 before being stored for future prediction.
Fig. 3 is a block diagram of a video compression encoder system according to an embodiment of the present invention. Referring to fig. 3, a video compression encoder system 300 is shown. The video compression encoder system 300 includes a subtractor 302, an iterative vector encoder 304, an entropy encoder 306, a summer 308, a smoothing filter 310, and an inter and intra predictor module 312.
The iterative vector encoder 304 may generate at least one quantized vector for the received video data. In compressing the received video data, the iterative vector encoder 304 may dynamically adjust an encoding rate of at least a portion of the received video data based on the generated at least one quantization vector.
The iterative vector encoder 304 includes a forward transform and sealer 104, a forward quantizer 106, an inverse quantizer 112, and a sealer and inverse transform module 114. The inter and intra predictor modules 312 may include an intra predictor 120, a motion compensated predictor 124, a motion estimator 126, and a multiple reference picture storage module 118.
The iterative vector encoder 304 may scale at least one generated quantized vector for the received video data. In the compression process, the iterative vector encoder 304 may adjust the encoding rate of the received video data using at least one of a pruned tree structure encoding and a shortened low density parity check code (LDPC).
The smoothing filter 310 may comprise suitable logic, circuitry, and/or code that may enable in-loop filtering of a macroblock after motion compensation and residual coding, depending on whether the macroblock is inter-coded or intra-coded. Smoothing filter 310, similar to deblocking filter 116, may operate on macroblocks in raster scan order.
The entropy encoder 306 may comprise suitable logic, circuitry, and/or code that may enable transform coefficient encoding of quantized coefficients for transformation. The entropy encoder 306 may use various encoding methods, for example, Exp-Golomb encoding, adaptive variable length coding (CAVLC), and adaptive binary arithmetic coding (CABAC).
The iterative vector encoder 304 may dynamically select at least one generated quantized vector and transmit the selected at least one generated quantized vector to the decoder 400 through a compressed bitstream. The iterative vector encoder 304 may generate a compressed bitstream after compressing the received video data. The iterative vector encoder 304 may index the generated at least one quantized vector. The iterative vector encoder 304 may order the indexed generated at least one quantized vector.
The iterative video encoder 304 may perform multiple prediction operations. The video compression encoding system 300 may be modeled using the following prediction equations:
whereinRepresenting the original pixel vector of the ith encoded block,representing the reconstructed pixel vector of the ith encoding block,representing the filtered reconstructed pixel vector. Using quantization processes may result inI.e. a prediction function consisting of a set of predictors F for the ith coding block, whereinAndrespectively the prediction and the coding error vector,refers to a function of the smoothing filter 310.
The distortion measure may be defined as follows:
for example, the distortion measure may be a squared error distortion, r ═ 2, as in the following equation:
for another example, the distortion measure may be an absolute error distortion, r ═ 1, as in the following equation:
according to equations (1.1) and (1.2),
the iterative vector encoder 304 may design a scalar or vector quantizer with a distortion measure based on a training sequence of data using an algorithm, such as the Viterbi algorithm, to produce a scalar quantizer. For a given trellis VQ code, the Viterbi algorithm may produce an optimal or maximum likelihood solution by minimizing the Vector Quantization (VQ) coding error, which may grow exponentially with the minimum distance of the trellis VQ code.
In one embodiment of the invention, the iterative vector encoder 304 may use a quantizer design of less complexity than the trellis. The iterative vector encoder 304 may achieve optimal compression performance with lower encoding complexity by operating on internal states until a valid codeword or regenerated vector is obtained.
The iterative coding algorithm may be a general algorithm, such as a min-sum and-sum-product algorithm, or may include a non-iterative algorithm, such as a Viterbi algorithm. The min-sum-and-product algorithm can be developed into a general grid algorithm in which the time axis of the grid can be replaced by an arbitrary graph, such as a Tanner graph (Tanner graph). If the tanner graph has cycles, e.g., turbo coding and Low Density Parity Check (LDPC) codes, the final algorithm may not be optimal, but the complexity can be significantly reduced compared to the no-cycle case.
In another embodiment of the invention, codewords (codewords), such as quantized vectors or regenerated vectors, may be analyzed using known Vector Quantization (VQ) techniques by designing an optimal code to approach optimal VQ coding performance.
Fig. 4 is a block diagram of a video compression decoder system according to an embodiment of the present invention. Referring to fig. 4, a video compression decoder system 400 is shown. The video compression decoder system 400 may include an entropy decoder 402, a vector decoder 404, a smoothing filter 406, inter and intra predictors 408, and a summer 410.
The vector decoder 404 may include an inverse quantizer 204, a scaling and inverse transform module 206. The smoothing filter 406 may comprise suitable logic, circuitry, and/or code that may enable in-loop filtering of a macroblock after motion compensation and residual coding, depending on whether the macroblock is inter-coded or intra-coded. The smoothing filter 406, similar to the deblocking filter 210, may operate on macroblocks in raster scan order. The inter and intra prediction module 408 may include an intra predictor 214, a motion compensated predictor 216, and a multi-reference picture storage module 212.
The entropy decoder 402 initializes the video compression decoder system 400 by using the decoded properties of one slice. A range division variable (range division variable) used in the decoding engine may be initialized to a known value, and a context model variable may be initialized. Each syntax element (syntax) to be decoded can be represented as variable-length coding on the encoder side, while the process of converting fixed-length coding into variable-length coding is called binarization. Binarization may be used to assign a string of bits to a statement element that has more than two possible values and to assign shorter codes to more possible values of the statement element. On the decoder side, a debinarization process may be applied, whereby the original fixed-length statement elements may be recovered.
A binary statement element has a string of binary bits, where each bit is referred to as a symbol in CABAC. Each symbol in the sentence element can be decoded individually using the likelihood model associated with the symbol. In CABAC, one symbol may have multiple models or contexts associated with it, and the selection of a model may be made based on the attributes of neighboring macroblocks. After a symbol is decoded, the likelihood model or context model may be updated based on the decoded value of the symbol. If the same symbol is decoded again using the same context model, the likelihood values will be different and an adaptive model can be generated.
Fig. 5 is a flow diagram of a method performed by a video compression system using iterative vector coding according to an embodiment of the present invention. Referring to fig. 5, the method begins at step 502. In step 504, the video decoder system 300 receives video data. In step 506, the iterative vector encoder 304 generates a quantized vector for the received video input data. In step 508, the generated quantized vector is scaled and converted using a suitable conversion algorithm. In step 510, after motion compensation and residual coding, the smoothing filter 310 performs loop filtering on a macroblock, depending on whether the macroblock is inter-coded or intra-coded.
In step 512, an appropriate prediction signal, such as an intra prediction signal or a motion compensated inter prediction signal, is added to the residual signal according to the type mode of the macroblock, the reference frame, the motion vector, and the decoded picture stored in the multi-reference picture storage module 212. In step 514, the encoding rate of the received video data may be adjusted during the compression process by using at least one of: pruned tree structure coding and shortened low density parity check codes (LDPC). In step 516, a compressed video bitstream is generated. The control flow then proceeds to end step 518.
In another embodiment of the present invention, multi-rate programmable codes can be designed to meet the flexible compression requirements of various video communication and storage applications using techniques such as pruned tree structure coding or shortened LDPC coding. The encoding may be adaptively selected and transmitted from the encoder 300 to the decoder 400 by compressing a bitstream. The entropy encoder 306 and the entropy decoder 402 may adapt the coding choices and codeword possibilities. For example, the order of the codeword indexes may be reordered based on the generated likelihood table. The codeword indexes mapped to variable length coding may be reordered by the iterative vector encoder 304 based on changes in content and sent to the vector decoder 404.
In another embodiment of the present invention, the iterative vector encoder 304 may use at least one of the following graph-based algorithms: such as the sum-product algorithm for general graph-based coding, the maximum a posteriori probability (MAP) or Bahl, Cocke, Jelinek, Raviv (BCJR) algorithm for trellis-based coding, and the information transfer algorithm for bipartite graph-based coding.
The iterative vector encoder 304 and vector decoder 404 may match the optimal performance of vector quantization algorithms, such as the common Lloyd algorithm and the Viterbi algorithm. The iterative vector encoder 304 and vector decoder 404 may perform programmable coding rate selection for adaptive coding rates, e.g., using pruned tree structure coding or shortened LDPC coding.
In accordance with one embodiment of the present invention, a video compression system using an iterative encoding algorithm includes an encoder, such as iterative vector encoder 304, for dynamically adjusting an encoding rate of at least a portion of video data in received video data based on at least one quantization vector during compression of the received video data. The iterative vector encoder 304 includes a forward transform and sealer 104, a forward quantizer 106, an inverse quantizer 112, and a sealer and inverse transform module 114.
The iterative vector encoder 304 may scale at least one quantized vector for the received video data. In the compression process, the iterative vector encoder 304 may adjust the encoding rate of the received video data by using at least one of: pruned tree structure coding and shortening LDPC codes.
Smoothing filter 310 performs loop filtering on at least one macroblock in the received video data. The iterative vector encoder 304 dynamically selects at least one quantization vector and transmits the selected at least one quantization vector to the decoder 400 through a compressed bitstream. The iterative vector encoder 304 may generate a compressed bitstream after compressing the received video data. The iterative vector encoder 304 may index at least one quantized vector. The iterative vector encoder 304 may order at least one quantized vector.
Accordingly, the present invention may be realized in hardware, software, or a combination of hardware and software. The present invention can be realized in a centralized fashion in at least one computer system, or in a distributed fashion where different elements are spread across several interconnected computer systems. Any kind of computer system or other apparatus adapted for carrying out the methods described herein is suited. A typical combination of hardware and software could be a general purpose computer system with a computer program that, when being loaded and executed, controls the computer system such that it carries out the methods described herein. The method is implemented in a computer system using a processor and a memory unit.
The present invention can also be implemented by a computer program product, which comprises all the features enabling the implementation of the methods of the invention and which, when loaded in a computer system, is able to carry out these methods. The computer program in this document refers to: any expression, in any programming language, code or notation, of a set of instructions intended to cause a system having an information processing capability to perform a particular function either directly or after either or both of the following: a) conversion to other languages, codes or symbols; b) reproduced in a different format.
While the invention has been described with reference to several embodiments, it will be understood by those skilled in the art that various changes may be made and equivalents may be substituted without departing from the scope of the invention. In addition, many modifications may be made to adapt a particular situation or material to the teachings of the invention without departing from its scope. Therefore, it is intended that the invention not be limited to the particular embodiment disclosed, but that the invention will include all embodiments falling within the scope of the appended claims.
Claims (10)
1. A method of processing video data, the method comprising:
reducing complexity using an iterative repetition coding algorithm in compressing received video data, designing a multi-rate programmable code by using a pruned tree structure coding or a shortened low density parity check code and dynamically adjusting a coding rate of at least a portion of the received video data based on at least one quantization vector;
the codeword indexes mapped to variable length codes are reordered by the iterative vector encoder based on changes in content and sent to the vector decoder, which performs programmable coding rate selection for an adaptive coding rate.
2. The method of claim 1, wherein the method further comprises: scaling the at least one quantization vector for the received video data.
3. The method of claim 1, wherein the method further comprises: in the compression process, the encoding rate of the received video data is adjusted using a pruned tree structure encoding or a shortened low density parity check code.
4. The method of claim 1, wherein the method further comprises: loop filtering at least one macroblock in the received video data.
5. The method of claim 1, wherein the method further comprises:
dynamically selecting the at least one quantized vector during the compression process;
transmitting the selected at least one quantized vector to the vector decoder by compressing a bitstream.
6. A system for processing video data, the system comprising:
circuitry for reducing complexity using an iterative repetition coding algorithm in compressing received video data and designing a multi-rate programmable code by using a pruned tree structure to encode or shorten a low density parity check code and dynamically adjusting an encoding rate of at least a portion of video data in the received video data based on at least one quantization vector,
the circuit further includes an iterative vector encoder and a vector decoder, wherein codeword indices mapped to variable length codes are reordered by the iterative vector encoder based on changes in content and sent to the vector decoder, the iterative vector encoder and vector decoder performing programmable coding rate selection for an adaptive coding rate.
7. The system of claim 6, wherein the circuitry scales the at least one quantization vector for the received video data.
8. The system of claim 6, wherein the circuitry adjusts the encoding rate of the received video data using either a pruned tree structure encoding or a shortened low density parity check code in the compression process.
9. The system of claim 6, wherein the circuitry performs loop filtering on at least one macroblock in the received video data.
10. The system of claim 6, wherein the iterative vector encoder dynamically selects the at least one quantized vector during the compression process and streams the selected at least one quantized vector to the vector decoder via a compressed bitstream.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/451,850 | 2006-06-13 | ||
| US11/451,850 US20070286277A1 (en) | 2006-06-13 | 2006-06-13 | Method and system for video compression using an iterative encoding algorithm |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| HK1115700A1 HK1115700A1 (en) | 2008-12-05 |
| HK1115700B true HK1115700B (en) | 2012-01-06 |
Family
ID=
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101090495B (en) | Method and system for processing video data | |
| TWI826519B (en) | Regular coded bin reduction for coefficient coding | |
| JP6328220B2 (en) | Video encoding and decoding using transforms | |
| JP4915350B2 (en) | Entropy encoder, video encoding device, video encoding method, and video encoding program | |
| KR100636229B1 (en) | Method and apparatus for adaptive entropy encoding and decoding for scalable video coding | |
| Lee et al. | A new frame recompression algorithm integrated with H. 264 video compression | |
| JP2017507519A (en) | Data encoding and decoding | |
| KR102171380B1 (en) | Method and apparatus for parallel entropy encoding/decoding | |
| CN113994680B (en) | Independent CABAC for sub-parts of a picture | |
| CN101647284B (en) | Method and apparatus for selecting scan paths for elements of blocks in spatial image encoding and decoding | |
| KR20120052882A (en) | Method and apparatus for parallel entropy encoding/decoding | |
| US10021409B2 (en) | Apparatuses and methods for estimating bitstream bit counts | |
| Zhou et al. | Distributed video coding using interval overlapped arithmetic coding | |
| JP2015515812A (en) | Apparatus and method for providing quantized coefficients for video coding | |
| JP7643350B2 (en) | Image data encoding and decoding | |
| US20160360236A1 (en) | Method and Apparatus for Entropy Transcoding | |
| Bardone et al. | Adaptive Golomb codes for level binarization in the H. 264/AVC FRExt lossless mode | |
| HK1115700B (en) | Method and system for processing video data | |
| JP7663097B2 (en) | Image data encoding device, image data encoding method, computer software, and non-transitory storage medium | |
| JP2008160402A (en) | Encoding apparatus and method, and image encoding apparatus | |
| WO2012067412A2 (en) | Method and apparatus for parallel entropy encoding/decoding |