HK1199684B - High dynamic range pixel having plurality of amplifier transistors - Google Patents

Abstract

The present invention relates to high dynamic range pixel having a plurality of amplifier transistors. A pixel cell for use in a high dynamic range image sensor includes a photodiode disposed in semiconductor material to accumulate charge in response to light incident upon the photodiode. A transfer transistor is disposed in the semiconductor material and is coupled between a floating diffusion and the photodiode. A first amplifier transistor is disposed in the semiconductor material having a gate terminal coupled to the floating diffusion and a source terminal coupled to generate a first output signal of the pixel cell. A second amplifier transistor is disposed in the semiconductor material having a gate terminal coupled to the floating diffusion and a source terminal coupled to generate a second output signal of the pixel cell.

Description

High dynamic range pixel with multiple amplifier transistors

Technical Field

The present disclosure relates generally to image sensors, and more specifically, the present disclosure relates to high dynamic range image sensors.

Background

The image capture device includes an image sensor and an imaging lens. The imaging lens focuses light onto the image sensor to form an image, and the image sensor converts the light into an electrical signal. The electrical signals are output from the image capture device to other components of the host electronic system. For example, the electronic system may be a mobile phone, a computer, a digital camera, or a medical device.

As pixel cells become smaller, the requirements for image sensors to perform over a wide range of lighting conditions (ranging from low-light conditions to bright-light conditions) become more difficult to achieve. This performance capability is often referred to as having high dynamic range imaging (HDRI or, alternatively, HDR only). In conventional image capture devices, a pixel cell requires multiple successive exposures to achieve HDR.

Fig. 1 is a circuit diagram showing a four transistor ("4T") pixel cell 100. As shown, pixel cell 100 includes a photosensitive element 110, a transfer transistor 120, a reset transistor 130, a floating diffusion ("FD") 180, a source follower ("SF") transistor 140, a row select transistor 150, a dual conversion gain transistor 160, and a capacitor 165.

During operation of the pixel cell 100, the transfer transistor 120 receives a transfer signal TX, which transfers charge accumulated in the photosensitive element 110 to the floating diffusion FD 180. A reset transistor 130 is coupled between a power supply VDD and the floating diffusion FD180 to reset the pixel cell (e.g., discharge or charge the floating diffusion FD180 and/or the photosensitive element 110 to a preset voltage) under control of a reset signal RST. FD180 is also coupled to control the gate of SF transistor 140. SF transistor 140 is coupled between power supply VDD and row select transistor 150. SF transistor 140 operates as a source follower providing a high impedance connection to floating diffusion FD 180. The row select transistor 150 selectively provides the output of the pixel cell to a readout column line or bit line 170 under control of a select signal SEL.

Capacitor 165 and dual conversion gain transistor 160 are coupled in series between power supply VDD and floating diffusion FD180, with dual conversion gain transistor 160 coupled to FD180 and capacitor 165 coupled to power supply VDD. The capacitance of the capacitor 165 may be added to the FD180 by asserting the dual conversion gain signal DCG, thereby reducing the conversion gain of the pixel cell 100.

Photosensitive element 110 and FD180 are reset by temporarily asserting reset signal RST and transfer signal TX. The image accumulation window (e.g., exposure period) begins by deasserting the transfer signal TX and permitting incident light to photo-generate electrons in the photosensitive element 110. As photo-generated electrons accumulate in the photosensor 110, the voltage across the photosensor 110 decreases. The voltage or charge on the photosensitive element 110 is indicative of the intensity of light incident on the photosensitive element 110 during the exposure period. At the end of the exposure period, the reset signal RST is deasserted to isolate the FD180 and the transfer signal TX is asserted to allow charge exchange between the photosensitive element 110 and the FD180 and thus the gate of the SF transistor 140. The charge transfer causes the voltage of the FD180 to change by an amount proportional to the photo-generated electrons accumulated on the photosensitive element 110 during the exposure period. This second voltage biases SF transistor 140, which, in combination with the select signal SEL being asserted, drives a signal from select transistor 150 to bit line 170. Next, data is read out from the pixel cell 100 as an analog signal via the bit line 170.

By varying the conversion gain of the pixel cell 100 between successive image captures, the HDR of the resulting image may be increased. However, this will increase the amount of time required to capture and read out one HDR image and impact the performance of the image capture device.

Disclosure of Invention

One aspect of the invention relates to a pixel cell for use in a high dynamic range image sensor, the pixel cell comprising: a photodiode disposed in a semiconductor material to accumulate charge in response to light incident on the photodiode; a transfer transistor disposed in the semiconductor material, the transfer transistor coupled between a floating diffusion and the photodiode; a first amplifier transistor disposed in the semiconductor material, the first amplifier transistor having a gate terminal coupled to the floating diffusion and a source terminal coupled to generate a first output signal for the pixel cell; and a second amplifier transistor disposed in the semiconductor material, the second amplifier transistor having a gate terminal coupled to the floating diffusion and a source terminal coupled to generate a second output signal for the pixel cell.

Another aspect of the invention relates to a high dynamic range imaging system, comprising: a pixel array having a plurality of pixel cells, wherein each of the plurality of pixel cells includes: a photodiode disposed in a semiconductor material to accumulate charge in response to light incident on the photodiode; a transfer transistor disposed in the semiconductor material, the transfer transistor coupled between a floating diffusion and the photodiode; a first amplifier transistor disposed in the semiconductor material, the first amplifier transistor having a gate terminal coupled to the floating diffusion and a source terminal coupled to generate a first output signal for the pixel cell; and a second amplifier transistor disposed in the semiconductor material, the second amplifier transistor having a gate terminal coupled to the floating diffusion and a source terminal coupled to generate a second output signal for the pixel cell; control circuitry coupled to the pixel array to control operation of the pixel array; and readout circuitry coupled to the pixel array to readout the first output signal and the second output signal from each of the plurality of pixel cells.

Yet another aspect of the invention relates to a method for generating image data from pixel cells, the method comprising: generating charge in a photodiode in response to light incident on the photodiode; transferring the charge between the photodiode and a floating diffusion via a transfer transistor; generating a first output signal in response to the charge at the floating diffusion with a first amplifier transistor having a gate terminal coupled to the floating diffusion, wherein the first output signal is generated at a source terminal of the first amplifier transistor; and generating a second output signal in response to the charge at the floating diffusion with a second amplifier transistor having a gate terminal coupled to the floating diffusion, wherein the second output signal is generated at a source terminal of the second amplifier transistor.

Drawings

Non-limiting and non-exhaustive embodiments of the present invention are described with reference to the following figures, wherein like reference numerals refer to like parts throughout the various views unless otherwise specified.

Fig. 1 is a circuit diagram showing a conventional four transistor ("4T") pixel cell.

Figure 2 is a circuit diagram showing the circuitry of a pixel cell having multiple amplifier transistors according to the teachings of this disclosure.

Figure 3 is a diagram illustrating an example relationship between examples of output signals from a plurality of amplifier transistors and example amplified signals over a range of lighting conditions, according to the teachings of this disclosure.

FIG. 4 is a block diagram illustrating an example imaging system according to the teachings of this disclosure.

Figure 5A is a drawing showing one example of a pixel cell arrangement according to the teachings of this disclosure.

Figure 5B is a drawing showing another example of a pixel cell arrangement according to the teachings of this disclosure.

Corresponding reference characters indicate corresponding parts throughout the several views of the drawings. Skilled artisans will appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help improve understanding of various embodiments of the present invention. Additionally, common but well-understood elements that are useful or necessary in a commercially feasible embodiment are often not depicted in order to facilitate a less obstructed view of these various embodiments of the present invention.

Detailed Description

In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, it will be apparent to one skilled in the art that the specific details need not be employed to practice the present invention. In other instances, well-known materials or methods have not been described in detail in order to avoid obscuring the present invention.

Reference throughout this specification to "one embodiment," "an embodiment," "one example," or "an example" means that a particular feature, structure, or characteristic described in connection with the embodiment or example is included in at least one embodiment of the present invention. Thus, appearances of the phrases "in one embodiment," "in an embodiment," "one example" or "an example" in various places throughout this specification are not necessarily all referring to the same embodiment or example. Furthermore, the particular features, structures, or characteristics may be combined in any suitable combinations and/or subcombinations in one or more embodiments or examples. The particular features, structures, or characteristics may be included in integrated circuits, electronic circuits, combinational logic circuits, or other suitable components that provide the desired functionality. Additionally, it should be appreciated that the drawings provided herewith are for explanation purposes to persons skilled in the art and that the drawings are not necessarily drawn to scale.

An image sensor pixel cell for use in a High Dynamic Range (HDR) image sensor including a plurality of amplifier transistors is described according to an example of the teachings of this disclosure. In various examples, the amplifier transistors are coupled as source followers with different threshold voltages and gain characteristics. In the example, the amplifier transistors are configured as dual source followers and the output signal from each amplifier transistor of a pixel cell is a component of the output amplified signal of the pixel cell. The operation of the dual source follower transistor may be based on the floating diffusion node being converted to a voltage level corresponding to the amount of charge accumulated in the photodiode of the pixel cell. Each source follower transistor is coupled to its respective readout column line and readout circuitry. In one example, an image sensor system having a pixel array including a plurality of pixel cells having this architecture includes two readout column lines per pixel cell column.

In one example, the voltage level at the floating diffusion node is low at higher light intensity conditions because more photo-generated electrons generated by incident light are transferred to the floating diffusion node under these conditions than under lower light intensity conditions. Under such conditions, the source follower transistor with the lower threshold voltage will be active. The voltage level at the floating diffusion node will be high at lower light intensity conditions because less photo-generated electrons generated by incident light are transferred to the floating diffusion node under these conditions than under higher light intensity conditions. Under such conditions, both the source follower transistor with the high threshold voltage and the source follower transistor with the low threshold voltage are active.

To illustrate, FIG. 2 is a circuit diagram showing one example of a circuit of a pixel cell 200 having multiple amplifier transistors 240A and 240B, according to the teachings of this disclosure. As shown in the depicted example, amplifier transistors 240A and 240B are configured as source followers. In the example shown in fig. 2, the pixel cell 200 is arranged to provide two output signals from transistors 240A and 240B to two readout column signal lines 270A and 270B. In the example, pixel cell 200 includes a photosensitive element, shown as photodiode 210, disposed in a semiconductor material, transfer transistor 220, reset transistor 230, floating diffusion FD280, first amplifier transistor 240A, second amplifier transistor 240B, first row select transistor 250A, and second row select transistor 250B. In other examples, it should be appreciated that the pixel cell 200 may include a variety of alternative pixel cell architectures including two amplifier transistors coupled to the floating diffusion FD280 in a configuration similar to the configuration of the first amplifier transistor 240A and the second amplifier transistor 240B according to the teachings of this disclosure.

During operation of the pixel cell 200, charge accumulates in the photodiode 210 in response to light incident on the photodiode 210. In one example, the type of charge accumulated in photodiode 210 in response to incident light includes electrons. The transfer transistor 220 may receive a transfer signal TX that transfers the charge accumulated in the photodiode 210 to the floating diffusion FD 280. The reset transistor 230 may be coupled between a power supply VDD and the floating diffusion FD280 to reset the pixel cell 200 (e.g., discharge or charge the floating diffusion FD280 and/or the photodiode 210 to a preset voltage) under control of a reset signal RST.

As shown in the depicted example, the floating diffusion FD280 is coupled to control the gate of the first amplifier transistor 240A. The first amplifier transistor 240A may be coupled between the power supply VDD and the first row select transistor 250A. The first amplifier transistor 240A is operable to provide a high impedance connected source follower to the floating diffusion FD280 and amplify the voltage at the floating diffusion FD280 with a first gain. The second amplifier transistor 240B may be coupled between the power supply VDD and the second row select transistor 250B. The second amplifier transistor 240B is operable to provide a high impedance connected source follower to the floating diffusion FD280 and amplify the voltage at the floating diffusion FD280 with a second gain. In one example, the first gain of the first amplifier transistor 240A is different from the second gain of the second amplifier transistor 240B according to the teachings of this disclosure.

In one example, the first amplifier transistor 240A and the second amplifier transistor 240B each provide a respective output signal from their respective source terminals. In one example, the output signals generated by the first and second amplifier transistors 240A and 240B may be component signals of an amplified signal representing the intensity of light incident on the photodiode 210. As shown in the example depicted in fig. 2, the first row select transistor 250A may selectively provide an output signal from the source terminal of the first amplifier transistor 240A to the readout column line BL _ H270A under control of a select signal RS _ H. Similarly, as shown in the depicted example, the second row select transistor 250B may selectively provide an output signal from the source terminal of the second amplifier transistor 240B to the readout column line BL _ L270B under control of the select signal RS _ L. In another example, the pixel cell 200 does not include any row select transistors 250A and 250B, such that the output signal from each of the first and second amplifier transistors 240A and 240B is directly connected to its respective first and second readout column lines 270A and 270B.

Referring back to the illustrated example, photodiode 210 and floating diffusion FD280 may be reset by temporarily asserting reset signal RST on reset transistor 230 and transfer signal TX on transfer transistor 220. In one example, the photodiode 210 and the floating diffusion FD280 are reset prior to image data acquisition using the pixel cell 200. At the end of the reset period, the reset signal RST and the transfer signal TX may be de-asserted. An image accumulation window (e.g., an exposure period) can then begin by permitting incident light to photogenerate charge in the photodiode 210. In one example, as the photo-generated electrons accumulate on the photodiode 210, the voltage on the photodiode 210 decreases from the reset voltage. The voltage or charge on the photodiode 210 may represent the intensity of light incident on the photodiode 210 during an exposure period.

After the exposure period, the transfer signal TX may then be asserted to allow charge exchange between the photodiode 210 and the floating diffusion FD280, and thus to the respective gates of both the first amplifier transistor 240A and the second amplifier transistor 240B. The charge transfer between the photodiode 210 and the floating diffusion FD280 causes the voltage of the floating diffusion FD280 to change by an amount representative of the photo-generated electrons accumulated on the photodiode 210 during the exposure period. As shown in the example depicted in figure 2, the voltage at the floating diffusion FD280 is coupled to the gate terminals of the first and second amplifier transistors 240A and 240B, where the voltage at the floating diffusion FD280 is then amplified by the first and second amplifier transistors 240A and 240B, according to the teachings of this disclosure.

In one example, the first row select transistor 250A selectively couples the output signal from the first amplifier transistor 240A to the first readout column line BL _ H270A in response to a first row select signal RS _ H, and the second row select transistor 250B selectively couples the output signal from the second amplifier transistor 240B to the second readout column line BL _ L270B in response to a second row select signal RS _ L. It should therefore be noted that the example pixel 200 of fig. 2 includes two readout column lines 270A and 270B for a single photodiode 210, in accordance with the teachings of this disclosure.

In one example, the first amplifier transistor 240A has a first threshold voltage and the second amplifier transistor 240B has a second threshold voltage. In this example, the first and second threshold voltages are different. Thus, in the example, the first and second amplifier transistors have different gain characteristics, such that the first amplifier transistor 240A and the second amplifier transistor 240B have different sensitivities to the intensity of light incident on the photodiode 210, in accordance with the teachings of this disclosure.

In one example, the first amplifier transistor 240A has a lower threshold voltage than the second amplifier transistor 240B. As will be discussed in greater detail below and in fig. 3, under higher light intensity conditions, the voltage level at the floating diffusion FD node 280 will be low due to the accumulation of photo-generated electrons in the photodiode 210 as a result of higher intensity incident light. Thus, in such higher light intensity conditions, the voltage level at the floating diffusion FD node 280 will cause the first amplifier transistor 240A to remain substantially on while the second amplifier transistor 240B is substantially off. However, under lower light intensity conditions, the voltage level at floating diffusive FD node 280 will be higher because under these conditions, less photo-generated electrons are transferred to floating diffusive FD node 280 than under higher light intensity conditions. In such lower light intensity conditions, the voltage level at the floating diffusion FD node 280 will cause both the first amplifier transistor 240A with the lower threshold voltage and the second source follower transistor 240b with the higher threshold voltage to remain substantially on.

In one example, different threshold voltages for the first amplifier transistor 240A and the second amplifier transistor 240B may be obtained by varying the doping concentration and/or dopant type in the channel region in the semiconductor material accordingly under their respective polysilicon gates. Thus, in this example, the doping concentration in the channel region of the first amplifier transistor 240A is different than the doping concentration in the channel region of the second amplifier transistor 240B. In one example, the threshold voltage of the second amplifier transistor 240B may be increased by doping the channel region of this transistor with a p-type dopant.

In another example, different threshold voltages for the two amplifier transistors may be obtained by doping the polysilicon gates of the first amplifier transistor 240A and the second amplifier transistor 240B with dopants having opposite polarities. For example, in the example illustrated in fig. 2, the polysilicon gate of the first amplifier transistor 240A may be doped with p-type dopants while the polysilicon gate of the second amplifier transistor 240B may be doped with n-type dopants. In one example, the polysilicon gates of the first amplifier transistor 240A and the second amplifier transistor 240B may each have 10¹⁸Ions/cubic centimeter to 10¹⁹Dopant concentration of ions per cubic centimeter.

Figure 3 is a diagram 390 illustrating an example relationship between examples of output signals 340A and 340B from multiple amplifier transistors having different gain characteristics and an example amplified signal 345 utilizing output signals 340A and 340B as component signals according to the teachings of this disclosure. In one example, it is understood that output signal 340A may be one example of an output signal from amplifier transistor 240A of fig. 2 and output signal 340B may be one example of an output signal from amplifier transistor 240B of fig. 2. Thus, in the depicted example, assume that the amplifier transistor that generates output signal 340A has a different gain characteristic and lower threshold voltage than the amplifier transistor that generates output signal 340B.

In the depicted example, first output signal 340A and second output signal 340B are each component signals of an amplified signal 345 representing light incident on a photodiode of a pixel cell. As shown in the example of fig. 3, when generating the amplified signal 345, the first output signal 340A has a greater weight than the second output signal 340B in the amplified signal for higher intensity light incident on the photodiode. In fact, as discussed above, as the intensity of light increases, the number of electrons accumulated in the photodiode increases, which causes the voltages on the gates of the first and second amplifier transistors to correspondingly decrease. Since the first amplifier transistor has a lower threshold voltage than the second amplifier transistor in the example, for higher light intensities, the first output signal 340A tends to remain substantially on while the second output signal 340B tends to be substantially off.

On the other hand, as shown in the depicted example, for lower intensities of light incident on the photodiode, the second output signal 340B has a greater weight than the first output signal 340A in the amplified signal 345. As discussed above, as the intensity of light decreases, the number of photo-generated electrons accumulated in the photodiode remains small, which allows the voltage on the gates of the first and second amplifier transistors to remain high. Since the voltages on the gates of the first and second amplifier transistors remain high, both the first output signal 340A and the second output signal 340B remain substantially on for lower intensities of incident light.

Thus, by having different threshold voltages and gain characteristics as described above, the first and second amplifier transistors that generate the first output signal 340A and the second output signal 340B have different sensitivities to different intensities of light incident on the photodiode of the pixel cell. According to the teachings of this disclosure, the amplified signal 345 provides HDR information with increased sensitivity in higher dynamic range of light intensities from pixel cells utilizing the first and second output signals 340A, 340B by weighting the component contributions of the first and second output signals 340A, 340B based on the intensity of the incident light as discussed.

FIG. 4 is a block diagram illustrating an example imaging system 400 utilizing a pixel array 405 including a plurality of pixel cells, according to an embodiment of the invention. In particular, as shown in the depicted example, imaging system 400 includes a pixel array 405, readout circuitry 410, functional logic 420, and control circuitry 430.

In the example, pixel array 405 is one two-dimensional (2D) array of imaging sensor cells or pixel cells (e.g., pixels P1, P2, …, Pn). In one example, each pixel cell is a Complementary Metal Oxide Semiconductor (CMOS) imaging pixel including first and second amplifier transistors according to the teachings of this disclosure. Pixel array 405 can be implemented as a front-side illuminated image sensor or a back-side illuminated image sensor. As illustrated, each pixel cell is arranged in rows (e.g., rows R1-Ry) and columns (e.g., columns C1-Cx) to acquire image data of a person, place, or object, which can then be used to render an image of the person, place, or object.

In particular, after each pixel cell has acquired its image data or image charge, readout circuitry 410 reads out the image data and transfers to function logic 420. The readout circuits 410 each include a plurality of column readout blocks 415. In the illustrated example, pixel cells arranged in the same column have their respective first output signal BL _ H470A and second output signal BL _ L470B coupled to be received by the same column readout block 415 in readout circuitry 410. In one example, each column readout block 415 includes circuitry to generate a corresponding amplified signal in response to the component first and second output signals 470A, 470B based on the intensity of incident light as discussed in detail above, in accordance with the teachings of this disclosure.

In one example, readout circuitry 410 may include amplification circuitry, analog-to-digital (ADC) conversion circuitry, or other circuitry. Function logic 420 may simply store the image data or even manipulate the image data by applying post-image effects (e.g., crop, rotate, remove red-eye, adjust brightness, adjust contrast, or otherwise). In one example, the readout circuitry 410 may read out a row of image data at a time along readout column lines (illustrated in fig. 4 as first output signal bit line BL _ H470A and second output signal bit line BL _ L470B), or may read out image data simultaneously using a variety of other techniques (not illustrated), such as serial readout, column readout along readout row lines, or full parallel readout of all pixels.

In one example, control circuitry 430 is coupled to the pixel array 405 and includes logic for controlling operating characteristics of the pixel array 405. For example, the control circuit 430 may generate a reset RST signal, row select RS _ H and RS _ L signals, and a transfer signal TX. The control circuit 430 may also generate a shutter signal for controlling image acquisition. In one example, the shutter signal is a global shutter signal for simultaneously enabling all pixels within pixel array 405 to simultaneously capture their respective image data during a single acquisition window. In an alternative example, the shutter signal is a rolling shutter signal whereby each row of pixels, each column of pixels, or each group of pixels is sequentially enabled during consecutive acquisition windows.

In one example, the imaging system 400 is a subsystem included in an electronic system. Examples of such electronic systems include mobile phones, computers, digital cameras, medical devices, and may further include operating units including computing or processing units related to the electronic systems. For example, an exemplary electronic system may be a mobile phone, and the operating unit may be a phone module included in the mobile phone that handles phone operations of the electronic system.

Figure 5A is a drawing showing one example of an arrangement of a pixel cell 500 according to the teachings of this disclosure. As shown in the depicted example, pixel cells 500 arranged in the same column can be coupled to the same first readout column line BL _ H570A and second readout column line BL _ L570B. In this example, each pair of sense column lines BL _ H570A and BL _ L570B is coupled to one of a plurality of column sense blocks 515. A pixel array having X columns of pixel cells 500 can have readout circuitry comprising X column readout blocks.

Figure 5B is a drawing showing another example of an arrangement of a pixel cell 500 according to the teachings of this disclosure. As shown in the depicted example, pixel cells 500 arranged in two adjacent columns may be time-divided by one column readout block 515. In this example, a pixel array having X columns of pixel cells 500 may have X/2 column readout blocks 515. In yet another example, N adjacent columns of pixel cells 500 may time-divide each column of readout block 515. In this example, a pixel array having X columns may include X/N column readout blocks.

The above description of illustrated examples of the present invention, including what is described in the Abstract of the disclosure, is not intended to be exhaustive or to be limited to the precise forms disclosed. While specific embodiments of, and examples for, the invention are described herein for illustrative purposes, various equivalent modifications can be made without departing from the broader spirit and scope of the invention.

These modifications can be made to the examples of the invention in light of the above detailed description. The terms used in the following claims should not be construed to limit the invention to the specific embodiments disclosed in the specification and the claims. Rather, the scope is to be determined entirely by the following claims, which are to be construed in accordance with established doctrines of claim interpretation. The specification and drawings are, accordingly, to be regarded in an illustrative rather than a restrictive sense.

Claims (22)

1. A pixel cell for use in a high dynamic range image sensor, comprising:

a photodiode disposed in a semiconductor material to accumulate charge in response to light incident on the photodiode;

a transfer transistor disposed in the semiconductor material, the transfer transistor coupled between a floating diffusion and the photodiode;

a first amplifier transistor disposed in the semiconductor material, the first amplifier transistor having a gate terminal coupled to the floating diffusion and a source terminal coupled to generate a first output signal for the pixel cell; and

a second amplifier transistor disposed in the semiconductor material, the second amplifier transistor having a gate terminal coupled to the floating diffusion and a source terminal coupled to generate a second output signal of the pixel cell, wherein the first amplifier transistor has a first threshold voltage and a first gain, wherein the second amplifier transistor has a second threshold voltage and a second gain, wherein the first threshold voltage is different than the second threshold voltage and the first gain is different than the second gain, such that the first amplifier transistor and the second amplifier transistor have different sensitivities to an intensity of the light incident on the photodiode.

2. The pixel cell of claim 1, wherein during a lower light intensity condition of the light incident on the photodiode, both the first and second amplifier transistors are coupled to be substantially on, and wherein during a higher light intensity condition of the light incident on the photodiode, one of the first and second amplifier transistors is coupled to be substantially on and the other of the first and second amplifier transistors is coupled to be substantially off.

3. The pixel cell of claim 1, wherein a channel region of the first amplifier transistor has a first doping concentration and wherein a channel region of the second amplifier transistor has a second doping concentration, wherein the first doping concentration is different than the second doping concentration.

4. The pixel cell of claim 1, wherein the gate terminal of the first amplifier transistor comprises a semiconductor material having a first polarity and wherein the gate terminal of the second amplifier transistor comprises a semiconductor material having a second polarity, wherein the first polarity is an opposite polarity to the second polarity.

5. The pixel cell of claim 4, wherein one of the first and second polarities is an n-type polarity and the other of the first and second polarities is a p-type polarity.

6. The pixel cell of claim 1, wherein the first output signal and the second output signal of the pixel cell are each component signals of an amplified signal responsive to the light incident on the photodiode, wherein the first output signal has greater weight than the second output signal in the amplified signal for higher intensity light incident on the photodiode, and wherein the second output signal has greater weight than the first output signal in the amplified signal for lower intensity light incident on the photodiode.

7. The pixel cell of claim 1, further comprising:

a first select transistor disposed in the semiconductor material, the first select transistor coupled between the first amplifier transistor and a first bit line; and

a second select transistor disposed in the semiconductor material, the second select transistor coupled between the second amplifier transistor and a second bit line.

8. The pixel cell of claim 1, further comprising a reset transistor disposed in said semiconductor material, said reset transistor coupled to said floating diffusion.

9. A high dynamic range imaging system, comprising:

a pixel array having a plurality of pixel cells, wherein each of the plurality of pixel cells includes:

a photodiode disposed in a semiconductor material to accumulate charge in response to light incident on the photodiode;

a transfer transistor disposed in the semiconductor material, the transfer transistor coupled between a floating diffusion and the photodiode;

a first amplifier transistor disposed in the semiconductor material, the first amplifier transistor having a gate terminal coupled to the floating diffusion and a source terminal coupled to generate a first output signal for the pixel cell; and

a second amplifier transistor disposed in the semiconductor material, the second amplifier transistor having a gate terminal coupled to the floating diffusion and a source terminal coupled to generate a second output signal of the pixel cell, wherein the first amplifier transistor has a first threshold voltage and a first gain, wherein the second amplifier transistor has a second threshold voltage and a second gain, wherein the first threshold voltage is different than the second threshold voltage and the first gain is different than the second gain, such that the first amplifier transistor and the second amplifier transistor have different sensitivities to an intensity of the light incident on the photodiode;

control circuitry coupled to the pixel array to control operation of the pixel array; and

readout circuitry coupled to the pixel array to readout the first and second output signals from each of the plurality of pixel cells.

10. The imaging system of claim 9, wherein the plurality of pixel cells are arranged in a plurality of rows and a plurality of columns, wherein the readout circuitry includes a plurality of readout blocks, wherein each of the plurality of readout blocks is coupled to receive the first output signal and the second output signal from one or more of the plurality of columns of the pixel cells.

11. The imaging system of claim 9, further comprising functional logic coupled to the readout circuitry to store image data read out from the plurality of pixel cells.

12. The imaging system of claim 9, wherein the first amplifier transistor and the second amplifier transistor are both coupled to be substantially on during lower light intensity conditions of the light incident on the photodiode, and wherein one of the first amplifier transistor and the second amplifier transistor is coupled to be substantially on and the other of the first amplifier transistor and the second amplifier transistor is coupled to be substantially off during higher light intensity conditions of the light incident on the photodiode.

13. The imaging system of claim 9, wherein a channel region of the first amplifier transistor has a first doping concentration and wherein a channel region of the second amplifier transistor has a second doping concentration, wherein the first doping concentration is different than the second doping concentration.

14. The imaging system of claim 9, wherein the gate terminal of the first amplifier transistor comprises semiconductor material having a first polarity and wherein the gate terminal of the second amplifier transistor comprises semiconductor material having a second polarity, wherein the first polarity is the opposite polarity from the second polarity.

15. The imaging system of claim 14, wherein one of the first and second polarities is an n-type polarity and the other of the first and second polarities is a p-type polarity.

16. The imaging system of claim 9, wherein the first output signal and the second output signal of the pixel cell are each component signals of an amplified signal responsive to the light incident on the photodiode, wherein the first output signal has greater weight than the second output signal in the amplified signal for higher intensity light incident on the photodiode, and wherein the second output signal has greater weight than the first output signal in the amplified signal for lower intensity light incident on the photodiode.

17. The imaging system of claim 9, wherein each of the plurality of pixel cells further comprises:

a first select transistor disposed in the semiconductor material, the first select transistor coupled between the first amplifier transistor and a first bit line; and

a second select transistor disposed in the semiconductor material, the second select transistor coupled between the second amplifier transistor and a second bit line.

18. The imaging system of claim 9, wherein each of the plurality of pixel cells further comprises a reset transistor disposed in the semiconductor material, the reset transistor coupled to the floating diffusion.

19. A method for generating image data from pixel cells, comprising:

generating charge in a photodiode in response to light incident on the photodiode;

transferring the charge between the photodiode and a floating diffusion via a transfer transistor;

generating a first output signal in response to the charge at the floating diffusion with a first amplifier transistor having a gate terminal coupled to the floating diffusion, wherein the first output signal is generated at a source terminal of the first amplifier transistor;

generating a second output signal in response to the charge at the floating diffusion with a second amplifier transistor having a gate terminal coupled to the floating diffusion, wherein the second output signal is generated at a source terminal of the second amplifier transistor, wherein the first output signal and the second output signal of the pixel cell are each a component signal of an amplified signal in response to the light incident on the photodiode;

weighting the first output signal more heavily than the second output signal in the amplified signal for higher intensity light incident on the photodiode; and

the second output signal is weighted more heavily than the first output signal in the amplified signal for lower intensities of light incident on the photodiode.

20. The method of claim 19, wherein generating the first output signal comprises amplifying a voltage at the floating diffusion with the first amplifier transistor having a first gain, wherein generating the second output signal comprises amplifying the voltage at the floating diffusion with the second amplifier transistor having a second gain, wherein the first gain is different than the second gain.

21. The method of claim 19, further comprising selecting the first output signal and the second output signal with a first select transistor and a second select transistor coupled to the first amplifier transistor and the second amplifier transistor, respectively.

22. The method of claim 19, further comprising resetting the charge at the floating diffusion and the photodiode with a reset transistor coupled to the floating diffusion prior to generating the charge in the photodiode in response to the light incident on the photodiode.