HK1194527B - Semiconductor die singulation method - Google Patents

Description

Semiconductor chip separation method

Technical Field

The present invention relates generally to electronics, and more particularly to methods of forming semiconductors.

Background

In the past, the semiconductor industry has used various methods and apparatus to separate individual semiconductor chips from a semiconductor wafer on which the chips were fabricated. Typically, a technique known as scribing or dicing is used to cut partially or fully through the wafer using a diamond cutter head along scribe grids or separation lines formed between individual dies on the wafer. To allow for calibration and to account for the width of the dicing wheel, each dicing grid typically has a large width, typically on the order of one hundred fifty (150) microns, which consumes a large portion of the semiconductor wafer. In addition, the time required to scribe each separation line on the semiconductor wafer may exceed one hour or more. This time reduces the throughput and manufacturing capacity of the production facility.

Other methods have been explored as alternatives to scribing, which have included thermal laser dicing (TLS), stealth dicing (laser dicing from the back side of the wafer), and plasma dicing. Plasma dicing is a promising process compared to dicing and other alternative processes because it supports narrower dicing lines, increases yield, and can separate chips in various and flexible patterns. However, plasma cutting has had manufacturing implementation challenges. Such challenges have included dissimilarities with wafer backside layers (e.g., backside metal layers) because the etching process has not been effective in removing the backside layer from the separation lines. Removal of the back side layer from the scribe line is necessary to facilitate subsequent processes such as mounting and assembly processes.

Therefore, there is a need for a method of separating chips from a semiconductor wafer, wherein the method separates a backside layer from within separation lines. It would be beneficial if the method were cost effective, minimized any damage or contamination to the singulated chips, and supported recycling.

Drawings

Figure 1 shows a simplified plan view of one embodiment of a semiconductor wafer according to the present invention;

2-10 illustrate partial cross-sectional views of embodiments of the semiconductor wafer of FIG. 1 at various stages in the process of separating chips from the wafer, according to one embodiment of the present invention;

figure 11 illustrates a partial cross-sectional view of an embodiment of the semiconductor wafer of figure 10 or figure 15 at a later stage in the process, in accordance with an embodiment of the present invention;

12-15 illustrate partial cross-sectional views of embodiments of the semiconductor wafer of FIG. 1 at various stages of separating chips from the wafer, according to another embodiment of the present invention; and

fig. 16 shows a partial cross-sectional view of another embodiment of the present invention.

For simplicity and clarity of illustration, elements in the figures are not necessarily drawn to scale, and the same reference numbers in different figures denote the same elements. In addition, descriptions and details of well-known steps and elements are omitted to simplify the description. For clarity of the drawing, certain regions of the device structure (e.g., doped regions or dielectric regions) may be illustrated as having substantially straight edges and precisely angled corners. However, those skilled in the art understand that the edges of such regions may not be substantially straight and the corners may not be precisely angled due to diffusion and activation of dopants or formation of layers. Furthermore, the term "major surface" when used in conjunction with a semiconductor region, wafer, or substrate refers to the surface of the semiconductor region, wafer, or substrate that forms an interface with another material, such as a dielectric, insulator, conductor, or polycrystalline semiconductor. The major surface may have a configuration that varies in the x, y, and z directions.

Detailed Description

Fig. 1 is a simplified plan view illustrating a semiconductor wafer 10 at a later step in the fabrication process. Wafer 10 includes a plurality of semiconductor chips, such as chips 12, 14, 16, and 18, that are formed on or as part of semiconductor wafer 10. The chips 12, 14, 16 and 18 are spaced apart from one another on the wafer 10 by pitches in which separation lines, such as scribe lines or separation lines 13, 15, 17 and 19, are to be formed or defined. As is well known in the art, substantially all of the semiconductor chips on the wafer 10 are spaced apart from one another on each side by areas in which scribe lines or separation lines, such as separation lines 13, 15, 17, and 19, will be formed. Chips 12, 14, 16, and 18 may be any kind of electronic device including semiconductor devices such as diodes, transistors, discrete devices, sensor devices, optical devices, integrated circuits, or other devices known to those of ordinary skill in the art. In one embodiment, wafer 10 has a completed wafer process including the formation of a back side layer as described below.

Fig. 2 shows an enlarged cross-sectional view of the wafer 10 at an earlier step in a chip separation method according to a first embodiment. In one embodiment, the wafer 10 is attached to a carrier substrate, transfer tape or tape 30 that facilitates supporting the plurality of chips after they are separated. Such carrier tapes are well known to those skilled in the art. In one embodiment, carrier tape 30 may be attached to frame 40, and frame 40 may include frame portions or portions 401 and 402. As depicted, carrier tape 30 may be attached to surface 4010 of frame portion 401 and surface 4020 of frame portion 402.

In the illustrated cross-section, the wafer 10 may include a bulk substrate 11 (e.g., silicon-based), which bulk substrate 11 may include opposing major surfaces 21 and 22. In one embodiment, contact pads 24 may be formed along portions of major surface 21 to provide electrical contact between structures formed within substrate 11 and a next level of assembly or external components. For example, the contact pads 24 may be formed to receive bond wires or posts that may be subsequently attached to the contact pads 24, or the contact pads 24 may be formed to receive solder balls, bumps, or other types of attachment structures. The contact pads 24 may be substantially metal or other conductive material. In general, dielectric material 26 (e.g., a blanket deposited dielectric layer) may be formed on or over major surface 21 to function as a passivation layer for wafer 10. In one embodiment, the dielectric material 26 may be a material that etches at a slower rate than the substrate 11. In one embodiment, when substrate 11 is silicon, dielectric material 26 may be silicon dioxide, silicon nitride, or polyimide.

In one embodiment, openings may be formed over dielectric material 26 (and other dielectric layers that may be formed underlying dielectric material 26) to expose the underlying surface of contact pads 24 and the surface of substrate 11 in which separation lines 13, 15, 17, and 19 are to be formed. As shown and in accordance with the present embodiment, wafer 10 also includes a layer of material 28 formed on or over major surface 22 of wafer 10. In one embodiment, layer 28 may be a conductive back metal layer. In one embodiment, layer 28 may be a multi-layer metal system such as titanium/nickel/silver, titanium/nickel/silver/tungsten, chromium/nickel/gold, copper alloys, gold, or other materials known to those skilled in the art. In another embodiment, layer 28 may be a Wafer Backside Coating (WBC) film, such as a coating for attaching chips.

Fig. 3 shows an enlarged cross-sectional view of the wafer 10 at a subsequent step in the plasma etch separation process. In one embodiment, the wafer 10 may be mounted on a carrier tape 30 and may then be placed in an etching apparatus 300 (e.g., a plasma etching apparatus). In one embodiment, substrate 11 may be etched through the openings to form or define separation lines or openings 13, 15, 17, and 19 extending from major surface 21. The etching process may be performed using a chemistry (generally represented by arrows 31) that selectively etches silicon at a much higher rate than the dielectric and/or metal. In one embodiment, wafer 10 may be etched using a process commonly referred to as bosch. In one embodiment, the wafer 10 may be etched using a bosch process in an alcatel deep reactive ion etching system. In one embodiment, separation lines 13, 15, 17, and 19 may have a width of from about five microns to about fifteen microns. Such a width is sufficient to ensure that the openings forming the separation lines 13, 15, 17 and 19 can be formed completely through the substrate 11 and stop close to the layer 28 due to the etch selectivity as generally shown in fig. 4. In one embodiment, layer 28 may be used as a stop layer for a plasma etch separation process. In one embodiment, the separation lines 13, 15, 17, and 19 may be formed using bosch's method in about fifteen to about thirty minutes.

Fig. 5 shows a cross-sectional view of the wafer 10 at a subsequent process step. In one embodiment, a pressurized fluid removal step, a fluid erosion step, or a fluid processing step is used to remove portions of layer 28 from within separation lines 13, 15, 17, and 19 according to the present embodiment. In one embodiment, the frame 40 including the wafer 10 on the carrier tape 30 may be placed in a fluid rotary rinse device 60. In one embodiment, major surface 21 of wafer 10 may face upward or away from carrier tape 30. In one embodiment, the apparatus 60 may be configured with a nozzle or dispensing device 61 placed above the wafer 10, as shown in fig. 5. Frame 40 and carrier tape 30 may be placed on a support structure 63 (e.g., a vacuum chuck). In one embodiment, the structure 63 may be configured to rotate and spin as generally indicated by arrow 64. In one embodiment, structure 63 may be configured to stretch or extend carrier tape 30 as generally indicated by arrows 69 to provide additional force to layer 28 to assist in its removal or singulation from within the separation line.

The apparatus 60 may include a barrel or basin structure 67 which may be used to contain and collect process wastewater through an outlet 68 into a collection tank 71. One benefit of the present methods and apparatus is that material removed from layer 28 during processing can be preserved for recycling or for environmentally suitable disposal techniques.

In one embodiment, layer 28 may be removed or processed in a disco brand rotary rinsing device using the process described above. In this process, a processing medium (e.g., fluid 72) may be dispensed from nozzles 61 during rotation of structure 63 and wafer 10. In one embodiment, the nozzle 61 may be moved or oscillated across the wafer 10 as generally indicated by arrow 74. In one embodiment, the fluid 72 may be a liquid, a gas, a mixture thereof, or another material that removes the layer 28 while minimizing damage to or causing unwanted contamination of the chips 12, 14, 16, and 18. In one embodiment, the fluid 72 may be water. In another embodiment, the fluid 72 may be air or nitrogen. In one embodiment, a surfactant may be added to the fluid 72, such as Diamaflo, manufactured by KETECA, Inc. of Phoenix, Arizona, USA^TMA surfactant. In one embodiment, an abrasive may be added to the fluid 72.

In one embodiment, the following process conditions may be used to remove layer 28. For example, the fluid 72 may be deionized water at a pressure of from about 10,342 kilopascals (Kpa) to about 20,684Kpa (about 1500 pounds per square inch (psi) to about 3000 psi) as measured at the fluid pump. The wafer 10 may be rotated at a rate from about 700rpm to about 1500rpm, with the fluid 72 flowing onto the wafer 10 for from about 2 minutes to about 5 minutes.

It should be understood that the methods described herein may also be used to remove other structures from within the separation lines 13, 15, 17, and/or 19 that may not be removed in the plasma etch process, such as alignment keys, test structures, and/or residual semiconductor material. The steps described below may be used in one embodiment to remove the remaining portion 280 from the separation line.

Fig. 6 shows a cross-sectional view of the wafer 10 after portions of the layer 28 within the separation lines 13, 15, 17 and 19 have been removed. As shown in this embodiment, portion 280 of layer 28 may remain after the fluid processing process previously described. Portion 280 may remain because lines 13, 15, 17, and 19 are configured with narrower widths when using a separation process such as plasma separation rather than a conventional dicing process that requires wider separation lines.

Fig. 7 shows a cross-sectional view of the wafer 10 at a subsequent process step. In one embodiment, carrier tape 30 may be exposed to an ultraviolet light source to reduce the tackiness of the tape. Subsequently, the carrier tape 301 may be applied or attached to the conductive pads 24 along the upper surface of the wafer 10 (i.e., the upper major surface 21 of the wafer 10), the surface 4011 of the frame portion 401, and the surface 4021 of the frame portion 402. In one embodiment, carrier tape 301 and carrier tape 30 may be similar materials. In another embodiment, carrier tape 301 may be a different material or may have different properties, such as adhesive and/or stretch properties, than carrier tape 30. According to this embodiment, after carrier tape 301 is applied, carrier tape 30 may be removed from wafer 10 and frame 40 to expose layer 28 and portions 280.

Fig. 8 shows a cross-sectional view of the wafer 10 in a subsequent process. In one embodiment, wafer 10 is again placed within apparatus 60 with layer 28 facing upward (or toward nozzle 61), and portion 280 of layer 28 may be removed using a fluid processing process as previously described. For example, the fluid 72 may be deionized water at a pressure of from about 10,342Kpa to about 20,684Kpa (about 1500psi to about 3000 psi) as measured at the fluid pump. The wafer 10 may be rotated at a rate from about 700rpm to about 1500rpm, with the fluid 72 flowing onto the wafer 10 for from about 2 minutes to about 5 minutes. In one embodiment, after removal of portion 280 of layer 28, and after removal of any other unnecessary material from separation lines 13, 15, 17, and/or 19, wafer 10 may be removed from device 60 to provide the intermediate structure shown in fig. 9.

Fig. 10 shows a cross-sectional view of the wafer 10 in a subsequent process. In one embodiment, carrier tape 301 may be exposed to an ultraviolet light source to reduce the tackiness of the tape. In one embodiment, carrier tape 302 may be applied to or attached to layer 28 of wafer 10, surface 4010 of frame portion 401, and surface portion 4020 of frame portion 402. In one embodiment, carrier tape 302, carrier tape 301, and carrier tape 30 may be similar materials. In another embodiment, carrier tape 302 may be a different material or may have different properties, such as adhesive and/or stretch properties, than carrier tape 30 and/or carrier tape 301. According to the present embodiment, after applying the carrier tape 302, the carrier tape 301 may be removed from the wafer 10 and the frame 40 to expose the conductive pads 24 above the upper surface 21 of the wafer 10. In a subsequent step, the chips 12, 14, 16 and 18 may be removed from the carrier tape 302 as part of a further assembly process using, for example, a placement device 81 as generally shown in fig. 11. In one embodiment, the carrier tape 302 may be exposed to an ultraviolet light source prior to the mounting step to reduce the tackiness of the tape.

Fig. 12 shows a cross-sectional view of the wafer 10 after a separation process according to an alternative embodiment. Wafer 10 may be attached to carrier tape 30, with carrier tape 30 further attached to frame 40, as previously described in connection with fig. 2. However, in this embodiment, the carrier tape 301 may be applied or attached to the contact pads 24 located above the upper surface of the wafer 10 (i.e., the main surface 21 of the wafer 10), the surface 4011 of the frame portion 401, and the surface 4021 of the frame portion 402. According to this embodiment, after applying carrier tape 301, carrier tape 30 may be removed from layer 28, wafer 10, and frame 40 to expose layer 28, as shown in fig. 13. In one embodiment, carrier tape 30 may be exposed to an ultraviolet light source prior to application of carrier tape 301 to reduce the tack of the tape.

In a subsequent step, the wafer 10 with the exposed or face-up (or towards the nozzle 61) layer 28 is then placed within the device 60, and portions of the layer 28 may be removed from the separation lines 13, 15, 17 and 19, as shown in fig. 14. In one embodiment, the following process conditions may be used to remove portions of layer 28. For example, the fluid 72 may be deionized water at a pressure of from about 10,342Kpa to about 20,684Kpa (about 1500psi to about 3000 psi) as measured at the fluid pump. The wafer 10 may be rotated at a rate from about 700rpm to about 1500rpm, with the fluid 72 flowing onto the wafer 10 for from about 2 minutes to about 5 minutes.

Fig. 15 shows a cross-sectional view of the wafer 10 after further processing. In one embodiment, carrier tape 301 may be exposed to an ultraviolet light source to reduce the tackiness of the tape. Subsequently, the carrier tape 302 may be applied or attached to the layer 28 of the wafer 10, the surface 4010 of the frame portion 401, and the surface 4020 of the frame portion 402. According to the present embodiment, after applying the carrier tape 302, the carrier tape 301 may be removed from the wafer 10 and the frame 40 to expose the conductive pads 24 above the upper surface 21 of the wafer 10. In a subsequent step, the chips 12, 14, 16 and 18 may be removed from the carrier tape 302 using, for example, a placement device 81 as generally shown in fig. 11.

It should be understood that carrier tapes 30, 301, and/or 302 may be stretched or extended in a fluid processing process to further assist in removing unwanted material from within the separation lines. Additionally, the device 60 may include a megasonic device to create controlled acoustic cavitation in the fluid 72. Additionally, the fluid 72 may be heated or cooled.

Fig. 16 shows a cross-sectional view of another embodiment. The wafer 10 on the carrier substrate 10 may be placed in a device 601, which device 601 may be similar to device 60. In this embodiment, layer 28 may be a Wafer Backside Coating (WBC) film, such as a die attach coating. In one embodiment, the wafer 10 on the carrier substrate 30 may be stretched to increase the distance between adjacent chips. In one embodiment, the workpiece 96 may be used to stretch the carrier substrate 30. The workpiece 96 may be, for example, an arcuate bar or a dome. Stretching may facilitate removal of layer 28 from separation lines 13, 15, 17, and 19 using fluid 72. In one embodiment, wafer 10 may be cooled to a lower temperature to increase the brittleness of layer 28. In one embodiment, either or both of the fluid 72 or the wafer 10 may be heated to facilitate removal of the layer 28. In one embodiment, the workpiece 96 may be moved across the wafer 10 while the fluid 72 flows. In another embodiment, the workpiece 96 and wafer 10 may be rotated while the fluid 72 flows (as generally indicated by arrow 64).

In view of all of the above, one skilled in the art can determine, in accordance with one embodiment, a method of separating semiconductor chips from a semiconductor wafer (e.g., component 10) that includes providing a semiconductor wafer having a plurality of semiconductor chips (e.g., components 12, 14, 16, 18) formed on the semiconductor wafer and spaced apart from one another by a spacing, wherein the semiconductor layer has first and second opposing major surfaces (e.g., components 21, 22), and wherein a layer of material (e.g., component 28) is formed along the second major surface. The method includes placing a semiconductor wafer on a first carrier substrate (e.g., component 30), wherein a layer of material is adjacent to the first carrier substrate and separating the semiconductor wafer by a pitch to form separation lines (e.g., components 13, 15, 17, 19), wherein separating includes stopping proximate to the layer of material; and removing portions of the material layer from the separation line using a pressurized fluid (e.g., element 72).

In view of all of the above, one skilled in the art can determine from another embodiment that, in one embodiment, the step of removing a portion of the layer of material can include removing a first portion of the layer of material using a first pressurized fluid during attachment of the layer of material to the first carrier substrate; attaching a second carrier substrate (e.g., element 301) to the first major surface of the semiconductor wafer (e.g., element 21); removing the first bearing substrate; and removing a second portion of the layer of material using a second pressurized fluid.

As can be determined by one skilled in the art in view of the above disclosure, in one embodiment, the step of removing portions of the material layer can include attaching a second carrier substrate (e.g., element 301) to the first major surface of the semiconductor wafer; removing the first bearing substrate; and removing portions of the material layer from the separation line using the pressurized fluid.

In view of all of the above, one skilled in the art can determine a method of separating a substrate according to another embodiment, which includes providing a substrate (e.g., element 10) having a plurality of dies (e.g., elements 12, 14, 16, 18) formed thereon and spaced apart from one another by a spacing, wherein the substrate has first and second opposing major surfaces (e.g., elements 21, 22), and wherein a layer of material (e.g., element 28) is formed over the second major surface. The method includes placing a first carrier tape (e.g., components 30) on a layer of material; etching the substrate by pitch plasma to form separation lines (e.g., elements 13, 15, 17, 19), wherein the separation lines terminate proximate to the material layer; and removing portions of the material layer from the separation line using a pressurized fluid (e.g., element 72).

As will be recognized by those skilled in the art in view of the above disclosure, in one embodiment, the step of providing a substrate may include providing a semiconductor wafer having a conductive layer formed over a second major surface.

In view of all of the above, one skilled in the art can determine, in accordance with another embodiment, a method of separating semiconductor chips from a semiconductor wafer, including providing a semiconductor wafer (e.g., element 10) having a plurality of semiconductor chips (e.g., elements 12, 14, 16, 18) formed as part of the semiconductor wafer and spaced apart from one another by a spacing that defines where separation lines (e.g., elements 13, 15, 17, 19) are to be formed, wherein the semiconductor wafer has first and second opposing major surfaces (e.g., elements 21, 22), and wherein a layer of material (e.g., element 28) is formed over the second major surface. The method includes placing a first carrier tape (e.g., components 30) on a layer of material. The method includes etching the semiconductor wafer by pitch plasma during attachment of the semiconductor wafer to the first carrier tape to form separation lines, wherein the separation lines terminate proximate to the layer of material. The method includes removing portions of the material layer from the separation line using a pressurized fluid (e.g., element 72).

As can be determined by one skilled in the art from a further embodiment, in one embodiment, the method can further include placing a second carrier tape (e.g., components 301) over the first major surface to support the semiconductor wafer and removing the first carrier tape. Additionally, the step of removing a portion of the material layer may include removing the portion using pressurized water while the semiconductor wafer is rotating (e.g., element 64).

In view of all of the above, it is evident that a novel method is disclosed. Including, among other features, placing a substrate having a layer of material on a major surface of the substrate on a carrier tape; and forming a separation line through the substrate to expose a portion of the material layer within the separation line. Subsequently, the exposed portions of the material layer are removed using a fluid processing process during the positioning of the substrate on the carrier tape. The method provides, among other things, an efficient, reliable, and cost-effective process for separating substrates, including backside layers, such as a back metal layer or a WBC layer.

According to an aspect of the present invention, there is provided a method of separating semiconductor chips from a semiconductor wafer, comprising: providing a semiconductor wafer having a plurality of semiconductor chips formed thereon and spaced apart from one another by a spacing, wherein a semiconductor layer has first and second opposing major surfaces, and wherein a layer of material is formed along the second major surface; placing the semiconductor wafer on a first carrier substrate, wherein the material layer is adjacent to the first carrier substrate; separating the semiconductor wafer by the pitch to form separation lines, wherein separating comprises stopping proximate to the material layer; and removing portions of the material layer from the separation line using a pressurized fluid.

In one embodiment, placing the semiconductor wafer on the first carrier substrate includes placing the semiconductor wafer on a tape.

In one embodiment, removing the portion of the layer of material comprises: removing a first portion of the layer of material using a first pressurized fluid during attachment of the layer of material to the first carrier substrate; attaching a second carrier substrate to the first major surface of the semiconductor wafer; removing the first bearing substrate; and removing a second portion of the layer of material using a second pressurized fluid.

In one embodiment, the method further comprises: attaching a third carrier substrate to the second major surface after removing the second portion; and removing the second carrier substrate.

In one embodiment, removing the portion of the layer of material comprises the steps of: attaching a second carrier substrate to the first major surface of the semiconductor wafer; removing the first bearing substrate; and removing the portion of the layer of material from the separation line using the pressurized fluid.

In one embodiment, providing the semiconductor wafer includes providing the semiconductor wafer with a back metal layer over the second major surface.

In one embodiment, separating the semiconductor wafer includes plasma etching the semiconductor wafer.

In one embodiment, removing the portion of the layer of material from the separation line using the pressurized fluid comprises removing the portion of the layer of material using pressurized water.

In one embodiment, removing the portion of the layer of material from the separation line using the pressurized fluid comprises removing the portion of the layer of material using a gas under pressure.

In one embodiment, removing the portion of the layer of material from the separation line using the pressurized fluid comprises removing the portion of the layer of material using the pressurized fluid, the pressurized fluid comprising one of a surfactant and an abrasive.

In one embodiment, removing the portion of the material layer from the separation line comprises the steps of: rotating the semiconductor wafer; and applying the pressurized fluid to the semiconductor wafer.

In one embodiment, the method further comprises: stretching the first carrier substrate; applying the pressurized fluid to the semiconductor wafer.

According to another aspect of the present invention, there is provided a method of separating a substrate, comprising: providing a substrate having a plurality of chips formed thereon and spaced apart from one another by a spacing, wherein the substrate has first and second opposing major surfaces, and wherein a layer of material is formed over the second major surface; placing a first carrier tape on the material layer; plasma etching the substrate through the pitch to form a separation line, wherein the separation line terminates proximate to the material layer; and removing portions of the material layer from the separation line using a pressurized fluid.

In one embodiment, removing the portion of the layer of material comprises: removing a first portion of the layer of material during attachment of the substrate to the first carrier tape; attaching a second carrier tape to the first major surface of the substrate; removing a second portion of the layer of material during attachment of the substrate to the second carrier tape; attaching a third carrier tape to the remainder of the layer of material; and removing the second carrier tape.

In one embodiment, the method further comprises: placing a second carrier tape on the first major surface of the substrate; and removing the first carrier tape prior to the step of removing the portion of the layer of material.

In one embodiment, providing the substrate includes providing a semiconductor wafer having a conductive layer formed over the second major surface.

According to an aspect of the present invention, there is provided a method of separating semiconductor chips from a semiconductor wafer, comprising: providing the semiconductor wafer having a plurality of semiconductor chips formed as part of the semiconductor wafer and spaced apart from each other by a pitch defining locations where separation lines are to be formed, wherein the semiconductor wafer has first and second opposing major surfaces, and wherein a layer of material is formed over the second major surface; placing a first carrier tape on the material layer; during attachment of the semiconductor wafer to the first carrier tape, plasma etching the semiconductor wafer through the pitch to form the separation lines, wherein the separation lines terminate proximate to the material layer; and removing portions of the material layer from the separation line using a pressurized fluid.

In one embodiment, the method further comprises: placing a second carrier tape over the first major surface to support the semiconductor wafer; and removing the first carrier tape, and wherein removing a portion of the material layer comprises removing the portion using pressurized water while the semiconductor wafer is rotating.

In one embodiment, removing the portion of the layer of material comprises: removing a first portion of the layer of material using a first pressurized fluid during attachment of the layer of material to the first carrier tape; attaching a second carrier tape adjacent to the first major surface of the semiconductor wafer; removing the first bearing substrate; and removing a second portion of the layer of material using a second pressurized fluid.

In one embodiment, the method further comprises stretching the first carrier tape during the step of removing the portion of the layer of material.

While the subject matter of the present disclosure has been described with respect to specific preferred and exemplary embodiments, the foregoing drawings, and the description thereof, depict only typical embodiments of the subject matter and are not therefore to be considered to limit its scope. It is evident that many alternatives and modifications will be apparent to those skilled in the art. For example, other forms of removable support material may be used in place of the carrier tape.

As the following claims reflect, inventive aspects may lie in less than all features of a single foregoing disclosed embodiment. Thus, the claims set forth below are hereby expressly incorporated into this detailed description, with each claim standing on its own as a separate embodiment of this invention. Furthermore, although some embodiments described herein include some, but not other, features included in other embodiments, combinations of features of different embodiments are intended to be within the scope of the invention, and are intended to form different embodiments as would be understood by one of ordinary skill in the art.

Claims (20)

1. A method of separating semiconductor chips from a semiconductor wafer, comprising:

providing a semiconductor wafer having a plurality of semiconductor chips formed thereon and spaced apart from one another by a spacing, wherein a semiconductor layer has first and second opposing major surfaces, and wherein a layer of material is formed along the second major surface;

placing the semiconductor wafer on a first carrier substrate, wherein the material layer is adjacent to the first carrier substrate;

separating the semiconductor wafer by the pitch to form separation lines, wherein separating comprises stopping proximate to the material layer; and

removing portions of the material layer from the separation line using a pressurized fluid.

2. The method of claim 1, wherein placing the semiconductor wafer on the first carrier substrate comprises placing the semiconductor wafer on a carrier tape, and wherein removing portions of the layer of material comprises using a fluid stream dispensed through a nozzle.

3. The method of claim 1, wherein removing portions of the layer of material comprises:

removing a first portion of the layer of material using a first pressurized fluid while the layer of material is adhered to the first carrier substrate;

attaching a second carrier substrate to the first major surface of the semiconductor wafer;

removing the first bearing substrate; and

removing a second portion of the layer of material using a second pressurized fluid.

4. The method of claim 3, further comprising:

attaching a third carrier substrate to the second major surface after removing the second portion; and

and removing the second bearing substrate.

5. The method of claim 1, wherein removing portions of the layer of material comprises:

attaching a second carrier substrate to the first major surface of the semiconductor wafer;

removing the first bearing substrate; and

removing the portion of the layer of material from the separation line using the pressurized fluid.

6. The method of claim 1, wherein providing the semiconductor wafer comprises providing the semiconductor wafer with a back metal layer over the second major surface.

7. The method of claim 1, wherein separating the semiconductor wafer comprises plasma etching the semiconductor wafer, and wherein removing portions of the material layer comprises directing the pressurized fluid toward the first carrier substrate.

8. The method of claim 1, wherein removing portions of the layer of material from the separation line using the pressurized fluid comprises removing portions of the layer of material using water.

9. The method of claim 1, wherein removing the portion of the layer of material from the separation line using the pressurized fluid comprises removing the portion of the layer of material using a gas.

10. The method of claim 1, wherein removing portions of the layer of material from the separation line using the pressurized fluid comprises removing portions of the layer of material using the pressurized fluid, the pressurized fluid comprising one of a surfactant and an abrasive.

11. The method of claim 1, wherein removing portions of the material layer from the separation lines comprises:

rotating the semiconductor wafer; and

applying the pressurized fluid to the semiconductor wafer.

12. The method of claim 1, further comprising:

stretching the first carrier substrate; and

applying the pressurized fluid to the semiconductor wafer.

13. A method of separating a substrate, comprising:

providing a substrate having a plurality of chips formed thereon and spaced apart from each other by a spacing, wherein the substrate has first and second opposing major surfaces, and wherein a layer of material is formed over the second major surface;

placing a first carrier tape on the material layer;

plasma etching the substrate through the pitch to form a separation line, wherein the separation line terminates proximate to the material layer; and

removing portions of the material layer from the separation line using a pressurized fluid.

14. The method of claim 13, wherein removing the portion of the layer of material comprises:

removing a first portion of the layer of material while the substrate is attached to the first carrier tape;

attaching a second carrier tape to the first major surface of the substrate;

removing a second portion of the layer of material while the substrate is attached to the second carrier tape;

attaching a third carrier tape to the remainder of the layer of material; and

and removing the second carrier tape.

15. The method of claim 13, further comprising:

placing a second carrier tape on the first major surface of the substrate; and

removing the first carrier tape before removing the portion of the layer of material.

16. The method of claim 13, wherein providing the substrate comprises providing a semiconductor wafer having a conductive layer formed over the second major surface.

17. A method of separating semiconductor chips from a semiconductor wafer, comprising:

providing the semiconductor wafer having a plurality of semiconductor chips formed as part of the semiconductor wafer and spaced apart from each other by a pitch defining locations where separation lines are to be formed, wherein the semiconductor wafer has first and second opposing major surfaces, and wherein a layer of material is formed over the second major surface;

placing a first carrier tape on the material layer;

plasma etching the semiconductor wafer through the pitch to form the separation lines while the semiconductor wafer is attached to the first carrier tape, wherein the separation lines terminate proximate to the material layer; and

removing portions of the material layer from the separation line using a pressurized fluid.

18. The method of claim 17, further comprising:

placing a second carrier tape over the first major surface to support the semiconductor wafer; and

removing the first carrier tape, and wherein removing portions of the layer of material comprises removing the portions with water while the semiconductor wafer is spinning, wherein removing portions of the layer of material comprises:

dispensing a fluid through a nozzle proximate to the semiconductor wafer; and

a pump is used to provide a pressurized fluid having one or more pressures measured at the pump in a range from 10,342Kpa to 20,684Kpa, i.e., 1500psi to 3000 psi.

19. The method of claim 17, wherein removing portions of the layer of material comprises:

removing a first portion of the layer of material using a first pressurized fluid while the layer of material is adhered to the first carrier tape;

attaching a second carrier tape adjacent to the first major surface of the semiconductor wafer;

removing the first carrier tape; and

removing a second portion of the layer of material using a second pressurized fluid.

20. The method of claim 17, further comprising stretching the first carrier tape during removing the portion of the layer of material.