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HK1180464B - Fast phase locked loop (pll) settling - Google Patents

Fast phase locked loop (pll) settling Download PDF

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Publication number
HK1180464B
HK1180464B HK13107447.9A HK13107447A HK1180464B HK 1180464 B HK1180464 B HK 1180464B HK 13107447 A HK13107447 A HK 13107447A HK 1180464 B HK1180464 B HK 1180464B
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HK
Hong Kong
Prior art keywords
mode
signal
communication device
calibration routine
calibration
Prior art date
Application number
HK13107447.9A
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Chinese (zh)
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HK1180464A1 (en
Inventor
尼古拉斯.哈拉拉比迪斯
Original Assignee
美国博通公司
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Priority claimed from US13/356,137 external-priority patent/US8611842B2/en
Application filed by 美国博通公司 filed Critical 美国博通公司
Publication of HK1180464A1 publication Critical patent/HK1180464A1/en
Publication of HK1180464B publication Critical patent/HK1180464B/en

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Abstract

The present invention is directed to fast phase locked loop (PLL) settling. A communications device is disclosed that adjusts a target signal to allow a reference phase locked loop (PLL) to lock onto a reference signal that is related to a desired operating frequency in a first mode of operation. The reference PLL locks onto the reference signal when the target signal is calibrated to be proportional to the reference signal. As the communications device transitions between the first mode of operation and a second mode of operation, the communications device performs a shorten calibration cycle on the reference PLL. The reference phase locked loop (PLL) locks onto the reference signal in response to the shorten calibration cycle in the second mode of operation.

Description

Fast phase locked loop setup
Reference to related applications
Priority of this application claims priority from U.S. provisional patent application No. 61/556,094 filed on day 4, 11/2011 and U.S. patent application No. 13/356,137 filed on day 23, 1/2012, the entire contents of which are incorporated herein by reference.
Technical Field
The present disclosure relates generally to Phase Locked Loops (PLLs) and, in particular, to calibration of Voltage Controlled Oscillators (VCOs) of cellular telephones.
Background
Cellular telephones have evolved from large devices capable of analog voice communication only to smaller devices capable of digital voice communication and digital data communication, such as, for example, Short Message Service (SMS) for text messages, email, packet switching to access the internet, gaming, bluetooth, and Multimedia Messaging Service (MMS). In addition to these functions, today's cellular telephones also have additional non-communication related functions such as, for example, video cameras capable of video recording, MPEG-1 Audio layer 3 (MP 3) players, and software applications such as calendars and phone books. Even with these capabilities, cellular phone manufacturers have placed more capabilities into cellular phones and have made these more powerful cellular phones smaller in size.
There is a Phase Locked Loop (PLL) in the center of each cell phone. The PLL is responsible for providing the appropriate transmit frequency for the cellular telephone before beginning the transmit mode of operation. The PLL is also responsible for providing the appropriate receive frequency for the cellular telephone before beginning the receive mode of operation. In order to properly provide the cellular telephone with the proper transmit and/or receive frequency, a Voltage Controlled Oscillator (VCO) located within the PLL is calibrated so that the cellular telephone has the proper transmit and/or receive frequency. Once the VCO is initially calibrated to be sufficiently proportional to the frequency and/or phase of the reference frequency, the PLL locks the frequency of the VCO to be proportional to the frequency and/or phase of the reference frequency to provide the appropriate transmit and/or receive frequency. Typically, an additional calibration of the VCO is required after the initial calibration is performed to ensure that the VCO is sufficiently proportional to the frequency and/or phase of the reference frequency for a suitable transmit and/or receive frequency. For example, once the cellular telephone is converted from a transmit mode of operation to a receive mode of operation and/or from a receive mode of operation to a transmit mode of operation, additional calibration may be required.
The communication standard provides a certain time window for initial calibration of the VCO. However, certain communication standards typically do not provide sufficient time for additional calibration, which is typically required when a cellular telephone is converted from a transmit mode of operation to a receive mode of operation and/or from a receive mode of operation to a transmit mode of operation. As a result, the cellular phone cannot be adjusted (align) to an appropriate reception frequency, for example, when the cellular phone is switched from the transmission operation mode to the reception operation mode.
Therefore, when switching from a transmission operation mode to a reception operation mode and/or from a reception operation mode to a transmission operation mode, after initial calibration, the VCO needs to be calibrated within an allocated (all) time of each communication standard so that the cellular phone has an appropriate transmission and/or reception frequency. Other aspects and advantages of the disclosure will be apparent from the following detailed description.
Disclosure of Invention
One aspect of the present invention relates to a communication device, comprising: a reference Phase Locked Loop (PLL) configured to provide a target signal; and a controller configured to calibrate a reference phase locked loop so that the target signal tracks a reference signal when the communication device transitions from a first mode of operation to a second mode of operation; wherein the controller is further configured to calibrate the reference phase locked loop by adjusting a target frequency by a predetermined amount, the predetermined amount representing a pre-known tuning signal offset caused by a transition between the first mode of operation and the second mode of operation.
In the above communication apparatus, it is preferable that the first operation mode is a reception operation mode, and the second operation mode is a transmission operation mode.
In the above communication apparatus, it is preferable that the first operation mode is a transmission operation mode, and the second operation mode is a reception operation mode.
In the above communication apparatus, it is preferable that the reference phase locked loop includes: a Voltage Controlled Oscillator (VCO) configured to provide the target signal in response to a tuning signal; wherein the controller module is configured to couple the predetermined amount on the tuning signal to adjust the target signal.
In the above communication device, preferably, the controller is further configured to further calibrate the reference phase locked loop by further adjusting the target frequency to compensate for operating conditions.
In the above communication apparatus, it is preferable that the reference phase locked loop includes: a Voltage Controlled Oscillator (VCO) configured to provide the target signal in response to the tuning signal and a frequency control signal, wherein a controller module is configured to couple the predetermined amount on the tuning signal and adjust the frequency control signal by an amount based on the operating condition to thereby adjust the target signal.
In the above-described communication apparatus, it is preferable that the communication apparatus is configured to operate according to a communication standard.
In the above-described communication device, it is preferable that the controller is further configured to calibrate the reference phase-locked loop for a time allocated by a communication standard for switching from the first operation mode to the second operation mode.
In the above communication device, the communication standard is preferably selected from the group consisting of: second generation wireless telephone technology (2G); third generation wireless telephone technology (3G); long Term Evolution Frequency Division Duplex (LTEFDD); long Term Evolution Time Division Duplex (LTETDD); and time division synchronous code division multiple access (TD-SCDMA).
In the above communication device, preferably the controller module is configured to calibrate the reference phase locked loop using a search algorithm when the communication device occupies the communication channel.
Another aspect of the invention relates to a method for calibrating a reference Phase Locked Loop (PLL) when a communication device transitions from a first mode of operation to a second mode of operation, comprising: (a) providing a tuning signal; and (b) adjusting the tuning signal until the target signal tracks the reference signal, the adjusting comprising: the target frequency is adjusted by a predetermined amount representing a predicted tuning signal excursion caused by a transition between the first and second modes of operation.
In the above method, preferably, the first operation mode is a reception operation mode, and the second operation mode is a transmission operation mode.
In the above method, preferably, the first operation mode is a transmission operation mode, and the second operation mode is a reception operation mode.
In the above method, preferably, the step (b) comprises: (b) (i) coupling the predetermined amount on a tuning signal of a Voltage Controlled Oscillator (VCO) to adjust the tuning signal.
In the above method, preferably, the adjusting further comprises: adjusting the target frequency to compensate for operating conditions.
In the above method, preferably, the step (b) comprises: (b) (ii) (i) coupling the predetermined amount on a tuning signal of a Voltage Controlled Oscillator (VCO) to adjust the target signal; and (b) (ii) adjusting a frequency control signal of a Voltage Controlled Oscillator (VCO) by retrieving a scaled down version of an algorithm based on the change in the operating condition, thereby adjusting the target signal.
In the above method, preferably the communication device is configured to operate according to a communication standard.
In the above method, preferably, the step (b) comprises: (b) (ii) adjusting the tuning signal until the target signal tracks the reference signal within a time allocated by the communication standard for transitioning from the first mode of operation to the second mode of operation.
In the above method, preferably the communication standard is selected from the group consisting of: second generation wireless telephone technology (2G); third generation wireless telephone technology (3G); long Term Evolution Frequency Division Duplex (LTEFDD); long Term Evolution Time Division Duplex (LTETDD); and time division synchronous code division multiple access (TD-SCDMA).
In the above method, it is preferable that the method further comprises: (c) adjusting the tuning signal using the retrieval algorithm until the target signal tracks a reference signal while the communication device occupies a communication channel.
Drawings
Embodiments of the present disclosure are described with reference to the accompanying drawings. In the drawings, like reference numbers indicate identical or functionally similar elements. Furthermore, the left-most digit(s) of a reference number identifies the drawing in which the reference number first appears.
Fig. 1 is a block diagram of a communication device according to an example embodiment of the present disclosure;
fig. 2 is a block diagram of a reference PLL that may be used within a communication device according to an example embodiment of the present disclosure;
FIG. 3 is a table representing various calibrations that may be used by the communication device in accordance with the communication standard and the operation to be performed by the communication device;
fig. 4 is a block diagram of a VCO according to an exemplary embodiment of the present disclosure;
fig. 5 is a flowchart of exemplary operational steps of a communication device according to an exemplary embodiment of the present disclosure.
The present disclosure is now described with reference to the drawings. In the drawings, like reference numbers generally indicate identical, functionally similar, and/or structurally similar elements. The drawing in which a component first appears is indicated by the leftmost digit(s) in the reference number.
Detailed Description
Embodiments of the present disclosure include three types of calibration in which a communication device may calibrate a Phase Locked Loop (PLL). These three calibration types include full calibration, fine calibration, and offset calibration. The communication device will use full calibration during the first occupancy (engagment) and/or any subsequent occupancy of the communication channel by the communication device. The communication device will use fine calibration when there is a short time, but sufficient time for the communication device to transition between operating modes. Generally, the time provided to the communication device is determined by the communication standard. The fine calibration includes a scaled down version of the full calibration (scaleddownversion) and optionally applies a predetermined bias to compensate for transitions between operating modes. The communication device will use offset calibration when the time provided to the communication device to transition between operating modes is limited. The bias calibration includes applying a predetermined bias to compensate for transitions between operating modes.
The following detailed description refers to the accompanying drawings to illustrate exemplary embodiments consistent with the present disclosure. Reference in the detailed description to "one exemplary embodiment," "an example exemplary embodiment," etc., means that the exemplary embodiment described may include a particular feature, structure, or characteristic, but not all exemplary embodiments necessarily include the particular feature, structure, or characteristic. Moreover, such phrases are not necessarily referring to the same exemplary embodiment. Further, when a particular feature, structure, or characteristic is described in connection with an exemplary embodiment, it is submitted that it is within the knowledge of one skilled in the relevant art to effect such feature, structure, or characteristic in connection with other exemplary embodiments whether or not explicitly described.
The exemplary embodiments described herein are intended to be illustrative, not limiting. Other exemplary embodiments are possible, and modifications may be made to the exemplary embodiments within the spirit and scope of the present disclosure. The detailed description is, therefore, not to be taken in a limiting sense. Rather, the scope of the disclosure is to be defined only in accordance with the claims and their equivalents.
Embodiments of the present disclosure may be implemented as hardware, firmware, software, or any combination thereof. Embodiments of the disclosure are also implemented as instructions stored on a machine-readable medium, which may be read and executed by one or more processors. A machine-readable medium may include any mechanism for storing or transmitting information in a form readable by a machine (e.g., a computing device). For example, a machine-readable medium may include read-only memory (ROM), random-access memory (RAM), magnetic disk storage media, optical storage media, flash-memory devices, electrical, optical, acoustical or other form of propagated signals (e.g., carrier waves, infrared signals, digital signals, etc.), and others. Also, firmware, software, programs, instructions may be described herein as performing certain actions. However, it should be understood that such descriptions are merely for convenience and that such actions in fact result from computing devices, processors, controllers, or other devices executing the firmware, software, programs, instructions, etc.
The following detailed description of exemplary embodiments presents the overall nature of the disclosure in a very complete manner, so that one can, by applying knowledge of one skilled in the relevant art, readily modify and/or adapt for various applications such exemplary embodiments, without undue experimentation, without departing from the spirit and scope of the present disclosure. Accordingly, such adaptations and modifications are intended to be included within the meaning of the exemplary embodiments and the numerous equivalents thereof, in accordance with the teaching and guidance presented herein. It is to be understood that the phraseology or terminology herein is for the purpose of description and not of limitation, such that the terminology or phraseology of the specification is to be interpreted by the skilled artisan in light of the teachings herein.
Exemplary communication device
Fig. 1 is a block diagram of a communication device according to an example embodiment of the present disclosure. The communication device 100 calibrates a reference Phase Locked Loop (PLL) 108 to provide a target signal 156 that is substantially proportional to the reference signal 154. In this case, the reference PLL108 appears to be in a locked state (locked condition), whereby the target signal 156 substantially tracks (track) the reference signal 154. For example, the target signal 156 substantially tracks the phase of the reference signal 154 in the locked state. However, if the target signal 156 is not sufficiently proportional to the reference signal 154, the target signal 156 does not track the reference signal 154. In this case, the reference PLL108 appears to be in an unlocked state.
The communication device 100 uses the target signal 156 as a reference signal for the receiver 118 in the receive mode of operation and the target signal as a reference signal for the transmit synthesizer 116 in the transmit mode of operation. In the receive mode of operation, the receiver 118 functions as a means for receiving communication signals from a communication channel. While in the transmit mode of operation, the transmitter 116 serves as a means for transmitting communication signals over the communication channel.
The communication device 100 calibrates the reference PLL108 in either a receive mode of operation or a transmit mode of operation. As will be discussed further below, after switching from the receive mode of operation to the transmit mode of operation and/or from the transmit mode of operation to the receive mode of operation, communication device 100 adjusts the calibration of reference PLL108 to cause reference PLL108 to enter a locked state. The communication device 100 adjusts the calibration of the target signal 156 within the time allowed by communication standards such as second generation radiotelephone technology (2G), third generation radiotelephone technology (3G), Long Term Evolution Frequency Division Duplex (LTEFDD), Long Term Evolution Time Division Duplex (LTETDD), and time division synchronous code division multiple access (TD-SCDMA) and/or any other suitable communication standard that will be apparent to those skilled in the relevant art without departing from the spirit and scope of the present disclosure.
As shown in fig. 1, the communication device 100 includes a reference oscillator 102, a reference PLL108, a switching module 110, a transmitter 116, a receiver 118, and a controller module 120. The reference oscillator 102 provides a reference signal 154 to the reference PLL 108. The reference signal 154 is related to a desired operating frequency of the communication device 100. For example, the frequency of the reference signal 154 may be approximately equal to the desired operating frequency of the communication device 100 or an integer or fractional multiple of the frequency. The reference oscillator 102 includes an oscillator 104 and an optional scaling module 106. The oscillator 104 provides a reference signal 150. Optional scaling module 106 multiplies and/or divides by reference signal 150 to generate reference signal 154.
As described above, the reference PLL108 provides the target signal 156 that substantially tracks the reference signal 154 in the locked state. For example, the reference PLL108 may cause the frequency and/or phase of the target signal 156 to be approximately equal to the frequency and/or phase of the target signal 156. As another example, the reference PLL108 makes the phase of the target signal 156 approximately equal to the phase of the target signal 156 and makes the frequency of the target signal 156 proportional to, i.e., an integer or fractional multiple of, the frequency of the target signal 156.
The switching module 110 may provide the target signal 156 as a transmit reference signal 162 to the transmitter 116 in a transmit mode of operation and may provide the target signal 156 as a receive reference signal 164 to the receiver 118 in a receive mode of operation. The reference PLL108 provides a synthesized transmit signal 162 to the transmitter 116, which transmitter 116 may use to up-convert, modulate, and/or encode signals transmitted over the communication channel. Similarly, the reference PLL108 provides a synthesized received signal 164 to the receiver 118, and the receiver 118 may be used to down-convert, demodulate, and/or decode signals received from the communication channel.
In a first mode of operation (e.g., taking a receive mode of operation as an example), the controller module 120 calibrates the reference PLL108 when the communication device 100 occupies a communication channel, and calibrates the reference PLL108 when the communication device 100 switches from the first mode of operation to a second mode of operation (e.g., a transmit mode of operation). The controller module 120 monitors the reference PLL108 for an appropriate tuning signal 168 that is indicative of the difference between the reference signal 154 and the target signal 156. The controller module 120 adjusts the control signal 166 during the various calibrations discussed below.
When the communication device 100 occupies a communication channel, the controller module 120 initially calibrates the reference PLL108 to provide a target signal 156 that is proportional to the frequency and/or phase of the reference signal 154. During this initial calibration or full calibration (fullcalibration), controller module 120 performs an extensive calibration cycle to calibrate reference PLL108 so that reference PLL108 locks onto reference signal 154. Generally, this full calibration involves adjusting (align) the frequency and/or phase of the target signal 156 to be sufficiently proportional to the frequency and/or phase of the reference signal 154 so that the reference PLL108 can lock onto the reference signal 154. In order to properly calibrate the target signal 156, a full calibration of the reference PLL108 may take a significant amount of time. For example, TD-SCDMA communication standards allow for full calibration of up to 120 microseconds when the communication device 100 is engaged in a communication channel.
Typically, the controller module 120 performs full calibration when the communication device 100 is operating in a first mode of operation (e.g., a receive mode of operation as an example). However, one skilled in the relevant art will recognize that the controller module 120 may also be fully calibrated while the communication device 100 is operating in the transmit mode of operation without departing from the spirit and scope of the present disclosure. In the first mode of operation, after the communication device 100 initially occupies the communication channel, the communication device 100 may transition from the first mode of operation to a second mode of operation, such as, for example, a transmit mode of operation. Ideally, the loading of reference PLL108 in the receive mode of operation by receiver 118 is substantially similar to the loading of reference PLL108 in the transmit receive mode of operation by transmitter 116. In practice, however, the input impedance of the transmitter 116 is different from the input impedance of the receiver 118. When the communication device 100 transitions from the first mode of operation to the second mode of operation, the difference between the input impedances of the transmitter 116 and the receiver 118 may cause the reference PLL108 to enter an unlocked state. In the unlocked state, the target signal 156 does not track the reference signal 154 unless the controller module 120 performs another calibration of the reference PLL108, causing the reference PLL108 to lock onto the reference signal 154 again.
However, upon transitioning from the first mode of operation to the second mode of operation, the controller module 120 may no longer have sufficient time to perform another full calibration of the reference PLL 108. The amount of time that the communication device 100 can make such a transition is typically dictated by various communication standards. During these prescribed times, the controller module 120 must perform such additional calibration of the reference PLL108, which is typically significantly less than the time required to perform a full calibration. For example, the TD-SCDMA communication standard requires that communication device 100 transition from a transmit mode of operation to a receive mode of operation within approximately 12.5 microseconds; therefore, after transitioning from the transmit mode of operation to the receive mode of operation, any calibration of the reference PLL108 must be completed in 12.5 microseconds, while the time allowed for full calibration is 120 microseconds. Therefore, the reference PLL108 needs to be calibrated in a reduced time when switching from the first operation mode to the second operation mode.
Upon switching from the first mode of operation to the second mode of operation, the controller module 120 performs a calibration that is reduced in time. The reduced time calibration allows for rapid adjustment of the target signal 156 while leaving sufficient time for the reference PLL108 to enter a locked state. Certain communication standards provide for a longer duration to transition from a first mode of operation to a second mode of operation than other communication devices. For example, the TD-SCDMA communication standard allows calibration for 12.5 microseconds when transitioning from a transmit mode of operation to a receive mode of operation, and the lte tdd communication standard allows calibration for 47 microseconds when transitioning between these modes of operation.
The controller module 120 may perform fine calibration (calibration) for those communication standards that specify a longer duration of time to transition from the first mode of operation to the second mode of operation, and offset calibration (offset calibration) for those communication standards that specify a shorter duration of time to transition from the first mode of operation to the second mode of operation. The controller module 120 performs offset calibration by adjusting the control signal 166 by a predetermined amount. In an exemplary embodiment, the predetermined amount represents a predicted offset of the control signal 166, the offset of the control signal 166 being caused by a transition between the first mode of operation and the second mode of operation. The shift of the predicted control signal 166 may be determined by initial product evaluation of the communication device 100, thereby determining the shift of the control signal 166 upon communication device changeover.
For example, when fully calibrated, the controller module 120 calibrates the reference PLL108 to provide the target frequency 156 at the first frequency in the receive mode of operation. In this example, the target frequency 156 is shifted to the second frequency when the communication device 100 transitions from the first mode of operation to the second mode of operation. In this example, the controller module 120 performs an offset calibration to adjust the target frequency 156 from the second frequency to the first frequency. After the target signal 156 is adjusted by a predetermined amount, the reference PLL108 enters a locked state for a duration specified by the communication standard.
The fine calibration includes offset calibration as described above, and another adjustment of the target frequency 156 to compensate for operating conditions of the communication device 100 (e.g., temperature, for example). In general, this different adjustment obviously requires less time than performing a full calibration. After the fine calibration adjustment target signal 156 is used, the reference PLL108 enters (step) a locked state for a duration specified by the communication standard.
In general, offset calibration is less accurate than full calibration and fine calibration, but requires less time than full calibration and fine calibration. For example, the TD-SCDMA communication standard allows calibration for 75 microseconds when transitioning from a receive mode of operation to a transmit mode of operation. The fine calibration can be completed within the allowed 75 microseconds. As a result, the controller module 120 may select the fine calibration instead of the bias calibration, since 75 microseconds is sufficient to complete the fine calibration, while the fine calibration provides a more accurate calibration than the bias calibration. As another example. The TD-SCDMA communication standard limits the calibration time to 12.5 microseconds when transitioning from the transmit mode of operation to the receive mode of operation. Fine calibration cannot be done within the allowed 12.5 microseconds, but bias calibration can be done within 12.5 microseconds. As a result, the controller module 120 may select the offset calibration instead of the fine calibration.
Exemplary reference PLL
Fig. 2 is a block diagram of a reference PLL that may be used within a communication device according to an example embodiment of the present disclosure. The reference PLL200 represents a closed loop feedback control system that generates the target signal 156 relative to the frequency and phase of the reference signal 154. In other words, the reference PLL200 performs frequency multiplication and/or division through a negative feedback mechanism to generate the target signal 156 relative to the reference signal 154. The reference PLL200 may be implemented using a phase/frequency detector (PFD) 202, a charge pump 204, a loop filter 206, a Voltage Controlled Oscillator (VCO) 208, an optional integer divider 210, an optional dithering module 212, and a controller 214. The reference PLL200 may represent an exemplary implementation of the reference PLL 108.
PFD202 converts the difference between the frequency and/or phase of reference signal 154 and the frequency and/or phase of divided feedback signal 258 into error signal 250. Specifically, PFD202 generates error signal 250 by comparing the frequency and/or phase of divided feedback signal 258 with the frequency and/or phase of reference signal 154 to detect a deviation between reference signal 154 and divided feedback signal 258. When the frequency and phase of the error signal 250 is substantially equal to the frequency and phase of the divided feedback signal 258, the reference PLL200 is in a locked state. In the locked state, the error signal 250 is proportional to the phase difference between the reference signal 154 and the divided feedback signal 258.
The charge pump 204 converts the error signal 250 into a voltage/current domain representation (represented as a charge pump output 252) to control the frequency of the VCO 208. When the reference PLL200 is in the unlocked state, the charge pump 204 increases or decreases the charge pump output 252 based on the error signal 250. When the reference PLL200 is in a locked state, the error signal 250 is minimized and the charge pump 204 maintains the charge pump output 252 at a substantially fixed value.
The loop filter 206 may be used to remove unwanted noise from the charge pump output 252 to produce the tuning signal 254. The loop filter 206 may be implemented as a low pass filter to suppress high frequency components in the charge pump output 252, allowing the Direct Current (DC) component or near DC component of the charge pump output 252 to control the VCO 208. The loop filter 206 also maintains stability of the reference PLL 200.
VCO208 is a voltage to frequency converter. Specifically, the VCO208 generates the target signal 156 based on the tuning signal 254 and the frequency control signal 268. Generally, during a full calibration process, the controller 214 adjusts the frequency control signal 268 until the target signal 156 is sufficiently correlated with the reference signal 154. For example, using a search algorithm (e.g., a binary search tree algorithm, a recursive algorithm, a Stern-Brocot algorithm, and/or any other suitable search as would be apparent to one of ordinary skill in the relevant art without departing from the spirit and scope of the present disclosure), the controller 214 may cycle through different combinations of the frequency control signal 268 until the target signal 156 is sufficiently correlated with the reference signal 154. The tuning signal 254 is used to further adjust the target signal 156 until it is approximately equal to the reference signal 154 or an integer or fractional multiple of the reference signal. In an exemplary embodiment, the frequency control signal 268 is used to coarsely manipulate the target signal 156 by precisely manipulating (steer) the target signal 156 using the tuning signal 254 such that the control target signal is sufficiently related to the reference signal 154 to allow the VCO208 to be locked on the reference signal 154.
An optional integer divider 210 is located in the feedback path of the reference PLL 200. An optional integer divider 210 divides the target signal 156 by an integer N to provide a divided feedback signal 258. The optional integer divider 210 may adjust the integer N in response to the channel transmission signal 262.
The optional dither module 212 allows the reference PLL200 to dither (dither) the values by the time between two or more integer values to obtain an effective time-averaged fractional division factor. More specifically, the optional dither module 212 selects between more than two integer values for each iteration of the reference PLL200 in response to a division code 260 so that fractional division factors (fractional division factors) may be represented on average. The optional dither module 212 generates a division code 260 in response to a division ratio control signal (dividectontrolsignal) 262.
The controller module 214 calibrates the reference PLL200 when performing one of a full calibration, a fine calibration, and/or an offset calibration. The controller module 214 illustrates exemplary implementations of the full calibration, the fine calibration, and/or the offset calibration described above. When a communication device (such as, for example, communication device 100) occupies a communication channel, the controller module 214 initially calibrates the reference PLL200 to provide a target signal 156 that is proportional to the frequency and/or phase of the reference signal 154.
The controller module 214 may provide a channel transmission signal 262 that causes the optional dither module 212 to provide a division ratio control signal 262 corresponding to the communication channel. The controller module 214 provides a first value of the frequency control signal 268 causing the VCO208 to provide the target signal 156 at the first frequency. Once the target signal 156 has reached the first frequency, the controller module 214 monitors the tuning signal 254. The controller module 214 compares the tuning signal 254 to a predetermined tuning signal to determine whether the reference PLL200 is in a locked state. The predetermined tuning signal represents a predicted tuning signal located within the reference PLL200 when the reference PLL200 is in a locked state. For example, the predicted tuning signal may represent a dc voltage when the reference PLL200 is in a locked state. The controller module 214 compares the magnitude of the difference between the tuning signal 254 and the predicted tuning signal to a lock threshold. The target signal 156 is substantially correlated with the reference signal 154 when the magnitude of the difference is less than or equal to the lock threshold. In this case, the reference PLL200 enters a locked state to track the reference signal 154.
However, when the magnitude of the difference is greater than the lock threshold, the target signal 156 is not sufficiently correlated with the reference signal 154. In this case, the reference PLL200 is in an unlocked state. The controller module 214 then provides a second value to the frequency control signal 268 causing the VCO208 to provide the target signal 156 at the second frequency. The controller module 214 determines whether the second frequency causes the reference PLL200 to enter a locked state. If the locked state is not entered, the controller module 214 continues to adjust the frequency control signal 268 until the VCO208 enters the locked state. However, this example is not limiting, and one skilled in the relevant art will appreciate that other methods may be used to tune the reference PLL200 to bring the reference PLL200 into a locked state.
In the receive mode of operation, the communication device may transition from the receive mode of operation to the transmit mode of operation after receiving a communication signal from the communication channel. After transmitting a communication signal on the communication channel, the communication device may switch from the transmit mode of operation back to the receive mode of operation or occupy another communication channel. As described above, the controller module 214 may calibrate the reference PLL200 using fine calibration and/or offset calibration in the event the communication device transitions between these operating modes. Typically, the fine calibration and/or the offset calibration are selected in accordance with a communication standard under which the communication device operates.
For example, as shown in fig. 3, the communication device may operate in the lte tdd standard. The LTETDD standard allows the controller module 214 to calibrate the VCO208 with 71.3 microseconds so that the reference PLL200 is locked on the reference signal 154 when the communication device is switched from a receive mode of operation to a transmit mode of operation. In this case, the controller module 214 selects the fine calibration when the communication device transitions from the receive mode of operation to the transmit mode of operation.
As another example, as also shown in fig. 3, the communication device may operate under TD-SCDMA standards. The TD-SCDMA standard allows the controller module 214 to calibrate the VCO208 with 12.5 microseconds when the communication device transitions from a transmit mode of operation to a receive mode of operation, such that the reference PLL200 is locked on the reference signal 154. In this case, the controller module 214 selects the offset calibration when the communication device transitions from the transmit mode of operation to the receive mode of operation because the LTETDD standard provides sufficient time to complete the offset calibration, but does not provide sufficient time to complete the fine calibration.
The controller module 214 may perform offset calibration by adjusting the target signal 156 by a predetermined amount that is related to the offset of the target signal 156 caused by transitioning between operating modes. Generally, the predetermined amount represents a predetermined voltage and/or current coupled to the tuning signal 254 and/or an offset of the VCO tuning element. This predetermined voltage current and/or VCO tuning element offsets the target signal 156 in order to accommodate differences that occur when switching between operating modes. After the target signal 156 is adjusted by a predetermined amount, the reference PLL200 enters a locked state for a duration specified by the communication standard.
The fine calibration includes bias calibration as described above, as well as another adjustment of the target frequency 156 to compensate for operating conditions of the communication device, such as, for example, temperature and/or power supply. The controller module 214 adjusts the target signal 156 by a predetermined amount in a manner substantially similar to the offset calibration. The controller module 214 additionally adjusts the target signal 156 to compensate for operating conditions. Typically, this operational adjustment appears similar to a full calibration, but scaled down. The controller module 214 provides a predetermined number of different values to the frequency control signal 268 to cause the VCO208 to provide the target signal 156 at different frequencies. In an exemplary embodiment, the predetermined number of different values represents two different combinations of the retrieval algorithm. However, this example is not limiting, and one skilled in the relevant art will recognize that the predetermined number of different values may represent any suitable number of different combinations of the retrieval algorithm, as long as the fine calibration is completed within the time allotted by the communication standard, without departing from the spirit and scope of the present disclosure.
Exemplary calibration requirements for different communication standards
Fig. 3 is a table representing various types of calibrations that may be used by a communication device for different communication standards in accordance with an exemplary embodiment of the present disclosure. Fig. 3 includes an exemplary communication standard in which a communication device (such as, for example, communication device 100) may operate; however, one skilled in the relevant art will recognize that the communication device may operate in accordance with other communication standards without departing from the spirit and scope of the present disclosure.
For each communication standard, fig. 3 depicts the time allowed for each respective communication standard to calibrate a reference PLL (such as, for example, reference PLL108 or reference PLL 200) by a controller module (such as, for example, controller module 120 or controller module 214). For example, fig. 3 illustrates that the TD-SCDMA communication standard allows the controller module to properly calibrate the reference PLL with 200 microseconds when the communication device is occupying the communication channel. The 200 microseconds provided by the TD-SCDMA communication standard is sufficiently fully calibrated. However, TD-SCDMA provides a calibration time (calibration period) of 75 microseconds to transition from a receive mode of operation to a transmit mode of operation. 75 microseconds is sufficient for fine calibration, but not for full calibration. Furthermore, TD-SCDMA provides a calibration time for transitioning from a transmit mode of operation to a receive mode of operation of 12.5 microseconds. 12.5 microseconds is sufficient for bias calibration, but insufficient for full calibration and/or fine calibration.
Exemplary Voltage Controlled Oscillator (VCO)
Fig. 4 is a block diagram of an exemplary Voltage Controlled Oscillator (VCO) usable within a communication device according to an exemplary embodiment of the present disclosure. In performing one of full calibration, fine calibration, and/or bias calibration, a controller module (such as, for example, controller module 120 or controller module 214) calibrates VCO400 to provide target outputs 452.1 and 452.2. Target outputs 452.1 and 452.2 represent exemplary implementations of target output 156. VCO400 includes a fine frequency element 402 and a coarse frequency element (coarse frequency component) 404 that operate in conjunction with one another to provide target signal 156.
The fine frequency element 402 includes a first fine capacitor 406.1, a second fine capacitor 406.2, and a varactor 408. As shown in fig. 4, the tuning signal 254 is applied to a varactor diode 408. Varactor 408 represents a variable capacitance whose capacitance is a function of tuning signal 254. First and second fine capacitors 406.1 and 406.2 are coupled to varactor 408 to separate tuning signal 254 from coarse frequency element 404. Typically, the first fine capacitor 406.1 and the second fine capacitor 406.2 represent large capacitors when compared to the varactor 408, such that the capacitance of the fine frequency element 402 is controlled by the varactor 408.
Coarse frequency element 404 includes transistor switches 410.1 through 410.n, first capacitors 412.1 through 412.n, second capacitors 414.1 through 414.n, first inductor 416.1, and second inductor 416.2. When activated by the respective frequency control signal 450.1 to 450.n, the switches 410.1 to 410.n cause their respective first capacitor 412.1 to 412.n and second capacitor 414.1 to 414.n to contribute to the capacitance of the coarse frequency element 404. Frequency control signals 450.1 through 450.n represent exemplary embodiments of frequency control signal 268. In other words, the first capacitors 412.1 through 412.n and the second capacitors 414.1 through 414.n are switched on and off in the coarse frequency element 404 by their respective switches 410.1 through 410. n. In an exemplary embodiment, the coarse frequency element 404 may include first capacitors 412.1 through 412.8 and second capacitors 414.1 through 414.8. Those capacitors that are turned on in coarse frequency element 404 constitute the capacitance of coarse frequency element 404, while those capacitors that are turned off in coarse frequency element 404 do not constitute the capacitance. The first inductor 416.1, the second inductor 416.2, and the first capacitors 412.1 through 412.n and the second capacitors 414.1 through 414.n that are switched in the coarse frequency element 404 are configured and arranged to form a resonant circuit.
VCO400 may include an oscillator core comprised of transistor 418.1 and transistor 418.2 and a bias current source 420.
The controller module provides various frequency control signals 450.1 through 450.n to turn on and off various first capacitors 412.1 through 412.n and various second capacitors 414.1 through 414.n in the coarse frequency element 404 during full calibration. The various frequency control signals 450.1 to 450.n are determined according to a search algorithm. The first capacitors 412.1 to 412.n and the second capacitors 414.1 to 414.n are thus switched on and off, thereby adjusting the frequency of the target outputs 452.1 and 452.2. In general, the frequencies of target outputs 452.1 and 452.2 are inversely related to the capacitance of coarse frequency element 404. The controller module successively switches the first capacitors 412.1 through 412.n and the second capacitors 414.1 through 414.n according to the retrieval algorithm until the target outputs 452.1 and 452.2 are sufficiently related to the reference signal 154 to allow the VCO400 to be locked onto the reference signal 154 by precisely adjusting the capacitance of the fine frequency element 402 using the tuning signal 254.
In performing bias calibration, the controller module adjusts the capacitance of the fine frequency element 402 and/or the frequency control signals 450.1 through 450.n by a predetermined amount.
In performing the fine calibration, the controller module adjusts the capacitance of the fine frequency element 402 by a predetermined amount and adjusts the capacitance of the coarse frequency element 404 by allowing a scaled down version of the full calibration period to adjust the frequency control signals 450.1 through 450. n.
Exemplary operational control flow for a communication device
Fig. 5 is a flowchart of exemplary operational steps of a communication device according to an exemplary embodiment of the present disclosure. The present disclosure is not limited to this operational description. Rather, other operational control flows will be apparent to those skilled in the relevant art from the teachings herein within the scope and spirit of the present disclosure. The following discussion describes the steps in fig. 5.
In step 510, the operational control flow determines a communication channel from a plurality of communication channels that the communication device will use to transmit and/or receive communication signals.
In step 520, the operational control flow performs a full calibration to calibrate the communication device for the communication channel. In particular, the operational control flow adjusts a reference PLL (e.g., reference PLL108 or reference PLL200 as some examples) within the communication device to lock onto a reference signal (e.g., reference signal 154 as an example).
In step 530, the operational control flow receives the communication signal of step 510 from the communication channel of step 510 and/or transmits the communication signal of step 510 over the communication channel of step 510.
In step 540, the operational control flow determines whether the communication device is to select another communication channel from the plurality of communication channels or to transition from a receive mode of operation to a transmit mode of operation or from a transmit mode of operation to a receive mode of operation. For example, after receiving the communication signal of step 510 from the communication channel of step 510, the operational control flow determines whether the communication device subsequently transmits another communication over the communication channel of step 510. As another example, after the communication signal of step 510 is transmitted over the communication channel of step 510, the operational control flow determines whether the communication device subsequently receives another communication from the communication channel of step 510.
The operational control flow continues to step 550 to switch between these operational modes or returns to step 510 to select another communication channel.
In step 540, the operational control flow determines whether the communication device is transitioning between the operational modes of step 530. If a transition is made, the operational control flow continues to step 550, otherwise, the operational control flow returns to step 510 to determine another communication signal.
In step 550, the operation control flow determines the operation transition time allowed by the communication standard. For example, in the case of operation under the TD-SCDMA communication standard, the operation control flow is switched from the transmission operation mode to the reception operation mode. In this example, the operation control flow determines a transition time allowed by the TD-SCDMA communication standard to transition from the transmitting mode of operation to the receiving mode of operation, which is approximately 12.5 microseconds.
In step 560, the operational control flow determines whether the communication standard provides sufficient time to calibrate the communication device using the fine calibration. The operational control flow continues to step 570, if any. Otherwise, the operational control flow continues to step 580.
In step 570, the operational control flow performs fine calibration and then returns to step 540.
In step 580, the operational control flow performs offset calibration and then returns to step 540.
Conclusion
It is to be understood that the detailed description section, and not the abstract section, is intended to be used to interpret the claims. The abstract section may set forth one or more, but not all exemplary embodiments of the disclosure, and thus, do not limit the disclosure and the appended claims in any way.
The present disclosure has been described above with the aid of functional building blocks illustrating the implementation of specific functions and relationships thereof. The boundaries of these functional building blocks have been arbitrarily defined herein for the convenience of the description. Other boundaries may be defined so long as the specified functions and relationships thereof are appropriately performed.
It will be apparent to persons skilled in the relevant art that various changes in form and detail can be made therein without departing from the spirit and scope of the disclosure. Thus, the present disclosure should not be limited by any of the above-described exemplary embodiments, but should be defined only in accordance with the following claims and their equivalents.

Claims (8)

1. A communication device, comprising:
a reference Phase Locked Loop (PLL) configured to provide a target signal; and
a controller configured to calibrate a reference phase locked loop to perform a first calibration routine on the reference phase locked loop to adjust a target signal when the communication apparatus enters a first mode of operation and to perform a second calibration routine on the reference phase locked loop to adjust the target signal to track a reference signal when the communication apparatus transitions from the first mode of operation to a second mode of operation,
wherein the first calibration routine is a full calibration routine and the second calibration routine is a fine calibration routine or a bias calibration routine, wherein the communications device is further configured to allocate more time for the controller to execute the first calibration routine relative to the second calibration routine.
2. The communication device of claim 1, wherein the first mode of operation is a receive mode of operation and the second mode of operation is a transmit mode of operation.
3. The communication device of claim 1, wherein the first mode of operation is a transmit mode of operation and the second mode of operation is a receive mode of operation.
4. The communication apparatus of claim 1, wherein the reference phase locked loop comprises:
a Voltage Controlled Oscillator (VCO) configured to provide the target signal in response to a tuning signal,
wherein the controller is configured to couple a predetermined amount on the tuning signal to adjust the target signal.
5. The communication device of claim 1, wherein the communication device is configured to operate in accordance with a communication standard.
6. The communication device of claim 5, wherein the controller is further configured to calibrate the reference phase locked loop for a time allocated by a communication standard for transitioning from the first mode of operation to the second mode of operation.
7. The communication device of claim 5, wherein the communication standard is selected from the group consisting of:
second generation wireless telephone technology (2G);
third generation wireless telephone technology (3G);
long Term Evolution Frequency Division Duplex (LTEFDD);
long Term Evolution Time Division Duplex (LTETDD); and
time division synchronous code division multiple access (TD-SCDMA).
8. A method for calibrating a reference phase-locked loop (PLL) when a communication device transitions from a first mode of operation to a second mode of operation, comprising:
(a) allocating more time to execute the first calibration routine relative to executing the second calibration routine; and
(b) when the communication device enters the first mode of operation, performing the first calibration routine to adjust a tuning signal until a target signal tracks a reference signal,
when the communication device transitions from the first mode of operation to the second mode of operation, executing the second calibration routine on the reference phase locked loop to adjust the tuning signal until the target signal tracks the reference signal, and wherein,
the first calibration routine is a full calibration routine and the second calibration routine is a fine calibration routine or a bias calibration routine.
HK13107447.9A 2011-11-04 2013-06-25 Fast phase locked loop (pll) settling HK1180464B (en)

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US61/556,094 2011-11-04
US13/356,137 US8611842B2 (en) 2011-11-04 2012-01-23 Apparatus and method for fast phase locked loop (PLL) settling for cellular time-division duplex (TDD) communications systems
US13/356,137 2012-01-23

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