HK1166131A - Method and circuit for measuring high voltage ac signal - Google Patents

Description

Method and circuit for measuring high voltage AC signal

Technical Field

The present invention relates to a method of measuring a high voltage AC signal and a voltage measurement circuit for measuring a high voltage AC signal.

Background

Capacitive voltage divider circuits are commonly used in the prior art to measure AC voltages. In such a known circuit, first, second and third capacitors connected in series form a capacitor chain, the capacitance values of the capacitors being selected to reduce the level of the AC voltage applied across the capacitor chain to the voltage level across the center-most capacitor(s) consistent with the low voltage electronic circuit. For example, the low voltage electronic circuitry may include an analog to digital converter followed by digital processing circuitry. Thus, the values of the first to third capacitors are selected, for example, to reduce the 230Vrm voltage swing on the capacitor chain to a voltage swing of about 3V on the center-most capacitor.

The present inventors have recognized a drawback present in capacitive voltage divider circuits for measuring AC voltages (when the capacitors in the capacitive voltage divider circuit form part of a printed circuit board). More specifically, the inventors have recognized the defects that arise when the plates of a capacitor are defined by the conductive layers of a printed circuit board and the dielectric of the capacitor is defined by the non-conductive portions of the printed circuit board.

It is therefore an object of the present invention to provide an improved method of measuring a high voltage AC signal using a voltage measurement circuit comprising a capacitive voltage divider circuit in which the capacitors of the capacitive voltage divider circuit form part of a printed circuit board.

It is another object of the present invention to provide an improved voltage measurement circuit for measuring high voltage AC signals, the voltage measurement circuit including a capacitive voltage divider circuit, wherein the capacitors in the capacitive voltage divider circuit form part of the printed circuit board.

Disclosure of Invention

The present invention provides an improved method of measuring high voltage AC signals using a voltage measurement circuit comprising a capacitive voltage divider circuit and a compensation circuit;

the capacitive voltage divider circuit includes: first and second input terminals, and first, second and third capacitors; a first plate of the first capacitor is electrically connected to the first input, an opposing second plate of the first capacitor is electrically connected to a first plate of the third capacitor, a first plate of the second capacitor is electrically connected to the second input, and an opposing second plate of the second capacitor is electrically connected to a second plate of the third capacitor; a plate of each of the first, second and third capacitors is defined by a conductive layer of a printed circuit board, and a dielectric of each of the first, second and third capacitors is defined by a non-conductive portion of the printed circuit board;

the compensation circuit has a configurable transfer function (transfer function) and includes an input electrically connected between the first and second plates of the third capacitor and an output;

the method comprises the following steps:

applying a known voltage signal between first and second inputs of the capacitive voltage divider circuit;

measuring a voltage between the first and second plates of the third capacitor;

determining a transfer function for changing the measured voltage to correspond to a desired voltage between the first and second plates of the third capacitor based on the relative ideal impedances of the first, second and third capacitors;

configuring the compensation circuit using the determined transfer function; and

measuring a high voltage AC signal using the voltage measurement circuit such that the compensation circuit varies the voltage received at its input in accordance with the determined transfer function and provides the varied voltage at its output.

In use, a known voltage signal is applied to the first and second inputs of the capacitive voltage divider circuit and the voltage between the first and second plates of the third capacitor is measured. The measured voltage is compared with an expected voltage based on the relative ideal impedances of the first to third capacitors, and a transfer function is determined from the comparison. For example, when a 230Vrm signal is applied to the first and second inputs, it may be desirable to obtain a 4V signal on the third capacitor. When a 230Vrm signal is applied to the first and second inputs, a 3.2V signal may be measured on the third capacitor. Thus, the transfer function may be determined such that the compensation circuit applies a gain of 1.25 to the voltage received at its input to provide a modified 4V voltage at its output. As mentioned above, the impedance values of the first to third capacitors may be selected to achieve a desired voltage distribution. However, one or more of many variations in the printed circuit board manufacturing process will cause the actual impedance values of the first through third capacitors to deviate from the ideal values to achieve the desired voltage distribution. These changes are related to: a metal area for defining a capacitor plate; a dielectric constant of a non-conductive portion of the printed circuit board defining a dielectric of the capacitor; the thickness of the non-conductive portion of the printed circuit board that defines the dielectric of the capacitor. The present inventors have realized that these variations are readily apparent, for example, because the manufacture of printed circuit boards involves forming the capacitor dielectric and plate pairs at different stages, it is a challenge to precisely match the capacitor dielectric and plate pairs. In addition, the present inventors have recognized that it is difficult to control the dielectric constant of the non-conductive portion of the printed circuit board to provide an accurate match between the capacitor and the capacitor.

More specifically, the method comprises determining the transfer function in accordance with a single applied known voltage, and measuring the voltage between the first and second plates of the third capacitor accordingly. In this way, the transfer function may be used to apply the gain to the measured high voltage AC signal alone. The single applied known voltage may be at or near a maximum voltage, such as 230 Vrm.

Alternatively or additionally, the method comprises determining the transfer function in accordance with two applied known voltages of different levels and measuring the voltage between the first and second plates of the third capacitor correspondingly. The transfer function may thus apply an offset and a gain to the measured high voltage AC signal. The first of the two known voltages may be at or near a maximum voltage. The second of the two known voltages may be a minimum voltage or near a minimum voltage, such as 0V.

Alternatively or in addition, the method comprises determining the transfer function in accordance with a plurality (e.g. more than two) of applied known voltages of different levels and measuring the voltage between the first and second plates of the third capacitor correspondingly. Thus, for example, the transfer function may provide offset, gain, non-linearity, and perhaps noise. The transfer function may be determined based on a plurality of measurements such that it has the form of a second or higher order polynomial.

Alternatively or additionally, the capacitive divider circuit may be configured as a DC isolator. Thus, an isolation barrier (isolation barrier) is formed by the first and second capacitors, and a capacitive voltage divider circuit may be used to provide DC isolation between the high voltage input stage and the low voltage output stage.

Alternatively or additionally, the voltage measurement circuit may include a differential active circuit (differential active circuit) having first and second differential inputs and an output, wherein the first differential input is electrically connected to the first plate of the third capacitor and the second differential input is electrically connected to the second plate of the third capacitor. Thus, the method may include applying a known voltage between the first and second inputs of the capacitive divider and measuring the voltage between the first and second differential outputs of the active circuit accordingly. In this way, the voltage between the first and second plates of the third capacitor may be measured between the differential output terminals of the active circuit instead of being measured directly between the first and second plates of the third capacitor.

More specifically, the differential active circuit includes at least one of a buffer and an amplifier. In use, the step of determining the transfer function may take into account errors in the active circuit, and/or errors in the alternative capacitive divider. For example, it is difficult to define and control the input impedance of an active circuit; deviations from the ideal input impedance tend to adversely affect the voltage division ratio of the capacitive voltage divider. Also, for example, the gain of a differential active circuit tends to adversely affect the measured voltage differently than the desired gain.

Alternatively or additionally, the compensation circuit may comprise an analog-to-digital converter for converting the measured voltage between the first and second plates of the third capacitor into a digital signal. The digital signal may, for example, be processed to determine a transfer function. Thus, the compensation circuit may comprise a digital processing circuit for determining the transfer function from at least one applied known voltage and a corresponding at least one measured voltage between the first and second plates of the third capacitor. For example, the processing circuitry may be configured to determine a first order polynomial (i.e., with respect to offset and gain) based on two different known voltages applied and corresponding measured voltages, or a second or higher order polynomial based on multiple different known voltages applied and corresponding measured voltages.

Alternatively or additionally, the method comprises storing the value of at least one transfer function in a storage device. The storage device may be included in the compensation circuit. The storage device may be an electronic memory, such as an EFUSE device or an EPROM device. Thus, when the transfer function is a first order polynomial, the storage device may, for example, store gain values and offset values.

Alternatively or additionally, the compensation circuit comprises at least one of a digital adder and a digital multiplier. A digital adder may be used to receive the digital form of the measured voltage and add an offset value to the digital measured voltage for effective correction. The digital multiplier is used for receiving the digital form of the measuring voltage and multiplying the digital measuring voltage and the gain value to effectively correct. When the transfer function is a second or higher order polynomial, the digital multiplier may multiply the digital form of the measured voltage itself as many times as necessary to determine the particular term in the polynomial. For example, in a second order polynomial, the digital form of the measured voltage is multiplied by itself once to determine the quadratic term in the polynomial. The application of the transfer function requires that the terms in the polynomial be temporarily stored before they are added to each other. Thus, the compensation circuit may comprise a temporary data store, such as a RAM (which may form part of the microprocessor). Each of the digital adder and the digital multiplier may receive a digital version of the measurement voltage from an analog-to-digital converter, which may be the same circuit used to convert the measurement voltage between the first and second plates of the third capacitor prior to the step of determining the transfer function.

Alternatively or additionally, the capacitive voltage divider may be configured to receive high voltage AC signals at a frequency of less than 500Hz, for example, 60Hz or 50Hz for domestic use and 400Hz for shipping purposes.

Alternatively or additionally, the high voltage AC signal described in the present invention may be an AC voltage of 50Vrm or higher, such as 110Vrm or 230VrmAC voltage, following the standards specified by the international electrotechnical commission. Thus, the high voltage AC signal may be a home mains voltage signal or a main voltage signal in shipping.

Alternatively, the third capacitor may be operated at a low voltage. Alternatively, the low voltage signal described in the present invention may be an AC voltage of less than 50Vrm or a DC voltage of less than 120V, which complies with the standards specified by the international electrotechnical commission. More specifically, the low voltage signal may be a DC voltage of less than 15V, for example a 12V voltage. More specifically, the low voltage signal may be a DC voltage of less than 5V, for example a 3V voltage.

Alternatively, each of the first and second capacitors may have a capacitance value of less than 100 pF. More specifically, each of the first and second capacitors may have a capacitance value of less than 50 pF. More specifically, each of the first and second capacitors may have a capacitance value of less than 10pF, for example 5 pF.

Alternatively, the third capacitor may have a capacitance value of less than 500pF, for example 200 pF. More specifically, the third capacitor may have a capacitance value of less than 200pF, for example 15 to 20 pF. Where such a third capacitor is sufficient to obtain the desired voltage distribution, the DC isolator may further comprise at least one of a parasitic impedance (e.g., resistance and/or capacitance) and a discrete impedance (e.g., provided by a discrete capacitance).

Alternatively, the plates of at least one of the first, second and third capacitors may be defined by metal layers in or on the printed circuit board. The metal layer may be formed on an upper surface, such as an upper surface or a lower surface, of the printed circuit board. Thus, the first and second plates of the capacitor may be formed on opposite upper and lower surfaces of the printed circuit board such that the non-conductor of the printed circuit board constitutes the dielectric of the capacitor. Alternatively, at least one metal layer may be embedded within the printed circuit board. Thus, the first and second plates of the capacitor may be formed inside the printed circuit board such that they are spaced apart from each other and their pads (footprints) overlap, wherein the non-conductive portion of the printed circuit board between the first and second plates constitutes the dielectric of the capacitor. The first and second plates may share the same bonding pad.

Alternatively, the third capacitor may comprise at least part of a discrete capacitor, such as a ceramic capacitor.

Alternatively, the third capacitor may be a parasitic capacitance. The parasitic capacitance may be formed by input terminals of an electronic device or circuit (e.g., a differential active circuit) connected to the first and second capacitors. Alternatively, the parasitic capacitance may be present or formed in the printed circuit board.

In one form of the invention, the first plate of the first capacitor may be defined by a first surface layer of a first surface of the printed circuit board, the first plate of the second capacitor may be defined by a second surface layer of an opposite second surface of the printed circuit board, the second plate of the first capacitor being defined by a first embedded layer within the printed circuit board, the second plate of the second capacitor being defined by a second embedded layer within the printed circuit board, the pad of the second embedded layer overlapping the pad of the second embedded layer, and the first and second embedded layers being spaced apart from one another. The pads of the first and second surface layers may at least partially overlap the pads of the first and second embedded layers. Also, the second plate of the first capacitor is closer to the first plate of the first capacitor than the second plate of the second capacitor. Thus, the first plate of the third capacitor may be defined by the first embedding layer, the second plate of the third capacitor may be defined by the second embedding layer, and the dielectric of the third capacitor may be defined by the non-conductive portion of the printed circuit board between the first and second embedding layers. The first and second embedded layers are spaced apart from each other by a distance that is less than the spacing between the first surface layer and the first embedded layer and less than the distance between the second surface layer and the second embedded layer. Therefore, the third capacitor has a larger capacitance value than the first capacitor and the second capacitor.

Alternatively or additionally, the voltage measurement circuit further comprises a rectifying circuit, such as a diode or bridge rectifier, for rectifying the high voltage AC signal before it reaches the capacitive divider.

Alternatively or additionally, the voltage measurement circuit further comprises a resistive voltage divider for reducing the voltage level of the high voltage AC signal applied to the capacitive voltage divider.

Alternatively or additionally, the voltage measurement circuit may further comprise a power supply, which may be used to provide a high voltage AC signal to the capacitive divider. The power source may be, for example, an electrical tap (electric tap) of the mains power supply.

According to a second aspect of the present invention, there is provided a voltage measurement circuit for measuring a high voltage AC signal, the voltage measurement circuit comprising a capacitive voltage divider and a compensation circuit,

the capacitive voltage divider circuit includes: first and second input terminals between which, in use, a high voltage AC signal is received, and first, second and third capacitors; a first plate of the first capacitor is electrically connected to the first input, an opposing second plate of the first capacitor is electrically connected to a first plate of the third capacitor, a first plate of the second capacitor is electrically connected to the second input, and an opposing second plate of the second capacitor is electrically connected to a second plate of the third capacitor; a plate of each of the first, second and third capacitors is defined by a conductive layer of a printed circuit board, and a dielectric of each of the first, second and third capacitors is defined by a non-conductive portion of the printed circuit board;

the compensation circuit has a configurable transfer function and includes an input electrically connected between the first and second plates of the third capacitor and an output; the compensation circuit is for varying a voltage received at its input in accordance with a transfer function to provide a varied voltage as its output.

Embodiments of the second aspect of the invention may include one or more features of the first aspect of the invention.

According to another aspect of the present invention, there is provided a method of measuring a high voltage AC signal using a voltage measurement circuit comprising a capacitive voltage divider circuit and a compensation circuit;

the capacitive voltage divider circuit includes: first and second input terminals, and first, second and third capacitors; a first plate of the first capacitor is electrically connected to the first input, an opposing second plate of the first capacitor is electrically connected to a first plate of the third capacitor, a first plate of the second capacitor is electrically connected to the second input, and an opposing second plate of the second capacitor is electrically connected to a second plate of the third capacitor; the compensation circuit has a configurable transfer function (transfer function) and includes an input electrically connected between the first and second plates of the third capacitor and an output;

the method comprises the following steps:

applying a known voltage signal between first and second inputs of the capacitive voltage divider circuit;

measuring a voltage between the first and second plates of the third capacitor;

determining a transfer function for changing the measured voltage to correspond to a desired voltage between the first and second plates of the third capacitor based on the relative ideal impedances of the first, second and third capacitors;

configuring the compensation circuit using the determined transfer function; and

measuring a high voltage AC signal using the voltage measurement circuit such that the compensation circuit varies the voltage received at its input in accordance with the determined transfer function and provides the varied voltage at its output.

More specifically, the plates of at least one of the first, second and third capacitors are defined by conductive layers of a printed circuit board, and the dielectric of each of the first, second and third capacitors is defined by a non-conductive portion of the printed circuit board.

Alternatively or additionally, at least one of the first, second and third capacitors is a discrete component. More specifically, the first and second capacitors may be class X capacitors or class Y capacitors. The third capacitor may be a ceramic capacitor.

Features and advantages of the present invention will become apparent from the following detailed description of specific embodiments thereof, which is to be read in connection with the accompanying drawings.

Drawings

The following detailed description of specific embodiments is provided to assist in understanding various advantages, aspects and novel features of the invention when considered in conjunction with the following drawings, wherein:

FIG. 1 is a block diagram of a voltage measurement circuit according to the present invention;

FIG. 2 is a circuit diagram of the capacitor divider and snubber of FIG. 1;

FIG. 3 provides a plan view and a cross-sectional view of a printed circuit board configured as part of the capacitor divider of FIG. 2;

FIG. 4A is a circuit diagram of the capacitor divider of FIG. 2;

FIG. 4B provides a cross-sectional view of a printed circuit board configured as part of the circuit of FIG. 4A;

FIG. 5 is a circuit diagram of a voltage measurement circuit having a first form of input stage (a first form of input stage);

FIG. 6 is a circuit diagram of a voltage measurement circuit having a second form of input stage;

FIG. 7 is a circuit diagram of a voltage measurement circuit having an input stage of a third form;

fig. 8 is a flow chart of a method of measuring a voltage signal according to the present invention.

Detailed Description

Fig. 1 shows a voltage measurement circuit according to the invention. The voltage measurement circuit 10 includes first and second input terminals 12, the first and second input terminals 12 configured to receive a high voltage AC signal, such as a 230Vrm main signal. The voltage measurement circuit 10 further comprises a capacitor divider 14, the capacitor divider 14 being described in more detail with reference to fig. 2, a buffer 16 and an analog-to-digital converter 18, the buffer 16 constituting a differential active circuit. As will be apparent from the following description, the capacitor divider 14 is used to reduce the high voltage AC signal to a voltage level (voltage level) that is compatible with the electronic processing circuitry, e.g., a level of about 3 volts. Buffer 16 is used to buffer the reduced voltage before analog-to-digital conversion by analog-to-digital converter 18. The voltage measurement circuit 10 may also include a microprocessor 20, which is of known form and function, and may include a temporary working memory 22 in the form of RAM, a one-time programmable memory 24, such as an EFUSE device, and a digital multiplier and adder circuit 26. The voltage measurement circuit 10 is configured such that the microprocessor 20 receives the measured voltage in digital form from the analog-to-digital converter 18 and uses the value to generate a transfer function that is stored in the one-time programmable memory 24. As will be apparent from the following description, the transfer function is used to provide error compensation for the voltage measurement circuit 10 that would otherwise add to the error of the high voltage signal measurement. Under the control of microprocessor 20, digital multiplier and adder circuit 26 operates on the value of the transfer function stored in the one-time programmable memory together with the measurement voltage in digital form received from analog-to-digital converter 18 to provide a compensated measurement voltage signal at output 28 of the digital multiplier and adder circuit 26.

A circuit diagram of the capacitor divider 14 and the buffer 16 of fig. 1 is shown in fig. 2. Fig. 2 also shows some of the input and output waveforms. These waveforms will be described in detail below with reference to fig. 8. The capacitor divider 14 is in the form of a first capacitor 48, a second capacitor 50 and a third capacitor 36 connected in series. A first plate 52 of the first capacitor 48 is electrically connected to a first positive input of a high voltage AC power source (not shown) and a second plate 54 of the first capacitor 48 is electrically connected to a first plate of the third capacitor 36 and a non-inverting input of the buffer 16. The first plate 56 of the second capacitor 50 is electrically connected to a second negative input of a high voltage AC power source (not shown) and the second plate 58 of the second capacitor 50 is electrically connected to the second plate of the third capacitor 36 and the inverting input of the buffer 16. In this way, the AC voltage signal applied to the first and second input terminals 12 is divided such that a reduced voltage is generated across the third capacitor 36, which reduced voltage across the third capacitor 36 will be buffered in the differential buffer 16 for subsequent processing. The degree to which the capacitor divider 14 divides the AC voltage signal is determined by the relative values of the capacitances of the first-third capacitors. In this embodiment, a household mains voltage signal of 230Vrm, 50Hz is applied to input 12, the capacitance of the first and second capacitors being about 5pF, respectively, and the capacitance of the third capacitor being about 200pF to provide a reduced voltage of about 3 volts. As can be seen from fig. 2, the first and second capacitors 48, 50 form a DC isolation barrier (DC isolation barrier) so that the low voltage circuits (i.e., the buffer 16 and subsequent processing circuits) will be isolated from the high voltage side.

A plan and cross-sectional view of the first, second and third capacitors 48, 50, 36 of fig. 2 is shown in fig. 3. It can be seen that the first plate 64 and the second plate 66 of the capacitor may be defined by different metallic materials on the top and bottom layers of the printed circuit board. The metal layers are deposited so that they share the same pad (footing) so that the non-conductive substrate 68 of the printed circuit board defines the dielectric of the capacitor. The formation of metal traces (metal tracks) and large surface structures (large surface structures) on printed circuit boards, such as the metal layers of the first and second plates, is well known to those skilled in the art. Alternatively, a metal layer embedded in the substrate defines one or more capacitor plates. The metal layers that provide the embedded metal traces and large surface areas, such as the first and second plates, are well known to those skilled in the art. The application of the embedded metal layer will be described below with reference to fig. 4A-4B.

Fig. 4A shows a capacitor divider 80 having a first capacitor 80, a second capacitor 84, and a third capacitor 86. Fig. 4B shows a cross-sectional view of the printed circuit board 90, from which fig. 4B it can be seen that the first surface layer 92 on the first surface of the printed circuit board 90 defines a first plate of the first capacitor 81. The first plate of the second capacitor 84 is defined by a second surface layer 94 on a second, opposite surface of the printed circuit board 90. The second plate of the first capacitor 82 is defined by a first embedded layer 96 in the printed circuit board and the second plate of the second capacitor is defined by a second embedded layer 98, the second embedded layer 98 having a pad overlying the pad of the first embedded layer. The first and second embedded layers 96, 98 are spaced apart from one another. The pads of the first and second surface layers 92, 94 partially overlap the pads of the first and second embedded layers 96, 98. The second plate of the first capacitor 96 is closer to the first plate of the first capacitor 92 than the second plate of the second capacitor 98. Thus, the third capacitor 86 includes a first plate and a second plate. The first and second plates are defined by first and second embedding layers 96, 98, the first and second embedding layers 96, 98 having a dielectric defined by base portions of the first and second embedding layers 96, 98. The first and second embedded layers 96, 98 are spaced from one another by a distance less than the distance between the first embedded layer 96 and the first surface layer 92, and the distance between the second embedded layer 98 and the second surface layer 94. Thus, the third capacitor 86 has a larger capacitance than the first and second capacitors. As described above, the object of the present invention is to reduce the main voltage signal of 230Vrm to a voltage signal of about 3 volts. The first and second capacitors each use a capacitance of 5 pF. In one form, a printed circuit board according to conventional production practice provides a third capacitance of about 15pF to about 20 pF. Thus, the required 200pF capacitance is obtained by using at least one parasitic component and additional discrete components, such as surface mounted capacitors, diodes, etc. When a parasitic component is used, it may be in the form of at least one parasitic capacitor and parasitic resistance. For example, if the first and second capacitors of 5pF and the parasitic resistance of 10M Ohms are used, the cut-off frequency (cut-off) of the 3dB point is about 3 kHz. Assuming a roll off of 20dB every decade, 50Hz takes 20 years. There is a partial pressure of about 100 at 50 Hz. The capacitance and resistance values may be varied according to common design principles to achieve a desired voltage division factor (division factor) to operate at a particular primary frequency. In another form, a common printed circuit board manufacturing process may be modified, for example by increasing the number of layers or including a special thin layer (threaded layer) or the like, to increase the third capacitance and reduce the capacitance of the second and first capacitors. Thus, the relative capacitance values may be determined to obtain the desired voltage division.

Fig. 5-7 show circuit diagrams of voltage measurement circuits according to the invention having three different forms of input stage. Components that are identical to those of the circuit of figure 2 have been given the same reference numerals. The reader's attention is directed to the description of the form and function of these components given in fig. 2. The circuit 110 of fig. 5 includes a diode 112 in series with the first capacitor 48, which acts as a rectifier. The circuit 120 of fig. 6 includes a bridge rectifier 112 between the input stage 32 and the input connections of the first and second capacitors 48, 50. The bridge rectifier is used for full-wave rectification of the household main signal applied to the input stage. The circuit 130 of fig. 7 includes a resistive divider formed by a first resistor 132, a second resistor 134, and a third resistor 136 connected in series. First plates of the first and second capacitors 48, 50 are each connected to opposite sides of a second resistor 134 to provide an attenuated version of the mains household voltage signal to the first and second capacitors. The selection of the first resistor 132, the second resistor 134 and the third resistor 136 depends on the level of the household mains voltage signal and the desired voltage level to be applied to the first and second capacitors.

The operation of the voltage measurement circuit will be described with reference to the flowchart 150 of fig. 8 and the apparatus shown in fig. 1-7. A signal of known amplitude (amplitude) is applied to the first and second input terminals 12 in step 152 for provision to the capacitive divider 14. In this embodiment, the signal of known amplitude is about 230Vrm, i.e., the maximum input voltage. In step 154, the measured voltage developed across the third capacitor 36 provides a digital representation of the measured voltage using the analog-to-digital converter 18. Next, the amplitude of the digital representation of the measured voltage is compared to a known amplitude in step 156, and a gain value of the digital representation of the measured voltage (which constitutes a value for the transfer function) is determined that is to be changed to approximately correspond the amplitude of the digital representation of the measured voltage to the known amplitude. The gain value is determined by a microprocessor that operates in accordance with well known firmware design procedures. The gain value is then stored in the otp memory 24 in step 158. This determines the calibration phase of the method. Thereafter, in step 160, the voltage measurement circuit is used to measure the high voltage AC signal using the high voltage AC signal applied to the first and second input terminals 12 of the capacitive voltage divider 14. At step 162, the analog-to-digital converter 18 measures the voltage signal generated across the third capacitor 36 to provide a digital representation of the measured voltage 162. Next, in step 164, the digital multiplier of the digital multiplier and adder circuit 26 is used to multiply the digital representation of the measured voltage with the gain value stored in the one-time programmable memory 24. Thus, the output from the digital multiplier and adder circuit 26 constitutes a measured voltage that has been compensated for errors that have been accounted for by the errors in the actual capacitance values of the first-third capacitors and the desired, ideal value. In step 166, the compensated measurement voltage is read or used. Thereafter, the measurement phase consisting of steps 160-166 is repeated for subsequent measurements of the subsequent high voltage AC signal.

In another form of the method described in the latter paragraph, two signals, known but of different amplitudes, are applied to the first and second input terminals 12 in step 152 for supply to the capacitive divider 14. One signal is about 230Vrm, the maximum input voltage. Another signal is about 0 Vrm. In step 154, the measured voltage generated across the third capacitor 36, corresponding to two known signals but having different amplitudes, provides first and second digital representations of the measured voltage using the analog-to-digital converter 18. Next, the amplitudes of the first and second digital representations of the measured voltage are compared to known amplitudes in step 156, and the gain value and offset value (which constitute the values for the transfer function) for each digital representation of the measured voltage are determined to be changed to approximately correspond the amplitude of the digital representation of the measured voltage to the known amplitude. The gain value and offset are then stored in the otp memory 24 in step 158 to determine the calibration phase of the method. Thus, as described above, the voltage measurement circuit is used to measure an actual high voltage AC signal having a gain value and an offset value that have been applied and compensated for the measurement voltage. According to the method of this form, the adder of the digital multiplier and adder circuit 26 is used to apply the offset value and the multiplier of the digital multiplier and adder circuit 26 is used to apply the gain value.

In another form of the method described in the latter paragraph, three or more signals, known but of different amplitudes, are applied to the first and second input terminals 12 in step 152 for supply to the capacitive divider 14. In step 154, the measured voltages of the three or more known but different amplitude signals generated across the third capacitor 36 are provided with three or more corresponding digital representations of the measured voltages using the analog-to-digital converter 18. The microprocessor is then used to determine a second or higher order polynomial to be used to compensate the measured high voltage AC signal. The second or higher order polynomial may be used to provide offset, gain and non-linear corrections. Three or more applied known voltage signals will be used in a first order polynomial (i.e., as described in the later sections) to improve the accuracy of the coefficients, e.g., to handle errors originating from noise in the reference signal. When the calibration phase is completed, the actual high voltage AC signal is measured using the voltage measurement circuit as described above. In this form of the invention, the multipliers of the digital multiplier and adder circuit 26 are used to multiply the digital representation of the measured voltage by itself the number of times required (the requisition number of time) to determine the particular term of the polynomial. For example, in a second order polynomial, the digital representation of the measured voltage is multiplied once by itself to determine the quadratic term of the polynomial. In addition, the zero-order term is used as an offset value, and the coefficient of the first-order or higher-order term is used as a gain value. A temporary working memory 22 in the microprocessor is used to store the terms of the polynomial before adding them to each other to provide a compensated measured voltage signal.

In another form of the capacitive divider circuit, in addition to the capacitors formed by the printed circuit board described above, discrete capacitors of the X and/or Y type may be used for the first and second capacitors, and ceramic capacitors may be used for the third capacitor. The capacitances of the first-third capacitors can be referred to in the description of fig. 2.

Claims (10)

1. A method of measuring a high voltage AC signal using a voltage measurement circuit, the voltage measurement circuit comprising a capacitive voltage divider circuit and a compensation circuit;

the capacitive voltage divider circuit includes: first and second input terminals, and first, second and third capacitors; a first plate of the first capacitor is electrically connected to the first input, an opposing second plate of the first capacitor is electrically connected to a first plate of the third capacitor, a first plate of the second capacitor is electrically connected to the second input, and an opposing second plate of the second capacitor is electrically connected to a second plate of the third capacitor; a plate of each of the first, second and third capacitors is defined by a conductive layer of a printed circuit board, and a dielectric of each of the first, second and third capacitors is defined by a non-conductive portion of the printed circuit board;

the compensation circuit has a configurable transfer function and includes an input electrically connected between the first and second plates of the third capacitor and an output;

the method comprises the following steps:

applying a known voltage signal between first and second inputs of the capacitive voltage divider circuit;

measuring a voltage between the first and second plates of the third capacitor;

determining a transfer function for changing the measured voltage to correspond to a desired voltage between the first and second plates of the third capacitor based on the relative ideal impedances of the first, second and third capacitors;

configuring the compensation circuit using the determined transfer function; and

measuring a high voltage AC signal using the voltage measurement circuit such that the compensation circuit varies the voltage received at its input in accordance with the determined transfer function and provides the varied voltage at its output.

2. The method of claim 1, wherein the transfer function is determined based on only one applied known voltage and a corresponding measurement between the first and second plates of the third capacitor.

3. The method of claim 1, wherein the transfer function is determined based on two applied known voltages of different levels and respective corresponding measurements between the first and second plates of the third capacitor.

4. The method of claim 1, wherein the transfer function is determined based on two or more applied known voltages of different levels and respective corresponding measurements between the first and second plates of the third capacitor.

5. The method of claim 1, wherein the capacitive divider circuit is configured for DC isolator operation.

6. The method of any preceding claim, wherein the voltage measurement circuit comprises a differential active circuit having first and second differential inputs and an output, wherein the first differential input is electrically connected to the first plate of the third capacitor and the second differential input is electrically connected to the second plate of the third capacitor.

7. A method according to any preceding claim, wherein the compensation circuit comprises an analogue to digital converter for converting the measured voltage between the first and second plates of the third capacitor to a digital signal.

8. A method as claimed in any preceding claim, comprising storing at least one value for the transfer function in a storage device.

9. A method according to any preceding claim, wherein the compensation circuit comprises at least one digital adder and a digital multiplier, the digital adder being arranged to receive a digital version of the measured voltage and to add the digital measured voltage with the offset value for effective correction, and the digital multiplier being arranged to receive a digital version of the measured voltage and to multiply the digital measured voltage with the gain value for effective correction.

10. A voltage measurement circuit for measuring a high voltage AC signal, the voltage measurement circuit comprising a capacitive voltage divider and a compensation circuit,

the capacitive voltage divider circuit includes: first and second input terminals between which, in use, a high voltage AC signal is received, and first, second and third capacitors; a first plate of the first capacitor is electrically connected to the first input, an opposing second plate of the first capacitor is electrically connected to a first plate of the third capacitor, a first plate of the second capacitor is electrically connected to the second input, and an opposing second plate of the second capacitor is electrically connected to a second plate of the third capacitor; a plate of each of the first, second and third capacitors is defined by a conductive layer of a printed circuit board, and a dielectric of each of the first, second and third capacitors is defined by a non-conductive portion of the printed circuit board;

the compensation circuit has a configurable transfer function and includes an input electrically connected between the first and second plates of the third capacitor and an output; the compensation circuit is for varying a voltage received at its input in accordance with a transfer function to provide a varied voltage as its output.