HK1158367A - A unit of a collection of units and its manufacturing method thereof - Google Patents

Description

Cell in cell set and method for manufacturing same

The present application is a divisional application of the chinese invention application having an application date of 2008/8/21, an application number of 200810213690.3, and a title of "cells in a cell set and a method for manufacturing the same".

Technical Field

The present invention relates to integrated circuit packages, and more particularly, to preventing damage to integrated circuit packages caused by crack propagation.

Background

In the manufacture of Integrated Circuit (IC) packages, multiple units (e.g., substrates, IC chips, etc.) are typically manufactured simultaneously. Each unit is then separated from the collection of units in a dicing separation process. However, in such a cutting and separating process, when pressure is applied to the cell area, the cell is often damaged. In particular, cracks created by the application of pressure may cause the circuit traces, circuit connectors, electronics, IC components, and other elements to lose efficacy.

As throughput continues to increase, it becomes more important to prevent cracks from damaging one or more cells on the ribbon. Furthermore, as cell sizes become smaller, the density of the collection of cells increases, increasing the likelihood that a crack will severely damage one or more cells.

Accordingly, there is a need for a method and system for preventing crack propagation from causing cell damage.

Disclosure of Invention

The present invention introduces a system and method for preventing unit damage using a protective structure. In one embodiment, a cell in a set of cells includes a functional region and a protective structure for preventing crack propagation into the functional region.

According to an aspect of the invention, there is provided a unit in a set of units, comprising

A functional area; and

a protective structure that prevents cracks from propagating to the functional area.

Preferably, the guard structure is used to prevent cracks caused in the cutting and separating process from propagating to the functional region.

Preferably, the guard structure is formed in a pressed region of the unit in a cutting and separating process.

Preferably, the guard structure is formed along boundaries between cells of the set of cells.

Preferably, the guard structure includes a pattern formed on a surface of the cell.

Preferably, the protective structure comprises a pattern selected from the following forms: a grid, a plurality of lines, and a plurality of cuts (planes). (see page 8, line 12)

Preferably, the protective structure comprises a metallic material.

Preferably, the unit comprises a plurality of layers, wherein the surface is a surface of a first layer, and the protective structure further comprises a second pattern formed on a surface of a second layer.

Preferably, the protective structure further includes a via (via) connecting the pattern formed on the surface of the first layer and the pattern formed on the surface of the second layer.

Preferably, the functional area includes a circuit trace (circuit trace), wherein the pattern includes the same component (element, but composition is mentioned in the following embodiment) as the circuit trace.

Preferably, the guard structure includes a plurality of via holes.

Preferably, the via hole of the plurality of via holes is at least one of a plated via hole or a filled via hole.

Preferably, the via hole of the plurality of via holes includes a metal.

Preferably, the functional region includes a via hole, wherein the via hole of the plurality of via holes is the same as the via hole of the functional region.

Preferably, the vias of the plurality of vias are located at one or more boundaries between cells of the set of cells.

Preferably, the plurality of via holes are provided for absorbing or reflecting crack energy.

Preferably, the protective structure further comprises a plurality of horizontal plate layers (slab).

Preferably, the guard structure comprises an exposed plated area.

Preferably, the exposed plating area is used to prevent a solder mask (tear) of the cell.

Preferably, the exposed plated region comprises a metal.

Preferably, the exposed plated area comprises a corrosion resistant material.

Preferably, the exposed plating region comprises one of a rectangular region or a triangular region.

Preferably, the shielding structure comprises a slit in a solder mask of the cell.

Preferably, the slits serve to limit peeling or tearing to areas away from the functional area.

Preferably, the slits are formed at corner portions of the unit.

Preferably, the unit is a substrate.

Preferably, the guard structure is used to reinforce a portion of the unit.

Preferably, the protective structure is used to reflect or absorb crack energy.

Preferably, the protective structure is adapted to weaken a portion of the unit.

Preferably, the protective structure is used to limit cracking.

Preferably, the guard structure comprises a slit.

Preferably, the gaps are near the boundaries between cells of the set of cells.

Preferably, the cells are integrated circuit chips and the collection of cells are wafers.

Preferably, the protective structure comprises a wafer seal ring (seal ring).

Preferably, the wafer seal ring includes a plurality of via holes.

Preferably, the wafer sealing ring further comprises a plurality of horizontal laminates.

According to an aspect of the invention, there is provided a method of manufacturing cells in a cell strip (strip), comprising:

forming a functional region; and

forming a protective structure for preventing crack propagation into the functional area.

Preferably, the method further comprises patterning the cell, wherein the patterning the cell comprises:

laying out the functional region; and

and patterning the protective structure.

Preferably, forming the guard structure comprises:

forming a pattern on a surface of the cell selected from the following forms: a grid, a plurality of lines, and a plurality of cutting planes.

Preferably, forming the guard structure comprises:

and forming a through hole.

Preferably, forming the guard structure comprises:

a plating region is formed on the surface of the cell.

Preferably, forming the guard structure comprises:

a gap is formed in the solder mask of the cell.

Preferably, forming the guard structure comprises: a portion of the cell is enhanced or weakened.

Alternatively, forming the guard structure comprises:

a slit is formed in the cell.

Preferably, the steps of forming the functional region and forming the protective structure are performed in the same manufacturing process.

A more complete understanding of the various advantages, aspects, and novel features of the invention, as well as details of an illustrated embodiment thereof, may be had by reference to the following description and drawings.

Drawings

The invention will be further described with reference to the accompanying drawings and examples, in which:

FIG. 1 is a schematic diagram of a cell collection stripe;

FIG. 2 is a cross-sectional view of an exemplary cell;

FIGS. 3A and 3B are top and bottom views, respectively, of a strip of cell collections according to embodiments of the present invention;

FIGS. 4A-4C are schematic illustrations of a substrate including a guard structure according to an embodiment of the present invention;

FIGS. 5A-5C are schematic illustrations of a substrate including a plurality of vias (via) according to an embodiment of the invention;

6A-6C are schematic illustrations of a substrate including an exposed region according to an embodiment of the present invention;

FIG. 7 is a schematic view of a substrate including a solder mask slot in accordance with an embodiment of the present invention;

FIGS. 8A and 8B are schematic wafer detail views according to embodiments of the present invention;

FIG. 9 is a flowchart illustrating exemplary steps for fabricating a cell according to an embodiment of the present invention.

The present invention will be further described with reference to the following figures and examples, wherein like reference numbers indicate identical or functionally similar elements. Further, the left-most digit(s) of a reference number in a figure indicates the figure number in which the reference number first appears.

Detailed Description

This document discloses one or more embodiments that incorporate the features of this invention. The disclosed embodiments are merely examples of the present invention, the scope of which is not limited to the disclosed embodiments but is defined by the claims of the present application. In addition, other structural and operational embodiments, including modifications/substitutions, will be apparent to those skilled in the art in light of the teachings herein.

Fig. 1 shows a schematic view of a cell strip 100 comprising a plurality of cells 102. The plurality of cells 102 may include a substrate, an Integrated Circuit (IC) package, and/or other types of electronic devices. In other embodiments, strip 100 may be a wafer or a portion of a wafer that includes a collection of IC semiconductor chips. In order for the cells 102a of the plurality of cells 102 to be usable for their intended purpose, they must be separated from the strip 100 in a cutting and separating process. For example, the unit 102a may be a substrate for a plastic Ball Grid Array (BGA) package or other circuit package. After the cells 102a are separated from the tape 100, the cells 102a may be combined with IC chips, solder balls, and other suitable components to form the desired PBGA package.

Various methods may be used to cut the separation unit 102 a. For example, methods of cutting discrete elements include sawing, punching, abrasive particle cutting (abrasive particle cutting), and focused laser beam ablation. All of the above methods may apply pressure on the cell 102a and/or the adjacent cell 102 b. In one embodiment, the pressure generated during the cutting separation process is distributed along boundaries 104 and 106. For example, the cells 102a may be cut apart by sawing along the boundaries 104 and 106, or by applying pressure on top of the cells 102a in a punching action.

As shown in fig. 1, cell 102a has a functional area 103. Functional area 103 may include circuit traces, connectors, circuit elements, IC features (IC features), and/or other features necessary for the operation of cell 102 a. Therefore, it is desirable to protect the functional region 103 from cracking.

As the cells 102a are cut apart, the area of the cells 102a and other areas of the strip 100 are subjected to pressure. This pressure typically releases energy in the form of cracks. For example, the boundaries 104 and 106 may be scored. In this embodiment, the area immediately adjacent to the boundaries 104 and 106 is weakened (Weakened) in preparation for the cutting separation process. Scoring includes removing portions of material and/or partially cutting along boundary 104 and/or boundary 106. Alternatively, boundaries 104 and 106 may be scored with a laser beam. In this embodiment, the boundaries 104 and 106 are melted by the laser beam and then recondensed into a flatter cut, thereby reducing the area of stress concentration along the boundaries 104 and 106, which promotes cracking and chipping during the (contribute) cut separation process.

Fig. 2 is a cross-sectional view of an exemplary cell 200. The illustrated cell 200 is merely exemplary and not limiting of the present invention. The cells 200 may be included in a cell stripe similar to the stripe 100 described with reference to fig. 1. The cell 200 includes a signal layer 202 and a power layer 204 with a ground plane 206 sandwiched therebetween. The signal layer 202 is arranged with conductive traces and connectors. A layer of dielectric material (prepreg) 208 is used to isolate the ground plane 206 from the signal layer 202. The layer of insulating material (prepreg) 208 comprises a fibrous or epoxy material having a high dielectric constant and toughness. The ground plane 206 is insulated from the power supply layer 204 using BT epoxy or FR-4 layer 210. Layer 210 may also be comprised of other suitable Printed Circuit Board (PCB) composites. The PCB composite has a constant high dielectric constant with almost no losses, even at higher frequencies.

The IC package stack signal layer 202 is sealed with a solder mask 212 to prevent exposure. The solder mask 212 is etched to allow connection to signal layer 202 features (e.g., circuit traces, connectors, etc.).

Exemplary embodiments

In the embodiments described herein, techniques are provided to limit damage due to crack propagation. As is known to those skilled in the art, cracks generally propagate along the weakest link under pressure. Without any protective structure to prevent or mitigate crack propagation, cracks will propagate to the functional area of the cell and may penetrate conductive traces, cut through vias (sever via), or crack, chip, peel or delaminate the substrate layer. Cell damage that occurs during the dicing separation process can be reduced using the techniques and embodiments described herein.

A protective structure may be formed on the unit to prevent cracks from propagating to the functional area of the unit. The guard structure may be formed in the area of the cells that are subjected to pressure when the cells are cut apart.

The cell area can be enhanced by using a guard structure. The reinforcing portion absorbs and/or reflects crack energy so that the crack does not propagate to the functional area of the cell. Alternatively, the cell region may be weakened. As described above, cracks tend to propagate toward the weakened areas. By weakening the area remote from the functional area of the unit, the crack can be confined to that area and prevented from propagating to the functional area of the unit. The guard structure may weaken a designated area of the cell while strengthening other areas of the cell.

Fig. 3A and 3B are top and bottom views, respectively, of a cell collection strip 300 according to an embodiment of the present invention. The strip 300 comprises cells 302. The cell 302 includes a functional region 303 and apertures 304 and 306. The functional region 303 includes the functional elements and elements of the cell 302 as the functional region 103 described above with reference to fig. 1. For example, the functional region 303 includes a region for attaching an IC chip or a contact pad (such as a solder ball, a pin, or the like).

The gaps 304 and 306 are guard structures for preventing cracks from propagating toward the functional region 303. In one embodiment, the gaps 304 and 306 weaken the area of the cell 302 that is subjected to stress during the cutting separation process (e.g., along the boundary of the cell 302 with adjacent cells). The crack that is expanding due to the cutting separation is confined at the gaps 304 and 306 and is prevented from propagating toward the functional region 303.

The slit 304 is generally larger than the width of the slit 306 because the slit 306 is disposed along an edge portion of the strip 300 (i.e., not adjacent to any other cell), limited by the space therein. In another embodiment, the gap 306 has substantially the same width as the gap 304, or the width of the gap 306 is greater than the width of the gap 304.

The resulting gaps 304 and 306 may partially or completely penetrate the cell 302. In other words, material at the area of the cell 302 where the apertures 304 and 306 are located is removed in whole (i.e., to form a hole) or in part.

The unit 302 shown in FIG. 3A also has a plastic cap (mold top) 308. In one embodiment, the molding cap 308 is used to mold a molding or sealing material that seals the package (e.g., PBGS package) that includes the unit 302.

As shown in fig. 3A and 3B, the slits 304 and 306 do not extend entirely along the boundaries of the cells in the isolation strip 300. This is because slits extending entirely along the border reduce the structural integrity of the strip. In the following embodiments, other forms of protective structures are provided to prevent crack propagation into the functional area. These structures may be used in combination with the above-described slits.

Fig. 4A-4C are schematic diagrams of substrates 400, 420, and 440, respectively, including guard structures, according to embodiments of the present invention. In one embodiment, each of substrates 400, 420, and 440 are elements in the same element strip as element strip 100 described with reference to FIG. 1. Each of the substrates 400, 420, and 440 includes slits 402a and 402b and a functional region 404. Slits 402a and 402b are formed along boundaries 406 and 408, respectively, and boundaries 406 and 408 isolate the substrate from other cells. The slots 402a and 402b are similar to the slots 304 and/or 306 described with reference to fig. 3. Each of the substrates 400, 420, and 440 is configured with a pattern for preventing crack propagation into the functional region 404. Although the patterns shown in fig. 4A-4C are formed on a substrate, one skilled in the art will appreciate that the patterns shown may be used in other types of cells.

A grid 410 is formed on substrate 400 for reinforcing substrate 410 along boundaries 406 and 408. The mesh 410 may confine cracks to the area inside the mesh 401, thereby protecting the functional area 404. For example, if a crack occurs along the boundary 406 due to pressure, the crack will be confined by the gaps 402a and 402b and/or the mesh 410, thereby protecting the functional region 404. Specifically, the mesh 410 may be used to absorb crack energy, thereby preventing crack formation and/or propagation.

Similarly, as shown in fig. 4B and 4C, a line 412 is formed on the substrate 420, and a cut surface (plane)414 is formed on the substrate 440 for preventing a crack from propagating into the functional region 404. As shown in fig. 4B, lines 412 comprise a plurality of horizontal and vertical lines formed on substrate 420. As shown in fig. 4C, the cutting plane 414 includes a plurality of cutting planes formed on the substrate 440. The grid 410 and the cut plane 414 shown in fig. 4A and 4C appear the same in the figures. However, the grid 410 is composed of line segments broken at intersections, and the cutting plane 414 is composed of lines extending at the intersections.

As mentioned previously, cells often have multiple layers. The dicing and separation process of the unit may be subject to stresses on more than one layer. In a further embodiment, the patterns formed on the different layers may be connected together by vias (via). Alternatively, these structures may be individually isolated.

In one embodiment, different patterns may be formed on different layers of the substrate. For example, a four-layer substrate may have a grid formed on the first layer, lines formed on the second and third layers, and a cut formed on the fourth layer.

One or more of the mesh 410, lines 412, and cut faces 414 may be comprised of a metallic material (e.g., copper alloy, gold, etc.). In one embodiment where functional region 404 includes circuit traces or other similar features, grid 410, lines 412, and cut 414 may be formed of the same material, and the width of the lines may approximate the dimensions of the features in functional region 404. In this embodiment, the grid 410, lines 412 and/or cuts 414 are included in the layout design of the respective substrate, and the patterning of the substrate and the formation of the features in the functional regions 404 on the substrate may be performed in the same manufacturing process.

Fig. 5A is a schematic view of a substrate 500 including a guard structure according to an embodiment of the invention. The substrate 500 includes slits 502a and 502b, a functional region 504, and a plurality of via holes (via) 510. The slots 502a and 502b are generally the same as the slots 402a and 402b previously described with reference to fig. 4A-4C. The functional area 504 may include circuit traces, circuit connectors, conductive features, etc., as with the functional area 404 described with reference to fig. 4A-4C.

Substrate 500 includes a plurality of vias 510 formed along boundaries 506 and 508. Similar to the boundaries 406 and 408 described with reference to fig. 4A-4C, the boundaries 506 and 508 may isolate the substrate 500 from other cells in a strip or collection of cells, which are also the areas subject to pressure during the cutting separation process. As shown in fig. 5A, the plurality of vias 510 can effectively form a shield to protect the functional region 504 from cracks. In one embodiment, plurality of vias 510 may absorb and/or reflect crack energy, thereby preventing crack propagation into functional region 504.

In one embodiment, the substrate 500 may include multiple layers. In this embodiment, the vias of plurality of vias 510 may extend into some or all of the layers of the substrate. The vias in plurality of vias 510 can be plated and/or filled and can be metallic. For example, the vias of plurality of vias 510 may comprise copper, copper alloy, aluminum, and the like.

In one embodiment, the functional region 504 includes vias. In this embodiment, the vias of the plurality of vias 510 may be the same as the vias in the functional area 504 in terms of material composition, size, and the like. In this embodiment, the vias of plurality of vias 510 may be included in the layout design of substrate 500 and are fabricated or formed in the same process steps as are used to fabricate the features in functional regions 404.

As shown in FIG. 5A, a plurality of vias 510 are arranged in two rows along boundaries 506 and 508. However, in other embodiments, the plurality of vias 510 may be arranged in other shapes without departing from the spirit and scope of the present invention.

Fig. 5B-5C are schematic diagrams of other implementations of a guard structure including multiple vias (via) according to embodiments of the invention. The substrate 520 shown in fig. 5B is generally the same as the substrate 500. However, the substrate 520 includes a solder mask 522 and a plurality of vias 524. As shown in fig. 5B, the via holes of the plurality of via holes 524 do not penetrate the solder mask 522. In another embodiment, one or more of the plurality of vias 524 may partially or fully penetrate the solder mask 522. In one embodiment, the vias of the plurality of vias 524 are formed along an edge of the substrate 520 (e.g., a boundary between the substrate 520 and a strip or other cell of the collection). Like plurality of vias 510 described with reference to FIG. 5A, plurality of vias 524 are used to absorb and/or reflect crack energy so that cracks do not propagate into the functional area.

The substrate 540 shown in fig. 5C includes a plurality of vias 542, a plurality of board layers (tabs) 544, metal pads 546, a passivation layer 548, and a bond opening area 550. As shown in fig. 5C, the substrate 540 includes a grid formed by a plurality of vias 542 and a plurality of plate layers 544. In one embodiment, the plate layers of the plurality of plate layers 544 may be composed of a metallic material (e.g., copper alloy, aluminum, etc.), which may be the same material composition as the plurality of vias 542. In this way, the plurality of vias 542 and the plurality of plies 544 form a web-like guard structure for absorbing and/or reflecting crack energy. The grid shown in fig. 5C is different from the grid 410 shown in fig. 4A. The grid of vias 542 and plate layers 544 in fig. 5C is a three-dimensional structure formed in substrate 540. The purification layer 548 may be used to isolate components of the substrate 540, such as the metal pads 546, from other components of the substrate 540.

Fig. 6A-6C are schematic illustrations of substrates 600, 620, and 630 that include exposed plated regions 606, 610, and 614, respectively, according to an embodiment of the invention. The substrate 600 includes a functional region 604 that is the same as the functional region 404 previously described with reference to fig. 4, and an exposed region 606 is formed along an edge portion of the substrate 600. In one embodiment, the substrate 600 is covered by a solder mask. The solder mask may be used to define the area on the substrate 600 where solder will be deposited. In another embodiment, the solder mask is substantially rigid. In such embodiments, cracks resulting from the pressure experienced during the dicing and separation process may peel or tear the solder mask. Such peeling or tearing may cause damage to the components in the functional area 604. Thus, in addition to preventing crack propagation into the functional region 604, the exposed region 606 may also serve to prevent tearing or spalling from propagating into the functional region 604.

The exposed plating areas 606, 610, and 614 may be areas where no solder mask is present. Alternatively, the exposed plated areas 606, 610, and 614 may be areas of the substrate 600 that are covered by metal.

The exposed plating areas 606, 610, and 614 may be comprised of a metallic material, such as copper, a copper alloy, aluminum, and the like. In another embodiment, the exposed area may be covered by a corrosion resistant metal (such as gold, silver, etc.).

As shown in fig. 6A, the exposed regions 604 are formed in the corner portions of the substrate 600 in a triangular shape. However, the exposed plating area may be other shapes. For example, fig. 6B and 6C illustrate exposed plated regions 610 and 614 formed along edge portions 608 and 610, respectively. The exposed plated area 610 is substantially rectangular and includes a recess therein. The exposed plating region 614 comprises a rectangle with a plurality of lines. As will be appreciated by those skilled in the art, the exposed plating areas may be of other shapes without departing from the spirit and scope of the present invention. Although not shown in fig. 6A-6C, the exposed plating areas may also incorporate apertures (as described above) to prevent damage to the features on the functional area 604.

Fig. 7 is a schematic diagram of a substrate 700 including slits 702a and 702b, functional regions 704, and solder mask slits 710 in accordance with an embodiment of the present invention. In one embodiment, the slits 702a and 702b formed along the boundaries 706 and 708 are the same as the slits 402a and 402b, respectively, previously described with reference to fig. 4A-4C. The functional area 704 may include the same elements (features) as the functional area 404 previously described with reference to fig. 4.

In one embodiment, the solder mask gap 710 is used to prevent crack propagation into the functional region 704. In another embodiment, the solder mask gap 710 is formed only in the solder mask of the substrate 700. In such embodiments, the solder mask seam 710 may also be used to prevent the solder mask from peeling and/or tearing.

The solder mask gap 710 weakens the solder mask in the partial areas that may be subjected to stress during the cutting separation process. In this manner, the crack energy may be limited by the solder mask gap 710, thereby preventing causing the solder mask in the functional region 704 to tear or peel. When the spall or crack reaches the solder mask gap 710, it moves along the solder mask gap 710 because the resistance is less there than in other areas of the solder mask. Thus, the peeling or cracking is limited to an area far from the functional region 704.

As shown in fig. 7, a solder mask gap 710 is formed along an edge of the substrate 700. However, as will be appreciated by those skilled in the art, the solder mask apertures 710 may be formed in different shapes without departing from the spirit and nature of the present invention.

Fig. 8A and 8B are top and cross-sectional views of a wafer according to an embodiment of the invention. As shown in fig. 8A, the IC chip 800 (which includes a functional region 804) is at least partially surrounded by a sealing ring 802. The functional regions 804 may include integrated circuit transistors, resistors, and/or other types of electronic or logic components included in an IC chip or other semiconductor device. The seal ring 802 is used to prevent crack propagation into the functional area 804.

Fig. 8B shows a cross-sectional view of the seal ring 802 of the IC chip 800. The seal ring 802 includes a linear via (line via)804 and a square via (square via) 806. The linear vias 804 and the square vias 806 are used to absorb and/or reflect crack energy so that cracks do not propagate into the functional area 804. In addition, the seal ring 802 includes a laminate 808. The plies 808 are formed in a horizontal fashion (and vias are formed in a vertical fashion) to form a three-dimensional grid. The laminate 808 is identical in material composition to the linear vias 804 and/or the square vias 806. In another embodiment, the seal ring 802 may include any combination of linear vias 804, square vias 806, and laminates 808.

FIG. 9 is a schematic diagram of a flow 900 of exemplary steps for fabricating a cell according to an embodiment of the present invention. Other structural and operational embodiments will be apparent to those skilled in the art based on the following discussion. The steps shown in fig. 9 need not necessarily be performed in the order shown. The steps in fig. 9 are described below.

The process 900 begins at step 902. At step 902, the layout design of the (define) cell is determined. For example, in embodiments where the cell is a substrate, the layout design includes determining circuit traces and circuit connectors. Alternatively, in an embodiment in which the unit is an IC chip, IC elements such as resistors and transistors may be determined.

In one embodiment, the layout of the protective structure used to prevent crack propagation into the functional area of the cell may also be determined along with the layout of the functional requirements. In such embodiments, step 902 may include patterning functional requirements and patterning guard structures.

At step 904, functional requirements are formed. For example, functional elements such as circuit traces, IC elements, or other elements may be formed in the functional area of the cell.

At step 906, a guard structure is formed. For example, one or more of the slits, lines, grids, cuts, seals, or other structures described above may be formed in the cells. In one embodiment, steps 904 and 906 may be performed in the same step of the manufacturing process. The manufacturing of the functional element and the protective structure in the same step can reduce the cost of forming the protective structure.

Conclusion

While various embodiments of the present invention have been described above, it should be understood that they have been presented by way of example only, and not limitation. It will be apparent to persons skilled in the relevant art that various changes in form and detail can be made therein without departing from the spirit and scope of the invention. Thus, the scope of the invention is not limited to any of the above-described embodiments, but is defined by the claims and their equivalents.

Claims (10)

1. A unit in a set of units, comprising

A functional area; and

a protective structure that prevents cracks from propagating to the functional area.

2. The unit of claim 1, wherein the guard structure is configured to prevent cracks caused during the cutting and separating process from propagating to the functional region.

3. The unit of claim 1, wherein the guard structure is formed in a compressed area of the unit during a cutting and separating process.

4. The cell of claim 1, wherein the guard structure is formed along boundaries between cells of the set of cells.

5. The cell defined in claim 1, wherein the protective structure comprises a pattern formed on the cell surface.

6. The unit of claim 5, wherein the guard structure comprises a pattern selected from the following forms: a grid, a plurality of lines, and a plurality of cutting planes.

7. The unit of claim 6, wherein the protective structure comprises a metallic material.

8. The unit of claim 5, comprising a plurality of layers, wherein the surface is a surface of a first layer, the protective structure further comprising a second pattern formed on a surface of a second layer.

9. A method of making cells in a cell strip, comprising:

forming a functional region; and

forming a protective structure for preventing crack propagation into the functional area.

10. The method of claim 9, further comprising patterning the cell, wherein the patterning the cell comprises:

laying out the functional region; and

and patterning the protective structure.