HK1150370A - Method and apparatus for sensing, measurement or characterization of display elements integrated with the display drive scheme, and system and applications using the same - Google Patents

Abstract

Methods and systems for electrical sensing, measurement and characterization of display elements are described. An embodiment includes integrating the electrical sensing, measurement and characterization with the display drive scheme. This embodiment allows for measurement of DC or operational hysteresis voltages and/or response times of interferometric modulator MEMS devices, for example, to be fully integrated with the display driver IC and/or the display drive scheme. Another embodiment allows these measurements to be performed and used without resulting in display artifacts visible to a human user. Another embodiment allows the measurement circuitry to be integrated with the display driver IC and/or the display drive scheme re-using several existing circuitry components and features, thus allowing for integration of the measurement method and its use relatively easily.

Description

Methods and apparatus for display element sensing, measurement or characterization integrated with display drive schemes, and systems and applications using the same

CROSS-REFERENCE TO RELATED APPLICATIONS

THE present application claims priority OF U.S. provisional application No. 61/027727 entitled "METHOD AND APPARATUS FOR display element SENSING, MEASUREMENT OR CHARACTERIZATION integrated with a display drive scheme, AND systems AND APPLICATIONS USING THE SAME" (METHOD AND APPARATUS FOR SENSING, measuring OR communicating OF DISPLAY ELEMENTS INTEGRATED WITH THE DISPLAY DRIVE SCHEME, AND SYSTEM AND application USING THE SAME), filed on 11/2/2008, THE disclosure OF which is hereby incorporated by reference in its entirety.

Technical Field

The present invention relates to microelectromechanical systems. More particularly, the present invention relates to methods and apparatus for improving the performance of microelectromechanical systems, such as interferometric modulators.

Background

Microelectromechanical Systems (MEMS) include micromechanical elements, actuators, and electronics. Micromechanical elements may be created using deposition, etching, and/or other micromachining processes that etch away parts of substrates and/or deposited material layers or that add layers to form electrical and electromechanical devices. One type of MEMS device is referred to as an interferometric modulator. As used herein, the term "interferometric modulator" or "interferometric light modulator" refers to a device that selectively absorbs and/or reflects light using the principles of optical interference. In certain embodiments, an interferometric modulator may comprise a pair of conductive plates, one or both of which may be transparent and/or reflective in whole or part and capable of relative motion upon application of an appropriate electrical signal. In a particular embodiment, one plate may include a stationary layer deposited on a substrate, and the other plate may include a metallic membrane separated from the stationary layer by an air gap. As described in greater detail herein, the position of one plate relative to another can change the optical interference of light incident on the interferometric modulator. Such devices have a wide range of applications, and it would be beneficial in the art to utilize and/or modify the characteristics of these types of devices so that their features can be exploited in improving existing products and creating new products that have not yet been developed.

The systems, methods, and devices described herein each have several aspects, no single one of which is solely responsible for its desirable attributes. Without limiting the scope, salient features will now be discussed briefly. After considering this discussion, and particularly after reading the section entitled "detailed description of certain embodiments" one will understand how the features described herein provide advantages over other display devices.

Disclosure of Invention

One aspect is a method, comprising: applying a signal between a first electrode and a second electrode of a display element, wherein the signal is at a level that causes the display element to be in a first display state of a plurality of display states; applying a second signal between the two electrodes to cause the display element to transition from one state to the other; measuring an electrical response of the display element in response to the applied second signal; identifying whether the display element has reached a desired final state based on the measured electrical response; and adjusting the second signal if the display element has not reached the desired final state.

Another aspect is an apparatus, comprising: a drive circuit configured to apply a signal between a first electrode and a second electrode of a display element, wherein the signal is at a level that causes the display element to be in a first display state of a plurality of display states; a feedback circuit configured to measure an electrical response of the display element in response to the applied signal; and a processor configured to control the drive circuitry, receive information indicative of the measured electrical response, identify an operational error of the display element based on the measured electrical response, and adjust a drive signal of the display element in response to the identified error.

Another aspect is a display device, comprising: means for applying a signal between a first electrode and a second electrode of a display element, wherein the signal is at a level that causes the display element to be in a first display state of a plurality of display states; means for measuring an electrical response of the display element in response to the applied signal; means for identifying an operational error of the display element based on the measured electrical response; and means for adjusting the signal in response to the identified error.

Another aspect is a display device, comprising: an array of interferometric modulators; a drive circuit configured to apply a signal between a first electrode and a second electrode of a display element, wherein the signal is at a level that causes the display element to be in a first display state of a plurality of display states; a feedback circuit configured to measure an electrical response of the display element in response to the applied drive voltage; a processor configured to control the drive circuitry, receive information indicative of the measured electrical response, identify an operational error of the display element based on the measured electrical response, and adjust the signal in response to the identified error; and a memory device configured to communicate with the processor.

Drawings

FIG. 1 is an isometric view depicting a portion of one embodiment of an interferometric modulator display in which an active reflective layer of a first interferometric modulator is in a relaxed position and an active reflective layer of a second interferometric modulator is in an actuated position.

FIG. 2 is a system block diagram illustrating one embodiment of an electronic device incorporating a 33 interferometric modulator display.

FIG. 3 is a diagram of movable mirror position versus applied voltage for one exemplary embodiment of an interferometric modulator of FIG. 1.

FIG. 4 is an illustration of a set of row and column voltages that may be used to drive an interferometric modulator display.

FIG. 5A illustrates one exemplary frame of display data in the 33 interferometric modulator display of FIG. 2.

FIG. 5B illustrates one exemplary timing diagram for row and column signals that may be used to write the frame of FIG. 5A.

FIGS. 6A and 6B are system block diagrams illustrating an embodiment of a visual display device comprising a plurality of interferometric modulators.

Fig. 7A is a cross-section of the device of fig. 1.

FIG. 7B is a cross section of an alternative embodiment of an interferometric modulator.

FIG. 7C is a cross section of another alternative embodiment of an interferometric modulator.

FIG. 7D is a cross section of yet another alternative embodiment of an interferometric modulator.

FIG. 7E is a cross section of an additional alternative embodiment of an interferometric modulator.

FIG. 8 is a block diagram illustrating an example system configured to drive a display array and measure an electrical response of a selected display element, such as the interferometric modulator display device of FIG. 2.

FIG. 9 is a block diagram illustrating another example of a circuit that may be used to measure the electrical response of a selected display element, such as in the interferometric modulator display device of FIG. 2, via the same circuit used to apply a stimulus to the selected display element.

FIG. 10A is a flow chart illustrating an example of a method of driving a display element, such as an interferometric modulator as illustrated in FIG. 1, in which a ramped drive voltage is used.

FIG. 10B is a flow chart illustrating a method of calibrating a drive voltage for driving a display element, the method comprising determining the drive voltage based on a desired operating characteristic of the display element.

FIG. 10C is a flow chart illustrating another method of calibrating a drive voltage for driving a display element, the method including adjusting the drive voltage based on identifying an error condition in driving the display element.

Fig. 11A is an illustration of an example of a ramp voltage waveform for driving a display element.

FIG. 11B is an illustration of the sensed electrical response of a drive circuit connected to a display element that can be used in the method illustrated in FIGS. 10A and 10B.

FIG. 12 illustrates examples of drive voltage waveforms for driving display elements and corresponding electrical responses sensed in drive circuits connected to the display elements, such as may be used in the methods illustrated in FIGS. 10A and 10B.

FIG. 13A illustrates an example of drive voltage waveforms and corresponding electrical responses indicative of correct activation of display elements, such as may be used in the method illustrated in FIG. 10C.

FIG. 13B illustrates an example of a drive voltage waveform and corresponding electrical response indicating an example of erroneous activation of a display element, such as may be used in the method illustrated in FIG. 10C.

FIG. 14 is a flow diagram illustrating a method for driving a display element and measuring the electrical response of the display element to determine a drive voltage to achieve a desired operating characteristic, where the drive voltage results in a display state transition that is substantially undetectable to human vision.

FIG. 15 illustrates examples of drive voltage waveforms and corresponding sensed electrical responses that may be used in the method illustrated in FIG. 15.

FIG. 16A is a block diagram illustrating an example of circuitry for driving isolated portions of a display array and for sensing the electrical response of isolated regions.

FIG. 16B illustrates an equivalent circuit that illustrates the electrical relationship of the capacitance of the display area being sensed to the capacitance of other display areas that are not being sensed.

Detailed Description

The following detailed description is directed to certain specific embodiments. However, other embodiments may be used, and some elements may be embodied in many different ways. In this description, reference is made to the drawings wherein like parts are designated with like numerals throughout. As will be apparent from the following description, the embodiments may be implemented in any device that is configured to display an image, whether in motion (e.g., video) or stationary (e.g., still image), and whether textual or pictorial. More particularly, it is contemplated that the embodiments may be implemented in or associated with a variety of electronic devices such as, but not limited to: mobile phones, wireless devices, Personal Data Assistants (PDAs), handheld or portable computers, GPS receivers/navigators, cameras, MP3 players, camcorders, game consoles, wrist watches, clocks, calculators, television monitors, flat panel displays, computer monitors, auto displays (e.g., odometer display, etc.), cockpit controls and/or displays, camera view displays (e.g., of a rear view camera in a vehicle), electronic photographs, electronic billboards or signs, projectors, architectural structures, packaging, and aesthetic structures (e.g., display of images on a piece of jewelry). MEMS devices of similar structure to those described herein can also be used in non-display applications such as in electronic switching devices.

Methods and systems for electrical sensing, measurement, and characterization of display elements are described. An embodiment includes integrating electrical sensing, measurement and characterization with a display drive scheme. This embodiment allows for the measurement of the DC or operational hysteresis voltage and/or response time of an interferometric modulator MEMS device to be fully integrated, such as with a display driver IC and/or a display drive scheme. Another embodiment allows these measurements to be performed and used without causing display artifacts visible to a human user. Another embodiment reuses several existing circuit components and features to allow integration of the measurement circuitry with the display driver IC and/or display driving scheme, thus allowing integration of the measurement method and its relatively easy use.

One interferometric modulator display embodiment comprising an interferometric MEMS display element is illustrated in FIG. 1. In these devices, the pixels are in either a bright or dark state. In the bright ("on" or "open") state, the display element reflects a large portion of incident visible light to a user. When in the dark ("off" or "closed") state, the display element reflects little incident visible light to the user. Depending on the embodiment, the light reflectance properties of the "on" and "off states may be reversed. MEMS pixels can be configured to reflect predominantly at selected colors, allowing for a color display in addition to black and white.

FIG. 1 is an isometric view depicting two adjacent pixels in a series of pixels of a visual display, wherein each pixel comprises a MEMS interferometric modulator. In some embodiments, an interferometric modulator display comprises a row/column array of these interferometric modulators. Each interferometric modulator includes a pair of reflective layers positioned at a variable and controllable distance from each other to form a resonant optical gap with at least one variable dimension. In one embodiment, one of the reflective layers is movable between two positions. In the first position, referred to herein as the relaxed position, the movable reflective layer is positioned at a relatively large distance from the fixed partially reflective layer. In the second position, referred to herein as the actuated position, the active reflective layer is positioned more closely adjacent to the partially reflective layer. Incident light reflected from the two layers interferes constructively or destructively depending on the position of the active reflective layer, producing either an overall reflective or non-reflective state for each pixel.

The depicted portion of the pixel array in FIG. 1 includes two adjacent interferometric modulators 12a and 12 b. In the interferometric modulator 12a on the left, an active reflective layer 14a is illustrated in a relaxed position at a predetermined distance from an optical stack 16a, which includes a partially reflective layer. In the interferometric modulator 12b on the right, the active reflective layer 14b is illustrated in an actuated position adjacent to the optical stack 16 b.

The optical stacks 16a and 16b (collectively referred to as optical stack 16), as referenced herein, typically include a number of fused layers, which may include an electrode layer such as Indium Tin Oxide (ITO), a partially reflective layer such as chromium, and a transparent dielectric. The optical stack 16 is thus electrically conductive, partially transparent, and partially reflective, and may be fabricated, for example, by depositing one or more of the above layers onto a transparent substrate 20. The partially reflective layer can be formed from a variety of materials that are partially reflective, such as various metals, semiconductors, and dielectrics. The partially reflective layer can be formed from one or more layers of materials, and each of the layers can be formed from a single material or a combination of materials.

In some embodiments, the layers of the optical stack 16 are patterned into parallel strips, and may form row electrodes in a display device, as described further below. The active reflective layers 14a, 14b may be formed as a series of parallel strips of a deposited metal layer (orthogonal to the row electrodes of 16a, 16 b) deposited on top of posts 18 and an intervening sacrificial material deposited between the posts 18. When the sacrificial material is etched away, the active reflective layers 14a, 14b are separated from the optical stacks 16a, 16b by a defined gap 19. Highly conductive and reflective materials such as aluminum may be used for the reflective layer 14, and these strips may form column electrodes in a display device.

As illustrated by the pixel 12a in fig. 1, with no applied voltage, a gap 19 remains between the active reflective layer 14a and the optical stack 16a, with the active reflective layer 14a in a mechanically relaxed state. However, when a potential difference is applied to a selected row and column, the capacitor formed at the intersection of the row and column electrodes at the corresponding pixel becomes charged, and electrostatic forces pull the electrodes together. If the voltage is high enough, the active reflective layer 14 is deformed and forced against the optical stack 16. A dielectric layer (not illustrated in this figure) within the optical stack 16 may prevent shorting and control the separation distance between layers 14 and 16, as illustrated by pixel 12b on the right in fig. 1. The behavior is the same regardless of the polarity of the applied potential difference. In this manner, row/column actuation that can control the reflective vs. non-reflective pixel states is analogous in many ways to that used in conventional LCD and other display technologies.

FIGS. 2-5B illustrate one exemplary process and system for using an array of interferometric modulators in a display application.

FIG. 2 is a system block diagram illustrating one embodiment of an electronic device that may incorporate aspects of the invention. In an exemplary embodiment, the electronic device includes a processor 21, which may be: any general purpose single or multi-chip microprocessor, such as ARM,PentiumPentiumPentiumPro、8051、Or any special purpose microprocessor such as a digital signal processor, microcontroller, or programmable gate array. The processor 21 may be configured to execute one or more software modules, as is conventional in the art. In addition to executing an operating system, the processor may be configured to execute one or more software applications, including a web browser, a telephone application, an email program, or any other software application.

In one embodiment, the processor 21 is also configured to communicate with an array driver 22. In one embodiment, the array driver 22 includes a row driver circuit 24 and a column driver circuit 26 that provide signals to a display array or panel 30. The cross-section of the array illustrated in FIG. 1 is shown by line 1-1 in FIG. 2. For MEMS interferometric modulators, the row/column actuation protocol may take advantage of the hysteresis properties of these devices illustrated in FIG. 3. It may require, for example, a 10 volt potential difference to cause the active layer to deform from the relaxed state to the actuated state. However, as the voltage is reduced from that value, the active layer maintains its state as the voltage drops back below 10 volts. In the exemplary embodiment of FIG. 3, the active layer does not relax completely until the voltage drops below 2 volts. Thus, there is a window of applied voltage of about 3 to 7V in the example illustrated in FIG. 3, within which the device is stable in either the relaxed or actuated state. This is referred to herein as the "hysteresis window" or "stability window". For a display array having the hysteresis characteristics of FIG. 3, the row/column actuation protocol may be designed such that during row strobing, pixels in the strobed row that are to be actuated are exposed to a voltage difference of about 10 volts, and pixels that are to be relaxed are exposed to a voltage difference of close to zero volts. After the strobe, the pixels are exposed to a steady state voltage difference of about 5 volts such that they remain in whatever state the row strobe put them in. After being written, each pixel sees a potential difference within the "stability window" of 3-7 volts in this example. This feature makes the pixel design illustrated in FIG. 1 stable under the same applied voltage conditions in either an actuated or relaxed pre-existing state. Since each pixel of the interferometric modulator, whether in the actuated or relaxed state, is essentially a capacitor formed by the fixed and moving reflective layers, this stable state can be held at a voltage within the hysteresis window with almost no power dissipation. Essentially no current flows into the pixel if the applied potential is fixed.

In typical applications, a display frame may be created by asserting the set of column electrodes in accordance with the desired set of actuated pixels in the first row. A row pulse is then applied to the row 1 electrode, actuating the pixels corresponding to the asserted column lines. The asserted set of column electrodes is then changed to correspond to the desired set of actuated pixels in the second row. A pulse is then applied to the row 2 electrode, actuating the appropriate pixels in row 2 in accordance with the asserted column electrodes. The row 1 pixels are unaffected by the row 2 pulse, and remain in the state they were set to during the row 1 pulse. This may be repeated for the entire series of rows in a sequential pattern to produce a frame. In general, frames are refreshed and/or updated with new display data by continually repeating this process at some desired number of frames per second. A wide variety of protocols for driving row and column electrodes of pixel arrays to produce display frames are also well known and may be used in conjunction with the present invention.

Fig. 4, 5A, and 5B illustrate one possible actuation protocol for forming display frames on the 3 x 3 array of fig. 2. FIG. 4 illustrates a possible set of column and row voltage levels that may be used for pixels exhibiting the hysteresis curves of FIG. 3. In the FIG. 4 embodiment, actuating a pixel involves setting the appropriate column to-V_biasAnd sets the appropriate row to + Δ V, -V_biasAnd + Δ V may correspond to-5 volts and +5 volts, respectively. The pixels are relaxed by setting the appropriate column to + V_biasAnd setting the appropriate row to the same + av, producing a zero volt potential difference across the pixel. In those rows where the row voltage is held at zero volts, regardless of whether the column is at + V_biasOr is-V_biasThe pixel is stable in whatever state it was originally in. As also illustrated in FIG. 4, it will be appreciated that voltages of opposite polarity than those described above can be used, e.g., actuating a pixel can involve setting the appropriate column to + V_biasAnd the appropriate row is set to-av. In this embodiment, the pixel is released by setting the appropriate column to-V_biasAnd setting the appropriate row to the same-av, producing a zero volt potential difference across the pixel.

FIG. 5B is a timing diagram showing a series of row and column signals applied to the 3 × 3 array of FIG. 2 that will result in the display arrangement illustrated in FIG. 5A, with the actuated pixels being non-reflective. Prior to writing the frame illustrated in FIG. 5A, the pixels can be in any state, and in this example, all the rows are at 0 volts, and all the columns are at +5 volts. With these applied voltages, all pixels are stable in their existing actuated or relaxed states.

In the fig. 5A frame, pixels (1, 1), (1, 2), (2, 2), (3, 2) and (3, 3) are activated. To accomplish this, during a "line time" for row 1, columns 1 and 2 are set to-5 volts, and column 3 is set to +5 volts. This does not change the state of any pixels, since all pixels remain in the 3-7 volt stability window. Row 1 is then strobed with a pulse that starts at 0 volts, reaches 5 volts, and returns to zero. This activates the (1, 1) and (1, 2) pixels and relaxes the (1, 3) pixel. No other pixels in the array are affected. To set row 2 as desired, column 2 is set to-5 volts, and columns 1 and 3 are set to +5 volts. The same strobe applied to row 2 will then activate pixel (2, 2) and relax pixels (2, 1) and (2, 3). Again, no other pixels of the array are affected. Row 3 is similarly set by setting columns 2 and 3 to-5 volts, and column 1 to +5 volts. As shown in fig. 5A, the row 3 strobe sets the row 3 pixels. After writing the frame, the row potentials are zero, and the column potentials can remain at either +5 or-5 volts, and the display is then stable in the arrangement of FIG. 5A. It will be appreciated that the same procedure can be used for arrays of tens or hundreds of rows and columns. It will also be appreciated that the timing, sequence, and levels of voltages used to perform row and column actuation can be varied widely within the general principles outlined above, and the above example is exemplary only, and any actuation voltage method can be used with the systems and methods described herein.

Fig. 6A and 6B are system block diagrams illustrating an embodiment of display device 40. The display device 40 may be, for example, a cellular or mobile telephone. However, the same components of display device 40 or slight variations thereof are also illustrative of various types of display devices such as televisions and portable media players.

The display device 40 includes a housing 41, a display 30, an antenna 43, a speaker 45, an input device 48, and a microphone 46. The housing 41 is generally formed from any of a variety of manufacturing processes well known to those skilled in the art, including injection molding and vacuum forming. Additionally, the housing 41 may be made of any of a variety of materials including, but not limited to, plastic, metal, glass, rubber, and ceramic, or combinations thereof. In one embodiment, the housing 41 includes removable portions (not shown) that may be interchanged with other removable portions of different color, or containing different logos, pictures, or symbols.

The display 30 of exemplary display device 40 may be any of a variety of displays, including a bi-stable display (as described herein). In other embodiments, the display 30 includes: a flat panel display as described above, such as plasma, EL, OLED, STN LCD, or TFT LCD; or a non-flat panel display such as a CRT or other tube device as is well known to those skilled in the art. However, for purposes of describing the present embodiment, the display 30 comprises an interferometric modulator display, as described herein.

The components of one embodiment of exemplary display device 40 are schematically illustrated in FIG. 6B. The illustrated exemplary display device 40 includes a housing 41 and may include additional components at least partially enclosed therein. For example, in one embodiment, the exemplary display device 40 includes a network interface 27 that includes an antenna 43 coupled to a transceiver 47. The transceiver 47 is connected to a processor 21, said processor 21 being connected to conditioning hardware 52. The conditioning hardware 52 may be configured to condition the signal (e.g., filter the signal). The conditioning hardware 52 is connected to a speaker 45 and a microphone 46. The processor 21 is also connected to an input device 48 and a driver controller 29. A driver controller 29 is coupled to a frame buffer 28 and to an array driver 22, which array driver 22 is in turn coupled to a display array 30. The power supply 50 provides power to all components as required by the particular exemplary display device 40 design.

The network interface 27 includes the antenna 43 and the transceiver 47 so that the exemplary display device 40 can communicate with one or more devices over a network. In one embodiment, the network interface 27 may also have some processing capabilities that alleviate the requirements of the processor 21. The antenna 43 is any antenna known to those skilled in the art for transmitting and receiving signals. In one embodiment, the antenna transmits and receives RF signals according to the IEEE 802.11 standard, including IEEE 802.11(a), (b), or (g). In another embodiment, the antenna transmits and receives RF signals according to the Bluetooth standard. In the case of a cellular telephone, the antenna is designed to receive CDMA, GSM, AMPS or other known signals that are used to communicate within a wireless cellular telephone network. The transceiver 47 pre-processes the signals received from the antenna 43 so that they may be received by and further manipulated by the processor 21. The transceiver 47 also processes signals received from the processor 21 so that they may be transmitted from the exemplary display device 40 via the antenna 43.

In an alternative embodiment, the transceiver 47 may be replaced by a receiver. In yet another alternative embodiment, network interface 27 can be replaced by an image source, which can store or generate image data to be sent to the processor 21. For example, the image source can be a Digital Video Disc (DVD) or a hard-disc drive that contains image data, or a software module that generates image data.

The processor 21 generally controls the overall operation of the exemplary display device 40. The processor 21 receives data, such as compressed image data, from the network interface 27 or an image source, and processes the data into raw image data or into a format that is readily processed into raw image data. The processor 21 then sends the processed data to the driver controller 29 or to frame buffer 28 for storage. Raw data typically refers to information that identifies image characteristics at each location within an image. Such image characteristics may include color, saturation, and gray-scale level, for example.

In one embodiment, the processor 21 includes a microcontroller, CPU, or logic unit to control the operation of the exemplary display device 40. Conditioning hardware 52 generally includes amplifiers and filters for transmitting signals to the speaker 45, and for receiving signals from the microphone 46. Conditioning hardware 52 may be discrete components within the exemplary display device 40, or may be incorporated within the processor 21 or other components.

The driver controller 29 takes the raw image data generated by the processor 21 either directly from the processor 21 or from the frame buffer 28 and reformats the raw image data appropriately for high speed transmission to the array driver 22. Specifically, the driver controller 29 reformats the raw image data into a data flow having a raster-like format, such that it has a time order suitable for scanning across the display array 30. The driver controller 29 then sends the formatted information to the array driver 22. Although a driver controller 29, such as an LCD controller, is often associated with the system processor 21 as a stand-alone Integrated Circuit (IC), such a controller may be implemented in many ways. They may be embedded in the processor 21 as hardware, embedded in the processor 21 as software, or fully integrated in hardware with the array driver 22.

Typically, the array driver 22 receives the formatted information from the driver controller 29 and reformats the video data into a parallel set of waveforms that are applied many times per second to the hundreds and sometimes thousands of leads coming from the display's x-y matrix of pixels.

In one embodiment, the driver controller 29, array driver 22, and display array 30 are appropriate for any of the types of displays described herein. For example, in one embodiment, driver controller 29 is a conventional display controller or a bi-stable display controller (e.g., an interferometric modulator controller). In another embodiment, the array driver 22 is a conventional driver or a bi-stable display driver (e.g., an interferometric modulator display). In one embodiment, the driver controller 29 is integrated with the array driver 22. Such an embodiment is common in highly integrated systems such as cellular phones, watches, and other small area displays. In yet another embodiment, display array 30 is a typical display array or a bi-stable display array (e.g., a display including an array of interferometric modulators).

The input device 48 allows a user to control the operation of the exemplary display device 40. In one embodiment, input device 48 includes a keypad, such as a QWERTY keyboard or a telephone keypad, a button, a switch, a touch-sensitive screen, or a pressure-or heat-sensitive membrane. In one embodiment, the microphone 46 is an input device for the exemplary display device 40. When the microphone 46 is used to input data to the device, voice commands may be provided by a user for controlling the operation of the exemplary display device 40.

The power supply 50 may include a variety of energy storage devices as are well known in the art. For example, in one embodiment, power supply 50 is a rechargeable battery, such as a nickel cadmium battery or a lithium ion battery. In another embodiment, power supply 50 is a renewable energy source, a capacitor, or a solar cell including a plastic solar cell and solar-cell paint. In another embodiment, power supply 50 is configured to receive power from a wall outlet.

In some embodiments, control programmability resides, as described above, in a driver controller which can be located in several locations of the electronic display system. In some embodiments, control programmability resides in the array driver 22. Those skilled in the art will recognize that the above-described optimizations may be implemented in any number of hardware and/or software components and in various configurations.

The details of the structure of interferometric modulators that operate in accordance with the principles set forth above may vary widely. For example, fig. 7A-7E illustrate five different embodiments of the active reflective layer 14 and its support structures. Fig. 7A is a cross-section of the embodiment of fig. 1, wherein a strip of metallic material 14 is deposited on orthogonally extending supports 18. In FIG. 7B, the active reflective layer 14 is attached to supports on tethers 32 only at the corners. In FIG. 7C, the active reflective layer 14 is suspended from a deformable layer 34, which may comprise a flexible metal. The deformable layer 34 is connected to the substrate 20, either directly or indirectly, around the perimeter of the deformable layer 34. These connections are referred to herein as support posts. The embodiment illustrated in FIG. 7D has a support plunger 42 on which the deformable layer 34 rests. The active reflective layer 14 remains suspended over the gap, as in FIGS. 7A-7C, but the deformable layer 34 does not form the support posts by filling holes between the deformable layer 34 and the optical stack 16. Rather, the support posts are formed of a planarization material that is used to form the support plungers 42. The embodiment illustrated in FIG. 7E is based on the embodiment shown in FIG. 7D, but may also be adapted to work with any of the embodiments illustrated in FIGS. 7A-7C, as well as additional embodiments not shown. In the embodiment shown in fig. 7E, additional layers of metal or other conductive material have been used to form the bus structure 44. This allows signals to be routed along the back of the interferometric modulators, eliminating a plurality of electrodes that may otherwise have had to be formed on the substrate 20.

In embodiments such as those shown in FIG. 7, the interferometric modulators function as direct-view devices, in which images are viewed from the front side of the transparent substrate 20 (the side opposite to that upon which the modulator is arranged). In these embodiments, the reflective layer 14 optically shields the portions of the interferometric modulator on the side of the reflective layer opposite the substrate 20, including the deformable layer 34. This allows the shielded areas to be configured and operated upon without adversely affecting image quality. This shielding allows the bus structure 44 in FIG. 7E, which provides the ability to separate the optical properties of the modulator from the electromechanical properties of the modulator (e.g., addressing and the movements resulting from that addressing). This separable modulator architecture allows the structural design and materials used for the electromechanical aspects and the optical aspects of the modulator to be selected and function independently of each other. Moreover, the embodiments shown in FIGS. 7C-7E have additional benefits deriving from the decoupling of the optical properties of the reflective layer 14 from its mechanical properties carried out by the deformable layer 34. This allows the structural design and materials used for the reflective layer 14 to be optimized with respect to the optical properties, and the structural design and materials used for the deformable layer 34 to be optimized with respect to desired mechanical properties.

The following description is directed to methods and devices to provide, monitor, and adapt drive voltages for a wide variety of MEMS elements (e.g., MEMS switches) and other elements having deflecting or deforming electrodes and/or mirrors. Although the specific examples discussed use interferometric modulators as elements, the principles discussed may also be applied to other MEMS elements.

Display devices like those based on interferometric modulator technology can be measured and characterized electronically and/or mechanically. Depending on the display technology, these measurements may form part of the calibration of the display module (the display "module" referred to herein includes the display panel, display drivers, and associated components such as cable lines, etc.), and the measurement parameters may be stored into non-volatile memory (e.g., NVRAM) in the display module for future use. As discussed above with reference to FIG. 3, interferometric modulators operate based on a potential difference applied thereto. FIG. 3 shows an interferometric modulator in a relaxed (or released) state or in an actuated state depending on the magnitude of the potential difference applied between its electrodes. As shown, the change from one state to another occurs according to a hysteresis characteristic with a stability (or hold) window, where the device retains its current state when an applied potential difference is within the hold window. As used herein, "bias voltage" refers to a potential difference that is within a retention window. Thus, as shown in fig. 3, there are five ranges of input voltage differences in some embodiments. Each of the five voltage difference ranges has a header reflecting its effect on the state of the interferometric modulator. Starting from the left side of fig. 3, the five voltage difference ranges are: 1) negative activation ("activation"); 2) negative hold ("stability window"); 3) release ("relaxation"); 4) a positive hold ("stability window"); and 5) positive activation ("activation").

Based on theoretical understanding of the device and past experimental results, an approximation of the threshold between these ranges of input voltage differences can be known, but the threshold voltage can be measured more accurately for better operation of the interferometric modulator array. For example, as further described herein, the threshold may vary from device to device, batch to batch, as a function of temperature and/or as the device ages. Thus, a threshold may be measured for each manufactured device or group of devices. One method of measuring the threshold voltage is to apply inputs of various voltage differences while monitoring the state of the interferometric modulator by observing the optical characteristics of the interferometric modulator. This can be achieved, for example, by human observation or by using an optical measuring device. Additionally or alternatively, the state of the interferometric modulator may be monitored by electronic response measurements. In some embodiments, the array driver 22 of the display array 30 discussed above may be configured to measure the electrical response of the display elements in order to determine the state and/or operating characteristics of the display elements according to the methods discussed below.

Oftentimes, the behavior of the display device changes with the age of the display device, with changes in the temperature of the display, with the content of the image being displayed, and so forth. A display device may have one or more electrical parameters that change with respect to an optical response or optical state. As discussed above, the interferometric modulator is set to the actuated state when the electrostatic attraction between the reflective layer and the optical stack is large enough to overcome the mechanical restoring force that acts to hold the reflective layer in the relaxed state. The structure has capacitance because the reflective layer, the optical stack, and the gap between them form two conductive plates separated by a dielectric. Also, because the capacitance of the structure varies according to the distance between the two plates, the capacitance of the structure varies according to the state of the interferometric modulator. Thus, the indication of capacitance can be used to determine the state of the interferometric modulator.

In one aspect, an indication of capacitance may be obtained, for example, by sensing a current or charge to change an applied voltage between the reflective layer and the optical stack. A relatively high current or amount of charge indicates a relatively large capacitance. Similarly, a relatively low current or amount of charge indicates that the capacitance is relatively small. Sensing of the current or charge may be achieved, for example, by analog or digital integration of a signal representing the charge or current.

Similar characteristics can be applied to LCD display technology, where the capacitance of the device is related to the resulting optical brightness of the cell at a particular temperature. In addition to the possibility that the operating characteristics of the display element may change with age, the operating characteristics may also be affected by the temperature of the display element. The temperature of the display elements may depend on the past optical response state being displayed, and thus, the operating characteristics may vary independently for each display element in the display array of the display device.

In one embodiment, relevant characteristics of the display device, such as the hysteresis voltage and response time of the interferometric modulator MEMS device and the brightness-voltage relationship of the LCD device, are measured during a calibration procedure after factory fabrication. This information may then be stored in the memory of the display module for driving the display device. For example, since the characteristics of a display device may also change with temperature and aging, the effects of temperature and aging on these characteristics (e.g., temperature coefficients) may be studied, measured, and also hardwired or stored in the memory of the display module. However, despite this post-manufacturing characterization, calibration tolerances built into the display device may not allow for unexpected changes in the characteristics of the display device. In some cases, the life and quality of a display device may be improved by performing recalibration of the device after a particular period of use (e.g., a year), on a random length periodic basis, based on changes in temperature, and the like. In other cases, the drive scheme may be robust enough to compensate for changes in the characteristics of the display device without such recalibration. Examples of such recalibration and robust drive schemes are discussed below.

FIG. 8 is a block diagram illustrating an example system 100 configured to drive a display array 102 and measure an electrical response of selected display elements (e.g., interferometric modulators 12a and 12b of FIG. 1). The display array 102 includes m columns by N rows of N component pixels (e.g., N may be 3 display elements including red, green, and blue). The system 100 further includes a column driver including 2 or more digital-to-analog converters (DACs) 104 for supplying two or more drive voltage levels and a column switch subsystem 106 for selecting a column to which a data signal is supplied. The system 100 further includes a row driver circuit including two or more DACs 108 for supplying two or more drive voltage levels and a row switch circuit 110 for selecting which row to gate. Note that the row and column drivers connected directly to the display array in this schematic are shown as being comprised of switches, but the methods discussed below are applicable to alternative driver designs including fully analog display drivers. Note that although drive voltages are discussed herein, other drive signals, such as drive currents or drive charges, may be used.

The row and column driver circuits, including DACs 104 and 108 and switches 106 and 110, are controlled by digital logic of an array driver 112. As discussed above with reference to FIGS. 2 and 3, the row/column actuation protocol contained in the digital logic of the array driver 112 may take advantage of the hysteresis properties of interferometric modulator MEMS devices. For example, in a display array including interferometric modulators 12 having the hysteresis characteristics of FIG. 3, the row/column actuation protocol may be designed such that during row strobing, the display elements in the selected pass that are to be actuated are exposed to an actuation voltage difference (e.g., about 10 volts), and the display elements that are to be relaxed are exposed to a voltage difference of close to zero volts, as shown in FIGS. 4-5. After the strobe, the display element is exposed to a steady state voltage difference called the bias voltage (e.g., about 5 volts) so that it remains in whatever state the row strobe last placed it in. In this example, after being written, each display element sees a potential difference within the "stability window" of 3-7 volts. However, as discussed above, the characteristics of the display elements may change over time and/or temperature, or may respond faster or slower to different drive voltage levels. Thus, depending on the embodiment, the array driver 112 and the DACs 104 and 108 may be configured to supply variable voltage levels.

In addition to the drive circuitry discussed above, including DACs 104 and 108 and switches 106 and 110, and array driver 112, the remaining blocks of system 100 are capable of applying further electrical stimulation to selected display elements, as well as measuring the electrical response of selected display elements in display array 102. In this example, digital-to-analog converters (DACs) 114 and 116 supply additional voltages to the display array 102 through the column and row switches 106 and 110, respectively. In general, these additional voltages may represent internal or external voltage supply inputs to the row and column driver circuitry.

In this example, a direct digital synthesis (DDS1) block 118 is used to generate voltage stimuli that are added above the voltage levels generated by the DACs 114 connected to the column switches 106. The stimulation signal generated by the DDS1 block 118 may be generated by a number of alternative devices, such as an electrical oscillator, a sawtooth waveform generator, etc., as is familiar to those skilled in the art. In various embodiments, the stimulus may be a current or charge, or even a controlled output impedance.

In the example shown in FIG. 8, the electrical response of the display array 102 is measured in the form of current flowing through the display array 102 resulting from the application of voltage stimuli to row and/or column electrodes via row and/or column switches 110 and 106, respectively. Other forms of measured electrical response may include voltage changes, and the like. A transimpedance amplifier 120 (shown in fig. 8 as resistor 120A followed by amplifier 120B) may be used to measure the electrical response. The display element to which the measured electrical response corresponds depends on the state of the column and row switches 106, 110. In alternative embodiments, analog, digital, or mixed signal processing may be used for the purpose of measuring the electrical response of the display array 102.

In one embodiment, the electrical response of the display element is measured directly by measuring the current through the input terminals of the transimpedance amplifier 120. In this embodiment, the profile and/or peak or other characteristics known to the skilled artisan may be used to identify particular operating characteristics of the display element.

In another embodiment, the operating characteristics of the display element being measured may be characterized by additional post-processing of the electrical response output from the transimpedance amplifier 120. Examples of using post-processing techniques to characterize the capacitive and resistive components of the impedance of interferometric modulators using the circuit of FIG. 8 are now discussed.

Since the interferometric modulator can be viewed as a capacitor, periodic stimulation (e.g., stimulation that can be applied using DDS 1118) will produce a periodic output electrical response with a 90 ° phase lag. For example, the DDS1118 may apply a sinusoidal voltage waveform sin (wt) to the column electrodes of the display elements. For an ideal capacitor, the electrical response of the display element will be the time derivative of the applied stimulus or cos (wt). Therefore, the output of the transimpedance amplifier 120 will also be a cosine function. A second DDS (DDS2)122 applies a cosine voltage waveform which is multiplied with the output of the transimpedance amplifier 120 at multiplier 124. The result is a waveform with a constant component and a periodic component. The constant component of the output of multiplier 124 is proportional to the capacitance of the display element. Filter 126 serves to filter out periodic components and to generate electrical signals that are used to characterize the capacitance of the display element and thus the activated or deactivated state.

For a display element that is an ideal capacitor, the output of the transimpedance amplifier 120 is a pure cosine function for the example where the applied stimulus is a sine function. However, if the display element exhibits any non-capacitive impedance, e.g., due to leakage, the output of the transimpedance amplifier 120 will also contain a sinusoidal component. This sinusoidal component does not affect the measurement of capacitance as it will be filtered out by filter 126. The sinusoidal component may be detected and used to characterize the resistive portion of the impedance of the display element.

A periodic voltage waveform (e.g., sin (wt)) similar to the stimulus applied by DDS1 is multiplied by the output of transimpedance amplifier 120 at multiplier 128. The result is an electrical response that includes a constant component and a periodic component. The constant component is proportional to the resistive portion of the impedance of the display element being measured. Filter 130 is used to remove periodic components, producing a signal that can be used to characterize the resistive portion of the impedance of the display element.

The output of the filter is converted to the digital domain using a dual mode/digital converter (ADC) 132. The output of the dual ADC 132 is received by the array driver 112 for performing the methods discussed below.

In the example circuit shown in FIG. 8, a characterization stimulus is applied to the column electrodes and an electrical response is measured via the row electrodes. In other embodiments, the electrical response may be measured from the same electrode, row, or column to which the stimulus is applied, for example. FIG. 9 is a block diagram illustrating an example of a circuit 150, which circuit 150 may be used to measure the electrical response of a selected display element (e.g., in the interferometric modulator display device of FIG. 2) via the same circuit used to apply a stimulus to the selected display element. The circuit 150 includes transistors N1 and P1 that mirror current from current source transistors N2 and P2, with current source transistors N2 and P2 used to drive V applied to the display element_outA signal. Thus, current I_outIs substantially equal to for driving V_outThe current of the signal.Thus, measure I_outThe electrical response of the signal may be used to determine an operating characteristic of the interferometric modulator, such as whether the interferometric modulator is in a high capacitance state or a low capacitance state. Other circuits may also be used. The circuit 150 shown in fig. 9 is suitable for use in alternative driver IC designs or driving schemes for supplying the voltage waveform V_out. The circuit 150 depicted in the schematic diagram of FIG. 9 may be used in a current conveyor circuit and in a current feedback amplifier, and may apply a voltage stimulus to the display array area for the purpose of electrical sensing while copying the current (response) to a different pin (I)_out)。

There are several ways in which the measured electrical response (e.g., sensed by the systems shown in fig. 8 and 9) can be used as a feedback signal to affect the operation of the display driver circuit. For example, the measured information may be analyzed in the digital domain and then used to adaptively drive the display array 102, e.g., using digital logic of the array driver 112 and/or a processor configured to control the array driver 112 (e.g., the processor 21 and the array driver 22 shown in FIG. 2). The measured electrical response may also be used to complete a feedback loop in the analog domain (e.g., using the output of DACs 104, 114, 108, and/or 116, or using the output of DDS1118 shown in fig. 8). An example of a method of driving an interferometric modulator display element using measured electrical response as feedback is illustrated in FIGS. 10A-10C.

FIG. 10A is a flow diagram illustrating an example of a method 200A of driving a display element (e.g., an interferometric modulator as illustrated in FIG. 1) in which a ramped drive voltage is used. In one embodiment, the method 200A may be performed by the array driver 112 for controlling the drive circuits shown in FIG. 8 (e.g., the DACs 104, 108, and 114, the switches 106 and 110, and the DDS 1118) to display an image on the display array 102. In other embodiments, a processor, such as processor 21 in FIG. 2, may perform method 200A. Method 200A provides a method of adapting a drive voltage level by applying a gradually increasing or decreasing voltage waveform to a display element and interrupting the application of the voltage waveform when a change of state of the display element is sensed. In this way, the applied voltage, including the drive voltage to activate or deactivate the display element, can only be changed as much as needed, thereby saving power.

The method 200A begins at block 202, where the array driver 112 applies a drive voltage between a first electrode and a second electrode of a display element. The first electrode may be one of the active reflective layers (column electrodes) 14 of the interferometric modulator 12 illustrated in FIG. 1, and the second electrode may be one of the row electrodes 16 of the interferometric modulator 12 illustrated in FIG. 1. The drive voltage applied at block 202 may be a voltage within a hysteresis window (e.g., 3-7 volts as discussed above) at a bias voltage, or alternatively may be a static voltage level outside the hysteresis window. As used herein, a quiescent voltage is a voltage that does not change over time (e.g., over an activation period). The static drive voltage difference applied to the two electrodes at block 202 may be supplied to the column and/or row electrodes, respectively, by one or more of DACs 104 or 108 (FIG. 8).

After applying the initial drive voltage at block 202, the method 200A continues at block 204, where the array driver 112 ramps the level of the drive voltage from a first level (e.g., the static voltage level applied at block 202) to a second level. FIG. 11A is an illustration of an example of a ramped voltage waveform for driving a display element that can be used in method 200A. In fig. 11A, the initial drive voltage applied at block 202 is a 5 volt bias voltage 302 (the quiescent voltage applied in block 202). At about 2ms, the ramping voltage waveform 304 is applied at block 204 in method 200A. The ramping voltage waveform 304 continues to increase until the measured electrical response, as sensed by an electrical sensing feedback circuit, such as the transimpedance amplifier 120 in fig. 8, monitors the electrical response of the display element at block 206. For example, the transimpedance amplifier 120 can sense a change in current to or from a display element, indicating a change in state of the display element.

In this example, the monitored electrical response is indicative of a change in state of the interferometric modulator 12 of FIG. 1. FIG. 11B is an illustration of a sensed electrical response that may be sensed by an electrical sensing feedback circuit connected to a drive circuit of a display element using the method 200A illustrated in FIG. 10A. At about 4ms, the sensed current shows a sharp rise 306 to a level of about +5 milliamps. The sensitivity of the amplifier to the sensed current may depend on the resistance of the circuit being used for sensing. For example, in an embodiment such as that shown in fig. 8, depending on the feedback circuit, the resistance of resistor 120A may be selected to produce an output amplitude that may be readily measured. Upon detecting a rise 306 in the sensed current in block 206, the method 200A continues to block 208, where the ramping voltage waveform is interrupted as shown at 308 in FIG. 11A and reduced to a static (bias) voltage level of 5 volts at 310 to allow the interferometric modulator to remain in the actuated state. In the example shown in FIG. 11A, the ramping voltage produces actuation of the display element at about 6 volts. This is merely an example actuation level, and other levels of voltage may produce actuation depending on the design of the display element.

Although described above with respect to an activation signal, a release signal may also be applied by the array driver 112 at block 202 of the method 200A. For example, as shown in fig. 11A at about 6ms, the release procedure is initiated, and the ramping voltage waveform 312 is applied. The ramp voltage 312 applied at block 204 of the method 200A reduces the drive voltage from the initial 5 volts (applied at block 202) to about 4 volts. When the ramping voltage waveform reaches about 4 volts, the interferometric modulator 12 releases and the inductive circuitry measures 314 a sharp drop to a level of about-3 milliamps of the sensed current (sensed at block 206), indicating that the display element has been released. Upon sensing a drop in current at 314 due to a change in IMOD state, the method 200A continues to block 208 where the ramping drive voltage waveform is interrupted and the drive voltage is reduced at 318 (see 316) to a 5 volt bias voltage level so that the display element remains in the released state. Again, the voltage and current levels shown in FIG. 11 are merely exemplary, and other levels may indicate activation and/or release of display elements. The ramped voltage waveform applied at block 204 may be applied using the DDS1118 illustrated in fig. 8.

In some embodiments, the rate of increase or decrease of the ramping voltage waveform is at a predetermined rate that is slow relative to the response time of the display element when an activation and/or release event occurs. In this manner, changes in voltage levels from bias levels to actuation and/or release voltage levels may be minimized. In another embodiment, the rate of increase and/or decrease of the ramping voltage waveform is calibrated and selected in order to achieve a desired operating characteristic, such as response time, of the display element.

FIG. 10B is a flow chart illustrating a method 200B of calibrating a drive voltage for driving a display element. In one embodiment, method 200B may be used to determine an operating threshold drive voltage based on a desired operating characteristic (e.g., response time) of a display element. Method 200B includes a calibration portion (blocks 220-234) that may be performed at the time of display element manufacture for initial calibration in one embodiment. In this embodiment, process 200B may be performed by an external processor (e.g., a test stand) connected to the display array.

In another embodiment, calibration blocks 220-234 may also be included in the logic coupled to the display array so that calibration may be performed at other times in order to recalibrate the display elements. For example, recalibration may be performed on a periodic basis, based on age of the display element, on a pseudo-random basis, based on temperature, and so forth. In this embodiment, method 200B may be performed using array driver 112 for controlling the drive circuits shown in fig. 8 (e.g., DACs 104, 108 and 114, switches 106 and 110, and DDS 1118) to display an image on display array 102. In other embodiments, a processor, such as processor 21 in FIG. 2, may perform method 200A. After calibration, the array driver 112 may determine drive voltages (e.g., initial drive voltage levels and/or ramp voltage rates) in order to achieve desired operating characteristics.

At block 220, the array driver 112 applies a drive voltage between the first and second electrodes of the display element. The first electrode may be one of the active reflective layers (column electrodes) 14 of the interferometric modulator illustrated in FIG. 1, and the second electrode may be one of the row electrodes 16 of the interferometric modulator illustrated in FIG. 1. The drive voltage applied at block 220 may be a quiescent voltage at a bias voltage level within a hysteresis window (e.g., 3-7 volts as discussed above), or alternatively may be a quiescent voltage outside of the hysteresis window. By selecting different static voltage levels outside the hysteresis window, the operating characteristics of the display element in response to a static (i.e. non-ramping) drive voltage can be determined. The operating characteristics that may be affected by the various quiescent drive voltage levels applied at block 220 include response time, maximum sensed current level, amount of stiction, release voltage level, activation voltage level, and the like. Static drive voltage differences applied to the two electrodes at block 220 may be supplied to the column and/or row electrodes by one or more of the DACs 104 or 108, respectively.

At block 222, the array driver 112 ramps the level of the drive voltage from a first level (e.g., the static voltage level applied at block 202) to a second level. The rate at which the ramp voltage level is increased or decreased (the slope of the ramp) may vary for a plurality of calibration tests. In this way, the operating characteristics of the display element can be determined for various ramp voltage rates. Operating characteristics that may be affected by the various ramp voltage rates applied at block 222 include response time, maximum current level, amount of stiction, release voltage level, activation voltage level, and the like. The ramped voltage waveform applied at block 222 may be applied using DDS1118 illustrated in fig. 8.

In some embodiments, where DDS1118 is faster than DAC 114, DDS1118 is used to supply the variable portion of the signal and DAC 114 is used to supply the static portion of the signal. Additionally, in some embodiments, DDS1118 may be configured to autonomously generate waveforms. In some embodiments, the DDS is configured to generate a static voltage, and one or more DACs may be used to generate a variable portion of the signal. In some embodiments, one or more DACs or DDSs may be used to generate either or both of the variable and static portions of the signal.

The method 200B continues at block 224, where the array driver 112 monitors an electrical sensing feedback circuit (e.g., the transimpedance amplifier 120) to see the electrical response of the display element. The monitoring function performed at step 224 is similar to that discussed above with reference to block 206 of method 200A. For example, the transimpedance amplifier 120 can sense a change in current to or from a display element, indicating a change in state of the display element. At block 226, the array driver 112 receiving the monitored electrical response detects a change in state of the display element. The change of state may be an activation or a release of the display element. Upon detecting a change in the state of the display element at block 226, the array driver 112 interrupts the ramping of the drive voltage at block 228 (if a ramping voltage is applied at block 222), and the method 200B continues to block 230 where information indicative of the drive voltage is stored, such as the quiescent voltage level applied at block 220 and/or the ramping voltage rate applied at block 222. Additionally, at block 230, the array driver 112 stores information indicative of the change in state of the display elements and (optionally) the operating characteristics of the display elements.

The remaining blocks of FIG. 10B are discussed with reference to FIG. 12. In one embodiment, the response time of the display element is monitored. Fig. 12 illustrates examples of drive voltage waveforms for driving display elements and corresponding electrical responses sensed in drive circuitry connected to the display elements (e.g., row electrodes and/or column electrodes in row switch 110 or column switch 106), such as may be used in the methods illustrated in fig. 10A and 10B. The example of fig. 12 shows the drive voltage transitioning from a bias voltage level at which the display element is stable (e.g., in a released state). At time 320, a static drive voltage is applied that produces activation of the display element (e.g., at block 220 in method 200A). The sensed electrical response (current in this example) exhibits a first current spike 322 indicating that the voltage across the electrodes has suddenly changed, followed by a current "bump" 324 indicating an activation event. The time between the current spike 322 and the current bump 324 is indicative of the response time (operating characteristic) of the display element in response to the applied drive voltage. After the current bump 324 is sensed by the inductive circuitry, the drive voltage is interrupted at block 228 (FIG. 10B) and returned to the bias voltage level at 326. When the drive voltage is reduced to the bias voltage level at 326, the sensed electrical response exhibits another spike 328, which spike 328 indicates that the voltage difference between the electrodes of the display element has suddenly decreased.

The determination of the response time of the display element is an example of one type of operating characteristic that may be determined at block 226 (FIG. 10B) and stored at block 230 with reference to the applied voltage levels (static voltage levels and/or ramp voltage rates). In some embodiments of display array 202, response time is reduced at higher or faster ramping voltage levels (e.g., where strong electrostatic attraction causes the movable element to switch states quickly, where the spring constant of the restoring mechanical element is reduced at higher temperatures, etc.). Other operating characteristics that may be determined and stored with reference to the applied voltage waveform include a maximum sense current level, an amount of stiction, a release voltage level, an activation voltage level, and so forth. At decision block 234, the array driver 112 controlling the calibration method 200B determines whether more calibration conditions remain to be tested. If more tests remain, blocks 220 through 234 are repeated for a number of drive cycles until no more tests remain, and the method 200B proceeds to block 236.

At block 236, the array driver 112 determines the drive voltages (the static voltage level applied at block 220 and/or the ramping voltage rate applied at block 222) to achieve the desired operating characteristics based on the information stored at block 230. For example, it may be desirable to achieve a response time below a particular time threshold in order to display images faster on a display array that includes display elements for which drive voltages and characteristics have been calibrated. In another example, it may be desirable to keep the peak current level below a certain value in order to keep the temperature below a certain level.

In some embodiments, the methods 200A and 200B may be performed consistently. For example, the function performed at block 236 may be performed in conjunction with the method 200A to perform the activation and release functions of the display element until another calibration process is performed at a later time (e.g., the functions at blocks 220-234). It should be noted that certain blocks of the methods 200A and 200B may be omitted, combined, rearranged, or a combination thereof.

The methods illustrated in fig. 10A and 10B are examples of methods of providing feedback by sensing the electrical response of the drive circuit, for example, if the feedback detects that the display element has been properly actuated or relaxed in response to a given drive voltage. Another embodiment provides feedback that can be used to sense when a display element has not been properly activated or released. The feedback may be used to adjust the drive voltage to correct erroneous activation and/or release states.

FIG. 10C is a flow chart illustrating another method 200C of calibrating a drive voltage for driving a display element, the method 200C including adjusting the drive voltage based on identifying an error condition in driving the display element. In one embodiment, method 200C may be used to calibrate the drive voltages for a particular display element during or after manufacture of the display array for initial testing. This method may be performed in parallel with the method 200B discussed above. In this embodiment, process 200C may be performed by an external processor (e.g., a test stand) connected to the display array. In another embodiment, method 200C may be used to adjust the drive voltage of a display element upon detecting a failure to activate the display element during operation while array driver 112 is driving display array 102 to display an image. This latter embodiment will be discussed in the example shown in FIG. 10C.

Method 200C begins at block 250 with array driver 112 applying a drive voltage between a first electrode and a second electrode of a display element, where the drive voltage is at a level predetermined to cause the display element to be in a first display state of a plurality of display states. The first electrode may be one of the active reflective layers (column electrodes) 14 of the interferometric modulator 12 illustrated in FIG. 1, and the second electrode may be one of the row electrodes 16 of the interferometric modulator 12 illustrated in FIG. 1, or vice versa. The drive voltage applied at block 250 may be at a level that has been predetermined to produce actuation of the released display element (e.g., a voltage magnitude above the bias voltage range), a level that has been predetermined to produce release of the actuated display element (e.g., a voltage level with a magnitude below the bias voltage range), or a voltage level that has been predetermined to hold the display element in the current display state (e.g., a voltage magnitude within the bias voltage hysteresis window as discussed above).

As discussed above with reference to FIG. 12, the release and/or activation of a display element may be identified by observing particular electrical response characteristics that may be measured by a feedback circuit. At block 252, an electrical response of the display element in response to the drive voltage applied by the drive circuit at block 250 is measured using a feedback circuit. The feedback circuit may include elements such as the transimpedance amplifier 120 in fig. 8. At block 254, the processor receives information indicative of the electrical response measured at block 252. The array driver 112 analyzes the characteristics of the measured electrical response in order to identify an operational error of the display element.

Examples of correct activation and false activation of display elements will now be discussed. FIG. 13A illustrates an example of drive voltage waveforms and corresponding electrical responses indicative of correct actuation of interferometric modulators, such as may be used in the method 200C illustrated in FIG. 10C. In this example, the released interferometric modulator 12 is driven to move from the released state to the actuated state. The initial voltage difference between the two electrodes is at level 331, which level 331 is below the activation voltage threshold level (e.g., within the bias voltage level) V in FIG. 13A_act. At time point 330, the driving voltage is increased to be higher than V_actLevel 333. Beginning at time point 330, the feedback circuit measurement (current in this example) shows an initial spike 332 followed by a second bump 334. The second bump indicates that the interferometric modulator 12 has been properly activated. At a second point in time 336, the drive voltage is reduced below V_actLevel 331 (within the bias voltage region). At time point 336, the feedback current exhibits a single spike 338. Does not have the similarity toA second bump of bumps 334 in the feedback current. This absence of the second protrusion indicates that the display element remains properly in the activated state after time point 336.

FIG. 13B illustrates an example of a drive voltage waveform and corresponding electrical response indicative of an example of erroneous activation of the interferometric modulator 12, such as may be used in the method illustrated in FIG. 10C. This example is where the bias voltage level is incorrectly calibrated at a level that is outside the bias voltage window. The interferometric modulator 12 may not calibrate properly due to changes in the characteristics of the display element, for example, due to the age and/or temperature of the display element.

In this example, the initial voltage between the electrodes is at a level 340 that is lower than the "bias voltage level" (i.e., the level that maintains the interferometric modulator 12 in the current state). At time point 342, the voltage between the electrodes increases above the activation voltage level V_actTo activate the interferometric modulator 12. The feedback current exhibits a first spike 346 followed by a second bump 348, the second bump 348 indicating proper activation of the interferometric modulator 12.

At a second point in time 350, the voltage between the electrodes returns to the initial voltage level 340. The feedback current exhibits a first spike 352 followed by a second bump 354. This indicates that the interferometric modulator 12 has been lowered to be within the bias voltage window (at voltage level V) due to the voltage_relAnd V_actIn between) an external level 340. By detecting the current bump, the array driver 112 may identify that an error has occurred at block 254 of method 200C. Upon identifying that an operational error of the interferometric modulator 12 has occurred, the array driver 112 may adjust the drive voltage to be at greater than V at block 256_relAnd is less than V_actThereby producing a properly tuned interferometric modulator 12 that remains activated. The array driver 112 may determine the adjusted drive voltage level using a method such as discussed above with reference to FIG. 10B.

A skilled artisan will be readily able to identify the correct actuation voltage threshold of the interferometric modulator 12 using a similar method. For example, if the interferometric modulator 12 is in the actuated state and the drive voltage applied between the electrodes should cause the interferometric modulator 12 to release, but the interferometric modulator 12 is not, the array driver 112 may adjust the voltage to a lower level at block 256 until the interferometric modulator 12 releases correctly. In another example, if the interferometric modulator 12 is in the released state and the applied voltage should actuate the interferometric modulator 12 at block 250, but the interferometric modulator 12 is not actuated, the array driver 112 may adjust the drive voltage to a higher value at block 256 until the interferometric modulator 12 actuates correctly.

In one embodiment, the method 200C includes an optional block 258 in which the array driver 112 stores information indicative of the adjusted drive voltage for later use. The adjusted voltages may be stored with information that makes them cross-referenced with a particular interferometric modulator 12. The array driver 112 may then use the adjusted value at a later time when the particular interferometric modulator 12 is being actuated and/or released again. Depending on the embodiment, the voltage levels stored at optional block 258 may include bias voltage levels, release voltage levels, and/or actuation voltage levels.

FIG. 14 is a flow diagram illustrating an example of a method 500 for driving an interferometric modulator 12 and measuring the electrical response of the interferometric modulator 12 to determine a drive voltage to achieve a desired operating characteristic, wherein the drive voltage causes a display state transition that is substantially undetectable to human vision. In one embodiment, the method 500 enables a drive voltage level and/or a ramping drive voltage rate (as discussed above with reference to the method 200A of FIG. 10A and the method 200B of FIG. 10B) to be characterized during operation of the display array 102 in order to quickly adapt to changes in drive voltage. The drive voltage level may change due to changing conditions, such as age and/or temperature of the interferometric modulator 12. The method 500 may be performed by the array driver 112 for controlling the drive circuits shown in fig. 8 (e.g., DACs 104, 108, and 114, switches 106 and 110, and DDS 1118) to display an image on the display array 102. In other embodiments, a processor, such as processor 21 in FIG. 2, may perform method 500.

At block 502, the array driver 112 (FIG. 8) applies a voltage waveform between the first and second electrodes of the interferometric modulator 12, wherein the voltage waveform changes the state of the interferometric modulator 12 from a first state to a second state and back to the first state. The voltage waveform applied at block 502 causes the interferometric modulator 12 to change from the released state to the actuated state and back to the released state, or vice versa. In other words, the optical characteristics of the selected interferometric modulator 12 (or interferometric modulators 12) are momentarily disturbed due to the measurement of the electrical response of the interferometric modulator 12, but the interferometric modulator 12 quickly returns to displaying the original optical response, so that a human observer is unaware of the change in state. As mentioned above, in some embodiments, the interferometric modulator 12 may switch states at 10kHz (much faster than visually detectable by humans). Note that when a new image is "peeled" across the display array (e.g., via a line-at-a-time drive scheme), it is often desirable that the human user should not be able to perceive the process of overwriting one image with another. For this purpose, a suitably fast scan rate or cleaving rate is selected. When the image content is changing anyway, slight momentary disturbances of the content for measurement purposes can easily be left undetected to the user.

FIG. 15 illustrates an example of drive voltage waveforms and corresponding sensed electrical responses that may be used at block 502 in the method 500 illustrated in FIG. 15. In this example, a sawtooth voltage waveform 520 is applied between the electrodes of the display element. In one embodiment, the applied voltage waveform at block 502 has a duration less than about 400 microseconds from start to finish. However, some embodiments may use a voltage waveform having an end-to-end duration of from about 400 microseconds to about 4000 microseconds or more. Waveform 520 shows the display element's release voltage (V) due to the voltage level being below that of the display element_rel) Is in the released state. Waveform 520 is followed by rampGoes up to a level higher than the activation voltage (V)_act) 524, and then ramps down to a level 526 below the Vrel level. Thus, the display element transitions from the released state to the activated state and back to the released state, the transition being faster than detectable by the user.

For example, other waveform shapes such as square waves and sine waves may be applied at block 502 in method 500. The particular waveform selected may depend on the particular technique and algorithm chosen. The mechanism to apply the waveform may be similar to that described above with reference to fig. 8.

While the voltage waveform is being applied at block 502, a feedback circuit (e.g., transimpedance amplifier 120) is monitored at block 504 to measure the electrical response of the display element in response to the applied waveform. As discussed above with reference to the methods illustrated in FIGS. 10A, 10B, and 10C, the current of a display element may be monitored to determine whether and when the element releases and/or activates in response to a given voltage level and/or voltage ramp rate. In FIG. 15, the sensed current is typically exhibited at a voltage level exceeding V_actPeak 528 of time and when the voltage drops below V_relAnother peak 530. The current peak 528 indicates that the display element has transitioned from the released state to the activated state. The current peak 530 indicates that the display element has transitioned back to the released state. The timing of the sensed current peaks exhibits different characteristics as a function of the timing of the activation and/or release of the display elements in response to the applied voltage waveform.

The feedback circuit discussed above with reference to fig. 8 may be used to measure the electrical response at block 204. The array driver 112 receives information indicative of the electrical response measured at block 504 and determines at least one operating characteristic of the display element based on the measured electrical response at block 506. The response time of the display element may be determined at block 506. The response time may vary based on the applied peak voltage level and/or the voltage ramp rate. Additionally, the operating characteristics may include one or more of a release voltage level, an actuation voltage level, and a bias voltage level. These voltage levels may also vary with the temperature of the display element, the age of the display element, etc.

At optional block 508, the array driver 112 may store information indicative of the operating characteristics determined at block 506, and store information indicative of the voltage levels applied at block 502 to which the operating characteristics correspond. The voltage level information stored at block 508 may include peak voltage level, voltage ramp rate, voltage waveform shape, voltage waveform duration, and others. The operating characteristic information stored at block 508 may include response times to activate or deactivate display elements, activation voltage levels, deactivation voltage levels, bias voltage levels, and the like. The release and actuation voltage levels may also be a function of the ramping voltage rate of the waveform, and this information may also be stored at block 508.

After the information has been stored at block 508, the method 500 optionally continues to block 510, where the array driver 112 may determine a drive voltage level and/or ramp rate to be applied to the display elements based on the information stored at block 508 and the desired operating characteristics. In one embodiment, the operating characteristic may simply be the activation or release of the display elements in order to adapt these voltage levels to changing environmental conditions or age of the interferometric modulator 12. In this embodiment, the processor or array driver may determine a minimum voltage amplitude to activate the display elements. In another embodiment, the operating characteristic may be a desired response time. In this embodiment, the voltage level and/or voltage ramp rate that best provides the desired response time is determined at optional block 510.

The functions performed at blocks 502, 504, 506, and (optionally) 508 may be performed on a periodic basis, on a pseudo-random basis, based on a temperature level or temperature change of the display element or display device, based on an age of the display element, or on other basis.

The determination of the drive voltage level at optional block 510 may be performed just prior to the array driver 112 signaling the display elements to display image data during the normal image write phase. The determination of the drive voltage level at optional block 510 may also be performed on a periodic basis, on a pseudo-random basis, based on a temperature level or temperature change of the display element or display device, or based on an age of the display element.

Each of the methods discussed above with reference to FIGS. 10A, 10B, 10C, and 14 involves measuring the electrical response of the display element. There are various ways of sensing different portions of a display array of display elements. For example, one may choose to sense the entire display array in one test. In other words, the feedback signals from all row electrodes (or column electrodes) may be electrically connected to the transimpedance amplifier 120 shown in fig. 8 at all times. In this case, the timing of signaling the column electrodes and signaling the rows may be synchronized by the array driver so that individual display elements, pixels, or subpixels (e.g., red, green, and blue subpixels) may be monitored at a particular time. One may also choose to monitor or measure one or more specific row or column electrodes at one time, and optionally switch to monitor other row and column electrodes at other times, and repeat for different rows and/or columns until the entire array is monitored. Finally, individual display elements can also be selected for measurement and optionally switched to monitor or measure other display elements until the entire array is measured.

In one embodiment, one or more selected row or column electrodes may be permanently connected to stimulation and/or sensing circuitry, while the remaining row or column electrodes are not connected to stimulation and/or sensing circuitry. In some embodiments, additional electrodes (rows or columns) are added to the display area for the purpose of applying stimulation or sensing. These additional electrodes may or may not be visible to a viewer of the display area. Finally, another option is to connect or disconnect stimulation/drive and/or sensing circuitry and a different set of one or more row or column electrodes via switches or alternative electrical components.

The embodiments of the systems and methods discussed above may be applied to monochrome, bi-color, or multi-color displays. In some embodiments, groups of pixels of different colors are measured by appropriate selection of row and column electrodes. For example, if the display uses an RGB layout, with red (R), green (G), and blue (B) sub-pixels positioned on different column lines, the area of individual colors can be measured by applying stimuli only to the 'red' columns and sensing on the rows. Alternatively, the stimulus may be applied to the row, but only sensed on the 'red' column.

In many display technologies, application of a drive pulse to a given row or column can result in undesirable effects on adjacent rows or columns. This undesirable effect is commonly referred to as crosstalk. Crosstalk affects many display technologies including IMODs, LCDs, and OLEDs. In one embodiment, sensing or feedback circuitry is provided to sense the presence of these undesirable effects and compensate. Signals from the region of interest may be isolated from signals or interference from other regions of the display via various methods.

FIG. 16A is a block diagram illustrating an example of circuitry for driving isolated portions of a display array and for sensing the electrical response of isolated regions. Stimulating V with voltage_inIs applied to a selected set of column electrodes 540 and current signals are sensed from the selected set of row electrodes 544 via a transimpedance amplifier 542 having a low input impedance (Z). Thus, the display area 550 is sensed. Display areas 555 and 560 are the unsensed portions of column electrode 540 and row electrode 544, respectively.

FIG. 16B illustrates circuitry 580, circuitry 580 illustrating the electrical relationship of the capacitance of the sensed display region 550 to the capacitance of the non-sensed display regions 555 and 560. Capacitor C2 represents the capacitance of display area 555, C3 represents the capacitance of display area 560, and C1 represents the capacitance of isolated and sensed display area 550. The current consumed by C2 is V_inSupplied and directly grounded. The current through C1 (which is the desired current to be sensed) is also represented by V_inSupplied, but before it reaches the transimpedance amplifier 542, may be affected by the capacitance C3. However, the current through C1 may be forced to flow almost completely to the transimpedance amplifier 542 via selection of a suitably low input impedance of the transimpedance amplifier 542 as compared to the impedance of the capacitance C3. In this case, there is substantially no signal current through C3. Thus, according to example circuit 580, the amplifier only senses the current through C1 (region 555). Any area of the display may be selected via corresponding selection of row and column electrodes. Note that in the example circuit of fig. 16B, the remaining electrodes not included in isolation region 550 are depicted as being connected to ground, however, the remaining electrodes may be connected to any voltage level.

While the above detailed description has shown, described, and pointed out novel features as applied to various embodiments, it will be understood that various omissions, substitutions, and changes in the form and details of the device or process illustrated may be made without departing from the disclosure. As will be recognized, the present invention may be embodied within a form that does not provide all of the features and benefits set forth herein, as some features may be used or practiced separately from others.

Claims (19)

1. A method, comprising:

applying a signal between a first electrode and a second electrode of a display element, wherein the signal is at a level that causes the display element to be in a first display state of a plurality of display states;

applying a second signal between the two electrodes to transition the display element from one state to the other;

measuring an electrical response of the display element in response to the applied second signal;

identifying whether the display element has reached a desired final state based on the measured electrical response; and

adjusting the second signal if the display element has not reached the desired final state.

2. The method of claim 1, wherein the first state is an actuated state and the identified error is a failure to relax the display element from the actuated state, the method further comprising adjusting the second signal to a lower level in response to identifying the failure to relax the display element.

3. The method of claim 1, wherein the first state is a relaxed state and the identified error is a failure to activate the display element, the method further comprising adjusting the second signal to a higher level in response to identifying the failure to activate the display element.

4. The method of claim 1, wherein the second signal is a bias voltage level that causes the display element to remain in the first state, the first state being an actuated state, the identified error being the display element relaxes, the method further comprising adjusting the second signal to a higher level.

5. The method of claim 1, wherein the second signal is a bias voltage level that causes the display element to remain in the first state, the first state being a released state, the identified error being an activation of the display element, the method further comprising adjusting drive to a lower level.

6. The method of claim 1, further comprising storing information indicative of an adjusted drive voltage.

7. An apparatus, comprising:

a drive circuit configured to apply a signal between a first electrode and a second electrode of a display element, wherein the signal is at a level that causes the display element to be in a first display state of a plurality of display states;

a feedback circuit configured to measure an electrical response of the display element in response to the applied signal; and

a processor configured to control the drive circuitry, receive information indicative of the measured electrical response, identify an operational error of the display element based on the measured electrical response, and adjust a drive signal of the display element in response to the identified error.

8. The apparatus of claim 7, wherein the first state is an actuated state and the identified error is a failure to relax the display element from the actuated state, and the processor is further configured to adjust the signal to a lower level in response to identifying a failure to the release.

9. The apparatus of claim 7, wherein the first state is a relaxed state and the identified error is a failure to activate the display element, and the processor is further configured to adjust the signal to a higher level in response to identifying the failure to activate the display element.

10. The apparatus of claim 7, wherein the signal is a bias voltage level that causes the display element to remain in the first state, the first state is an actuated state, the identified error is the display element relaxing, and the processor is further configured to adjust the signal to a higher level.

11. The apparatus of claim 7, wherein the signal is a bias voltage level that causes the display element to remain in the first state, the first state being a relaxed state, the identified error being an activation of the display element, the processor further configured to adjust the signal to a lower level.

12. The apparatus of claim 7, wherein at least a portion of the feedback circuit comprises a portion of the drive circuit associated with at least one of the first and second electrodes.

13. The apparatus of claim 7, wherein the processor is further configured to store information indicative of the adjusted signal.

14. A display device, comprising:

means for applying a signal between a first electrode and a second electrode of a display element, wherein the signal is at a level that causes the display element to be in a first display state of a plurality of display states;

means for measuring an electrical response of the display element in response to the applied signal;

means for identifying an operational error of the display element based on the measured electrical response and for adjusting the signal in response to the identified error.

15. A display device, comprising:

an array of interferometric modulators;

a drive circuit configured to apply a signal between a first electrode and a second electrode of a display element, wherein the signal is at a level that causes the display element to be in a first display state of a plurality of display states;

a feedback circuit configured to measure an electrical response of the display element in response to an applied drive voltage;

a processor configured to control the drive circuitry, receive information indicative of the measured electrical response, identify an operational error of the display element based on the measured electrical response, and adjust the signal in response to the identified error; and

a memory device configured to communicate with the processor.

16. The display device of claim 15, further comprising a controller configured to send at least a portion of image data to the drive circuit.

17. The display device of claim 15, further comprising an image source module configured to send the image data to the processor.

18. The display device of claim 17, wherein the image source module includes at least one of a receiver, transceiver, and transmitter.

19. The display device of claim 15, further comprising an input device configured to receive input data and to communicate the input data to the processor.