HK1149649B

HK1149649B - A method for implementing wireless communication and a communication system

Info

Publication number: HK1149649B
Application number: HK11103760.9A
Authority: HK
Inventors: 阿玛德雷兹‧罗弗戈兰; 玛雅姆‧罗弗戈兰
Original assignee: 美国博通公司
Priority date: 2009-05-11
Filing date: 2011-04-14
Publication date: 2014-03-21

Description

Method and communication system for realizing wireless communication

Technical Field

The present invention relates to wireless communications, and more particularly, to a method and system for inter-chip communication using a selectable directional antenna (selectable).

Background

Mobile communications have transformed the way people communicate, and mobile phones have transformed from a luxury item to an essential part of everyday life. Today, the use of mobile phones is controlled by social situations and not by geographical or technical constraints. Voice connections fulfill the basic requirements of communication, while mobile voice connections will penetrate deeper into everyday life. The mobile internet will be the next target of the mobile communication revolution. The mobile internet can become a common source of daily information at any time, and convenient and universal access to the data is guaranteed.

As the number of electronic devices supporting wired and/or mobile communication increases, more effort is required to make these devices have more power saving (power efficiency). For example, a significant proportion of communication devices are mobile wireless devices and therefore typically operate from battery power. In addition, the transmit and/or receive circuitry in these mobile wireless devices often consume a significant portion of the power consumed in these devices. Moreover, in some conventional communication systems, the transmitter and/or receiver tend to be relatively power consuming compared to other modules of the portable communication device.

Other drawbacks and disadvantages of the prior art will become apparent to one of ordinary skill in the art upon examination of the following system of the present invention as described in conjunction with the accompanying drawings.

Disclosure of Invention

A system and/or method for inter-chip communication using selectable directional antennas, substantially as shown in and/or described in connection with at least one of the figures, as set forth more completely in the claims.

According to an aspect of the present invention, a method for implementing wireless communication is provided, including:

in a wireless device comprising a plurality of chips, wherein each of the plurality of chips comprises one or more transmitters, one or more receivers, and one or more integrated directional antennas communicatively coupled to the one or more transmitters and/or the one or more receivers, information is wirelessly communicated between two or more of the plurality of chips through the directional antennas.

Preferably, the directional antenna comprises a patch antenna (patch antenna).

Preferably, the method further comprises configuring one or more of the patch antennas on a first chip of the plurality of chips to transmit a signal transmitted in the direction of one or more other chips of the plurality of chips that are intended to receive the transmitted signal.

Preferably, the method further comprises configuring one or more of the patch antennas on a first chip of the plurality of chips to transmit signals at a frequency matched to the configured frequency of the directional antenna integrated on one or more other chips of the plurality of chips intended to receive the transmitted signals.

Preferably, the directional antenna includes a dipole antenna (dipole antenna).

Preferably, the method further comprises transmitting a baseband signal between two or more of the plurality of chips.

Preferably, the method further comprises transmitting a radio frequency (radio frequency) signal between two or more of the plurality of chips.

Preferably, the method further comprises transmitting an intermediate frequency signal between two or more of the plurality of chips.

Preferably, the plurality of chips are integrated on a single package.

Preferably, the plurality of chips are integrated on a plurality of packages.

According to still another aspect of the present invention, there is provided a communication system including:

a wireless device comprising a plurality of chips, wherein each of the plurality of chips comprises one or more transmitters, one or more receivers, and one or more integrated directional antennas communicatively coupled with the one or more transmitters and/or the one or more receivers; and

the wireless device wirelessly communicates information between two or more of the plurality of chips through the directional antenna.

Preferably, the directional antenna comprises a patch antenna (patch antenna).

Preferably, the wireless device configures one or more of the patch antennas on a first chip of the plurality of chips to transmit a signal that is transmitted in the direction of one or more other chips of the plurality of chips that are intended to receive the transmitted signal.

Preferably, the wireless device configures one or more of the patch antennas on a first chip of the plurality of chips to transmit signals at a frequency that matches a configured frequency of a directional antenna integrated on one or more other chips of the plurality of chips that are intended to receive the transmitted signals.

Preferably, the directional antenna includes a dipole antenna (dipole antenna).

Preferably, the wireless device is configured to communicate baseband signals between two or more of the plurality of chips.

Preferably, the wireless device is configured to transmit a radio frequency (radio frequency) signal between two or more of the plurality of chips.

Preferably, the wireless device is adapted to communicate intermediate frequency signals between two or more of the plurality of chips.

Preferably, the plurality of chips are integrated on a single package.

Preferably, the plurality of chips are integrated on a plurality of packages.

The following detailed description of specific embodiments is provided to facilitate an understanding of various advantages, aspects, and novel features of the invention as they may be better understood when considered in connection with the accompanying drawings.

Drawings

FIG. 1 is a diagram illustrating an exemplary wireless system architecture in accordance with one embodiment of the present invention;

FIG. 2 is a schematic diagram of an exemplary on-chip directional antenna structure in accordance with an embodiment of the present invention;

FIG. 3A is a top view of an exemplary on-chip directional antenna in accordance with one embodiment of the present invention;

fig. 3B is a schematic diagram of an exemplary directional patch antenna in accordance with an embodiment of the present invention;

fig. 3C is a schematic diagram of an exemplary patch antenna with configurable frequencies in accordance with an embodiment of the present invention;

fig. 4 is a flow chart of exemplary steps for inter-chip communication using selectable on-chip directional antennas in accordance with an embodiment of the present invention.

Detailed Description

Various aspects of the present invention provide a method and system for inter-chip communication using selectable directional antennas. In an exemplary aspect of the invention, in a wireless device comprising a plurality of chips, wherein each of the plurality of chips comprises one or more transmitters, one or more receivers, and one or more integrated directional antennas communicatively coupled to the one or more transmitters and/or the one or more receivers, information is wirelessly communicated between two or more of the plurality of chips via the directional antennas. The directional antenna includes a patch antenna that may be configured to transmit signals in a direction in which other chips are expected to receive the transmit signals. The patch antenna may be configured to transmit signals at a frequency that matches a configured frequency of a directional antenna integrated on other chips of the plurality of chips that are expected to receive the transmitted signals. The directional antenna includes a dipole antenna (dipole antenna). The communication between the chips includes the transmission of baseband signals, radio frequency signals, and/or intermediate frequency signals. The plurality of chips are integrated on a single package or a plurality of packages.

Fig. 1 is a diagram illustrating an exemplary wireless system architecture in accordance with an embodiment of the present invention. Referring to fig. 1, wireless device 150 includes antenna 151, transceiver 152, baseband processor 154, processor 156, system memory 158, logic module 160, chip 162, on-chip directional antenna 164, other chip 154, external headset port 166, and package 167. The wireless device 150 also includes an analog microphone 168, an Integrated Hands Free (IHF) stereo speaker 170, a Hearing Aid Compatible (HAC) coil 174, a two-digit microphone 176, a vibration transducer, a keypad and/or touch screen 180, and a display 182.

The transceiver 152 may comprise suitable logic, circuitry, interfaces and/or code that may be operable to modulate and upconvert a baseband signal to an RF signal for transmission by one or more antennas, which may be represented generally by antenna 151. The transceiver 152 is also used to down-convert and demodulate received RF signals to baseband signals. The RF signals are received by one or more antennas, which may be represented by antenna 151. Different wireless systems use different antennas for transmission and reception. The transceiver 152 is used to perform other functions, such as filtering and amplifying baseband and/or RF signals. Although a single transceiver 152 is shown, the invention is not so limited. Thus, the transceiver 152 may be implemented by a separate transmitter and a separate receiver. Additionally, multiple transceivers, transmitters, and/or receivers may also be included. In this regard, the plurality of transceivers, transmitters, and/or receivers enable wireless device 150 to handle a plurality of wireless protocols and/or standards, including cellular, WLAN, and PAN. Wireless technologies handled by wireless device 150 include, for example, GSM, CDMA2000, WCDMA, GMS, GPRS, EDGE, WiMAX, WLAN, LTE, 3GPP, UMTS, bluetooth, and ZIGBEE.

The baseband processor 154 may comprise suitable logic, circuitry, interfaces and/or code that may enable processing of baseband signals transmitted by the transceiver 152 and/or baseband signals received from the transceiver 152. The processor 156 may be a suitable processor or controller, such as a CPU, DSP, ARM, or any type of integrated circuit processor. The processor 156 may comprise suitable logic, circuitry, and/or code that may enable control of the operation of the transceiver 152 and/or the baseband processor 154. For example, the processor 156 is configured to update and/or modify programmable parameters and/or values (values) in the transceiver and/or the baseband processor 154 in various components, devices, and/or processing units. At least a portion of the programmable parameters are stored in system memory 158.

Control and/or data information, including programmable parameters, may be communicated from other portions of the wireless device 150 to the processor 156, not shown in fig. 1. Similarly, processor 156 is configured to communicate control and/or data information, including programmable parameters, to other portions of wireless device 150, not shown in FIG. 1. The other portion is part of the wireless device 150.

The processor 156 uses the received control and/or data information, including programmable parameters, to determine the operating mode of the transceiver 152. For example, processor 156 may be configured to select a particular frequency for the local oscillator, a particular gain for the variable gain amplifier, and/or configure the local oscillator and/or the variable gain amplifier to operate in accordance with the present invention. Also, the particular frequencies selected and/or parameters needed to calculate the particular frequencies, and/or the particular gain values and/or parameters used to calculate the particular gains, may be stored in the system memory 158, for example, by the processor 156. Information stored in system memory 158 is transferred from system memory 158 to transceiver 152 via processor 156.

The system memory 158 may comprise suitable logic, circuitry, interfaces and/or code that may enable storage of a plurality of control and/or data information, including parameters, and/or frequency values and/or gain values, that may be required for calculating frequency and/or gain. The system memory 158 stores at least a portion of the programmable parameters manipulated by the processor 156.

The logic module 160 may comprise suitable logic, circuitry, interfaces and/or code that may enable control of various functions of the wireless device 150. For example, the logic module 160 includes one or more state machines that may generate signals for controlling the transceiver 152 and/or the baseband processor 154. The logic module 160 also includes registers that temporarily store data used to control, for example, the transceiver 152 and/or the baseband processor 154. Logic idol 160 also generates and/or stores state information, for example, that is read by processor 156. The amplifier gain and/or filtering characteristics may be controlled, for example, by the logic module 160.

The BT radio transceiver (radio)/processor 163 may comprise suitable logic, circuitry, interfaces and/or code that may enable transmitting and receiving bluetooth signals. BT wireless transceiver/processor 163 may process and/or resolve BT baseband signals. In this regard, the BT wireless transceiver/processor 163 processes or otherwise resolves BT signals received and/or transmitted by the wireless communication medium. The BT wireless transceiver/processor 163 may also provide control and/or feedback information to/from the baseband processor 154 and/or the processor 156 based on information from the processed BT signals. The BT wireless transceiver/processor 163 communicates information and/or data from the processed BT signals to the processor 156 and/or the system memory 158. Also, the BT wireless transceiver/processor 163 receives information from the processor 156 and/or the system memory 158, which is processed and transmitted by a wireless communication such as a bluetooth headset.

The CODEC 172 may comprise suitable logic, circuitry, interfaces and/or code that may be operable to process audio signals received from and/or transmitted to an input/output device. The input device may be in the wireless device 150 or communicatively coupled to the wireless device 150 and may also include, for example, an analog microphone 168, a stereo speaker 170, and a Hearing Aid Compatible (HAC) coil 174. The CODEC 172 is used to up-convert and/or down-convert the frequency of the signal to a desired frequency for processing and/or transmission by an output device. The CODEC 172 uses multiple digital audio inputs, such as 16 or 18 bit inputs. CODEC 172 also usesA plurality of digital sample rate inputs. For example, the CODEC 172 receives digital audio signals at a sampling rate such as 8kHz, 11.025kHz, 12kHz, 16kHz, 22.05kHz, 24kHz, 32kHz, 44.1kHz, and/or 48 kHz. The CODEC 172 also supports a mix of multiple audio sources. For example, the audio sources supported by the CODEC 172 are such as Universal Audio, polyphonic ringer (polyphonic ringer), I²S FM audio, vibration driving signal (vibration driving signal), and speech. In this regard, the generic audio and polyphonic ring source supports multiple sample rates that the CODEC 172 is capable of accepting, while the voice source may support a portion of the multiple sample rates, such as 8kHz and 16 kHz.

The CODEC 172 may compensate for passband amplitude and phase fluctuations for at least a portion of the audio sources using a programmable Infinite Impulse Response (IIR) filter and/or a programmable Finite Impulse Response (FIR) filter for different output devices. In this regard, the filter coefficients may be dynamically configured or programmed based on the current operation. Also, the filter coefficients may be switched, for example, over one point (one-slot) or continuously. The CODEC 172 also uses a modulator, such as a delta-sigma modulator, to encode the digital output signal for analog processing.

The chip 162 includes an integrated circuit in which a number of functional modules are integrated, such as a transceiver 152, a processor 156, a baseband processor 154, a BT wireless transceiver/processor 163, on-chip directional antennas 164A and 164B, and a CODEC 172. The number of functional modules integrated on chip 162 is not limited to the number shown in fig. 1. Thus, any number of modules may be integrated on chip 162 depending on, for example, the space of the chip and the requirements of wireless device 150. In another embodiment of the invention, some components of the circuitry in the wireless device 150 may be integrated on other chips 165, such as the CODEC 172, the processor 155, the baseband processor 154, and/or the BT wireless transceiver/processor 163. Other chips may also include an on-chip directional antenna 164B.

On-chip directional antennas 164A and 164B include metal layers disposed and/or integrated within chip 162 and/or other chips 165 for emitting electromagnetic radiation in a desired direction depending on the geometry of the particular antenna being operated. In addition, the on-chip directional antenna 164A includes a patch antenna for transmitting EM signals at the configured frequency. In this regard, antennas on different chips in the wireless device 150 may communicate at different wavelengths depending on which chip needs to communicate at a particular time.

The external headset port 166 includes a physical connection of an external headset to communicatively connect with the wireless device 150. The analog microphone 168 may comprise suitable circuitry, logic, and/or code and may be adapted to, for example, detect acoustic waves and convert them to electrical signals via a piezoelectric effect (piezo effect). The electrical signal generated by the analog microphone 168 comprises an analog signal that requires analog-to-digital conversion prior to processing.

Package 167 includes a printed circuit board or other support structure for chip 162, other chips 165, and other components of wireless device 150. The package 167 includes, for example, an isolation material that can provide isolation between electronic components disposed on the package 167. In other embodiments of the present invention, chip 162 and other chips 165 may be integrated on multiple packages.

The stereo speaker 170 includes a pair of speakers for generating audio signals from the electrical signals received from the CODEC 172. The HAC coil 174 may comprise suitable circuitry, logic, and/or code and may be adapted to enable the wireless device 150 to communicate with the T coil of the hearing aid. In this regard, for example, an electronic audio signal is transmitted to a user using a hearing aid without the need to generate a sound signal through a speaker, such as stereo speaker 170, and convert the generated sound signal back into an electrical signal in the hearing aid, and then back into an amplified sound signal in the user's ear.

The dual bit microphone 176 may comprise suitable circuitry, logic, and/or code and may be adapted to detect and convert acoustic waves into electrical signals. The electrical signals generated by the two-digit microphone 176 comprise digital signals, so no analog to digital conversion is required before digital processing in the CODEC. The dual-digit microphone 176 has, for example, beamforming capabilities.

The vibration sensor 178 may comprise suitable circuitry, logic, and/or code and may be adapted to notify an incoming call, alarm, and/or message to the wireless device 150 without the use of sound. The vibration sensor may generate vibrations synchronized with an audio signal such as speech or music, for example.

In operation, control and/or data information, including programmable parameters, may be communicated to processor 156 by other portions of wireless device 150 (not shown in FIG. 1). Similarly, the processor 156 may communicate control and/or data information including programmable parameters to other portions of the wireless device 150 (not shown in fig. 1) that are part of the wireless device 150.

The processor 156 uses the received control and/or data information, including programmable parameters, to determine the operating mode of the transceiver 152. For example, the processor 156 may be configured to select a particular frequency for the local oscillator, a particular gain for the variable gain amplifier, configure the local oscillator, and/or configure the variable gain amplifier to operate in accordance with various embodiments of the present invention. Also, the particular frequencies selected and/or the parameters needed to calculate the particular frequencies may be stored in the system memory 158, for example, by the processor 156. Information stored in system memory 158 is transferred from system memory 158 to transceiver 152 via processor 156.

The CODEC 172 in the wireless device 150 communicates with the processor 156 to communicate audio data and control signals. Control registers for the CODEC 172 may be provided in the processor 156. The processor 156 exchanges audio signals and control information through the system memory 158. The CODEC 172 upconverts and/or downconverts the frequencies of multiple audio sources for processing at a desired sampling rate.

Signals processed by processor 155 and/or baseband processor 154 may be communicated to and/or from devices within circuitry in chip 162 and other chips 165. Directional antennas, such as on-chip directional antennas 164A and 164B, are used to direct signals to the appropriate chip that is expected to receive a particular signal. A radio signal including a considerable amount of stray impedance (stray impedance) for reducing a maximum data transmission rate is used as opposed to a line trace between chips, so that a high signal communication bandwidth can be obtained using low power.

Fig. 2 is a schematic diagram of an exemplary on-chip directional antenna structure in accordance with an embodiment of the present invention. Referring to fig. 2, an on-chip directional antenna 164A integrated on chip 162 is shown, chip 162 including IC circuitry 203. IC circuit 203 includes a plurality of circuits in a wireless device, as shown in fig. 1.

On-chip directional antenna 164A includes one or more conductive layers 201 disposed on chip 162 along with IC circuitry 203 and a plurality of antenna ports 205A-205D and/or integrated within chip 162. Antenna ports 205A-205D comprise conductive material that may support electrical connection of other circuitry of IC circuit 203 to on-chip directional antenna 164A. In this regard, circuitry in chip 162 communicates with circuitry in other chips through on-chip directional antenna 164A. The number of on-chip directional antennas 164A shown in fig. 2 is not a limitation of the present invention. Thus, any number of on-chip directional antennas may be integrated depending on the space requirements and the number of directions in which communication is desired. For example, on-chip directional antennas may be integrated on each side of chip 162 to ensure communication with the chip in each direction.

In operation, signals may be communicated between chips in the wireless device 150 by way of the on-chip directional antenna 164A and the on-chip directional antennas of the other chips. For example, antenna ports 205A-205D may enable communication of signals to and/or from on-chip directional antenna 164A. Using beamforming, signals may be directed to a desired chip within wireless device 150 by having an antenna with a particular geometry to transmit signals in a particular direction, as further described in fig. 3A-4.

In another embodiment of the invention, the on-chip directional antenna 164A has a configurable operating frequency, such that those chips that are in the same direction as the transmission of a particular chip may be selected by the frequency of the transmitting and receiving on-chip directional antenna.

Fig. 3A is a top view of an exemplary on-chip directional antenna in accordance with an embodiment of the present invention. Referring to fig. 3, a chip 162 is shown including an on-chip directional antenna 164A and baseband/RF circuitry 301.

The on-chip directional antenna 164A includes, for example, patch antennas 301A-301C and dipole antennas 303A and 303B, but the invention is not limited to the type of directional antenna. The patch antennas 301A-301C and the dipole antennas 303A and 303B may be selected by switches, such as CMOS switches in the baseband/RF circuit 301. The antenna selected to transmit the signal may be selected from the direction of the receiving chip of chip 162. For example, if the receiving chip is located to the left of chip 162, patch antenna 301A may be selected to transmit a signal.

The baseband/RF circuitry 301 may comprise suitable circuitry, interfaces, logic, and/or code that may be operable to process baseband and RF signals. The baseband signal is down-converted from a received RF signal or generated by an input device, such as a microphone. The baseband/RF circuitry 301 includes, for example, the transceiver 152, the baseband processor 154, the processor 156, the CODEC 172, and the BT wireless transceiver/processor 163, as shown in fig. 1.

In operation, signals may be transmitted to and received from chip 162 by patch antennas 301A-301C and dipole antennas 303A and 303B directed to other chips of wireless device 150, such as other chips 165. The orientation of the receiving chip relative to chip 162 determines which of the patch antennas 301A-301C and dipole antennas 303A and 303B is selected to transmit a particular signal. In another embodiment of the present invention, the frequency at which the signal is transmitted may also be configured to select the particular chip that receives the signal. For example, in the plan view of fig. 3A, two receiving chips may be disposed above chip 162, and thus patch antenna 301A or 301B may be selected to transmit signals, and the two receiving chips may receive signals from the same antenna at different frequencies. This may be accomplished by configuring selectable on-chip antennas on the receive chip to receive signals at a particular frequency.

Fig. 3B is a schematic structural diagram of an exemplary directional patch antenna in accordance with an embodiment of the present invention. As in fig. 3B, patch antennas 300 and 310 are shown, including an array of pixel patches, such as pixel patch 302, and switches, such as switch 304. The number of pixel patches or switches per antenna is not limited to that shown in fig. 3B. The active area (active area) of tunable antennas 300 and 310 may be adjusted by activating an appropriate switch, shown as a darkened or closed switch in the figure, such as switch 306, and the open switch in fig. 3B is in the form of a white rectangle, such as switch 304. In one embodiment of the present invention, patch antennas 300 and 310 may be integrated on or within chip 162, as shown in fig. 1, 2, and 3A.

In operation, the transmit direction of patch antennas 300 and 310 may be defined by the active patch, as shown by the closed switch (such as switch 306) in fig. 3B. The active region defines a transmission radiation pattern (transmission pattern) having a maximum density in a desired direction, which is indicated by large arrows from the top to the bottom of the patch antenna 300 and from one side to the other side of the patch antenna 310 in the figure, for example. The transmission pattern may be defined by a configuration of a large number of active patches and is not limited to that shown in fig. 3B. In addition, the transmit frequency may be controlled by activating appropriate switches of adjustable antennas 300 and/or 310 as shown in FIG. 3C.

Fig. 3C is a block diagram of an exemplary patch antenna with configurable frequencies according to an embodiment of the invention. Referring to fig. 3C, patch antennas 300 and 310 are shown, each having an array of pixel patches, such as pixel patch 302, and a switch, such as switch 304. The number of pixel patches or switches per antenna is not limited to that shown in fig. 3C. The active areas of patch antennas 300 and 310 may be adjusted by activating appropriate switches, such as switch 306 as shown by switches that have been darkened (solid) or closed, and white rectangles such as switch 304 in fig. 3C for the open switches. In one embodiment of the present invention, patch antennas 300 and 310 may be integrated on or within chip 162, as shown in fig. 1, 2, and 3A.

In operation, the frequency range emitted by patch antennas 300 and 310 may be defined by the active region, as shown by the area enclosed by the open switches, such as switch 304 in fig. 3C. If the active area is reduced as shown by patch antenna 310, the transmit frequency is greater than the transmit frequency of patch antenna 300 with a larger active area. In addition, the polarization of the transmit region and beamforming may be controlled by activating appropriate switches in patch antennas 300 and/or 310, as described in fig. 3B. In one embodiment of the invention, the frequency and direction of transmission may be configured to communicate signals between chips in the wireless device 150. In this way, signals may be transmitted at very high frequencies in the wireless device 150 without the defects of inter-chip traces due to stray impedances, for example.

Fig. 4 is a flow chart of exemplary steps for inter-chip communication using selectable on-chip directional antennas in accordance with an embodiment of the present invention. Referring to fig. 4, after start step 401, step 403 is entered and chips to be communicated with each other are selected. In step 405, the appropriate directional antenna on the selected chip is configured to direct the signal in the appropriate direction to enable inter-chip communication, and then step 407 is entered where the signal is transmitted between chips. If the wireless device 150 is powered down in step 409, the exemplary steps proceed to end step 411, otherwise return to step 403.

In one embodiment of the present invention, a method and system for inter-chip communication using a directional antenna integrated on each of a plurality of chips is presented. In this regard, information may be communicated between two or more of the plurality of chips via the directional antenna. Directional antennas 164A, 164B, 301A-301C, and 303A-303C comprise patch antennas 301A-301C for transmitting signals in a direction in which another chip desires to receive the transmitted signals. Patch antennas 301A-301C are used to transmit signals at a frequency that matches the configured frequency of the directional antenna integrated on another of the plurality of chips 162, 165. The other chip is the chip that is expected to receive the transmitted signal. The directional antennas 164A, 164B, 301A-301C comprise dipole antennas. Communication between chips includes the transmission of baseband signals, radio frequency signals, and/or intermediate frequency signals. Multiple die 162/165 may be integrated in a single package 167 or integrated in multiple packages.

Another embodiment of the present invention provides a machine and/or computer readable storage and/or medium having stored thereon, a machine code and/or a computer program having at least one code section executable by a machine and/or computer, thereby enabling the machine and/or computer to perform the steps described herein for inter-chip communication using a selectable directional antenna.

In general, the invention can be implemented in hardware, software, firmware, or a combination thereof. The present invention can be realized in an integrated manner in at least one computer system or in a separate manner by placing different components in a plurality of interconnected computer systems. Any kind of computer system or other apparatus adapted for carrying out the methods described herein is suited. A typical combination of hardware, software, and firmware may be a specialized computer system with a computer program that, when being loaded and executed, controls the computer system such that it carries out the methods described herein.

Embodiments of the present invention may be implemented as a board level product (board level product), such as a single chip, an Application Specific Integrated Circuit (ASIC), or as separate components integrated with other portions of the system on a single chip with varying degrees of integration. The degree of integration of the system depends primarily on speed and cost considerations. Modern processors are so diverse that processors currently found on the market can be employed. Additionally, if the processor is available as an ASIC core or logic module, an economically viable processor may be implemented as part of an ASIC device with multiple functions implemented by firmware.

The present invention can also be implemented by a computer program product, which comprises all the features enabling the implementation of the methods of the invention and which, when loaded in a computer system, is able to carry out these methods. The computer program in the present document refers to: any expression, in any programming language, code or notation, of a set of instructions intended to cause a system having an information processing capability to perform a particular function either directly or after either or both of the following a) conversion to another language, code or notation; b) reproduced in different formats to implement specific functions.

While the invention has been described with reference to certain embodiments, it will be understood by those skilled in the art that various changes may be made and equivalents may be substituted for elements thereof without departing from the spirit and scope of the invention. In addition, many modifications may be made to adapt a particular situation or material to the teachings of the invention without departing from the essential scope thereof. Therefore, it is intended that the invention not be limited to the particular embodiment disclosed, but that the invention will include all embodiments falling within the scope of the appended claims.

Claims

1. A method of enabling wireless communication, comprising:

in a wireless device comprising a plurality of chips, wherein each of the plurality of chips comprises one or more transmitters, one or more receivers, and one or more integrated directional antennas communicatively coupled to the one or more transmitters and/or the one or more receivers through which information is wirelessly communicated between two or more of the plurality of chips;

the directional antennas comprise patch antennas, the method further comprising configuring one or more of the patch antennas on a first chip of the plurality of chips to transmit signals at frequencies that match the configured frequencies of the directional antennas integrated on one or more other chips of the plurality of chips that are intended to receive the transmitted signals;

the patch antenna comprises a pixel patch array and a switch connected between two adjacent pixel patches, wherein the transmission frequency range of the patch antenna is limited by an active area in the pixel patch array, and the active area in the pixel patch array is adjusted by activating the switch.

2. The method of claim 1, further comprising configuring one or more of the patch antennas on a first one of the plurality of chips to transmit a signal transmitted in a direction of one or more other ones of the plurality of chips intended to receive the transmitted signal.

3. The method of claim 1, wherein the directional antenna comprises a dipole antenna.

4. A communication system, comprising:

the wireless device wirelessly communicating information between two or more of the plurality of chips through the directional antenna, the directional antenna comprising a patch antenna, the wireless device configuring one or more of the patch antennas on a first chip of the plurality of chips to transmit a signal at a frequency that matches a configured frequency of a directional antenna integrated on one or more other chips of the plurality of chips that are intended to receive the transmitted signal;

5. The communication system of claim 4, wherein the wireless device configures one or more of the patch antennas on a first chip of the plurality of chips to transmit a signal transmitted in the direction of one or more other chips of the plurality of chips that are intended to receive the transmitted signal.

6. The communication system of claim 5, wherein the directional antenna comprises a dipole antenna.