HK1149369A - System and method for emitter layer shaping - Google Patents

Description

System and method for emitter layer shaping

Cross Reference to Related Applications

The present application claims priority from U.S. provisional patent application No.61/027,354 entitled "EMITTER LAYER SHAPING" filed on 8.2.2008 and U.S. provisional patent application No.61/049,964 entitled "EMITTER LAYER SHAPING" filed on 25.11.2008 as 35u.s.c.119 (e). This application is related to U.S. patent application No.11/906,219 entitled "LED SYSTEM AND METHOD" filed on month 10, 1, 2007 and U.S. patent application No.11/906,194 entitled "LEDSYSTEM AND METHOD" filed on month 10, 1, 2007, both of which claim priority from U.S. provisional patent application No.60/827,818 entitled "SHAPED LIGHT EMITTING DIODES" filed on month 10, 2, 2006 and U.S. provisional patent application No.60/881,785 entitled "SYSTEM AND METHOD FOR a shielded SUBSTRATE LED" filed on month 1, 22, 2007. All applications referenced in this application are fully incorporated herein.

Technical Field

The present invention relates generally to Light Emitting Diode (LED) devices, and more particularly to systems and methods for shaping emitter (emitter) material in order to maximize the light extraction efficiency of any LED.

Background

Light emitting diodes ("LEDs") are ubiquitous in electronic devices. They are used in digital displays, lighting systems, computers, televisions, cellular telephones, and various other devices. Advances in LED technology have LED to methods and systems for producing white light using one or more LEDs. Advances in LED technology have LED to LEDs that produce more photons, and thus more light, than previously. The culmination of these two technological developments is that LEDs are being used to supplement or replace many traditional light sources, such as incandescent, fluorescent, or halogen lamps, just as transistors replace vacuum tubes in computers.

LEDs are made in many colors including red, green and blue. One method of producing white light includes using red, green, and blue LEDs in combination with each other. A light source made of a combination of red, green and blue (RGB) LEDs will produce light that is perceived by the human eye as white light. This is because the human eye has three types of color receptors (receptors), each of which is sensitive to blue, green, or red.

A second method of producing white light from an LED source is to produce light from a monochromatic (e.g., blue), short wavelength LED and impinge a portion of that light onto a phosphor or similar photon-conversion material. The phosphor absorbs higher energy, short wavelength light waves and re-emits lower energy, longer wavelength light. If the phosphor is selected to emit light in, for example, the yellow region (between green and red), the human eye perceives this light as white light. This is because yellow light stimulates both red and green receptors in the eye. Other materials such as nanoparticles or other similar photoluminescent materials may be used to produce white light in much the same way.

White light can also be produced using Ultraviolet (UV) LEDs and three different RGB phosphors. In addition, white light may be generated by blue and yellow LEDs, and white light may also be generated using a combination of blue, green, yellow, and red LEDs.

Current industry practice for constructing LEDs is to use a substrate (typically single crystal sapphire or silicon carbide) on which a layer of material such as GaN or InGaN is deposited. One or more layers (e.g., GaN or InGaN) may allow photon generation and current conduction. Typically, a first layer of gallium nitride (GaN) is applied to the surface of the substrate to form a transition region from the crystal structure of the substrate to the crystal structure of the doped layer that allows photon generation or current conduction. Followed by an n-doped layer, typically of GaN. The next layer may be a layer of InGaN, AlGaN, AlInGaN or other compound semiconductor material that generates photons and is doped with the materials needed to generate light of the desired wavelength. The next layer is typically a P-doped layer of GaN. The structure is further modified by etching and deposition to create metal sites (sites) for electrical connection to the device.

During operation of the LED, excess electrons move from the n-type semiconductor to electron holes in the p-type semiconductor, as in conventional diodes. In an LED, photons are released in a compound semiconductor layer during this process in order to generate light.

In a typical manufacturing process, a substrate is manufactured in wafer (wafer) form and a layer is applied to the surface of the wafer. Once the layers are doped or etched and all features have been defined using the various processes mentioned, the individual LEDs are separated from the wafer. LEDs are typically square or rectangular with straight sides. This can result in significant efficiency losses and can result in emitted light having a poor emission pattern. A separate optical device, such as a plastic dome (dome), is typically placed over the LED in order to achieve a more desirable output.

In many LED applications, it is desirable to maximize the visible light output for a given power input, the quantity typically being expressed in lumens per watt (lm/W) for white light, or milliwatts per watt (mW/W) for shorter wavelength light such as blue. Existing LED technology can strive to increase this ratio, which is commonly referred to as "total efficiency" or "wall-plug efficiency". However, existing LED technologies still suffer from poor overall efficiency and low extraction efficiency.

Disclosure of Invention

Embodiments of the Complete Emitter Layer Shaping (CELS) process disclosed in this application may provide a geometrical and optical solution in maximizing the light extraction efficiency of any light emitting diode by Shaping its Emitter material. In some embodiments, this process is referred to as GaN shaping.

Embodiments disclosed in the present application are set forth in terms of the electromagnetic spectrum generally associated with light, including ultraviolet, visible, and infrared light. The principles disclosed in this application may be applied to any wavelength of electromagnetic radiation for which a suitable material is transparent to the wavelength of interest. As can be appreciated by those skilled in the art, the emitter layer shaping methods and systems disclosed in the present application may be similarly implemented to accommodate a wide range of wavelengths. An example of a wavelength range of interest is the terahertz frequency range.

The emitting material of an LED can be grown on a number of substrates. Currently, most inganleds are grown on sapphire substrates. The refractive index of sapphire is much lower than that of the emitting material (InGaN), so the number of photons entering the sapphire substrate is greatly reduced. Upon shaping the emitting material, all light emitted by the GaN material can escape into the sapphire substrate and eventually into the air.

Almost all blue and green LEDs on the market today are constructed using GaN (gallium nitride) as the first layer of material applied to a sapphire or silicon carbide substrate. Furthermore, the actual layers applied are varied and complex, including not only GaN but also compound semiconductor materials such as InGaN, AlInGaP, and the like. Current developments in today's science include the use of other materials for the LED layers than GaN. The techniques described in this application apply to any and all such layers in a light emitting device. The phrases "full emitter layer shaping" and "CELS" and "GaN shaping" as used in this application are meant to cover all such activities, whether it be actually shaping GaN, some other material, or a combination thereof. For purposes of calculation and example, GaN is used as the emissive material throughout this application. However, those skilled in the art will appreciate that the formulas and descriptions apply equally to other material sets and are not limited to the examples disclosed in this application.

Conventional LEDs suffer from poor light extraction efficiency due to the high refractive index in which light energy is generated. Total Internal Reflection (TIR) limits the escape cone (escape cone) of light in transitioning from a high index material to a lower index material. The escape cone angle is the critical angle. The critical angle can be calculated using Snell's law.

In one embodiment, a portion of the emitter layer of the LED is shaped to a controlled depth or height relative to the LED substrate. In embodiments disclosed in the present application, the emitter layer comprises an array of micro emitters (also referred to as micro LEDs). In some embodiments, each of the micro LEDs has a square, rectangular, or hexagonal shape. In some embodiments, the emitter layer is shaped by etching. In one embodiment, the substrate is sapphire. In one embodiment, the emitter layer material is in continuous contact with the substrate. In one embodiment, the emitter layer material is in electrical contact with the substrate. In one embodiment, the emitter layer material forms a continuous electrical connection or plane (electrical plane) with the substrate.

In some embodiments, only a portion of the emitter layer is shaped. In some embodiments, the emitter layer of the LED includes a shaped portion and an unshaped portion or region. In some embodiments, the shaped portions of the emitter layer have a controlled depth or height, and the unformed portions or regions of the emitter layer form electrical planes or generally continuous electrical connections and are generally in continuous contact with the substrate. In some embodiments, the unformed portion of the emitter layer may be coupled to a power source at the edge. In some embodiments, one or more shaped portions of the emitter layer may be coupled to a power source.

In one embodiment, the confined light rays may traverse (traverse) the longest distance or approximately the longest distance in the shaped portion of the emitter layer. In some embodiments, the confined light rays may be selected to generally terminate at a depth or height of the shaped portion of the emitter layer relative to the substrate. In some embodiments, the emitter layer material may be shaped based on one or more limited rays of light traversing the longest distance or an approximately longest distance in the shaped portion of the emitter layer.

In some embodiments, the sidewalls of the LED may also be shaped to maximize the light output of the LED and achieve a desired intensity distribution using total internal reflection. In some embodiments, the exit face of the LED may be selected to conserve radiance.

In some embodiments, the sidewall shape of the LED is determined empirically based on the following constraints:

● all rays emanating from the emitter that strike the sidewall should strike the sidewall at an angle greater than or equal to the critical angle

● should be reflected towards the exit surface and the angle of incidence at the exit surface must be less than the critical angle.

In some embodiments, the criteria for sidewall shape may further include a gaussian distribution at the uniformity or infinity of light intensity at the exit face, or both, or other sets of conditions. In this manner, the sidewalls may be shaped to ensure that the emitted light is directed at a desired intensity or angle to the substrate. In some embodiments, the desired intensity or angle may be determined based on substrate characteristics such as the substrate index of refraction, the properties of the emitter material, or other materials.

The embodiments disclosed in the present application provide a number of advantages. For example, shaping the entire LED (including the substrate) or just the substrate may achieve 100% or approximately or typically 100% extraction of the light generated at the emitter layer from the emitter layer. In some embodiments, light emitting diodes may achieve light extraction efficiencies of at least about 90% and above by shaping the emitter material as disclosed in the present application.

Another advantage provided by the embodiments disclosed in the present application is the ability to shape large arrays of tiny emitters (also referred to as micro-LEDs) to make a single LED. For example, in some embodiments, the emitter layer of LEDs may include one micro-LED or an array of several micro-LEDs to millions of micro-LEDs.

Yet another advantage provided by embodiments disclosed in the present application is that due to the presence of tiny emitters (micro LEDs), the total volume of luminescent material that needs to be removed in shaping the emitter layer may also be reduced. In addition, for embodiments disclosed in the present application, little or no substrate material needs to be removed, which can speed up and reduce the cost of fabricating the LED, as it can be difficult and/or costly to remove the substrate material, such as in the case of sapphire.

Embodiments disclosed in the present application may provide additional advantages with respect to mounting, heat dissipation, and lighting (illumination) uniformity. For example, the emitting substrate (base) of each micro-LED may be directly bonded to a submount (submount) that provides power to the micro-LED and also provides a thermal dissipation path for the micro-LED. This configuration can provide excellent heat spreading. The heat density may also be reduced since the emitters are spread apart from each other. As another example, the escape angle (escape angle) of each micro-LED in combination with the very small size of each micro-LED may allow the outgoing rays from one micro-LED to overlap with the outgoing rays of a large number of neighboring micro-LEDs while light is still contained within the thickness of the substrate. When the light reaches the exit surface of the substrate, the light from many micro LEDs is averaged, resulting in a very uniform light output profile (profile).

In summary, embodiments disclosed in the present application may provide technical advantages in the following areas:

1. current expansion (current spreading)

2. Heat dissipation

3. Uniformity of emission

4. Increased percentage of active region (P-layer) to inactive region (N-layer) contacts

5. Higher external quantum efficiency

6. Lower heat generation per lumen due to higher extraction efficiency

7. Conservation of true (true) luminance

Other objects and advantages of the embodiments disclosed in this application will be better understood and appreciated when considered in conjunction with the following description and the accompanying drawings.

Drawings

The accompanying drawings, which are incorporated in and form a part of this specification, are included to describe certain aspects of the disclosure. A clearer impression of the disclosure will become more readily apparent by referring to the exemplary, and therefore non-limiting, embodiments illustrated in the drawings. Wherever possible, the same reference numbers will be used throughout the drawings to refer to the same or like features (elements). The drawings are not necessarily to scale.

Fig. 1 is a schematic diagram of one example of how Total Internal Reflection (TIR) can confine the escape cone of light, resulting in low light extraction efficiency.

Fig. 2A and 2B show various views of a schematic diagram of one embodiment of a square emitter including a shaped substrate with shaped sidewalls.

FIG. 3 is a side view of an exemplary solid model of a shaped substrate having shaped sidewalls.

FIG. 4 shows one example of a ray trace through the solid model of FIG. 3, showing rays reflected from the shaped sidewall to the exit surface.

FIG. 5 is a screen shot of a solid model of a square emitter created in a ray tracing program showing the near field distribution at the exit detector plane.

FIG. 6 is a screen shot of the solid model of FIG. 5 showing the far field distribution after exiting the detector plane.

Figures 7A-7D illustrate various views of a schematic of one embodiment of a hexagonal emitter.

FIG. 8 is a schematic diagram of one embodiment of a hexagonal emitter made by shaping the emitter layer of an LED.

FIG. 9 is a schematic diagram of one embodiment of an LED having multiple layers including an emitter layer.

Fig. 10 and 11 are screenshots of a solid model of a hexagonal emitter showing near field and far field distributions.

FIG. 12 is a schematic diagram of one embodiment of an LED including a substrate, an emitter layer, and an N-contact layer.

FIG. 13 is a schematic diagram of one embodiment of an LED including a substrate and an emitter layer having an array of hexagonal emitters formed in shaped portions of the emitter layer.

Figure 14 is a schematic diagram of one embodiment of a multi-step mesa etching process.

FIG. 15 is a schematic diagram of one embodiment of an LED including an array of micro LEDs in a hexagonal geometry (geometric configuration) with curved sidewalls.

FIG. 16 is a schematic diagram of one embodiment of an LED including an array of micro LEDs in a hexagonal geometry with angled sidewalls.

FIG. 17 is a schematic diagram of one embodiment of an LED including an array of micro LEDs in a hexagonal geometry with straight sidewalls.

Detailed Description

The disclosure and the various features and advantageous details thereof are explained more fully with reference to the exemplary, and therefore non-limiting, embodiments that are illustrated in the accompanying drawings and detailed in the following description. Descriptions of well-known starting materials and procedures may be omitted so as to not unnecessarily obscure the detailed disclosure herein. It should be understood, however, that the detailed description and the specific examples, while indicating preferred embodiments, are given by way of illustration only and not by way of limitation. Various substitutions, modifications, additions and/or rearrangements within the spirit and/or scope of the following inventive concept will become apparent to those skilled in the art from this disclosure.

The terms "comprises," "comprising," "includes," "including," "has," "having," "with," or any other variation thereof, as used herein, are intended to cover a non-exclusive inclusion. For example, a process, article, or apparatus that comprises a list of elements is not necessarily limited to only those elements but may include other elements not expressly listed or inherent to such process, article, or apparatus. Furthermore, unless explicitly stated to the contrary, "or" refers to an inclusive or rather than an exclusive or. For example, either of the following satisfies case a or B: a is true (or present) and B is false (or not present), a is false (or not present) and B is true (or present), and both a and B are true (or present).

Additionally, any examples or illustrations given in this application should not be taken in any way as a definition, limitation, or explicit definition of any term or terms used in them. Rather, these examples or illustrations are to be considered as being described with respect to one particular embodiment and merely as illustrative. Those of skill in the art will understand that any term or terms used in these examples or illustrations include other embodiments, as well as implementations and adaptations thereof that may or may not be given therewith or elsewhere in the specification, and that all such embodiments are intended to be included within the scope of the term or terms. Languages specifying such non-limiting examples and examples include, but are not limited to: "for example," "such as," "in one embodiment," and the like.

Reference will now be made in detail to exemplary embodiments of the present disclosure, examples of which are illustrated in the accompanying drawings. Wherever possible, like reference numerals will be used throughout the drawings to refer to like and corresponding parts (elements) of the various drawings.

In embodiments disclosed herein, the LEDs may be shaped in various ways in order to increase or manipulate the light emitted from the LEDs. In one embodiment, the substrate is shaped such that all or a substantial majority of the light generated by the quantum well region of the LED is transmitted out of the exit face of the substrate of the LED. To this end, the exit face may be sized to take into account the principle of conservation of radiance. In one embodiment, the exit face may be the smallest dimension that allows all or a substantial majority of the light entering the substrate through the interface between the quantum well region and the substrate to exit the exit face, thereby combining the requirements for radiance conservation with the requirements for reduced size (particularly the size of the exit face). In addition, the sidewalls of the substrate may be shaped such that reflection or total internal reflection ("TIR") causes light beams incident on the sidewalls of the substrate to reflect toward and be incident on the exit face at an angle less than or equal to the critical angle. Thus, light loss at the exit face due to TIR is reduced or eliminated. In yet another embodiment, to ensure that light impinging on the sidewalls is reflected within the substrate and does not pass through the sidewalls, the sidewall or sidewalls of the substrate may also be coated with a reflective material that reflects the light to prevent the light from exiting through the sidewalls. Detailed examples of systems and METHODs for shaping LED substrates and sidewalls are described in the above-referenced U.S. patent application nos. 11/906,219 and 11/906,194, entitled "LED SYSTEM AND METHOD," filed on 10/1/2007, both of which are fully incorporated herein for all purposes.

The emitting material of an LED can be grown on a number of substrates. Almost all blue and green LEDs on the market today are built using GaN (gallium nitride) as the first layer of material applied to a sapphire or silicon carbide substrate. Furthermore, the actual layers applied may be varied and complex, including not only GaN but also compound semiconductor materials such as InGaN, AlInGaP, and the like. Currently, most InGaN LEDs are grown on sapphire substrates. The refractive index of sapphire is much lower than that of the emitting material (InGaN), so the number of photons entering the sapphire substrate is greatly reduced. TIR limits the escape cone of light in transitioning from a high index material to a lower index material. The escape cone angle is the critical angle. The critical angle can be calculated using Snell's law.

Snell's law (also known as the law of refraction) is a formula used to describe the relationship between angle of incidence and angle of refraction when it relates to light or other waves passing through a boundary between two different isotropic media, such as water and glass. Snell's law states that the ratio of the sine of the angle of incidence to the sine of the angle of refraction is a constant that depends on the refractive index of the medium.

Fig. 1 is a schematic diagram of how light passes through different media of an LED structure 100. In the example of fig. 1, there is a first boundary (interface 101) between gallium nitride (GaN) and sapphire and a second boundary (interface 102) between sapphire and air. The much lower index of refraction of sapphire causes some of the photons to be trapped in the emitting material with the higher index of refraction. The amount of light trapped in the emitting material is inversely related to the light extraction efficiency (invertely) of the LED. The more light that is trapped in the GaN material, the lower the efficiency of the LED. Shaping the emitting material according to embodiments of a full emitter layer shaping (CELS) process disclosed in this application may facilitate the escape of light emitted from GaN into the sapphire substrate and ultimately from sapphire to air. According to embodiments disclosed in the present application, the CELS process can maximize the light extraction efficiency of any light emitting diode by shaping the emitter material. Since GaN is used as an exemplary emissive material in this application, this process is also referred to as GaN shaping in this application.

Assuming a refractive index of 1 for air, 1.77 for sapphire and 2.5 for GaN, the exit angle in GaN can be calculated:

n_airsinΘ_air＝n_Al2O3sinΘ_Al2O3

n_GaNsinΘ_GaN＝n_Al2O3sinΘ_Al2O3＝n_airsinΘ_air

[ equation 1]

The critical angle for light generated in GaN is 23.58 degrees in this example. One assumption here is that there is a partially or fully reflective layer below the emission area, so that light is only emitted into the hemisphere.

The escape cone is a small fraction of the total emitted light. To calculate the amount of energy lost, we calculate the solid angle of the projection of the escape cone onto a lambertian emitter. The solid angle of a lambertian emitter is the Pi steradian (steradian). The solid angle of the 23.58 degree escape cone is:

[ equation 2 ]]

The light extraction efficiency was about 16%; meaning that 16% of the energy generated within the emitting material (GaN) escapes the top surface of the LED in the example of fig. 1.

While many in the industry focus on how to disrupt or limit TIR at various high-index to low-index interfaces within the LED structure, embodiments disclosed in this application focus on why TIR exists at these interfaces. TIR occurs due to Brightness (Brightness). The luminance theorem (also called the radiance conservation theorem) is the energy conservation theorem applied to optics. The radiance conservation theorem states that the radiance of a system must be conserved.

The law of conservation of radiance is:

[ equation 3]]

Phi ═ flux

n-refractive index

Area (A)

Solid angle

Suppose that all the energy generated escapes A₁In addition and assuming that the initial emission pattern and the final emission pattern are lambertian, the formula reduces to:

φ₁＝φ

Ω₁q [ equation 3a ]]

The luminance formula dictates that in the transition from a material of a given refractive index to a material of lower refractive index, the emission area in the lower refractive index material must increase. This assumes that the flux is conserved and that the solid angles are the same lambertian. This increase is positively correlated with the square of the ratio of the refractive indices.

In transitioning from a small emitter region in a high index material to a larger region of lower index, the sidewalls are shaped to take advantage of total internal reflection. Light emitted from the quantum well region is reflected off the sidewalls toward the larger region via total internal reflection. All light rays emitted from the emitter (or some amount of light rays determined by design) strike the sidewall at angles greater than the critical angle and are reflected internally. The light rays impinging on the exit are preferably at an angle less than the critical angle and pass through the exit face into a larger region in the lower index material. Thus, the (preserve) system brightness is maintained via the optical system defined by the sidewalls.

Assuming that the base substrate is sapphire, the emitting material is GaN, and the desired exit angle is 90 degrees, lambertian, the exit area can be calculated via the luminance theorem [ equation 3 ]. The above equation 3a shows the derivation of the exit area. The ratio of the exit area to the input area is equal to the square of the ratio of the refractive indices. For example, for an emitting medium with a refractive index of 2.5 and a terminating medium that is air, the exit area is equal to 2.5 times the square of the input area, assuming the output emission is lambertian. In this example, the ratio of exit area to emitter area is 6.25: 1.

Fig. 2A and 2B show top and side views of a schematic diagram of an exemplary embodiment of a square emitter 20 comprising a shaped portion 10 and shaped sidewalls 60, 65. In some embodiments, exit face 55 may be substantially the same shape as interface 50, substantially parallel to interface 50 and substantially rotationally (rotatably) aligned with interface 50, within the tolerances of the manufacturing process. In some embodiments, the shape of exit face 55 may be different than the shape of interface 50.

The area of exit face 55 may be selected to conserve brightness according to the luminance theorem equation 3. Equation 3b below shows an exemplary derivation of the exit area.

[ formula 3b]

Φ₁The luminous flux across the interface 50;

Φ₂phi is the luminous flux emitted from the emission surface 55 due to conservation of luminance₁＝Φ₂；

Ω₁The effective solid angle that light traverses the interface 50;

Ω₂the effective solid angle that light leaves the exit face 55;

A₁the area of the interface 50;

A₂the area of the exit surface 55;

n₁the refractive index of the material of the substrate 10;

n₂the refractive index of a substance (e.g., air or other medium) external to the substrate 10.

A₂The minimum surface area of exit face 55 that conserves light according to the above formula is shown. For example, assume that: the quantum well region 15 is formed to be 1mm square such that the interface 50 has an area of about 1 square millimeter, n₁＝1.77，n₂＝1，Ω₁＝3，Ω₂1 and phi1 equals phi2, then a₂Must be at least 9.3987mm²To conserve radiance. In this example, the effective solid angle Ω is given₁And Ω₂、n₁And n₂Phi1 and phi 2. With respect to additional teaching of determining the effective solid angle, the reader is directed to the above-referenced U.S. patent application Nos. 11/906,219 and 11/906,194 entitled "LED SYSTEM AND METHOD" filed on 10/1 of 2007.

A₂Representing the smallest possible size for a given output cone angle or emission half-angle and the smallest surface area of exit face 55 to conserve radiance. In some embodiments, A may be₂Slightly larger to compensate for tolerances in the fabrication process, errors in the size or shape of the quantum well region, or other factors. In the presence of A₂Above the minimum value so determined, flux will be conserved, but the degree of exitance (defined as flux per unit area) can be derived from the maximum obtainableThe value of (c) is decreased.

The height of the device can be determined by the confined light in the system. The light ray traverses the longest distance within the high index material. If the emission plane is square, the diagonal rays are the limiting rays. In the example shown in fig. 2A and 2B, since the emission plane 40 is square, the diagonal ray 45 is a limiting ray.

Since the side length of the unit emitter is 1 and the area is 1 square unit and the side length of the exit emitter is 2.5 and the area is 6.25, the minimum height for the device can be calculated:

[ formula 4]]

h＝0.707·3.5·2.29＝5.67

For the height of the square emitter: and (3) emergent edge: the ratio of the emitter edges is: 5.67: 2.5: 1. In some embodiments, empirical methods may be used to determine the height. The radiance conservation dictates the minimum exit area but does not dictate the height.

According to various embodiments, a portion of an emitter layer of an LED is shaped as disclosed above. More specifically, the emitter layer is shaped to a controlled depth or height relative to the substrate (which may be sapphire, as discussed above) so that the emitter layer material is generally in continuous contact with the substrate. Thus, in some embodiments, a continuous layer of emitter material may be in contact with the substrate. In some embodiments, the continuous layer of emitter material may be in electrical contact with the substrate or form a plane or continuous electrical connection with the substrate. In some embodiments, only a portion of the emitter layer is shaped. In some embodiments, the emitter layer may include a shaped portion that may be shaped to a controlled depth or height and an unshaped portion or region.

The area of the interface between the emitter layer and the substrate may be selected as described above, and the height of the emitter layer material may be selected based on one or more limited rays of light traversing the longest distance or approximately the longest distance in the shaped portion of the emitter layer. As a specific example, fig. 2A shows a shaped portion 10 of an emitter 20 shaped to a controlled height (h). In this example, the shaped portion may be an emitter layer such as, but not limited to, a GaN layer or other emitter layer. The unformed portion of the emitter layer material of the emitter 20 is not shown in fig. 2A. In one embodiment, the light rays confined as discussed above traverse the longest distance or approximately the longest distance in the shaped portion of the emitter layer. Thus, in the example of fig. 2A, the confined light rays 45 may be selected to generally terminate at the depth or height (h) of the shaped portion of the emitter layer.

In one embodiment, the sidewall shape is determined empirically. There are two constraints on the side walls:

a. all light rays emitted from the emitter that impinge on the sidewall should impinge on the sidewall at an angle greater than or equal to the critical angle

b. All rays reflected off the sidewall should be reflected towards the exit surface and the angle of incidence at the exit surface must be less than the critical angle.

Other criteria for the sidewall shape may be the uniformity of light intensity at the exit or a gaussian distribution at infinity, or both, or other sets of conditions. Thus, the sidewalls may be shaped so as to ensure that the emitted light is directed at the substrate at a desired intensity or angle, and the desired intensity or angle may be determined based on characteristics of the substrate, such as the substrate index of refraction, the emitter material, or other materials.

In some embodiments, the shape of the sidewall may be determined by iteration. The shape is decomposed into n facets (facets). A computer program such as Microsoft Excel (Microsoft and Excel are trademarks of Microsoft corporation of Redmond, washington) may be used to define the facets to the sidewalls. More specifically, the charting characteristics in Microsoft Excel can be used to generate a graph of sidewall shape. The same general shape may be used for each sidewall or different shapes for different sidewalls. Using a program like Excel, the size and angle of each facet can be varied to achieve the desired performance. Any mechanical drawing program (such as Solidworks, AutoCad, Pro engine, etc.) may be used to create a solid model of the shaped substrate with a specified sidewall shape (or with a curved sidewall shape based on specified facets). Mockups can also be created and analyzed using any ray tracing program (such as Zemax, TracePro, BRO, Lighttools, etc.).

In physics, ray tracing is a method for calculating the path of a wave or particle through a system having regions of varying propagation velocity, absorption characteristics, and reflective surfaces. In these cases, the wavefront may bend, change direction, or reflect off the surface, complicating the analysis. Ray tracing solves this problem by repeatedly advancing (altering) an idealized narrow beam, called a ray, through the medium with discrete amounts. Simple mathematics can be used to analyze a simple problem by propagating several rays. More detailed analysis can be performed by propagating a number of rays using a computer. When applied to the problem of electromagnetic radiation, ray tracing typically relies on an approximate solution of Maxwell's equations, which is effective whenever a light wave propagates through or near an object whose dimensions are much larger than the wavelength of the light.

Computer simulations can be performed to generate ray traces and distribution plots of intensity and irradiance distributions using commercially available ray tracing programs. If the resulting intensity and irradiance profiles have unsatisfactory profiles or the transfer efficiency of the shaped substrate is too low, the variables of the individual facets can be adjusted and the simulation performed again. This process can be automated through the use of a computer program that automatically adjusts facet variables. For purposes of example, the following examples utilize the Zemax optical design program (Zemax is a trademark of Zemax Development corporation, Bellevue, washington).

Zemax model

It can be modeled in a ray tracing program as long as the shape is made to meet the size constraints specified by the intensity formula and the limiting rays are taken into account. The ray tracing program will model the ray passing through the shape in order to determine its efficiency, near field distribution and far field distribution.

FIG. 3 is a side view of an exemplary solid model of the shaped portion 10 with shaped sidewalls 60, 65. The portion 10 with sidewalls 60, 65 represents a shaped portion of the emitter layer of the square emitter 20. As a specific example, portion 10 represents GaN material with a refractive index of 2.5. The output distribution is lambertian.

FIG. 4 illustrates one example of ray tracing through the solid model of FIG. 3. Due to TIR, the rays 70 reflect off the sidewalls 60, 65 towards the exit surface 55 where they are refracted and pass through the exit surface 55.

Fig. 5 is a screen shot of the solid model created in Zemax, showing the irradiance of the exemplary square emitter 20 at the exit detector plane 40. The detector plane is made larger than the exit face (in this case 10 units x 10 units) to ensure that any edge effect light is correctly recorded. The irradiance covers the center of the portion of the detector plane 40. In the case of GaN material, fig. 5 shows the near-field distribution at the GaN exit.

Fig. 6 is another screen shot of the solid model of fig. 5 showing the intensity of radiation at the detector plane 40. The intensity of the radiation at the exit face is comparable to the irradiance at far distances and is often referred to as the far field distribution. In the case of GaN material, fig. 6 shows the far field distribution after GaN.

Fig. 5 and 6 illustrate the efficiency of embodiments of shaped LEDs where the light is let out to the air. In this case, approximately 94% of the emitted light is extracted from the emitter layer. This does not take into account the loss of absorption and fresnel losses within the different material layers. The loss of absorption in sapphire is negligible and the GaN layer is very thin. In some embodiments, the GaN layer may be about 4-5 microns thick. The Fresnel loss is:

T₁＝1-R＝97.1％

[ equation 5]

T₂＝1-R＝92.3％

Efficiency of T₁T₂ε＝97.1％·92.3％·94％≈84％

The light extracted from the emitter layer when considering the fresnel loss is approximately 84%.

With the addition of an anti-reflection coating at the exit face of the substrate, the fresnel loss of sapphire to air can be eliminated. Then the overall efficiency will be:

efficiency of T₁E 97.08%. 94%. 91% [ equation 6 ]]

Hexagonal geometry

The square emitters have the advantage of fitting together perfectly without wasting space. Furthermore, the cutting (dicing) operation is simplified, with only two orthogonal cuts. With respect to additional teaching of a conformal emitter, the reader is directed to the above-referenced U.S. patent application nos. 11/906,219 and 11/906,194 entitled "LED SYSTEM AND METHOD" filed on 10/1 of 2007. It should be noted that a square profile (profile) is a rectangular profile with sides of equal length. Although hexagonal emitters are described in the following exemplary embodiments, one skilled in the art will appreciate that the methods disclosed in the present application may be adapted to a variety of shapes and are not limited to any particular shape, size, configuration, or material.

The hexagonal pattern can be assembled together without wasting any space. In a shaped device, a hexagonal pattern may provide a lower volume of material than a square shaped device. Figures 7A-7D illustrate various views of a schematic of one embodiment of a hexagonal emitter 720.

The area ratio is specified by the luminance formula so the exit area (755) remains in a 6.25: 1 ratio to the emitter area (750). However, the height (h) may decrease as follows:

β＝2.5α

n₁sin(θ_e)＝n₂sinθ₂[ equation 7)]

θ＝90-θ_e＝66.42182°

The height is now 4.01 instead of 5.67 as with the square emitter 20 discussed above [ equation 4 ]. The ratio of height to side edge to emitter edge in this example is 4.01: 2.5: 1.

Using these basic unit dimensions, a solid model can be created and modeled. For example, a solid model may be created in ProE and subsequently modeled in Zemax. FIG. 8 is a schematic diagram of one embodiment of a hexagonal emitter 820 produced by shaping the emitter layer 80. In this example, the emitter layer 80 includes a shaped portion 81 and an unshaped portion 82. In shaped portion 81, substrate 810 and sidewalls 860 and 865 are shaped to a controlled height h as described above to maximize light extraction efficiency, photons from quantum well region 815 that are allowed to enter substrate 810 through interface 850 exit through exit face 855 with minimal energy loss. For additional teaching of the quantum well region, the reader is directed to the above-referenced U.S. patent application nos. 11/906,219 and 11/906,194, entitled "LED SYSTEM a n-type well," filed on 10/1 of 2007.

Fig. 9 is a schematic diagram of one embodiment of an LED 900 having multiple layers 920 including an emitter layer 80. Light emitted from emitter layer 80 enters substrate 90 through interface 101 and exits substrate 90 through interface 102 into the atmosphere. In one embodiment, substrate 90 is sapphire. The efficiency of the hexagonal-shaped emitter 820 is about 95.5% according to the solid model analyzed in Zemax. That is, about 95.5% of the emitted light is extracted from the emitter layer. Considering the fresnel losses, the total extraction efficiency is about 85%:

T₁＝1-R＝97.1％

[ equation 8)]

T₂＝1-R＝92.3％

Efficiency of T₁T₂ε＝97.1％·92.3％·95.5％≈85％

FIG. 10 is a screen shot of a solid model of a hexagonal emitter showing the near field distribution at the exit detector plane. FIG. 11 is another screen shot of the solid model of FIG. 10 showing the far field distribution after exiting the detector plane. As in the case of square shaped devices, an anti-reflection coating may be added at the sapphire to air interface (interface 102) to eliminate fresnel losses there. The overall extraction efficiency will then be about 92.6%.

Array of micro-emitters

One advantage of GaN shaping is the ability to shape large arrays of emitters to make one LED. Another advantage is that in the case of a tiny emitter, the total volume removed is also reduced. FIG. 12 is a schematic diagram of one embodiment of an LED 120 including a substrate 90, an emitter layer 80, and an N-contact layer 60. In one embodiment, substrate 90 is sapphire. In one embodiment, the N-contact layer 60 includes one or more N-contacts. In one embodiment, the emitter layer 80 comprises an array of hexagonal shaped micro-LEDs. In one embodiment, the emitter layer 80 comprises an M x M array of hexagonal shaped micro LEDs. In one embodiment, the LEDs 120 are approximately 100 micrometers (W) x 100 micrometers (L) x 80 micrometers (D). In the example of fig. 12, an array of hexagonal shaped micro LEDs is formed by shaping the emitter layer 80. Embodiments of the disclosed systems and methods may utilize any substrate and still extract all or generally all of the emitted photons. For the purpose of this example, the base substrate is sapphire, but other substrates may be used.

As mentioned above, the shaped portion of the emitter layer gives way to the (plastic to) unformed portion, which is typically in continuous contact with the substrate and forms a electrical plane or a typically continuous electrical connection. The N-contact is electrically connected with the unformed portion of the emitter layer forming the electrical plane, thus allowing current to the formed portion of the emitter layer to pass through the unformed portion of the emitter layer. In one embodiment, the N-contact may be a conductive material, such as a metal alloy, that may electrically couple the shaped and unformed portions of the substrate to a power source.

In alternative embodiments, the unformed portions of the emitter layer may be coupled to a power source at the edges, or one or more of the formed portions may be coupled to a power source, or any combination of the above or other methods or systems of supplying current may be used. Smaller and more numerous P-contacts than N-contacts may also be coupled to the power source.

The above configuration has additional advantages with respect to mounting, heat dissipation, and illumination uniformity. The escape angle of each micro-LED in combination with the very small size of each micro-LED causes the outgoing rays from one device to overlap with the outgoing rays of a large number of neighboring micro-LEDs while the light is still contained within the thickness of the substrate. When the light reaches the exit surface of the substrate, the light from the many micro-LEDs is averaged, producing a very uniform light output profile. According to some embodiments, the number of micro LEDs in the emitter layer may range from one to a few, to thousands, to millions, or more.

From a thermal standpoint, the emitting substrate of each micro-LED may be bonded directly to a submount that provides power to the micro-LED and also provides a heat dissipation path for the micro-LED. This inherently provides excellent heat dissipation. The heat density is also reduced since the emitters are spread away from each other.

Likewise, power to the P-layer is supplied at a large number of small dots all across the surface of the LED, so power can be applied to those dots through an almost continuous plane of metallization on the submount. This provides excellent current spreading. Current spreading is a known problem in providing the highest amount of light output from a device. Many configurations of different layouts of P and N GaN are used in the art to achieve improved current spreading. The micro LED construction inherently provides this extension.

More specifically, the spreading of the current in the N-layer is achieved by relatively few contacts into the N-layer, because the thickness of the N-layer is large compared to the thickness of the P-layer. Contacting the N layers at 4 locations as shown in fig. 12, for example, is one way to accomplish this. Alternatively, the N layers may be contacted at a central point or at many points near the edges of the array.

Construction method

Etching of

Etching describes a chemical process that removes substrate material in a highly controlled manner in order to produce an appropriate shape. There are generally two types of etching methods: wet etching and dry etching. Wet etching includes the use of a liquid phase etchant to remove substrate material. In dry etching, plasma etching, and reactive ion etching, ions are generated and imparted to a substrate. There, material is removed from the substrate based on a chemical reaction or based on particle momentum.

Starting from a wafer of substrate material (which may also include a material containing a quantum well region), a particular pattern of photoresist may be deposited on one side of the wafer. The wafer is then etched. Locations on the wafer covered with photoresist will not be etched and where there is no photoresist material will be removed. There are many ways to adjust the process in order to achieve the desired profile at the edge of the photoresist. For example, a thicker layer of photoresist may be applied and subsequently sacrificially removed during the etching process, or other sacrificial layers may be used in conjunction with the photoresist. These layers are removed over time by the etchant in such a way as to produce the desired profile of the LED substrate. This can be exploited to accurately etch wafers to make shaped substrates. Another way is to use multiple resists and multiple etching steps. Each photoresist and etch step may be used to remove a small layer of material. Multiple small steps can be used to obtain the desired three-dimensional shape.

The etch parameters may be based on the substrate material. The etch rate varies depending on the etchant and the substrate. For substrate materials used in LED applications, such as sapphire and silicon carbide, the etch rate using reactive ion etching may be from 250nm to 2.5 μm per minute, which may be slow for commercial production purposes. Silicon carbide is at the upper end of the above etch rate and sapphire is at the lower end.

In some embodiments, the Cl may be modified by using curved lens (toroidal lens) templates₂/BCl₃The formation of the GaN sidewalls of InGaN/GaN based epitaxial structures (epi-structures) is performed by a multi-step dry etch process in an/Ar plasma. In some embodiments, a dry etching process of the n-and p-GaN and InGaN layers may be performed by inductively coupled plasma reactive ion etching (ICP-RIE) using a photoresist and a Ni photomask. Cl may be used₂/BCl₃Controlled gas flow rate of/Ar to maintain a low etch surface roughness of less than 0.5nm at constant ICP/bias power (i.e., 300/100W) and 4mTorr chamber pressure. Using low flow rates (Cl)₂/BCl₃/Ar) gas mixture at 30mTorr, 300W ICP, 100W bias power expected for an etch rate of n-GaN ofCare should be taken to maintain a low surface roughness of the GaN sidewalls during the multi-step etching process. For example, a low root mean square (rms) roughness value of less than 1nm at a bias power of 100W is to be maintained.

Maintaining relatively high Cl for etching tapered walls of InGaN/GaN-based structures₂Flow rate and low chamber pressure (-4 mTorr) in order to achieve smooth mirror-like facets of GaN. ICP Power and Chamber pressure should be carefully performedOptimization since the tapered shape of the etched facets always depends on their selected parameters. Using appropriate etch parameters, as will be appreciated by those skilled in the art, n-GaN mirror-like sidewall facets can be obtained, which can be used to fabricate InGaN/GaN based light emitting diodes. Furthermore, at a fixed gas flow rate, and at relatively low ICP/bias power and chamber pressure, the InGaN-based material tapered sidewall shape can be further improved and modified.

FIG. 13 is a schematic diagram of one embodiment of an LED 130 including a substrate 90 and an emitter layer 80, the emitter layer 80 having an array of hexagonal emitters 820 formed in a shaped portion 81 of the emitter layer 80. As shown in fig. 13, portions or layers of the emitter layer are shaped by removing emitter layer material to form an array of micro LED emitters that may have shaped sidewalls as shown in fig. 8 described above. More specifically, the emitter layer 80 is shaped to a controlled depth or height relative to the substrate 90, leaving etched channels 131 between the emitter 820 and the generally continuous unformed layer 82 of emitter layer material 80 adjacent the substrate 90. In one embodiment, each etch channel 131 is about 0.4 microns wide. That is, in this example, the micro LEDs 820 may be spaced apart at the narrowest point by approximately 0.4 microns.

In fig. 13, the unformed portion 82 of the emitter layer 80 adjacent the substrate 90 forms a continuous N-GaN layer 132, with the unformed emitter layer material typically in continuous contact with the substrate. Thus, in one embodiment, there may be a continuous layer of emitter layer material, which is typically in contact with and electrically contacts the substrate or forms a electrical plane or continuous electrical connection. In one or more embodiments, since not all or generally not all of the emitter layer material is shaped, there will be shaped portions of the emitter layer that can be shaped to a controlled depth or height in order to form sidewalls and unformed portions or unformed regions of the emitter layer (of the emitter layer material). In one embodiment, the confined light rays traverse the longest distance or approximately the longest distance in the shaped portion of the emitter layer as discussed above (i.e., the confined light rays may traverse the shaped micro LED emitter). Thus, the confined light rays may be selected to generally terminate at a depth or height of the shaped portion of the emitter layer relative to the substrate. As discussed further above, the emitter layer material (e.g., the sidewalls of the micro LED emitter) may be shaped based on one or more limited light rays traversing the longest distance or an approximate longest distance in the shaped portion of the emitter layer.

Multi-step mesa etch process

Figure 14 is a schematic diagram of one embodiment of a multi-step mesa etching process. Within this disclosure, "mesa" refers to that portion of the wafer that remains after etching and forms what behaves as a "mesa" and becomes the light-emitting portion of the device. At step 141, the emitter layer 80 is patterned to define the bottom of the etch channel 131. At step 142, straight or near-straight sidewalls are achieved using an isotropic etch chemistry. At step 143, the emitter layer 80 is patterned again to define the top of the etch channel 131. At step 144, an anisotropic etch chemistry is used to create a bend in the sidewalls. In some embodiments, subsequent processing may include metallization and passivation. In various embodiments, multiple photolithography and etching steps may be used to better improve the final profile of the light emitter layer. The etch chemistry can be selected to change the sidewall profile from straight (isotropic) to curved (anisotropic). This can be done in a single step to create the curved shape or in multiple steps to etch individual facets in the light emitter layer sidewall shape. The order of the manufacturing steps may be changed as desired. For example, the top of the mesa may be defined first, followed by photolithography and etching. The step may etch deeper into the epitaxial structure.

In the example of fig. 14, one embodiment of the LED 140 can be fabricated by the multi-step mesa etching process described above. In this example, the LED 140 includes a substrate 90 and an emitter layer 80. In this example, the emitter layer 80 contains a shaped portion 81 formed by the multi-step mesa etching process described above, leaving an unshaped portion 82 of the emitter layer 80 adjacent the substrate 90. The patterning and etching steps of the multi-step mesa etch process create etched channels 131 between emitters 820. As described above with reference to fig. 8, each emitter 820 may include a shaped substrate 810 having shaped sidewalls 860 and quantum well region 815. The shaped substrate 810 has an emissive material. In one embodiment, the emissive material is GaN. In one embodiment, substrate 90 is sapphire.

Other etching processes may also be used to fabricate the LED 140. For example, one embodiment of a method for shaping an emitter layer may include, in the following order: depositing a p-layer metal on the substrate, depositing a reflective layer on the p-layer metal, depositing SiO₂A protective layer (buffer) is deposited onto the reflective layer, the deposited layer is etched to the desired shape, and then an n-layer of metal is deposited. As another example, one embodiment of a method for shaping an emitter layer may include, in the following order: depositing a mask a pattern, etching away unwanted material according to the mask a pattern, depositing a mask B pattern, etching away additional material according to the mask B pattern, repeating the patterning-etching steps to establish the desired height, depositing an n-layer of metal, a p-layer of metal over the n-layer of metal, and finally a reflective layer.

Some embodiments may skip the isotropic etching step for achieving straight sidewalls and proceed directly to shaping the emitting material, which in one embodiment comprises GaN. For example, one embodiment of a method for shaping an emitter layer may include, in the following order: the coated (blanket coat) substrate is covered with a p-layer metal, the p-layer metal coated substrate is patterned with photoresist, and the unwanted material is etched away accordingly. In one embodiment, ICP-RIE is used to etch away unwanted material from the emitter layer. Other etching methods may also be used.

This method uses only a single mask. GaN profile and resulting p-contact are usedHard masking avoids the need to align the mesa back and eliminates the photoresist patterning step. By changing chlorine (Cl)₂) And boron trichloride (BCl)₃) And different GaN etching slopes can be obtained by the concentration of the gas. More specifically, in some embodiments, a series of steps are performed to alter Cl while the GaN material is being etched₂And BCl₃The ratio of the concentrations affects the local slope. For example, greater concentrations of Cl may be used₂Or using Cl only₂To obtain a straighter side wall. Rich in BCl₃The chemical of (a) produces a polymer to passivate the sidewalls. To obtain a specific slope at height 0, Cl₂And BCl₃The plasma may have a specific concentration ratio. To obtain another slope at height 1, Cl can be varied₂And BCl₃The concentration ratio of (a). The above steps may be repeated until the desired height is reached. The slope of the sidewalls of each micro LED in the emitter layer may vary from very shallow to very steep over the entire height of the emitter layer and depending on the concentration ratio of the etching plasma, thus shaping the emitter layer.

Some embodiments may utilize a single photoresist pattern with two mask materials for the shaped GaN etch. For example, one embodiment of a method for shaping an emitter layer may include the following features:

1) the photoresist pattern is too large relative to the final GaN region.

2) The sidewall can be tilted with focus/exposure for further profile control.

3) The oxide is used as a hard mask. In one embodiment, the hard mask may be etched in BOE/HF or using sulfur hexafluoride (SF)₆) The plasma etches the hard mask. Buffered Oxide Etch (BOE) is a mixture of ammonium fluoride and hydrofluoric acid (HF) with a more controlled etch rate of silicon oxide.

4) A resist etch ratio of about 1: 1 and an oxide etch ratio of about 5: 1 are used. The 1: 1 etch ratio is used to specify (target) resist thickness so that the resist is consumed in the etch. This reveals the previously protected region of GaN.

5) The oxide hard mask is etched at a ratio of about 5: 1, making it robust to the remainder of the etch (robust).

6) Control of Cl₂And BCl₃The ratio may also contribute to profile control.

Mechanical forming

Fig. 14 represents one method of forming a micro LED array and is exemplary and not limiting: other methods for forming micro LED arrays are possible and within the scope of the invention. In some embodiments, methods for producing shaped GaN material include using a laser to ablate GaN material to form a desired shape and provide a desired smoothness. Laser ablation is the process of using a high power laser to remove or eject (project) quantum well regions or substrate material to make LEDs. Each laser pulse will remove only a very small amount of material. The laser may be switched to remove material with each subsequent pulse. By transitioning in the X-Y and Z directions, three-dimensional shapes can be removed. Embodiments of laser ablation may be used to shape the substrate faster than etching. Laser ablation can remove about 500 μm to 1mm of thickness per minute in silicon carbide and sapphire using known techniques.

Another approach would involve liquid jet (jet) cutting, using particulates in a water or oil jet to dislodge the material. The water jet may be used to ablate (abllate) the wafer to form a substrate of a desired shape. In one embodiment of water jet ablation, short pulses of water may be used to ablate the wafer in stages. The process of ablating the wafer using the pulses of water may be similar to that described above with respect to laser ablation. In one embodiment of water jet ablation, a water jet can be used to completely cut through a wafer at an angle, then the angle is slightly shifted and the water jet is used to cut through the wafer at a slightly higher angle, ultimately producing a substrate of the desired shape. In yet another embodiment, the water jet may be loaded with an abrasive material (e.g., industrial diamond particles) to increase the rate of erosion material.

Another option is to mechanically remove material by grinding, milling, sawing, ultrasonic grinding, polishing, drilling or other systems or methods of mechanical removal. There are many methods for removing material by mechanical removal to shape one or more LEDs. Although the above-described methods of ablating a wafer of material to form a desired shape have been described separately, the above-described methods may be combined. For example, a combination of mechanical removal and water jet ablation may be used to ensure a properly curved sidewall shape. Similarly, various other combinations of methods and techniques for removing substrate material from a wafer may be used as appropriate depending on the substrate material. In one embodiment, the mechanical removal of material may be performed in stages.

In an ultrasonic abrading embodiment, a tool having the inverse shape of the LED or LEDs is loaded with (prime) abrasive and contacts the substrate material while the tool is ultrasonically vibrated so as to produce a rubbing/abrading (abrading) action on the substrate material such that material is removed and a shaped substrate is fabricated.

Additional examples of systems and METHODs for shaping LED substrates and sidewalls are described in the above-referenced U.S. patent application nos. 11/906,219 and 11/906,194, entitled "LED SYSTEM AND METHOD," filed on 10/1/2007, which are incorporated fully herein for all purposes. Various methods of shaping the sidewalls may be applied to the light emitter layer as described above. For example, fig. 15 is a schematic diagram of one embodiment of an LED150 comprising an array of micro LEDs 152 in a hexagonal geometry with curved sidewalls 155. The LEDs 150 in this example take a rectangular shape. However, other shapes are possible. As another example, fig. 16 is a schematic diagram of one embodiment of an LED 160 comprising a substrate 161 and an array of micro-LEDs 162 in a hexagonal geometry with angled sidewalls 165. As yet another example, fig. 17 is a schematic diagram of an embodiment of an LED 170 comprising a substrate 171 and an array of micro LEDs 172 in a hexagonal geometry with straight sidewalls 175.

Growth of

In some embodiments, micro LEDs may also be fabricated by growing emitter layers. Using GaN as an example, deposition is one of many common processes for growing GaN thin films. GaN has been grown by many types of epitaxial growth and on several substrates including SiC and sapphire. Exemplary GaN growth methods include, but are not limited to, Metal Organic Chemical Vapor Deposition (MOCVD), Iodine Vapor Phase Growth (IVPG), Molecular Beam Epitaxy (MBE), Mechanical Sputter Epitaxy (MSE), and Hydride Vapor Phase Epitaxy (HVPE).

In some embodiments, a method of shaping an emitter layer of an LED may include determining an exit area (b) and an emitter area (a) of a micro LED (also referred to as a micro emitter), wherein the exit area (b) has an exit face of a first geometry, and wherein the emitter area (a) has a quantum well region of a second geometry. Using the exit area (b) and the emitter area (a), the minimum height (h) of the micro-emitter can be calculated as described above. The method may further include growing the micro-emitters by deposition according to the first geometry, the second geometry, and the minimum height (h) to form shaped portions that meet the minimum height (h). One or more micro LEDs may thus be fabricated simultaneously. In some cases, unformed portions may also be formed. The unformed portion of the emitter layer abuts the base substrate. Sapphire is one example of a suitable base substrate. In growing the micro-emitter, a sidewall of the micro-emitter is disposed and shaped such that at least a majority of light rays having a straight transmission path from the emitter region to the sidewall are reflected to an exit face, wherein an angle of incidence at the exit face is less than or equal to a critical angle at the exit face. In some embodiments, micro LEDs may also be fabricated by growing and shaping emitter layers using techniques well known to those skilled in the art. In some embodiments, the growth and shaping of the emitter layers may be performed alternately, simultaneously, or generally simultaneously.

Thus, in some embodiments, an LED manufactured by a method of shaping an emitter layer of an LED may include, an emitter layer on a surface of a base substrate, wherein the emitter layer has a shaped portion, wherein the shaped portion includes an exit region (b), an emitter region (a), a minimum height (h), and sidewalls, wherein the exit region (b) has an exit face of a first geometry, wherein the emitter region (a) has a quantum well region of a second geometry, wherein the minimum height (h) is determined using the exit region (b) and the emitter region (a), wherein each of the sidewalls is arranged and shaped such that at least a majority of rays having a straight transmission path from the emitter region to the sidewall are reflected to the exit face, wherein an angle of incidence at the exit face is less than or equal to a critical angle at the exit face.

Applications of

LEDs with shaped light emitter layers may be used in a variety of applications. One reason for this versatility is that micro LEDs can be arranged in various ways to form the desired LEDs. The LEDs, each with an array of tiny emitters, may also be arranged to produce a desired amount of light and a desired light pattern. For example, the micro-LEDs and/or LEDs may be arranged in a square, rectangular, circular, or other shape. Using an array of LEDs to produce a desired amount of light may be more efficient or may take up less space than using a single LED. As illustrated in fig. 14, the micro LED array may be formed from the same wafer, wherein the wafer material is removed to form the etched channels 131 and emitters 820. Although the above embodiments describe micro-LEDs formed from a wafer of material, the shaped substrate used to make the LEDs may be formed from a strip of substrate material.

In some cases, it may be desirable to produce white light using LEDs. This may be accomplished by having light from a monochromatic (e.g., blue), short wavelength LED incident on a phosphor or other particle that absorbs light and re-emits light having a wavelength that is perceived by the human eye as white light. Phosphors or other particles may be used for embodiments of LEDs that produce white light.

Coating the exit face or faces of the LED may have manufacturing advantages that may allow for simplification of white LED manufacturing, which in turn may reduce the cost of white LED manufacturing. For example, the side of the wafer outside of which the shaped substrate LEDs are to be formed may be coated with a layer containing phosphors or other particles that can be excited to emit white light (i.e., a particle coating). The side of the wafer not coated with the particle coating may be ablated. When a wafer has been ablated to make multiple LEDs, the LEDs will have an exit face with a coating of particles necessary to produce white light. Furthermore, since the shaped substrate directs a very large fraction of the light entering the substrate to a known exit face or faces, coating a particular exit face or faces can be highly effective in producing white light. Thus, the use of a shaped substrate can eliminate the need to coat the sidewalls or a portion of the sidewalls of the LED with a particle coating. Thus, it would not be necessary to apply the particle coating to each LED separately. Applying a particle coating to the side of the wafer may be less expensive than applying a particle coating to individual LEDs. The sidewalls of the substrate may be designed such that light scattered back into the substrate by interaction with the particle coating may be partially or fully re-used. The use of nanoparticles to produce white light in combination with LEDs allows for minimal deflection of the light, thus minimizing the back-scattered light and maximizing the light emitted from the exit face.

Potential applications for embodiments of the LED include cellular telephone display illumination. Current systems typically use three side-emitting blue LEDs with phosphor-filled encapsulant materials to produce white light. The sides of the LED are typically opaque and most of the generated light is absorbed by the sidewalls. This results in more than 50% of the light being lost due to absorption. In addition, the refractive index change at the encapsulant-to-air interface creates a TIR condition for outgoing light rays impinging on the interface at greater than the critical angle. This results in approximately 44% loss at the interface. Embodiments of shaped substrate LEDs can deliver 80% of the generated light to the optical waveguide, resulting in a very large system brightness improvement.

Another potential application of an embodiment of the LED is as a cellular phone camera flash. Present systems typically use LEDs with gaussian energy distributions that produce very bright areas in the center of the image and dark areas at the edges, resulting in uneven illumination of the subject. Furthermore, the beam shape of the present flash unit is circular, whereas the image captured by the CCD camera is rectangular. In addition, the refractive index change at the encapsulant-to-air interface creates a TIR condition for outgoing light rays impinging on the interface at greater than the critical angle. This causes losses at the interface associated with the exit solid angle. On the other hand, embodiments of the LED may deliver a rectangular or square flash, with 80% of the light entering the substrate of the LED being provided to the image area in a uniformly distributed manner. This results in a more uniform scene illumination and a higher level of illumination compared to prior art LED flash systems.

Another potential application of an embodiment of an LED is for a liquid crystal display ("LCD") backlight. Conventional LCD systems use linear arrays of red, green and blue LEDs. Light from the LEDs is directed into a mixed light guide to provide color and intensity uniformity. Typically, the LED has a dome placed over the LED, and light is captured by an elliptical reflector to direct the light to the light guide. Although well suited for a point source elliptical reflector, the LED is not a point source and some of the light rays do not reach the focal point (focii) within the light guide. Furthermore, since some light from the dome encapsulant is emitted at greater than 180 degrees, some light is absorbed by the substrate, PCB board, and other components. Furthermore, due to the large size of the dome relative to the size of the cavity in the dome, typically a certain percentage of the light is refracted. Since these losses are multiplicative, only a certain percentage of the light initially emitted from the LED actually reaches the light guide.

On the other hand, embodiments of the LED can provide up to 80% of the light entering the substrate of the LED to the light guide at the desired cone angle (assuming fresnel losses). Thus, lower power LEDs may be used to achieve the same results as are possible in current systems, or more light may be delivered at the same power consumption level. Indeed, in some embodiments, an optical waveguide may not be required and the LED array may be used to directly backlight the LCD.

Another potential use of embodiments of LEDs is in automotive headlamps, flashlights, digital light processing ("DLP") systems, and other devices. The shape of the LED may be selected to provide a desired projection cone and beam profile. Furthermore, the combination of AN LED and a condenser lens or other OPTICAL DEVICE, such as the primary optic ("POD") described in U.S. patent application No.11/649,018 entitled "DEVICE OPTICAL DEVICE FOR DIRECTING LIGHT FROM AN LED," allows emission in a narrow solid angle (on the order of 0.1 steradians or less) while preserving radiance and doing so in a very small volume. Such a combination may be suitable for use in flashlights, spotlights, or any other narrow beam application.

In summary, embodiments of the micro LED construction disclosed in the present application may provide improvements over the prior art in the following respects:

● Current spreading

● Heat dissipation

● uniformity of emission

● increased percentage of active region (P layer) to inactive region (N layer) contacts

● higher external quantum efficiency

● generate less heat per lumen due to higher extraction efficiency

● conservation of true brightness

Advantages of the systems and methods disclosed in this application over shaping the entire LED (including the substrate) or shaping the substrate alone include extracting 100% or approximately or typically 100% of the light generated at the emitter layer from the emitter layer. Furthermore, less material is removed, and little or no substrate material (which may be difficult or costly to remove, e.g., in the case of sapphire) needs to be removed, which may speed up and reduce the cost of fabricating the LED. Further, since the light emitting layer has been etched in some LED forming processes, etching the light emitting layer according to the etching of the light emitting layer described in the present application can greatly increase the light extraction efficiency without greatly increasing the time required for manufacturing.

Another feature of this design is that phosphors can be added at the exit face of the substrate to change the color of the emitted light. If, for example, a micro LED is made to emit blue light and a phosphor is added to convert a portion of that light to yellow light, the sum of the emitted light will appear to be white light.

Due to the inherent design of the micro-LED, any light reflected back into the substrate from the phosphor will be internally reflected back into the quantum well region of the micro-LED. This allows efficient photon reuse with low losses. If a nanoparticle phosphor is used, there will be no back scattering and the highest efficiency will be obtained.

Another feature of such a construction is to allow for optically smooth sidewalls of the substrate material. Individual dies (die) are typically cut by diamond sawing or by dicing and breaking in industry. These methods produce either optically rough die sidewalls (diffusing surfaces) or perhaps optically smooth but randomly contoured (scribed and broken surfaces). Generally in the industry, die separation methods are considered to be merely a way of separating devices and little attention is paid to the quality of those surfaces.

According to various embodiments of LEDs with shaped light emitter layers, the sidewalls may be used as additional TIR surfaces in order to preserve the direction of light rays from micro-LEDs near the die edge. In this case, the light emitted by the micro-LEDs near the edge may strike the sidewall before it reaches the exit face of the substrate. In the case of optically smooth sidewalls, the light will be internally reflected and relayed to the exit face of the substrate. This keeps the rays striking the exit face doing so at an angle no greater than the critical angle so they can pass through the exit face.

In one embodiment, the LED dies can be separated as is commonly done in the industry or according to general industry practice. Thus, embodiments of the systems and methods disclosed in the present application can be easily integrated into existing processing of LED fabrication, pipeline industrialization, and can utilize existing equipment and facilities.

In the embodiments disclosed above, fresnel losses may occur at the interface between the emitter layer and the substrate and may occur at the interface between the substrate and air or other medium. Fresnel losses at the interface between the substrate and air or other medium can be reduced by coating the exit face of the substrate with an anti-reflective coating.

If desired, the sidewalls of the substrate may be made optically unsmooth, or partially smooth, in which case some portion of the light impinging on the sidewalls may be allowed to exit through the sidewalls rather than be reflected to the main exit face. This may have advantages for certain lighting situations.

While this disclosure describes particular embodiments, it should be understood that the embodiments are exemplary and that the scope of the invention is not limited to these embodiments. Many variations, modifications, additions and improvements to the embodiments described above are possible. For example, other substrates that allow light to pass through may be used in addition to sapphire and silicon carbide. For example, the substrate may be made of glass, moldable glass, or diamond. It is contemplated that these variations, modifications, additions and improvements fall within the scope of the invention as detailed within the following claims.

Claims (25)

1. A method of shaping an emitter layer of an LED, comprising:

determining an exit area (b) and an emitter area (a) of the micro-emitter, wherein the exit area (b) has an exit face of a first geometry, and wherein the emitter area (a) has a quantum well region of a second geometry;

determining a minimum height (h) of the micro-emitter using the exit area (b) and the emitter area (a);

removing matter from or growing the emissive material according to the first geometry, the second geometry, and the minimum height (h) to form a shaped portion having one or more micro-emitters that satisfy the minimum height (h); and

shaping sidewalls of the micro-emitter, wherein each sidewall is disposed and shaped such that at least a majority of rays having a straight transmission path from the emitter region to the sidewall are reflected to an exit face, wherein an angle of incidence at the exit face is less than or equal to a critical angle at the exit face.

2. The method of claim 1, wherein removing a substance from an emissive material further comprises:

patterning the emissive material using a first mask having a first geometry;

etching the emissive material according to the minimum height (h) and the first geometry;

patterning the emissive material using a second mask having a second geometry; and

the emissive material is etched according to a second geometry.

3. The method of claim 2, wherein the first mask defines a minimum width of the etch channels in the emitter layer, and wherein the one or more micro-emitters comprise an array of micro-emitters spaced apart by the minimum width of the etch channels.

4. The method of claim 1, wherein the emissive material comprises gallium nitride (GaN).

5. The method of claim 1, wherein removing the species from the emissive material or growing the emissive material by deposition according to the first geometry, the second geometry, and the minimum height (h) further forms an unshaped portion of the adjoining base substrate.

6. The method of claim 5, wherein the base substrate comprises aluminum oxide (Al)₂O₃) Or silicon carbide (SiC).

7. The method of claim 5, further comprising applying an anti-reflective coating on a surface of the base substrate, wherein the surface acts as an interface with air.

8. The method of claim 1, wherein the first geometric configuration has four sides or six sides.

9. The method of claim 1, wherein determining the minimum height (h) of the micro-emitter further comprises determining one or more limiting rays that traverse the longest distance or an approximate longest distance from an emitter area (a) to an exit area (b) of the micro-emitter.

10. An LED made by a method of shaping an emitter layer of an LED, the method comprising:

determining an exit area (b) and an emitter area (a) of the micro-emitter, wherein the exit area (b) has an exit face of a first geometry, and wherein the emitter area (a) has a quantum well region of a second geometry;

determining a minimum height (h) of the micro-emitter using the exit area (b) and the emitter area (a);

removing matter from or growing the emissive material according to the first geometry, the second geometry, and the minimum height (h) to form a shaped portion having one or more micro-emitters that satisfy the minimum height (h); and

shaping sidewalls of the micro-emitter, wherein each sidewall is disposed and shaped such that at least a majority of rays having a straight transmission path from the emitter region to the sidewall are reflected to an exit face, wherein an angle of incidence at the exit face is less than or equal to a critical angle at the exit face.

11. The LED of claim 10, wherein the emitter material comprises gallium nitride (GaN).

12. The LED of claim 10, wherein removing a substance from the emissive material or growing the emissive material by deposition according to the first geometry, the second geometry, and the minimum height (h) further forms an unshaped portion of the adjoining base substrate.

13. The LED of claim 12, wherein the base substrate comprises aluminum oxide (Al)₂O₃) Or silicon carbide (SiC).

14. The LED of claim 12, wherein the method further comprises applying an anti-reflective coating on a surface of the base substrate, wherein the surface acts as an interface with air.

15. The LED of claim 10, wherein removing the substance from the emissive material further comprises:

patterning the emissive layer using a first mask having a first geometry;

etching the emitter layer according to the minimum height (h) and the first geometry;

patterning the emissive layer using a second mask having a second geometry; and

the emissive material is etched according to a second geometry.

16. The LED of claim 15, wherein the first mask defines a minimum width of the etched channels in the emitter layer, and wherein the one or more micro-emitters comprise an array of micro-emitters spaced apart by the minimum width of the etched channels.

17. The LED of claim 10, wherein the first geometric configuration has four sides or six sides.

18. The LED of claim 10, wherein determining the minimum height (h) of the micro-emitter further comprises determining one or more limiting rays that traverse the longest distance or an approximately longest distance from the emitter area (a) to the exit area (b) of the micro-emitter.

19. An LED, comprising:

a base substrate; and

an emitter layer on a surface of a base substrate, wherein the emitter layer has a shaped portion, wherein the shaped portion includes an exit area (b), an emitter area (a), a minimum height (h), and sidewalls, wherein the exit area (b) has an exit face of a first geometry, wherein the emitter area (a) has a quantum well area of a second geometry, wherein the minimum height (h) is determined with the exit area (b) and the emitter area (a), wherein each of the sidewalls is disposed and shaped such that at least a majority of rays having a straight transmission path from the emitter area to the sidewall are reflected to the exit face, wherein an angle of incidence at the exit face is less than or equal to a critical angle at the exit face.

20. The LED of claim 19, wherein the emitter layer further comprises an unshaped portion abutting the base substrate.

21. The LED of claim 19, wherein the emitter layer comprises gallium nitride (GaN).

22. The LED of claim 19, wherein the base substrate comprises aluminum oxide (Al)₂O₃) Or silicon carbide (SiC).

23. The LED of claim 19, wherein the first and second geometries comprise different sized squares, rectangles, or hexagons.

24. The LED of claim 19, wherein the emitter layer comprises an array of emitters, each emitter having an exit area (b), an emitter area (a), a minimum height (h), and sidewalls.

25. The LED of claim 19, wherein the shaped portion of the emitter layer is shaped to achieve at least 75% extraction of light from the LED.