HK1146765B - Recrystallization of semiconductor wafers in a thin film capsule and related processes - Google Patents

Description

Recrystallization of semiconductor wafers in film coatings and related processes

RELATED APPLICATIONS

The benefit of U.S. provisional application No.60/937,129 filed on 26.6.2007 entitled "Casting and Directional Solidification of Photonic Silicon Wafers in a Capsule and Related Processes" is hereby claimed, the entire disclosure of which is hereby incorporated by reference in its entirety.

Background

Crystalline silicon wafers (both single crystal and polycrystalline) are the basic building blocks in most photovoltaic modules manufactured today. All of these wafers are made by slicing ingots, except for the small market share held by ribbon silicon. The cutting itself is rather expensive and, in addition, it wastes more than half of the expensive silicon starting material as sawdust. The result is that the cost of the wafer accounts for almost half of the cost of manufacturing a photovoltaic module.

On the other hand, the ribbon mode produces less flatness and more highly defective than wafers obtained by slicing ingots. This is caused by the high temperature gradient required during ribbon curing. Thus, while ribbon technology provides less cost per unit area, this benefit is offset by lower cell efficiency.

It is therefore an object of the invention disclosed herein to produce a silicon wafer fabrication technique that will establish new standards by combining high electronic quality with low cost. It is an object to provide silicon wafers having flatness and defect density comparable to or better than those of polycrystalline wafers cast (cast) and diced on an industry standard.

A particular object is to produce silicon wafers without the need for dicing. Part of this object is to provide a method to first create the geometry of the wafer and then, in a separation process, create the desired crystal structure.

One aspect of the present invention is to separate the functionality of creating wafer geometry (wafer geometry) from the functionality of creating a suitable grain structure. Another object is to produce the geometry of the wafer in a first high-throughput step. In a second step, the grain structure of the wafer is modified by a directional solidification process.

Disclosure of Invention

A more complete summary appears below, immediately preceding the claims. As schematically illustrated in the form of a flow chart in fig. 1, in a first step for producing a photovoltaic substrate, a pre-wafer (preform wafer)408 is produced, which essentially has the desired end, recrystallized wafer geometry. However, the original wafer is quickly fabricated, such as by a rapid solidification process 106. The pre-fabricated raw wafer may, and typically will, be composed of very small grains, making it unsuitable for use as a photovoltaic wafer. Silicon is a typically suitable material, although the technique may be applied to other materials.

The pre-fabricated wafers are then loaded 118 into a conformal coating (conformal capsule) of clear film layers. This consumable, high purity coating will contain and protect the silicon during the next step in which the encapsulated wafer is recrystallized 122 to produce a recrystallized grain structure suitable for photovoltaic applications. Such a film coating may be made, for example, by heating a silicon wafer in the presence of steam, causing silicon dioxide to grow on the entire outer surface of the wafer. Typically, a 1-2 micron thick layer will be grown. Other materials, or layers of materials, may also be used for the coating.

The crystal structure of the wafer is then modified 122 by passing it through a furnace that creates a region (region) in the space where a melt zone (zone) occurs through which the wafer passes, causing recrystallization, a new and modified crystal structure. The furnace may include heating rods and insulating bricks. The cooling zone of the furnace must be properly controlled to minimize thermally induced stresses and crystalline defects caused thereby.

The film coating contains melted material (molten materail) during recrystallization. It also helps to maintain the shape of the original wafer, although a backing plate may be required to establish flatness of the product. The film capsule acts as a diffusion barrier (diffusion barrier) to prevent impurities from entering the wafer. By controlled grain nucleation, the coating plays an important role in determining the crystal structure of the resulting final wafer. For some coating materials, the furnace may be operated in an air environment. For example, if silica is the coating material on a silicon wafer, the operation in air repairs any defects in the coating. The thin nature of the capsule ensures that there is little stress on the wafer caused by any mismatch in the coefficient of thermal expansion between the wafer and the capsule material. After recrystallization, the film coating is removed 123, for example by etching. Destructive etching is not required, such as after conventional dicing formation, since there is no damage.

The several objects of the invention disclosed and claimed herein will be more fully understood with reference to the appended claims and drawings, in which:

drawings

FIG. 1 is a schematic representation in flow chart form of the process of the present invention for forming a silicon wafer having a grain structure suitable for photovoltaic applications;

FIG. 2 is a schematic representation showing the formation of a film coat completely around an original wafer preform (wafer preform);

FIG. 3 is a schematic representation of a pre-fabricated wafer surrounded by a capsule;

FIG. 4A schematically illustrates a wafer within a furnace in a fully solid, raw crystal form;

FIG. 4B schematically illustrates the wafer of FIG. 4A, with a trailing portion (trailing portion) of the original crystal form still in a solid state and a leading portion (leading section) in a liquid state, for an extended period of time within the furnace;

FIG. 4C schematically shows the wafer of FIG. 4A, with the trailing portion in an original crystalline form still solid, the middle portion (middle portion) in a liquid state, and the leading portion in a recrystallized solid state, for an extended period of time within the furnace;

FIG. 4D schematically shows the wafer of FIG. 4A with a trailing portion in a liquid state and a leading portion in a recrystallized solid state for an extended period of time in the furnace;

FIG. 4E schematically illustrates the wafer of FIG. 4A, now in a fully recrystallized, solid state, for an extended period of time in the furnace;

FIG. 5A schematically illustrates a wafer within a furnace, which is completely liquid, having brought its entire volume to its melting point at substantially the same time;

FIG. 5B schematically illustrates the wafer of FIG. 5A being removed from the furnace, with a trailing portion being in a liquid state and a leading portion being in a recrystallized solid state;

FIG. 6A is a schematic representation of a wafer after recrystallization;

FIGS. 6B and 6C are digital images of the wafer similar to that shown schematically in FIG. 6, after recrystallization and after etching to remove the coating, with FIG. 6B showing the top surface and FIG. 6C showing the bottom surface;

FIG. 7 is a schematic representation of a wafer in a three-dimensional view, wherein as the wafer is pulled in the direction of arrow P to the right, the crystal is solidified on the right hand side and grows into liquid on the left hand side, with a crystal growth frozen front (crystal growth frozen front) F concave in the direction of the liquid_A。

FIG. 7AI is a schematic representation of FIG. 7 taken along line A-A in cross-section showing a heat flow pattern (heat pattern);

FIG. 7AII is a diagram showing a freeze front F similar to that shown in FIG. 7AI_AA schematic representation of an associated crystal growth pattern (crystal growth pattern);

FIG. 7BI is a schematic table in cross-sectionShowing an advantageously shaped frozen front F_BShowing a heat flow pattern;

FIG. 7BII is a schematic representation of the wafer shown in FIG. 7BI showing the freeze front F shown in FIG. 7BI_BAn associated crystal growth pattern;

FIG. 7C is a schematic representation in cross-section showing a freeze front F that is less advantageous than the freeze front shown in FIG. 7BI, but still has some utility_C；

FIG. 7D is a schematic representation in cross-section showing a freeze front F that is less advantageous than the freeze front shown in FIG. 7BI, but still more advantageous than the freeze front shown in FIG. 7C_DWherein the smaller interface angle is equal to about 90 degrees;

FIG. 8A schematically illustrates an apparatus for manufacturing a sealed wafer of the present invention with upper and lower heaters having different heat outputs equally spaced from the wafer being processed;

FIG. 8B schematically illustrates an apparatus for manufacturing a sealed wafer of the present invention with upper and lower heaters equally spaced from the processed wafer with equal heat output;

figure 8C schematically illustrates an apparatus for manufacturing sealed wafers of the present invention with upper and lower heaters having equal heat output and with backing plates supporting processed wafers having unequal thicknesses;

FIG. 8D schematically illustrates an apparatus for manufacturing a sealed wafer of the present invention with an insulating element interposed between the heater and the wafer being processed;

FIG. 9 is a schematic representation of a textured preform (textured preform) having grooves and ridges through the wafer surface;

FIG. 10 is a schematic representation showing a wafer preform encapsulated in a multilayer capsule;

FIG. 11 is a schematic representation showing an embodiment of the present invention, using a solid lower backing plate and an upper backing element that is a powder;

FIG. 12 is a schematic representation showing a stack of two wafers and three backing plates;

FIG. 13 is a schematic representation showing a stack including three wafers and four backing plates;

FIG. 14A is a digital image from the top of a sealed wafer that has been recrystallized without a backing plate, resting (rest on) on a pair of bars, which are also shown;

fig. 14B is a digital image of the recrystallized wafer shown in fig. 14A, viewed from the bottom, showing how the wafer collapses (slips) around the support bars; and

fig. 15 schematically shows a wafer within a furnace having a trailing portion in the form of an original crystal, a middle portion in a liquid state, and a leading portion in a recrystallized solid state, the wafer being arranged to pass vertically through the furnace rather than horizontally as shown in fig. 4C.

Detailed Description

One way disclosed herein is to fabricate silicon wafers without the need for dicing, by first creating the geometry of the wafer and then creating the desired crystal structure in a separation process. (this sequence is the reverse of the sequence of the ingot process in which the crystal structure is created and then the geometry is created by slicing.)

An overview of the process is shown with reference to figure 1 in flow chart form, and with reference to figures 2 and 3 at different stages of production. As shown in fig. 1, the wafer geometry may be generated in step 108. For example, a rapid curing technique 106 may be used, as described below. Alternatively, the chemical vapor deposition technique 104 may be used. This results in raw wafers having an average grain size (grain size) of less than about 10 square millimeters, and typically less than about 1 square millimeter.

As schematically illustrated in fig. 2 and 3, in an important step, a super-clean film capsule 320 is created 118 around the original wafer 216. This can be done in a furnace with an oxygen containing atmosphere (oxygen containing atmosphere). It is convenient to support the wafer 216 with a support member (not shown) that blocks only a minimal surface area from complete contact with the oxygen-containing atmosphere. The coating 320 serves the following functions: i) the silicon and its shape are preserved during the subsequent recrystallization step 122; ii) providing an environment for control of grain nucleation and geometric configuration control; and iii) as a chemical barrier to maintain the purity of the silicon. For example, the coating 320 may be made by growth or deposition of silicon dioxide. In addition, it may have multiple layers, providing control over grain nucleation through a dedicated inner layer, and control over strength through a dedicated outer layer. The coating may also be formed in a different manner. All of this is discussed below. The wafer and capsule form a sealed wafer assembly 319.

As schematically illustrated with reference to fig. 4A-4E, the desired crystal structure may be produced by zone recrystallization. According to one embodiment, the raw wafer 416 is sandwiched between upper 424 and lower 426 rigid backing plates (typically SiC). The plate constrains the capsule 420 (and thus the final wafer) to be flat and also provides a path for heat dissipation in addition to the wafer itself. A thin layer 428 of powder (typically silica powder) facilitates release of the capsule 420 from the backing plates 424, 426. The wafer and capsule together with backing plate 418 are sometimes referred to herein as a sandwich (sandwich). The radiant heaters 432, 434 create a molten liquid region L. At least one upper heater 432 is placed at a distance du from the middle line of the sandwich structure and at least one lower heater 434 is placed at the other side at a distance dl. (additional heaters not shown, and others may be provided for adjusting (tailor) cooling curves.) a spacer (spacer)410 may optionally be provided to maintain the desired final wafer dimensions against the compressive action from the force exerted by gravity on the upper backing plate and from any clamping force provided to maintain the sandwich 418 intact, and also from the transport mechanism 412, particularly when the wafer is melted, as described below. The clamping element may be an integrated, such as a large C-shaped (C-shaped) clamp. Alternatively, two or more independently operated elements may be forced together to clamp the wafer between them.

The processed wafer 416 moves from left to right as shown in fig. 4A-4E, indicated by arrow P. The transport mechanism is schematically illustrated by a pair of rollers 412. Any suitable transport mechanism is contemplated as part of the invention herein, including without limitation a push furnace or walking beam transport or belt transport, as is known in the art. The transmission may be horizontal as shown in fig. 4A-4E or vice versa, as described below.

As shown in fig. 4A, initially, the original wafer 416 is completely solid with an undesirable crystal structure dominated by small crystals. As the wafer 416 moves into the furnace (as schematically illustrated in fig. 4B), the leading edge (trailing edge) of the wafer melts and the trailing edge (trailing edge) remains unmelted proximate to the heating elements 432, 434. A molten region L is formed within the wafer. A melt interface M is formed between the downstream melting zone L and the upstream still solid zone S. The melt interface M is shown as having a particular shape in the figure. However, the shape may be different under different heat input conditions and have no significant impact on any of the processes discussed herein.

As the heated and then cooled wafer 416 moves forward (to the right) in the direction of arrow P, as schematically shown in fig. 4C, it eventually moves far enough away from the heat sources 432, 434 that the previously melted portions cool and solidify to have a new crystalline structure. Between the newly solidified part C and the liquid part L there is a frozen interface (freezeinterface) F, where as shown the liquid material is on the trailing side L (left) and the solid material is on the leading side C.

In general, the position in space of freezing interface F and melting interface M, and the melting region L therebetween, remains substantially fixed relative to furnace components such as heaters 432, 434. The wafer 416 moves relative to the fixed position in space just mentioned. Thus, different portions of the moving wafer 416 change from an initially solid state to a liquid state and then to a solid recrystallized form. Thus, the wafer is moved forward through the spatial location where the melted region L is formed and then through the spatial location where cooling, recrystallization and solidification occur.

As the wafer 416 continues to move forward to the right, all remaining, original crystalline structure portions become liquid, as schematically shown in fig. 4D, so that there is no melting interface, only a freezing interface F. Eventually, the entire wafer passes through and beyond the frozen interface F, as shown in fig. 4E, and is entirely recrystallized solid C without an interface, whether a melt or frozen interface.

The wafers (both single crystal and polycrystalline) have been oxidized and recrystallized. Fig. 6A schematically shows a recrystallized wafer with the oxide capsule intact.

The coating can be made of dry oxide, wet oxide, and from a layered combination of oxides.

The oxidized wafer has been recrystallized from air, argon and argon/hydrogen forming gases. Successful results were obtained in all three cases. However, in the recrystallization performed under an inert and reducing atmosphere, some cracks appear in the coating. These cracks allow molten silicon to leak from the coating. Recrystallization in air does not lead to such defects. When burned in air, the coating self-heals by reoxidation of the exposed silicon (self-heal). Thus, the furnace for recrystallization can advantageously be operated entirely in a natural air atmosphere. It need not be operated in an inert or other specific atmosphere.

As an example, the original wafer is 350 micron thick cast (cast) polysilicon. The wafer was oxidized in air for twenty hours and recrystallized as described above. In the case of recrystallization, the final grain structure (fig. 6B, 6C) is different from the original (not shown), which illustrates that the oxide coating is able not to re-nucleate the same grains present in the original grain structure. In other words, the oxide coating does not impose a memory effect on the recrystallized grain structure. In addition, the grain orientation resulting from recrystallization is advantageous for good electronic performance of the PV device. As can be seen from the top and bottom views of fig. 6B, 6C, respectively, the grain structure is similar from top to bottom. (note e.g., the grains with asterisks in each image and the grains surrounding it.) this top-down similarity means that the grain boundaries occur primarily perpendicular to the wafer plane, rather than parallel to it. Grain boundaries parallel to the wafer plane degrade the electronic performance of the solar cell because grain boundaries act as recombination centers for mobile charge carriers. (this undesirable situation is not shown in any of the figures.) furthermore, the recrystallized wafer is very flat and has a fairly uniform thickness, within about 10% of its extent, which is significantly better than the standard for cast and cut crystals, which is believed to have a flatness uniformity of only within about 25%. A method of minimizing in-plane grain boundaries (in-plane grain boundaries) is discussed below.

The recrystallized wafer has an average grain size greater than that of the preform prior to recrystallization. As noted above, the preform will have an average grain size of less than about 10 square millimeters and typically less than about 1 square millimeter. The recrystallized wafer has an average grain size greater than about 1 square millimeter and typically greater than about 10 square millimeters. The absolute dimensions will depend on the nature of the preform and the process. The important feature is that the recrystallized wafer has a second average grain size that is larger than the first average crystal grain size of the preform.

Another useful feature is that defect density, such as dislocations, is significantly reduced. In some cases, even if there is no improvement in grain size, an improvement in dislocation density is advantageous.

The recrystallized wafers form heavily into pellets (ballups) without an oxide coating. The ability of the oxide coating to prevent liquid large pellets (gross-up) is evident by noting the flat shape shown in fig. 6B and 6C.

The process can also work with thin wafers. A 150 micron thick, 2 inch [50 mm ] diameter [100] single crystal wafer was oxidized and recrystallized (and etched), with similar results in terms of grain structure as discussed above. On the top and bottom of the wafer, the grain structure is similar, indicating that the grain boundaries are not parallel to the wafer surface. In general, the process may be used with a pre-fabricated wafer having a thickness of between about 50 and 400 microns, preferably between about 100 and about 250 microns.

First, the front edge cools and thus solidifies. In the digital images shown in fig. 6B and 6C, the first part of the wafer to be cured is shown on the right, and the last part to be cured is shown on the left. The volume expansion of the silicon when frozen has resulted in a protrusion (eruption)644 of the silicon. The protrusion is the run-out (outward) of the melted material through the original oxide coating.

An important aspect of the recrystallization process is that when the solidification is directional, the recrystallized wafer can have a higher chemical purity (less impurities) than the starting preform. This is because zone purification (zone purification) occurs when impurities are suppressed at the freezing interface and concentrated in the liquid. This impurity segregation is because most impurities, especially metal impurities, are not as soluble in solids as in liquids. In this way, impurities will be concentrated towards the end of the recrystallized wafer. A small amount of the wafer end may be cut off (trim off) to remove concentrated impurities and leave a purer final wafer. For this purpose, the preform may be provided with some extra length. The protrusions resulting from the expansion of silicon as described above will contain very highly concentrated impurities. Cutting away only the protrusions may remove enough material to achieve the purification.

Fig. 6A, 6B, 6C depict wafers being processed between flat backing plates. The oxide coating maintains its shape reasonably well even without any backing plate. Fig. 14A and 14B show the top and bottom, respectively, of a sealed wafer 1419 recrystallized in a furnace, where the sealed wafer 1419 rests directly on a pair of cylindrical support rods 1452. The wafers 1416 do collapse around the rod 1452 within the coating 1420, but the overall shape remains substantially planar, especially in contrast to the pellet-forming mass (not shown) that is produced without any coating. The recrystallized wafers supported by the lower backing plate without the upper capping backing plate are flatter than those wafers processed without any backing plate as shown in fig. 14A, 14B, but the upper surface shows some curvature, especially around the boundary. (No images are shown for this type of product.)

Support to keep the wafer flat may be provided by lower support elements such as backing plates and the inherent strength of the capsule, either individually or in combination. For example, with some relatively strong coatings, it may be possible to omit the backing plate and support the sealed wafer on discrete elements (discrete elements) such as rods and the like.

Grain boundary orientation and density can be dominated by controlling the heating and especially cooling environment through which the wafer passes. The frozen interface F between the molten silicon L and the solid recrystallized silicon C is the key to understanding how the heat flow factor (coherence) affects grain formation. As schematically shown in fig. 7, 7AI, and 7AII, the freezing interface F is a surface of recrystallized silicon C at which liquid silicon L freezes and becomes solid. The entire range of the frozen interface F is at the melting point of silicon and thus the interface F is an isotherm. The shape of the isotherm is determined by how heat is removed from the cooled wafer 716. This shape in turn affects how the grain structure propagates into the recrystallized portion C of the wafer as solidification continues. In order to freeze the portion L of molten silicon and then cool it, heat must be removed. In fact, due to the high heat of melting of the silicon, a large amount of heat must be removed from the freezing interface F, just to achieve solidification of the silicon. This heat must first be conducted through the solid silicon C and backing plates 724, 726 and then dissipated into the (lose to) environment. The direction of the heat flow is perpendicular to the isotherm, including the isotherm as a growth interface. (since the isotherms are at the same temperature and heat cannot flow along them.) first, a symmetrical heat flow pattern will be discussed, followed by a discussion of several more preferred heat flow patterns. In some cases, a symmetrical situation is also useful. For example, if there is very little or no nucleation of crystal growth at the intersection of the coating and the freezing interface F, then the crystal growth orientation problems discussed below, otherwise associated with a symmetric freezing interface, do not occur.

Fig. 7 schematically shows a three-dimensional view of the freezing interface F between the liquid part L and the solid part C during recrystallization. The interface has a spatial curvature (compound curvature). Note the curvature F in the plane W of the wafer_UIn this figure, it is enlarged for illustrative purposes. Interface F_AIs the one visible in the cross section of fig. 7 AI. This curvature will be the subject of the following discussion. (No melt interfaces are shown in these figures-if any, it should be to the right, outside the parts shown in the figures.)

Fig. 7AI shows such a cross-section of a sandwich 718 including backing plates 724, 726 and wafer 716 encapsulated within capsule 720 during recrystallization. Since heat is symmetrically dissipated from above and below the wafer 716 and must be directed through the wafer, the middle plane MP of the wafer is a plane parallel to and midway between the major (primary), flat, non-edge (non-edge) surfaces of the wafer. Which is the highest temperature in the place where the wafer is cooling. Interface F_AHaving the symmetrical shape shown. Arrows H show the local direction of heat flow. Albeit hotPerpendicular to the interface F_AFlowing, the grains tend to be perpendicular to the interface F_APropagation is also a fact. A similar way to initiate the grains is by nucleation at the boundary between the wafer 716 and the film coating 720, i.e. at points 717u and 717l, as shown in figure 7 AII. Grains 715 nucleated at this interface will tend to propagate inward, toward the mid-plane of the wafer. Since grains may propagate from both the upper bound 717u and the lower bound 717l, it is possible that the grain boundaries will collide (collide), such as at 72l, resulting in grains that are relatively small and do not span the full thickness of the (span) wafer 716. In addition, grain boundaries generated by the collision of two or more grown crystals tend to have a significant composition (component) parallel to the middle plane of the wafer. This degrades the electronic properties as it prevents the crystals involved from spanning the entire thickness of the wafer.

It can be seen that if the incidence of grain nucleation is very low, there is a relatively small probability that two grains will start to grow in such a way that they will collide and form undesirable grain boundaries (such as at 72 l). Thus, if a coating with very low or no tendency to nucleate grains is used, a symmetrical freezing interface F is shown in FIG. 7AI_AAcceptable results may be provided.

However, during cooling and freezing, the heat flowing from the recrystallizing wafer 716 at C can be intentionally biased toward the top or bottom of the wafer to create an asymmetric cooling profile and freezing interface F_BAs shown in fig. 7 BI. And from the symmetrical interface F_AThis in turn may result in an improved grain structure compared to the resulting grain structure. Interface F_BThe effect of asymmetry in (b) can best be understood by considering the idealized situation shown in fig. 7BI, in which the interface is only slightly curved. The angles α and β are the angles of the interface relative to the plane of the respective surface of the coating, measured inside the liquid. These angles are referred to herein as interface angles. In fig. 7BI, the interface angle β is less than 90 degrees and the angle α is greater than 90 degrees. Conversely, note that both of the corresponding interface angles in fig. 7AI are greater than 90 degrees. Freezing interface F_BThe face that will be tilted so that it has a greater heat flux (below, as shown in fig. 7 BI) will cure first (i.e., further upstream, to the left, as shown in fig. 7 BI).

When the interface angle is greater than 90 degrees, any grains that nucleate at the corresponding facet will tend to propagate into the solidifying wafer, as shown in fig. 7 BII. However, when the interface angle is less than 90 degrees, any grains that nucleate at the respective faces will tend to grow outward and thus not propagate into the growing wafer. The result will be that the grain structure is determined by propagation from one face only. Thus, for frozen interface F_BThere will be few, if any, grain boundaries within the wafer, such as shown in fig. 7BI, that are substantially parallel to the mid-plane MP of the wafer, thereby avoiding the deleterious effects of such grain boundaries.

FIGS. 7C and 7D illustrate various asymmetric interface shapes F_C、F_DThe asymmetric interface shape will produce a better grain structure than that produced from the symmetric curve shown in fig. 7AI, for the portion of the sealing wafer 719 inside. The asymmetry in these shapes is caused by the asymmetry in the cooling curve and is from F in the cooling curve_CTo F_DSequential display of increasing asymmetry interface shape F_C、F_D. Although both interface angles in fig. 7C are greater than 90 degrees, α is much greater than the other, β. Thus, the secondary surface 751_αCAlong line A_C(where the interface angle α is larger) the propagating grain structure will often outweigh the propagation from another face 751_βCAlong line B_CA propagated grain structure. In other words, the secondary surface 751_αCThe crystal originated from 751_βCThe originating crystal extends further across the mid-plane and may even pass all the way through the wafer thickness. The result is that there will be fewer grain boundaries extending substantially parallel to the wafer plane than in the symmetric case shown in fig. 7 AII.

Fig. 7D shows a case where one of the interface angles β is about 90 degrees. On the corresponding side 751 of the coating_βDAny grains nucleated will be perpendicular to the surface F_DPropagates along this face and will thereforeAnd does not propagate into the wafer.

Different parts of this top-bottom temperature curve can be captured (capture) by offsetting the heat flow using any of the methods described below.

The backing plate significantly helps to reduce stress during recrystallization and thereby helps to reduce the formation of dislocations and stress induced other defects. As can be seen in both fig. 7AI and 7BI, is directed away from the freeze interface F_A、F_BIs directed substantially toward the backing plates 724, 726 and perpendicular to the middle face of the wafer 716 (indicated by arrow H). Importantly, only a small portion of this heat is directed parallel to the mid-plane of the wafer. The result is that the temperature gradient and curvature along the recrystallized wafer can be small, resulting in low stress and thus low dislocation density and thus high electron quality during processing. This is in contrast to the case of vertical Ribbon growth techniques such as EFG and String Ribbon (String Ribbon), where a large amount of heat must be directed along the growing Ribbon. The difference is due to the presence of thermally conductive backing plates 724, 726. They are in close proximity to the wafer and heat can flow to them by both radiation and conduction/convection through thin layers of gas (typically air) that exist between the wafer 716 and its capsule 720 and the backing plates 724, 726. Air is present in the open spaces (open spaces) between the particles in the porous, powder release layer (powder release) 728. Alternatively, if no release layer is present, sufficient air is present between the nominally flat, but not ideally flat, surface of the backing plate and the film coating. The heat flow perpendicular to the wafer plane can be used by the process designer either to reduce the stress at a given recrystallization rate or to increase the recrystallization rate at a given stress level or a combination of both. This effect exists in both the symmetric and asymmetric cases shown in fig. 7AI and 7BI, respectively. In the case of asymmetry, it is possible to further increase the effect by imposing a heat flow pattern that freezes the interface F_BThe range of (2) is extended. The lower stresses present during recrystallization will also be in the final waferResulting in lower residual stress.

The simplest method of applying a top-to-bottom offset to a wafer being recrystallized may be by operating the upper and lower heater elements in the recrystallization furnace to generate different heat flows Q₁、Q₂Wherein Q is₁＞Q₂. This can be done most simply by operating them at different temperatures. In this manner, as shown in FIG. 8A, the hotter upper heater element 832a causes heat from Q₁And thus a locally wider melt region L on the top surface of the wafer 816. When it is in contact with relatively small heat flow Q₂And a narrower melted region on the cooler bottom surface of the wafer, the end result of this offset is an angled frozen front end F.

A related approach to imposing an offset on the heat flow from the crystal being recrystallized involves placing a heater element with a large surface area on the top or bottom of the stack. With a larger surface area, the heater element will radiate more heat Q to the backing plate at the same temperature than a small area heater element₁The small area heater element radiates less heat Q₂. In this manner, the same desired angled freeze front may be achieved, as shown in fig. 8A. Similarly, more heaters per unit length of wafer may be placed at the top or bottom of the stack.

Another related method of imposing an offset on the heat flow from the crystal being recrystallized involves spacing the heater elements differently on the top and bottom in a direction away from the stack. Fig. 8A shows the symmetrical position of the heaters 832a, 834a spaced equidistant du and dl from the middle plane MP of the wafer. As shown in fig. 8B, it is possible to space the upper heater 832B a different distance du from the workpiece and the lower heater 834B a greater distance dl than the lower heater 834B. It is also possible (although not shown) to provide two heater pairs, one upstream and one downstream. Similarly, the upstream and downstream heaters may be equipped with different heat outputs, as discussed above with respect to the individual heaters, or at different distances from the wafer.

Different methods of imposing a top-bottom offset on the heat flow from the wafer being recrystallized include using backing plates with different thermal characteristics, as determined by thickness, thermal diffusivity, emissivity, or any combination thereof. For example, as shown in FIG. 8C, a lower backing plate 826_CIs significantly larger than the upper backing plate 824_CIs thick. The heaters may be placed an equal distance zu zl from the closest surface of the respective backing plates 824C and 826C. Depending on the thermal characteristics of the backing plate used (i.e., whether in-plane guided or out-of-plane radiated heat transfer dominates), more heat will be extracted from the top or bottom surface of the wafer, thereby imposing thermal asymmetry. The solidification interface F will tilt relative to the wafer at interface angles alpha and beta, which is a desired effect, as described above. The interface F is shown tilted at an angle β that is greater than the angle α. However, it can be tilted a > β, depending on how the asymmetric thermal properties affect the heat flow.

As shown with reference to fig. 8D, another possible approach is to change the thermal shield 840 in an asymmetric arrangement, such as thermal insulation or some other type of thermal element, such as exothermic (heatspreading) or thermal insulation, which may be placed between one or the other of the heaters 832D, 834D and the wafer 816. The shield 840 may differ in its thermal insulation or heat release, or other heat transfer capacity, from one location to another with respect to the two heaters 832d, 834d and the wafer 816. Furthermore, the shield element may be made to move relative to the heater or the wafer or both. Thus, they move through a range along with the wafer being moved, and then return to the original position to move again with the wafer upstream.

Another way to establish the offset of the cooling curve is to change the position of the heaters above and below the wafer so that for a unit length of the wafer there are more heating elements facing one surface than the other.

The foregoing discussion has assumed that the heaters are relatively discrete elements, such as individual rods 832a, 834 a. Distributed heat sources may also be used for one or both surfaces of the wafer, and the distribution of heat output may be asymmetric with respect to the upper and lower surfaces.

Any of these techniques may be used alone, and most, if not all, of them may be used in combination with any or all of the others. Moreover, similar techniques not mentioned but later developed may also be used and, as such, used alone or in any combination.

There are various arrangements as to whether the wafer or the heater is moved, by which the wafer can be melted and then solidified to be recrystallized. In most cases, whether the wafer moves relative to the heat source or the heat source moves relative to a stationary wafer, the physical/mechanical and thermodynamic are equivalent. Alternatively, of course, both may be moving with relative speed between them. In the following discussion, for simplicity, it is assumed that the heat source is stationary and the wafer is moving. However, this need not be the case. The relative velocity between the two is of ultimate concern. In general, all of the techniques discussed herein are in the form of zone curing.

Using the configuration shown in fig. 4A-4E described above, the solid state wafer is moved stepwise into the furnace. The leading edge of the wafer melts and the trailing edge remains unmelted, and a melted region L appears within the wafer.

In general, the wafer length may be between 15 and 300 centimeters in the direction of the motion dimension. At any one time, 0.5 cm to 5 cm of this may be melted, with the upstream portion being the original solid and the downstream portion being the recrystallized solid.

It is also possible to provide a solid wafer, as schematically illustrated in fig. 5A and 5B, and then provide substantially uniform heating so that the entire wafer becomes liquid. The liquid wafer material 516 is held within a capsule 520, such as an oxide, which may then be gradually removed from the heat sources 532, 534, generally in the same manner, as shown in fig. 5B, such that a liquid-to-solid freeze interface F occurs.

One possible advantage of the batch process shown in fig. 5A and 5B is that it may permit faster wafer production than the moving melt zone process shown in fig. 4A-4E. One possible disadvantage of the batch process is that the coating 520 contacts the molten material of the wafer 516, which reacts to some extent for a relatively long period of time.

It is also possible to cool all of the heated wafer preforms together relatively quickly, rather than by zone cooling, as compared to the zone cooling shown in fig. 4C. Although crystal growth may nucleate in some places, the resulting crystal structure may be acceptable if the number of nucleation sites is relatively small. The advantage of this batch cooling method is that it will be more valuable faster than the zone cooling method.

Silicon dioxide (silica) is a coating material that has been used in the recrystallization step of the examples discussed herein. However, alternative materials may also be used. Silica is a particularly attractive option for film coating for several reasons. It can be grown on a wafer or deposited in a very pure form by any of a number of available techniques. It is known that good wafers are made of silicon that has been contacted with silica in a molten state. (for example, carbon dioxide crucibles (silica crucibles) are used in CZ growth.) silica is amorphous in structure and thus is expected to minimize nucleation of grains during recrystallization. The silica self-heals during high temperature processing in air due to in-situ (in-situ) oxidation of any exposed silicon. This self-healing makes the process robust. The ability to process in air helps in low cost processing. Silica can be doped, providing a means to control the possible tendency and viscosity for the film to nucleate grains and for the possibility of in situ doping. Finally, silica is relatively easy to remove from the wafer by selective etching.

There are various growth and deposition techniques for silica. Possible techniques include dry oxide growth (including in an air or oxygen environment), wet oxide growth (including in a steam environment), spin-on glass, physical vapor deposition techniques such as sputtering, and CVD deposition of oxides (both undoped and doped with boron).

The oxide coating may also act as a diffusion barrier to prevent impurities from entering the wafer.

The doped oxide film, which is softer at the recrystallization temperature, may nucleate fewer grains (which would be advantageous). Strictly speaking, due to thermal expansion mismatch on the silicon being crystallized, doped and softer films may exert less pulling force than undoped films, primarily by allowing viscous slip (viscousnip) during and immediately after the nucleation process. In addition, the thermal expansion coefficient of doped silicon is more closely matched to silicon than that of silica. (Another potential advantage is in-situ doping to form a p + back surface field.)

The film properties of the coating allow it to be formed from multiple layers of different materials. For example, as schematically illustrated in fig. 10, an inner layer 1020a of doped oxide may be provided to reduce/eliminate crystal nucleation within the wafer 1016. This softer layer may be backed with deposited oxide or other material, such as silicon nitride (back)1020b for strength. Many such combinations exist. Referring to fig. 10, there is shown an assembly 1019 having a silicon wafer 1016, the silicon wafer 1016 being surrounded at its center by further encapsulation layers 1020a, 1020b and 1020c, which may be for any of the above purposes, or other suitable purposes.

Not all of the coating layers 1020a, 1020b, etc. must completely encapsulate the wafer, or be within the coating layer in question. Wafer 1016Must be completely sealed, but it need not be completely sealed by any one layer. For example, the exterior layer 1020C may only be present on the top and bottom surfaces 1020C_t、1020C_bAnd serves as a backing plate-free, but need not be present at edge 1020C again_eThe above. Different methods of applying such incomplete coating layers are thus possible. The multi-layer coating can provide sufficient strength to eliminate the need to use one or two backing plates.

It may be possible in some instances to provide a film coating (film covering) around only a portion of the pre-fabricated wafer, rather than all of it. For example, if the film covers only one major surface of the wafer, or one major surface and its four edges, for example, if the film is deposited on a wafer lying on a support surface, one of the major surfaces of the wafer is not exposed. Such partial film coating may provide strength to prevent the wafer from balling up as a result of the wafer sticking to only a portion of the film coating, as well as facilitate freeing the recrystallized wafer from a supporting backing plate.

The film coating is typically between about 0.25 microns and 5 microns thick, preferably between about.5 microns and about 2 microns thick. The extreme thinness of the membrane made possible by these techniques provides other advantages. Because the film capsule 320 is much thinner than the wafer 216 it surrounds, its presence does not cause stress in the wafer when both are heated and then cooled throughout the process of recrystallization of the wafer. If the film has a thickness similar to the wafer, unacceptably high stresses may occur which may damage the wafer. Generally, the membrane is able to flex because it is so thin. However, it is resistant to stretching and compression in the plane of the film. Thus, when the contained molten silicon attempts to form a pellet, the film does not stretch and bulge, but instead it remains substantially planar, albeit with bends and corrugations, as shown in fig. 14A and 14B, discussed above.

In addition, the film coating is so thin that it conforms completely to the surface shape of the wafer. The textured preform may also be processed according to the method of the present invention to form a recrystallized wafer that retains the surface texture.

As shown with reference to fig. 9, a wafer 916 having a 20 micron groove (pitch) linear texture with a groove 917 about 20 microns deep is oxidized to accommodate a (receive) about 1 micron thick film that is completely uniform across all surfaces, with no distortion of the overall shape at all. The wafer is then recrystallized. The coating is strong enough to hold most of this fine scale structure (fine scale structure), although some fidelity is lost. Thus, texture may be provided for any desired purpose. For example, for the formation of antireflective and contact grooves, as discussed and disclosed in PCT application No. PCT/US2008/002058 filed on 2/15/2008, entitled "SOLAR CELL WITH TEXTURED surface", emery m.sachs and James f.bredt, which claims priority to US provisional application 60/901,511 filed on 2/15/2007 and US provisional application 61/011,933 filed on 23/2008, and which designates the united states, which are incorporated herein by reference in their entirety. Textures used to implement other functions or to implement the same function may also be provided in different ways.

Alternative coating materials are also possible to be useful, which are silicon and the following: any and all of nitrogen, carbon and oxygen. These include silicon nitride, silicon oxynitride, silicon carbide and silicon oxycarbide. These compounds can be made by gas phase reactions of silicon wafers or by chemical or physical deposition techniques.

These alternative materials must provide suitable physical integrity and minimal grain nucleation. These films must also be relatively easy to remove from wafer 216 after recrystallization 122.

The sealing layer, e.g., an oxide, may be applied at one of several different times in the process, as discussed. It can be applied in advance for a relatively long time, for example hours or days, at a location and with equipment specifically designed only for the sealing step. Alternatively, the sealing step may occur immediately prior to the recrystallization step and may be performed in the same furnace and in the same simple air environment. The integrated approach may facilitate higher productivity, less material handling, storage, preparation, etc. However, care must be taken to avoid the formation of silicon pellets.

Backing plates 424 and 426 are flat substrates that constrain thin film coating 420 during recrystallization 122. The upper backing plate 424 is sometimes referred to herein as a capping plate. The backing plate material is preferably completely (clearly) released and separated from the material forming the film coating 420. However, it is also possible that a release layer would be advantageous. A thin layer 428 (fig. 4A) of silica or other powder may provide this function.

The following factors may dictate the choice of backing plate material and the design of the backing plate for any given situation. The backing plate should be made of a refractory material that is available in pure form and does not present a contamination threat to the wafer. (although the coating will act as a diffusion barrier, it should not be expected to be perfect and thus, metal species should be avoided.) the backing plate should not undergo plastic deformation during recrystallization, or suffer cracking to allow extensive reuse. The backing plate should not buckle (buekle) in use due to thermal stress. It should remain flat. The backing plate material should have a relatively low coefficient of thermal expansion to minimize thermal stresses caused by the heating and cooling profiles during recrystallization. A higher thermal conductivity will smooth local hot spots and also avoid high local thermal stresses. The backing plate is preferably suitable for firing in air.

This has been done using a pressureless sintered alpha (alpha) silicon carbide formed backing plate sold under the trademark "Hexoloy SE" by saint gobain corporation of niadra Falls, NY (niagara, new york). This material has many advantages. It is readily available in thin sheets and is reasonably priced. It has a low CTE (4x10-6l/K), a high thermal conductivity (> 50W/mK) and a high strength (300 MPa). It is known to withstand long-term operation at temperatures up to 1650 c, i.e. 200 c higher than required by existing applications. Its chemical purity is acceptable: total metals < 200ppm by weight, with a majority of aluminum (iron and nickel together < 10ppm to about 3ppma by weight). The performance of Hexoloy SA is the benchmark for comparison to other materials.

The material should maintain its flatness over a large area when subjected to thermal gradients representative of those that might be expected.

Alternative materials for the backing plate include the full range of various commercially available silicon carbide materials, including SiC of both the alpha and beta types, as well as silicon carbide materials made by chemical vapor deposition.

In some cases, the porous backing plate can help prevent thermal shock and no planar deformation due to the ability of the material to accommodate strain internally.

Silicon nitride, mullite and alumina are also candidate backing plate materials. Alumina is readily available and low cost. However, the out-diffusion (out-diffusion) must be acceptable.

Graphite is also possible as a backing plate, for example, SiC-coated graphite-of the type used in CVD platens (CVD plates) in microelectronics manufacturing. This can be an attractive material if the SiC layer is sealed against oxidation, since the lower modulus of graphite means that lower in-plane stresses will develop when subjected to thermal gradients.

An important requirement is that the sealed, recrystallized wafer is completely released from the backing plate. It would be most advantageous if this could be achieved without the use of a special release layer. This will be addressed by a combination of the selection of backing plate material, backing plate surface texture and wafer coating material. At the temperature in question (1420 ℃), most of the materials react with each other, at least to a small extent. For example, silicon carbide oxidizes to form an outer layer of silica, which can then be used to react with the coating material of the wafer. Thus, what would succeed without a release layer is more of the problem of kinetics (kinetics) -i.e., whether the interactions during the duration of recrystallization can be small enough to allow easy release. If the duration of recrystallization is too long, virtually no combination can produce easy release. Creating surface textures on the backing plate, such as design irregularities, can help to localize (localization) the opportunity for interaction between the backing plate and the wafer.

However, in many, if not most, applications, a release layer 428 may be desirable, as shown in FIG. 4A. One approach is to apply a thin layer (ideally a single particle thick) of fine powder, such as silica powder. The application may be by electrostatic powder coating. The release is approximately as thick as the coating layer, or even much thicker than the coating layer. The powder acts as a lubricant, allowing movement between the backing plate and the wafer. Thus, although at these temperatures the powder sinters together in small amounts and also to the coating on the wafer, there are sufficient voids in the powder layer and the sintered joint is small in extent to allow easy detachment. Since the silica is not sufficiently wetted by the molten silicon, the layer of powder acts as a secondary barrier to prevent cracking of the volume of the coating. Finally, removal of powder stuck to the coating typically occurs by undercutting during the etch removal of the coating. However, in the case of silica, removal (if necessary) can be ensured by immersion for a longer time in the etchant so that the powder itself is etched.

Other possible release layers may be made of silicon nitride, silicon carbide, alumina or even graphite or carbon black powder. In the case of carbon-based powders, the release layer may be designed to release the wafer by burning-although this may limit recrystallization to a non-oxidizing environment.

The release layer may also be liquid (such as molten tin). It is important that the film capsule acts as a diffusion barrier preventing any such liquid release layer from affecting the wafer material.

It may also be possible in some applications to eliminate upper backing plate 424. As shown in fig. 11, it is possible to use a layer 1124 of granular material or powder on the upper surface of the wafer 1116 in addition to a solid backing plate. The particle release layer 1128 may also be used with particle backing elements on one or both sides of the encapsulated wafer 1119. One problem with backing plates is that they tend to twist (warp) and/or bend. If a discontinuous body of particles is used, or perhaps a somewhat sintered continuous or partially continuous body, it tends to maintain its flatness. In particular, it is important that the surface of the backing element (such as a mass of particles) facing the wafer and its capsule 1120 remain flat. It has been found that acceptable results can be obtained with powders. The powder may be sintered on top of the wafer before the wafer is placed in the recrystallization furnace. It is also possible to use powdered backing elements on both sides of the wafer.

In general, the same materials suitable for use in solid backing plates are useful for the particle backing elements, including silica, silicon carbide, silicon nitride. A release layer 1128 may also be advantageous.

Another possibility to reduce the tendency of the backing plate to twist is to increase their strength by adding a skeleton (rib) to the face of the backing plate facing away from the wafer. The backbone may be aligned along the direction of wafer movement, or perpendicular to that direction, or both (such as in a rectilinear grid) or in any other orientation.

As shown in fig. 12, it is also possible to stack wafers 1216u, 1216l and their backing plates 1224, 1225, 1226 on top of each other for one or more heating stages (stages). In this manner, less than two backing plates may be used for each wafer. For example, if two wafers are stacked on top of each other, only three backing plates are needed instead of four. Stacking also has the advantage that multiple wafers can be processed in less time than if each wafer had to be processed individually. As shown in fig. 13, more than two wafers may also be stacked, with a stack 1318 comprising wafers 1316u, 1316m, 1316l having four backing plates 1323, 1324, 1325, 1326. It is also possible to establish an asymmetric cooling profile by providing backing elements having different thicknesses or thermal characteristics, such as shown with elements 1323 and 1324 being thicker than elements 1325 and 1326.

A stack of just two wafers provides particular advantages over a single wafer sandwich and a stack comprising more than two wafers.

As shown in fig. 12, a stack 1218 comprising two wafers 1216m and 1216l, with a backing plate 1225 in between, the stack 1218 automatically establishes a favorable asymmetric cooling profile within each wafer even though the heating environment around the wafer pair is uniform. This is because the symmetry of the two wafer positions with respect to the mid-plane MP of the backing plate 1225 in between the two wafers results in no heat flow through the central backing plate 1225. Thus, heat flows from each wafer 1216u and 1216l inward, outward, and away from the central backing plate. This therefore establishes an asymmetric cooling profile with the desired shape away from each wafer, which will produce the desired orientation of the grain boundaries.

There have been mentioned some situations where it is desirable to have a wafer with a surface texture. The surface texture may be used for light trapping, or for processing purposes, or for other purposes. In some cases, texture may be imparted to the resulting wafer by providing a backing plate with a suitably textured surface. In this case, the backing plate acts as a mold or form and the texture occurs during the recrystallization heating step.

A basic zone recrystallization furnace is suitable for use in practicing the invention disclosed herein. The silicon carbide heater bundles provide localized heating for creating a melt zone. They are made of high purity, dense silicon carbide. High chemical purity in the heating element is necessary to minimize the risk of metal contamination of the silicon wafer. (conventional silicon carbide components are highly doped and filled with metal impurities.) use in the examples hereinThe rod of (A) is Hexoloy^TMSold under the trademark Saint Gobain and available from Saint Gobain corporation of niagara waterfall, new york.

Pure silicon carbide is a semiconductor and as such, it has a negative temperature coefficient of resistivity. The furnace requires preheating before it can be electrically activated into its self-sustaining temperature ramp, but once it reaches temperature, the negative temperature coefficient ensures that heating is uniform along the length of the heater. Anywhere on the heater element that reaches a temperature slightly cooler than the average temperature becomes more resistive, which causes it to generate more heat, raising the temperature back up again. This self-correcting thermal uniformity helps to ensure left-to-right uniformity (side-to-side uniformity) in the temperature profile of the furnace.

The heating rod is supported by a structure constructed with a high temperature insulation material made of pure porous silicon carbide. The method for producing a heat insulating material developed by the present inventors used a polysilazane ceramic precursor liquid polymer (pre-ceramic polysilazane liquid polymer) mixed with ultrapure silicon carbide powder. The powder is supplied by Saint Gobain company and is in their crystalstar^TMThe product is used on a production line. The adiabatic furnace components are cast into simple molds under light isostatic pressure (light isostatic pressing) and then fired. The ceramic body is formed by pyrolysis of a ceramic precursor polymer that becomes distributed among the grains of the powder by capillary attraction. The product is a porous silicon carbide body with exceptionally high purity and very good insulating quality.

To improve the thermal insulation properties of SiC insulation materials, a low density structure is advantageous. Unstable (fugitive) powders may be added to the untreated mixture, which may burn off upon firing and leave a structure with higher porosity. Graphite powder is a reasonable choice for use as this unstable material, as it will retain its integrity up to a fairly high firing temperature (about 700 ℃) and then burn out completely. Polymer powders, including acrylic and polystyrene, may also be used.

The backing plates 424, 426 are dense SiC plates and may be between about 1 mm and about 10 mm thick, preferably between about 1 mm and about 4 mm thick. In the following example, a thin layer 428 of silica powder (approximately 1 micron thick) was applied to the backing plate using a powder electrostatic coating process. The sandwich assembly 418 of the backing plates 424, 426 and the wafer 416 in the capsule 420 is supported on a ceramic carrier rod that is conveyed through the hot zone of the furnace via a guide rod servo drive. The accuracy of the construction and operation of the recrystallization furnace allows for extensive parallelization of the recrystallization process. To set the size of the various items in proportion, the backing plate may be approximately 2 millimeters thick for a typical sandwich assembly 418. The wafer between the backing plates would be about 200 microns (0.2 mm thick). The oxide coating 420 may be about 1 micron thick, as may the powder release layer 428. Thus, the backing plate in this example is about 10 times the thickness of the coated wafer, which is about 200 times the thickness of the oxide layer on one side.

An important factor for temperature control is good temperature measurement-for the heating rod itself, the furnace ambient, and the wafer/backing plate. The temperature of the heating rod can be deduced from the impedance of the rod-measured in situ. The radioactive temperature measurement will be used in the furnace ambient as well as in the wafer/backing plate assembly. Wafer formation

The original pre-wafer 216 used in these processes and encapsulated within the membrane 320 may be produced by any suitable means. Two approaches are proposed here as representatives. However, any suitable means is contemplated as being within the invention disclosed herein. The two methods are: rapid solidification methods, and chemical vapor deposition. Typically, they may have a grain size with a small average grain size, for example less than the desired 3 square millimeters, and in particular, less than about 1 square millimeter.

The rapid solidification method may be used to produce the starting original pre-fabricated wafer 216 by: the silicon is melted and then suddenly given a cold substrate against which it quickly freezes. Two fast curing techniques known in the prior art are: melt spinning, and jet deposition. In melt spinning, a stream of molten material is ejected against the periphery of a disk-shaped cooled, rotating wheel. Due to the impact of the jet, the liquid thins when it hits the rotating disc. The thin liquid film cools rapidly by heat conduction in the tray so that solidification occurs rapidly (typically within 1 millisecond). The rapidity of curing prevents the liquid from binding or sticking to the disc.

In jet deposition, droplets of molten material (e.g., from a plasma jet gun) are directed toward a cooled substrate so that rapid solidification occurs. These methods, and suitable variations thereof, may be used to melt silicon and rapidly solidify it into a thin sheet. A jet of molten silicon may be made, for example, by melting the silicon in a vessel and then applying gas pressure to the top of the liquid to force a jet out of the hole at the bottom of the vessel. The turntable can be replaced by a belt or a series of closely spaced planar substrates moving under the jets.

In general, other forms of rapid cure have been used with the aforementioned techniques. These are suitable for producing pre-fabricated wafer types for use with the invention disclosed herein.

The starting raw pre-wafer 216 may also be fabricated by Chemical Vapor Deposition (CVD) from a silicon bearing gas from the starting original wafer 216 can be made from a silicon bearing gas. CVD is used to make silicon rods and wafers (pellets) from silane or trichlorosilane to produce a polycrystalline silicon feedstock, which is then melted to make an ingot. Epitaxial deposition of silicon films, typically on top of silicon wafers, is used in the microelectronics industry to make high quality silicon layers for semiconductor devices. Free-standing silicon bodies can be fabricated by CVD on a non-silicon substrate and subsequently removed from the non-silicon substrate. For example, silicon may be deposited on a graphite substrate. The bond formed is weak and during cooling, the difference in thermal shrinkage can assist in removing silicon from the substrate. Furthermore, although silicon epitaxy on silicon must be performed at high temperatures to propagate single crystal growth, free-standing sheets can be deposited at low temperatures because very small grain sizes are acceptable.

All or part of the coating may be deposited on the original pre-fabricated wafer by chemical vapor deposition by changing that gas from a silicon-only gas to a gas or gases that deposit SiO2, SiNi, SiC, or any other suitable coating material as discussed.

Wafers of various types of semiconductors (not just Si) can be fabricated without the expense of dicing and removing by etching the dicing damage areas on the wafer surface. Improving the use of silicon and reducing waste streams. For example, these techniques may be used with other semiconductors, including but not limited to germanium and other elemental semiconductors, as well as compound semiconductors, such as gallium arsenide. The integrity of the film coating will help to maintain the stoichiometry of the compound (stochiometry). In addition, crystalline wafers composed of other materials, including metals and ceramics, can be produced by this method.

The film capsule 420 retains the material and shape of the wafer 416 during recrystallization. It also provides a diffusion barrier that prevents impurities from entering wafer 416 during processing.

The wafer 416 may be supported on or surrounded by backing plates 424, 426. the backing plates 424, 426 not only ensure planarity, but also provide a path for heat removal from the cooled wafer. These heat removal paths reduce the amount of heat in the wafer itself that must be removed by conduction and thereby allow for reduced stress during cooling. This in turn reduces defect formation (particularly dislocations). The production of discrete wafers (rather than continuous strips) also allows for lower stresses during cooling, since continuous strips must have principal stresses along and perpendicular to the growth direction for symmetry reasons, while discrete wafers may have other stress states.

The grain size and structure of the wafer is controlled by a combination of: the choice of materials used for the film coating 420, and the thermal conditions in the furnace. Coating materials that tend not to nucleate grains due to their structure may be selected. Silica, amorphous materials are examples. Alternatively, the coating material may be selected to intentionally nucleate the grains if such is desired (shallow sub desired). The thermal environment may be intentionally made different on both sides of the wafer so that the grains will tend to propagate from only one side of the wafer, thereby ensuring that there are no (or few) grain boundaries in the thickness of the wafer.

The combination of reduced stress and dislocations and control of grain size and placement together allows for the production of very high quality wafers. The support by the combination of capsule 420 and backing plates 424, 426 means that thin wafers can be made, reducing silicon consumption and improving cell efficiency.

The geometric definition provided by the coating allows for recrystallization of textured wafers with the desired topology from the previous step (topographies). This may be useful, for example, in creating light trapping features in solar cells.

The furnace construction itself is simple, in large part because it can operate in an air environment, eliminating the need for containment and its cooling. The furnace may be constructed with insulating bricks and air-compatible heating rods. For example, both the insulating material and the heater may be composed of silicon carbide.

In production, the method can be expanded. First, the simplicity of the furnace means that many furnaces can be constructed. Second, a stack comprising two or more wafers may be processed in a given furnace, typically with a backing plate between them. Stacking two wafers is a particularly advantageous situation, since the two wafers may be subjected to the same thermal environment.

The process may be performed where the melt zone L (fig. 4C) is moved past the wafer 416 (typically as the wafer moves through a location in space where a portion of the wafer is melted). As shown in fig. 5A and 5B, it is also possible to melt the entire wafer and then directionally solidify. This method can be easily implemented in a furnace, in which many wafers being processed simultaneously are aligned (in-line).

The present invention may be practiced with a wide range of sizes and shapes of raw wafer preforms 216. Currently, industry standard battery sizes are 156x156 millimeters. The preform may be of this size. They may be slightly larger so that they can be trimmed to the exact dimensions required after recrystallization, for example by laser shearing. However, the preform need not be square. For example, they may be in the form of strips. The strip may be recrystallized and then, if desired, cut into individual wafers. The advantage of re-crystallizing the ribbon is that less sheets are processed. The disadvantage is that impurities pushed forward by the moving solidification (be swept ion) accumulate over a longer length and the resulting purification effect may be reduced. Recrystallization in shorter lengths as small as the desired end cell size may also have the advantage of reducing thermal stress during recrystallization. When long strips or continuous lengths are recrystallized, the stress during cooling must assume a specific shape for symmetry reasons. However, short sheets may exhibit a wider range of stress configurations during the cooling phase. This additional flexibility will allow for lower stress and lower defect density during cooling.

Heating and recrystallizing a square or rectangular wafer has been generally discussed above, assuming that a straight edge is first presented to the heater. When handling square preforms it is also possible to introduce the corners into the heaters first, and this has some advantages. When a straight edge is first presented, each location along the entire length of the edge is a potential site for unwanted grain nucleation. When the corner is presented first, fewer potential grain nucleation sites are presented to the elevated temperature. Thus, it is sometimes more likely that a single crystal will appear when a corner is first introduced into the melt zone rather than a straight edge.

The foregoing has described an apparatus and method for substantially horizontally orienting a wafer preform 416 and its capsule 420. In other words, the thin (thickness) dimension of the wafer is vertically aligned, while the two larger dimensions (width and length) constitute the horizontal plane. The preform is then moved through the furnace along a substantially horizontal path, among other stages. However, it is also possible, as shown in FIG. 15, to orient the preform 1516 horizontally aligned with the thin dimension and vertically disposed with the long (typically longest) dimension and move it vertically through the furnace, either up or down. Using a vertically oriented apparatus, the backing elements 1524, 1526 must be arranged to provide the necessary support for the walls of the capsule 1520 as the wafer 1516 melts and recrystallizes so that the encapsulated wafer retains its desired shape, having a flat surface.

It is also typically helpful to provide a transport mechanism that may include gripping elements 1511, 1512 that grip (secure) and move the wafer forward, and may also include spacers that prevent the wafer from being squeezed under the influence of the gripping force. The clamping element may be integrated, such as a large C-clamp. Alternatively, two or more independently operated elements may be forced together to clamp the wafer between them.

Similarly, in addition to being oriented substantially horizontally or vertically, a wafer may be placed in any orientation between vertical and horizontal as it passes through the various stages of the processes disclosed herein.

The methods disclosed herein may also be used to improve the crystal structure of conventionally fabricated polycrystalline wafers. They may be used in place of the original wafer preform 216, as shown in fig. 2 and any other figures, such that their crystal structure is modified to have the relatively larger average crystal size structure discussed herein. Summary of the parts

A preferred embodiment of the present invention is a method for manufacturing a semiconductor wafer, the method comprising the steps of: providing an original semiconductor wafer having a first die structure, the first die structure having a first average die size; providing a film coating over substantially the entire surface of the wafer to form an encapsulated wafer; and heating and cooling the sealed wafer under conditions such that the original wafer becomes molten and then recrystallizes into a second grain structure with a second average grain size that is larger than the first average grain size and such that the film remains substantially intact.

The steps of heating and cooling may be performed in air.

The second average grain size is typically greater than about 1 square millimeter, but advantageously may even be greater than about 10 square millimeters. The first average grain size may be less than about 10 square millimeters, and typically less than about 1 square millimeter. The first average grain size may typically be less than about 1 square millimeter and the second average grain size may advantageously be greater than about 10 square millimeters.

The membrane performs one or more functions. According to an important aspect of the invention, the film prevents the wafer from balling up during heating and recrystallization. According to another aspect, the film has a surface that does not strongly promote grain nucleation during recrystallization. According to yet another aspect, the film has a surface that promotes grain nucleation to a known degree during recrystallization. According to other important embodiments of the present invention, the film prevents contamination of the recrystallized wafer by elements in the environment where the recrystallization takes place.

The basic embodiment of the present invention further comprises a step of removing the film.

The film may be an oxide film. The step of providing the oxide film may comprise heating the original wafer in an oxygen-containing environment such that a thin oxide layer is formed over substantially the entire surface of the original wafer. The step of providing an oxide may comprise dry oxide growth.

In various embodiments, the step of providing an oxide comprises wet oxide growth.

For an advantageous embodiment, the step of heating the original wafer in an oxygen-containing environment such that the oxide layer is formed is performed at a time immediately before the step of heating the sealed wafer under conditions such that the original wafer recrystallizes, and is performed within the same heating environment. The oxidation may be performed under conditions such that the original wafer becomes molten, and is performed within a furnace where the original wafer will become molten.

In an alternative embodiment of the invention, the step of heating the original wafer in an oxygen-containing environment such that the oxide layer is formed is performed at a time significantly before the step of heating the sealed wafer, and under conditions different from those under which the original wafer is recrystallized.

The environment in which the wafer is heated may contain air or steam.

Yet another preferred embodiment of the present invention has the step of providing a film comprising depositing the film directly on a raw wafer, such as by spin-on-glass, sputtering, physical vapor deposition or chemical vapor deposition.

According to a further important embodiment of the present invention, prior to the recrystallization step, at least one backing element is provided adjacent to at least one surface of the film, the backing element supporting the film to remain substantially flat. Advantageously, the film comprises a material that prevents the original wafer from adhering to the at least one backing element during heating and recrystallization.

Related embodiments further comprise providing a release material between the film and the at least one backing element. The release material may comprise particles.

The at least one backing element may comprise a pair of backing elements, each adjacent one of the two opposing faces of the film. The pairs of backing elements may be of equal thickness or of unequal thickness. They may also have dissimilar thermal properties to each other.

According to typical embodiments, the step of providing at least one backing element comprises providing the sealed wafer in a substantially horizontal position with one face facing upwards (gravitationally upwardly), the pair of backing elements being arranged above and below the sealed wafer. The encapsulated wafer may also be arranged vertically.

The backing element may comprise silicon carbide. They may be substantially flat plates. The backing element above the wafer may contain a plurality of particles. A release material may be provided between the film and the particulate material backing element. Usefully, the plurality of particles may comprise sintered particulate material.

According to another useful embodiment of the invention, the wafer may be provided in a position such that a (normal to) line orthogonal to the wafer mid-plane has a non-perpendicular portion with respect to the local gravitational field. Alternatively, the wafer may be provided in a position such that a line normal to the wafer mid-plane is horizontal with respect to the local gravitational field.

According to a very important embodiment of the invention, the step of cooling comprises establishing a frozen interface between the liquid region and the recrystallized semiconductor region within the heated, sealed wafer, which frozen interface is asymmetric with respect to the mid-plane of the wafer. Under different conditions, the frozen interface is symmetrical with respect to the middle plane of the wafer.

According to a very useful embodiment of the invention, the entire sealed crystal is heated at substantially the same time. Alternatively, the step of heating may comprise providing movement of the sealed crystal relative to the heated region and melting a portion of the wafer that is less than the full extent of the wafer.

Another preferred embodiment of the invention defines the step of cooling with the feature that a frozen interface between the liquid zone and the recrystallized semiconductor zone is established in the heated wafer, which frozen interface is concave towards the liquid zone, asymmetric with respect to the mid-plane of the heated wafer, and which intersects the film at an interface angle greater than 90 degrees at a first location towards the liquid zone and less than or equal to 90 degrees at a second location of the liquid zone.

There are many different ways to provide an asymmetric cooling environment.

According to one such method, this is accomplished by providing at least one heater that establishes a greater heat flow toward one surface of the wafer being heated as compared to the opposite surface. It is also possible to provide an insulating element between the heat source and the opposite surface of the heated wafer, which insulating element is arranged asymmetrically with respect to the middle plane of the heated wafer. Another way to achieve asymmetry is to have heaters spaced by the unit length of the heated wafer asymmetrically with respect to the mid-plane of the heated wafer. An asymmetric cooling environment may be established by providing pairs of heaters of equal heat output that are asymmetrically spaced away from the mid-plane of the wafer being heated.

A similar, important embodiment has the step of cooling, which comprises establishing within the wafer a frozen interface between the liquid region and the recrystallized semiconductor region, which frozen interface is asymmetric with respect to the mid-plane of the heated wafer, and further wherein the at least one backing element is arranged such that a substantial amount of heat flows from the recrystallized wafer into the backing element and away from the recrystallized wafer.

According to a primary embodiment, the semiconductor comprises silicon.

The film may be doped silicon dioxide, or silicon nitride, or a compound of silicon and at least one member of the group comprising nitrogen, carbon and oxygen.

Some important aspects of the invention relate to the formation of the original wafer. The raw wafer may be formed by a rapid solidification technique, such as melt spinning or spray deposition.

Alternatively, according to a useful embodiment of the invention, the wafer may be formed by chemical vapor deposition from a gas with silicon. In this case, it is very convenient to provide the film by coating the film with a chemical vapor deposition.

The original wafer may be a conventional polycrystalline wafer.

Having thickness uniformity within about ten percent over its range is very useful for recrystallized crystals, which is possible according to embodiments of the present invention. The original wafer may have a thickness of between about 50 microns and 400 microns, preferably between about 100 microns and 250 microns. In this connection, it is an advantageous embodiment when the film layer has a thickness of between about 0.25 and 5 microns and preferably between about 0.5 and 2 microns.

It is very useful that in case the film is so thin, the wafer may have a textured surface and the film will conform to this.

According to some important embodiments of the present invention, the step of providing a film comprises providing a plurality of nested (nested) films, each of which surrounds substantially the entire surface of the original wafer.

Alternatively, it may be that the step of providing a membrane comprises providing a plurality of nested membranes which together enclose substantially the entire surface of the original wafer. At least one of the plurality of nested thin films may encompass less than the entire surface of the original wafer.

If a backing plate is used, which is often useful, a release material, which may be particles, may be provided between the film and at least one of the at least one backing elements.

An important family of method embodiments of the present invention further comprises stacking at least two encapsulated wafers with a backing element between them between at least two more (two more) backing elements. In this case, the step of heating and cooling the wafers comprises heating and cooling the at least two sealed wafers stacked together. All backing elements may be of equal thickness, but they need not be. They may also have dissimilar thermal properties.

Advantageously, the steps of heating and cooling the wafer may include providing relative motion between the wafer and a heated environment that establishes a melt zone within the wafer such that a trailing portion of the recrystallized wafer has a higher median concentration of impurities than other portions of the recrystallized wafer. This is a type of zone purification. Useful exploitation of such purification also includes removing trailing edge portions from other portions of the recrystallized wafer. The protrusion of the recrystallized wafer typically occurs with a higher impurity level than other portions of the wafer. It is useful to remove the protrusions from other portions of the recrystallized wafer.

The characteristics of the heating environment (aspect) are features of the present invention, including heating using silicon carbide heating elements. Advantageously, the heating step is carried out in a furnace with a porous insulating material containing a silicon carbide powder mixed with a ceramic precursor liquid polymer.

Yet another preferred embodiment of the present invention is a method for fabricating a semiconductor wafer, the method comprising the steps of: providing an original semiconductor wafer having a first die structure, the first die structure having a first average defect density; providing a film coating over substantially the entire surface of the wafer to form an encapsulated wafer; and heating and cooling the sealed wafer under conditions such that the original wafer becomes molten and then recrystallizes into a second grain structure having a second average defect density and such that the film remains substantially intact, wherein the second average defect density is less than the first average defect density.

Yet another preferred embodiment of the present invention is a method for fabricating a semiconductor wafer, the method comprising the steps of: providing an original semiconductor wafer having a first die structure, the first die structure having a first average die size; providing a film capsule over a portion less than an entire surface of the wafer to form a covered wafer; and heating and cooling the covered wafer under conditions such that the original wafer becomes molten and then recrystallizes with a second grain structure and such that the film remains substantially intact, wherein the second grain structure is modified in accordance with the first grain structure, in terms of grain size at defect density, or both.

Yet another preferred embodiment of the present invention is a semiconductor wafer comprising a body portion comprising a semiconductor wafer, a crystalline structure having two substantially flat opposing surfaces and an average crystalline grain size of less than about 10 square millimeters. Substantially completely surrounding the body portion is a film coating. The film comprises a plurality of nested films.

Advantageously, the semiconductor may comprise silicon, and at least one of the films in the film coating comprises silicon dioxide. At least one membrane of the coating may comprise doped silica. At least one of the films in the coating may comprise silicon nitride. More generally, at least one film in the coating may comprise a compound of silicon and at least one of the group comprising nitrogen, carbon and oxygen.

At least one of the planar body surfaces may comprise a textured surface.

According to a useful embodiment, the wafer may have a thickness of between about 50 microns and about 400 microns, preferably between about 100 microns and about 250 microns.

Typically, according to another preferred embodiment of the invention, the nested membrane layers have a thickness of between about 0.25 microns and about 5 microns, preferably between about 0.5 microns and about 2 microns.

In one variation, each of the plurality of films surrounds substantially the entire surface of the wafer. The plurality of nested membranes may collectively encompass substantially the entire surface of the wafer. Alternatively, at least one of the plurality of nested membranes may encompass less than the entire surface of the wafer.

A somewhat different preferred embodiment of the present invention is a semiconductor wafer assembly comprising: a body portion comprising a semiconductor wafer, the body portion having two substantially planar opposing surfaces and a crystalline structure having an average crystalline grain size of less than about 10 square millimeters. Substantially completely surrounding the body portion is a film coating. The wafer assembly also includes at least one backing element adjacent at least one surface of the oxide film.

The at least one backing element may comprise a pair of backing elements, each adjacent one of the two opposing faces of the film layer. The wafer may be in a substantially horizontal position with one face gravitationally facing upwards and the pair of backing elements arranged above and below the wafer. Advantageously, the backing element may comprise silicon carbide. The backing element may be a substantially flat plate. The backing element above the wafer may contain a mass of particulate material, which may be sintered.

Many of the techniques and features of the present invention have been described herein. Those skilled in the art will appreciate that many of these techniques can be used with other disclosed techniques even if they are not specifically described for use together. For example, any suitable raw wafer material may be used that will improve on grain size, or defect density, or both. The coating may be fully enclosed or only partially enclosed. The coating may be an oxide, or any other suitable film. It may be grown, or deposited, or otherwise provided. A backing plate may be used if necessary, or not. The backing plate may be solid, or granular, or a combination thereof. A release layer, typically granules, may be used. The combination of the film, release layer, backing plate material should be such that the encapsulated wafer can be removed from whatever support is provided during recrystallization. Any suitable means of forming the original wafer preform may be used, and any suitable method of providing a coating may be used. It is not necessary to use a combination that has been disclosed, such as using CVD to both form the wafer and provide the film. The freeze interface may be symmetric if grain nucleation is acceptably low, or it may be asymmetric. If not, any of the many ways shown to establish an asymmetric cooling curve and thus a frozen interface, as well as any later developed ways, may be used. A single wafer sandwich structure with two backing plates can be used with any of the furnace structures disclosed, as well as any wafer material, film material. Alternatively, a stack of multiple wafers may be used with any variation in materials or forming methods. Batch processing or batch production may be used as an appropriate, given productivity requirement and quality tradeoff.

This disclosure describes and discloses more than one invention. These inventions are set forth in the claims and the associated documents not only as filed but also as developed during the prosecution of any patent application based on the present disclosure. The inventors intend to claim all of the various inventions to the maximum extent permitted by the prior art as it was later determined to be. No single feature described herein is essential to every invention disclosed herein. Thus, features that the inventors intend to be not described herein but are not claimed in any particular claim of any patent based on this disclosure should be included in any such claim.

A group of some hardware components or steps is referred to herein as an invention. However, it is not an admission that any such assembly or group is necessarily a unique and patentable invention, especially as expected by law and regulation in terms of the number of inventions to be examined in a patent application or the uniqueness of the inventions. It is intended that embodiments of the invention be described in a simplified manner.

The summary is filed herewith. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow examiners and other searchers to quickly ascertain the subject matter of the technical disclosure. The abstract is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims, as promised by the patent office's rules.

The foregoing description is to be considered exemplary and not restrictive in any sense. While the present invention has been particularly shown and described with reference to preferred embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.

The corresponding structures, materials, acts, and equivalents of all means or step plus function elements in the claims below are intended to include any structure, material, or act for performing the function in combination with other claimed elements as specifically claimed.

Claims (109)

1. A method for fabricating a semiconductor wafer, comprising the steps of:

a. providing an original free-standing semiconductor wafer having a first die structure, the first die structure having a first average die size;

b. providing a film coating over an entire surface of the wafer to form an encapsulated wafer; and

c. heating and cooling the encapsulated wafer under conditions such that the original wafer becomes molten and then recrystallizes into a second grain structure having a second average grain size and such that the film remains intact, wherein the second average grain size is greater than the first average grain size.

2. The method of claim 1, further wherein the steps of heating and cooling are performed in air.

3. The method of claim 1, wherein the second average grain size is greater than 1 square millimeter.

4. The method of claim 1, wherein the first average grain size is less than 10 square millimeters.

5. The method of claim 1, the first average grain size being less than 1 square millimeter and the second average grain size being greater than 1 square millimeter.

6. The method of claim 1, the first average grain size being less than 1 square millimeter and the second average grain size being greater than 10 square millimeters.

7. The method of claim 1, the film coating prevents the wafer from forming pellets during heating and recrystallization.

8. The method of claim 1, the film coating having a surface that does not strongly promote grain nucleation during recrystallization.

9. The method of claim 1, the film coating having a surface that promotes grain nucleation to a known degree during recrystallization.

10. The method of claim 1, the film coating prevents contamination of the recrystallized wafer by elements in the environment in which recrystallization occurs.

11. The method of claim 1, further comprising the step of removing the film coating.

12. The method of claim 1, said step of providing a film comprising providing an oxide film coating.

13. The method of claim 12, the step of providing an oxide film coating comprising heating the original wafer in an oxygen-containing environment such that a thin oxide layer is formed over an entire surface of the original wafer.

14. The method of claim 12, the step of providing an oxide comprising dry oxide growth.

15. The method of claim 12, the step of providing an oxide comprising wet oxide growth.

16. The method of claim 13, further comprising, performing the step of heating the original wafer in an oxygen-containing ambient such that an oxide layer forms at a time immediately prior to the step of heating the encapsulated wafer under conditions that cause the original wafer to recrystallize, and in the same heating ambient.

17. The method of claim 13, further comprising, performing the step of heating the original wafer in an oxygen-containing environment such that an oxide layer forms at a time immediately before the step of heating the encapsulated wafer under conditions such that the original wafer becomes molten, and within a furnace in which the original wafer will become molten.

18. The method of claim 13, further comprising performing the step of heating the original wafer in an oxygen-containing environment such that a thin oxide layer forms at a time significantly before the step of heating the encapsulated wafer and under conditions different from those under which the original wafer recrystallizes.

19. The method of claim 13, the environment comprising air.

20. The method of claim 12, the step of providing an oxide film coating comprising heating the raw wafer in an environment containing steam such that a thin oxide layer is formed.

21. The method of claim 1, said step of providing a film coating comprising depositing a film directly on said original wafer.

22. The method of claim 21, said step of directly depositing comprising a spin-on-glass process.

23. The method of claim 21, the step of directly depositing comprising sputtering.

24. The method of claim 21, said step of directly depositing comprising physical vapor deposition.

25. The method of claim 21, said step of directly depositing comprising chemical vapor deposition.

26. The method of claim 1, further comprising, prior to the recrystallizing step, providing at least one backing element adjacent to at least one surface of the film capsule, the backing element supporting the wafer and its film capsule to remain flat.

27. The method of claim 26, the film coating comprising a material that prevents the original wafer from adhering to the at least one backing element during heating and recrystallization.

28. The method of claim 26, further comprising the step of providing a release material between the film coating and the at least one backing element.

29. The method of claim 28, wherein the release material comprises microparticles.

30. The method of claim 26, the at least one backing element comprising a pair of backing elements, each adjacent one of two opposing faces of the film coating.

31. The method of claim 30, wherein the pair of backing elements are of equal thickness.

32. The method of claim 30, wherein the pair of backing elements have unequal thicknesses.

33. The method of claim 30, wherein the pair of backing elements have dissimilar thermal properties to each other.

34. The method of claim 30, the step of providing at least one backing element comprising providing the encapsulated wafer in a horizontal position with one face gravitationally upward, the pair of backing elements being disposed above and below the encapsulated wafer.

35. The method of claim 26, the at least one backing element comprising silicon carbide.

36. The method of claim 34, the backing element comprising a flat plate.

37. The method of claim 34, further wherein the backing element over the wafer comprises a plurality of particulate materials.

38. The method of claim 37, further comprising the step of providing a release material between the film coating and the particulate material backing element.

39. The method of claim 37, wherein the plurality of particulate materials comprises sintered particulate materials.

40. The method of claim 30, the step of providing at least one backing element comprising providing the wafer in a position such that a line orthogonal to a mid-plane of the wafer has a non-perpendicular portion with respect to a local gravitational field.

41. The method of claim 30, the step of providing at least one backing element comprising providing the wafer in a position such that a line normal to a mid-plane of the wafer is horizontal with respect to a local gravitational field.

42. The method of claim 1, the step of cooling comprising establishing a frozen interface between a liquid region and a recrystallized semiconductor region within the heated, sealed wafer, the frozen interface being asymmetric with respect to a mid-plane of the wafer.

43. The method of claim 1, the step of cooling comprising establishing a frozen interface between a liquid region and a recrystallized semiconductor region within the heated, sealed wafer, the frozen interface being symmetrical with respect to a mid-plane of the wafer.

44. The method of claim 42, the step of heating comprising heating the entire encapsulated wafer at the same time.

45. The method of claim 1, the step of heating comprising heating the entire encapsulated wafer at the same time.

46. The method of claim 42, the step of heating comprising providing movement of the encapsulated wafer relative to a heating zone and melting a portion of the wafer that is less than the full extent of the wafer.

47. The method of claim 1, the step of cooling comprising establishing a freezing interface between a liquid region and a recrystallized semiconductor region within the heated wafer, the freezing interface being concave toward the liquid region, asymmetric with respect to the heated wafer mid-plane and intersecting the membrane at an interface angle greater than 90 degrees toward the liquid region at a first location and less than or equal to 90 degrees toward the liquid region at a second location.

48. The method of claim 1, the heating and cooling comprising providing a cooling environment that is asymmetric with respect to a mid-plane of the heated wafer.

49. The method of claim 48, the step of providing an asymmetric cooling environment comprising providing at least one heater that establishes a greater heat flow toward one surface of the heated wafer compared to an opposite surface.

50. The method of claim 48, the step of providing an asymmetric cooling environment comprising providing an insulating element between a heat source and opposing surfaces of the heated wafer, the insulating element being asymmetrically disposed relative to a mid-plane of the heated wafer.

51. The method of claim 48, the step of providing an asymmetric cooling environment comprising providing heaters spaced by a unit length of the heated wafer asymmetrically with respect to a mid-plane of the heated wafer.

52. The method of claim 48, the step of providing an asymmetric cooling environment comprising providing a pair of heaters with equal heat output asymmetrically spaced away from a mid-plane of the heated wafer.

53. The method of claim 26, the step of cooling comprising establishing a freeze interface within the wafer between a liquid region and a recrystallized semiconductor region, the freeze interface being asymmetric with respect to a mid-plane of the heated wafer, further wherein the at least one backing element is arranged such that appreciable heat flows from the recrystallized wafer into the backing element and away from the recrystallized wafer.

54. The method of claim 1, the semiconductor comprising silicon.

55. The method of claim 1, the film coating comprising doped silica.

56. The method of claim 1, the film coating comprising silicon nitride.

57. The method of claim 1, wherein the film coating comprises silicon and a compound comprising at least one of the group consisting of nitrogen, carbon, and oxygen.

58. The method of claim 1, the step of providing an original wafer comprising forming the wafer by a rapid solidification technique.

59. The method of claim 58, the rapid solidification technique comprising melt spinning.

60. The method of claim 58, the rapid solidification technique comprising jet deposition.

61. The method of claim 1, the step of providing an original wafer comprising forming the wafer from a silicon bearing gas by chemical vapor deposition.

62. The method of claim 61, further wherein the step of providing a film coating comprises coating by chemical vapor deposition.

63. The method of claim 1, the step of providing the original wafer comprising providing a polycrystalline wafer.

64. The method of claim 1, the recrystallized wafer having a thickness uniformity within more than ten percent of its range.

65. The method of claim 1, the original wafer having a thickness between 50 microns and 400 microns.

66. The method of claim 1, the original wafer having a thickness between 100 microns and 250 microns.

67. The method of claim 65, wherein the film coating has a thickness of between 0.25 microns and 5 microns.

68. The method of claim 65, wherein the film coating has a thickness of between 0.5 microns and 2 microns.

69. The method of claim 1, the step of providing an original wafer comprising providing a wafer having a textured surface.

70. The method of claim 1, the step of providing a film coating comprising providing a plurality of nested films, each of which surrounds an entire surface of the original wafer.

71. The method of claim 1, the step of providing a film coating comprising providing a plurality of nested film coatings collectively surrounding an entire surface of the original wafer.

72. The method of claim 1, wherein the step of providing a film coating comprises providing a plurality of nested film coatings, at least one of the plurality of nested film coatings surrounding less than the entire surface of the original crystal.

73. The method of claim 26, further comprising providing a release material between the film coating and at least one of the at least one backing element.

74. The method of claim 73, wherein the release material comprises particles.

75. The method of claim 26, further comprising the step of stacking at least two encapsulated wafers between at least two additional backing elements, wherein there is a backing element between the at least two encapsulated wafers, further wherein the step of heating and cooling the wafers comprises heating and cooling the at least two encapsulated wafers stacked together.

76. The method of claim 75, all of said backing elements being of equal thickness.

77. The method of claim 75, at least two of the backing elements having unequal thicknesses.

78. The method of claim 75, at least two of the backing elements having dissimilar thermal properties.

79. The method of claim 1, the steps of heating and cooling the wafer comprising providing relative motion between the wafer and a heating environment that establishes a melt zone within the wafer such that a trailing edge portion of the recrystallized wafer has a greater median concentration of impurities than other portions of the recrystallized wafer.

80. The method of claim 1, the steps of heating and cooling the wafer comprising providing relative motion between the wafer and a heated environment that establishes a molten zone within the wafer to cause zone refining to occur such that a trailing edge portion of the recrystallized wafer has a greater median concentration of impurities than other portions of the recrystallized wafer.

81. The method of claim 79, further comprising the step of removing the trailing edge portion from other portions of the recrystallized wafer.

82. The method of claim 79, further wherein protrusions of the recrystallized wafer occur, the step of removing said protrusions from other portions of the recrystallized wafer.

83. The method of claim 1, the step of heating comprising using a silicon carbide heating element.

84. The method of claim 1, the step of heating comprising heating in a furnace having a porous insulating material comprising silicon carbide powder mixed with a ceramic precursor liquid polymer.

85. A method for fabricating a semiconductor wafer, comprising the steps of:

a. an original free-standing semiconductor wafer is provided having a first grain structure with a first average defect density.

b. Providing a film coating over an entire surface of the wafer to form an encapsulated wafer; and

c. heating and cooling the sealed wafer under conditions such that the original wafer becomes molten and then recrystallizes into a second grain structure having a second average defect density, wherein the second average defect density is less than the first average defect density, and such that the film remains intact.

86. A method for fabricating a semiconductor wafer, comprising the steps of:

a. an original free-standing semiconductor wafer is provided having a first die structure with a first average die size.

b. Providing a thin film covering over less than the entire surface of the wafer to form a partially covered wafer; and

c. heating and cooling the partially covered wafer under conditions such that the original wafer becomes molten and then recrystallizes into a second grain structure having a second average grain size and such that the film remains intact, wherein the second average grain size is greater than the first average grain size.

87. The method of claim 86, the step of providing an original wafer comprising forming the wafer from a silicon bearing gas by chemical vapor deposition.

88. The method of claim 87, further wherein the step of providing a film comprises coating by chemical vapor deposition.

89. A semiconductor wafer, comprising:

a. a body portion comprising a semiconductor wafer, the body portion having two flat opposing surfaces and a crystal structure with an average crystal grain size of less than 10 square millimeters;

b. a film coating completely surrounding the body portion, the film coating comprising a plurality of nested films.

90. The semiconductor wafer of claim 89, the semiconductor comprising silicon, at least one film of the film capsule comprising silicon dioxide.

91. The semiconductor wafer of claim 89, at least one of the planar body surfaces comprising a textured surface.

92. The wafer of claim 89, the semiconductor comprising silicon.

93. The wafer of claim 92, at least one film of the capsule comprising doped silicon dioxide.

94. The wafer of claim 92, at least one film of the capsule comprising silicon nitride.

95. The wafer of claim 92, at least one film of the capsule comprising silicon and a compound comprising at least one of the group consisting of nitrogen, carbon, and oxygen.

96. The wafer of claim 89, the wafer having a thickness of between 50 microns and 400 microns.

97. The wafer of claim 89, the wafer having a thickness of between 100 microns and 250 microns.

98. The wafer of claim 96, the nested membranes having a thickness between 0.25 microns and 5 microns.

99. The wafer of claim 96, the film capsule having a thickness of between 0.5 microns and 2 microns.

100. The wafer of claim 89, wherein each of the plurality of films surrounds an entire surface of the wafer.

101. The wafer of claim 89, wherein the plurality of nested membranes collectively surround an entire surface of the wafer.

102. The wafer of claim 101, at least one of the plurality of nested thin films surrounding less than an entire surface of the wafer.

103. A semiconductor wafer assembly, comprising:

a. a body portion comprising a semiconductor wafer, the body portion having two flat opposing surfaces and a crystal structure with an average crystal grain size of less than 10 square millimeters;

b. a film coating completely surrounding the body portion; and further comprises

c. At least one backing element adjacent to at least one surface of the film coating.

104. The wafer assembly of claim 103, the at least one backing element comprising a pair of backing elements, each adjacent one of two opposing faces of the film capsule.

105. The wafer assembly of claim 104, the wafer being in a horizontal position with one face gravitationally facing upward, the pair of backing elements being disposed above and below the wafer.

106. The wafer assembly of claim 103, the backing element comprising silicon carbide.

107. The wafer assembly of claim 105, the backing element comprising a flat plate.

108. The wafer assembly of claim 105, the backing element above the wafer comprising a mass of particulate material.

109. The wafer assembly of claim 108, the quantity of particulate material comprising sintered particulate material.