HK1035261B - Method for producing semiconductor device - Google Patents

Description

Method for producing semiconductor device

Technical Field

The present invention relates to the production of semiconductor devices. In particular, the present invention relates to a method for producing a semiconductor device in which an appropriate amount of an adhesive layer can be easily formed on an extremely thin back surface of a chip, so that chip cracking, or package cracking can be avoided, so that improvement in productivity can be achieved.

Background

In recent years, the spread of IC cards has been promoted, and further reduction in thickness is now demanded. Accordingly, the thickness of semiconductor chips requiring about 350 μm is now reduced to 50-100 μm or less.

Thin semiconductor chips can be obtained by first sticking a surface protective tape for back grinding (back grinding) to the circuit surface of the wafer, subsequently grinding the back surface of the wafer, and thereafter dicing (dice) the wafer. When the thickness of the wafer becomes extremely small after grinding, chip breakage and chip cracking are highly likely to occur when the wafer is sliced.

As another method capable of reducing the thickness of a chip, japanese patent Laid-open publication (Laid-open publication) No. 5(1993) -335411 discloses a method for producing a semiconductor chip in which a groove of a given depth is formed from the surface of a wafer, and thereafter the back surface of the wafer is ground. Further, this publication discloses a method in which after the step of grinding the back surface of the wafer, the dice (pellet) stuck to the mounting tape are separated from the mounting tape and fixed to a lead frame.

The chips obtained in this way are extremely thin and are likely to break during later assembly steps.

When it is desired to pick up a semiconductor chip stuck on a mounting tape and fix the picked-up semiconductor chip on a substrate, a well-known method "dispenser (dispenser) method" or a method using a film adhesive is generally used.

In this dispenser method, a liquid adhesive of a given amount is applied by a dispenser to certain positions on a substrate determined for fixing a semiconductor chip, and then the semiconductor chip is pressure-bonded/fixed thereto. However, such a spreader has a disadvantage in that it is difficult to control the amount of discharged adhesive, resulting in fluctuation in the amount of adhesive, resulting in variation in quality, and a disadvantage in that a leakage phenomenon occurs because the adhesive is liquid. When the adhesive leakage occurs, the adhesive may be rolled up to the upper surface of the chip or the semiconductor chip may be inclined, so that a failure may occur at the time of wire bonding. Furthermore, when the resin-sealed package is placed in a high-temperature environment, the package may be cracked due to volatile components evaporated from any leaked adhesive.

In that method using a film adhesive, a film adhesive cut into substantially the same shape as a chip is stuck to some positions of a substrate determined in advance for fixing a semiconductor chip or a film adhesive cut into substantially the same shape as a chip is stuck to a chip, and the chip is fixed to the substrate by the film adhesive. However, in this method, the film adhesive needs to be cut in advance into substantially the same shape as the chip, so that it takes time to carry out the method. Moreover, the bonding work of the film adhesive having an extremely small size as the chip is indispensable, so that this method is laborious.

Even if any of the above methods is used, it is still necessary to handle the minute chips which have been ground to an extremely small thickness and thus become extremely fragile and fragile, so that the chips are broken by a slight malfunction.

Therefore, it is required to develop a method of easily and safely forming an adhesive layer (especially on the back surface of a chip).

Disclosure of Invention

The present invention has been made in view of the above-mentioned state of the art. Specifically, an object of the present invention is to provide a method for producing a semiconductor device in which an appropriate amount of an adhesive layer can be easily formed on an extremely thin back surface of a chip, so that chip cracking, or package cracking can be avoided, whereby improvement in productivity can be achieved.

The method for producing a semiconductor device according to the present invention comprises the steps of:

providing a wafer with a given thickness, wherein the wafer is provided with a surface provided with a semiconductor circuit and a back surface;

forming grooves with a cutting depth smaller than the thickness of the wafer, wherein the grooves extend from the circuit surface of the wafer;

adhering a surface protective sheet (sheet) to the surface of the wafer circuit;

grinding the back side of the wafer to reduce the thickness of the wafer, thereby ultimately resulting in dividing the wafer into individual chips with spaces therebetween, the spaces being formed by removing the bottoms of the grooves formed in the wafer;

adhering a dicing/die bonding sheet to the ground back surface of the wafer, the dicing/die bonding sheet including a base and an adhesive layer laminated on the base, the adhering being performed such that the adhesive layer is brought into contact with the ground back surface of the wafer;

peeling the surface protective thin layer from the circuit surface of the wafer so that the dicing/die bonding thin layer is exposed through each space between adjacent chips;

dicing the exposed adhesive layer of the dicing/die bonding film;

separating each chip having the cut adhesive layer adhered thereto from the dicing/die bonding sheet; and

each chip is bonded to a given substrate through this adhesive layer.

This method of the present invention enables efficient production of semiconductor devices.

Brief description of the drawings

Fig. 1 to 6 show steps of a method for producing a semiconductor device according to the invention.

Preferred embodiments of the invention

The present invention will be described in detail below with reference to the accompanying drawings.

The first step is as follows: referring to fig. 1, a wafer 1 of a given thickness is provided having a circuit-provided surface and a back surface, and grooves 2 having a cutting depth smaller than the thickness of the wafer 1 are formed, the grooves extending from the circuit surface of the wafer. For example, the grooves 2 of a given depth extending from the surface of the wafer 1 are formed by performing a dicing work along the dicing position of the wafer 1 so as to separate a plurality of semiconductor circuits from each other.

The formation of the groove 2 by the cutting work is performed with a conventional wafer slicer in which the cutting depth is appropriately adjusted. In the dicing work, the wafer 1 can be fixed using, for example, a dicing tape which is generally used when dicing the wafer 1, as necessary. Although not particularly limited, the thickness of the wafer 1 is generally in the range of about 350 to 800 μm. The depth of the groove 2 is appropriately determined according to the desired chip thickness, and generally it is in the range of about 20 to 500 μm. On the other hand, the width W of the groove 2 is equal to the thickness of the dicing blade used, and is generally in the range of about 10 to 100 μm.

The second step is as follows: referring to fig. 2, a surface protective thin layer 10 is attached to the circuit surface of the wafer 1. Specifically, the adhesion of the surface protective thin layer 10 is performed so as to cover the entire circuit surface of the wafer 1.

The surface protective thin layer 10 includes a base 11 and a removable adhesive layer 12 laminated thereon. The adhesive layer 12 has the property of being easily removable after an intended use. The removable adhesive layer 12 may be composed of an adhesive that is curable by energy radiation (energy ray or energy beam). The energy radiation curable adhesive has such a property that it fixes an adherend with satisfactory adhesive strength before exposure to energy radiation, but cures to lose adhesive strength by exposure to energy radiation and then can be easily peeled off.

For example, various protective thin layers generally used in the protection of various parts and the processing of semiconductor wafers may be used as the above surface protective thin layer 10. In particular, it is preferable to use in the present invention a surface protective film proposed by the applicant in Japanese patent application Nos. 10(1998) -231602 and 11(1999) -305673.

The third step: referring to fig. 3, the back surface of the semiconductor wafer 1 is ground to reduce the thickness of the wafer 1, resulting in dividing the semiconductor wafer 1 into individual chips 3 with spaces between the chips 3. Specifically, the bottom of the groove 2 is removed, and the grinding of the wafer 1 is continued up to a given thickness of the wafer 1, thereby achieving the division into the individual chips 3. Grinding of the back side of the wafer is accomplished with a conventional grinder.

The fourth step: referring to fig. 4, a dicing/die bonding sheet 20 is stuck to the ground back surface of the wafer 1, and the surface protective sheet 10 is peeled off.

Such a dicing/die bonding sheet 20 includes a substrate 21 and an adhesive layer 22 laminated thereon. The adhesive layer 22 is formed so that it can be peeled off from the substrate 21. The adhesive layer 22 is adhered to the chip 3 at room temperature or under a moderate heat-pressure bonding environment. After the adhesive layer 22 is applied to the chip 3, the adhesive layer 22 remains stuck to the back surface of the chip 3 but is peeled off from the substrate 21 when the chip 3 is picked up.

Various thin layers generally used in dicing and die bonding of semiconductor wafers may be used as the above dicing/die bonding thin layer 20 without any particular limitation.

For example, it is possible to use:

for example, a chip/die bonding laminate comprising an adhesive layer containing, as essential components, a pressure-sensitive adhesive contact component curable by energy radiation and a thermosetting adhesive component, as described in Japanese patent laid-open publication Nos. 2(1990) -32181, 8(1996) -53655, 8(1996) -239639, 9(1997) -100450 and 9(1997) -202872, and

a dicing/die-bonding sheet comprising an adhesive layer composed of a polyimide resin and a nitrogen-containing organic compound compatible therewith as described in japanese patent laid-open publication No. 9(1997) -67558.

Further, a dicing/die-bonding thin layer including an adhesive layer composed of any one of epoxy resin, imide resin, amide resin, silicone resin, acrylic resin, modified products of these materials, and mixtures thereof may be suitably used.

After the above-described dicing/die bonding sheet 20 is adhered to the ground back surface of the wafer 1, the surface protective sheet 10 is peeled off from the wafer 1. When the adhesive layer of the surface-protecting sheet 10 is composed of an adhesive curable by energy radiation, the adhesive layer is exposed to energy radiation before the sheet 10 is peeled off, thereby reducing the adhesive strength of the adhesive layer.

The fifth step: referring to fig. 5, the adhesive layer of the dicing/die-bonding thin layer 20 exposed through each space between adjacent chips is cut.

The surface protective layer 10 peeled off from the circuit surface of the wafer is such that the spaces between the adjacent chips separated by dicing expose the adhesive layer 22 of the dicing/die bonding layer 20. The adhesive layer 22 is completely cut by the dicing blade 4. The width W1 of the slicing blade 4 is slightly smaller than the width W of the aforementioned groove 2. For example, width W1 is preferably about 30 to 90% of width W.

Although the cutting depth may be satisfactory as long as the adhesive layer is completely cut, the cutting is generally performed to such an extent that the substrate 21 is partially cut, thereby completing the division of the adhesive layer 22 into sheets. As a result, the adhesive layer 22 is cut into a sheet having substantially the same size and shape as the chip 3.

A sixth step: referring to fig. 6, the adhesive layer 22 is separated together with the chip 3 from the substrate 21 of the dicing/die-bonding sheet 20. As described above, the adhesive layer 22 is formed so that it can be separated from the substrate 21. Accordingly, after the adhesive layer 22 is applied to the chip 3, the adhesive layer 22 remains stuck to the back surface of the chip 3 but is peeled off from the substrate 21 when the chip 3 is picked up.

When the adhesive layer 22 is composed of the above-described adhesive containing the pressure-sensitive adhesive component curable by energy radiation and the thermosetting adhesive component as essential components, it is preferable to expose the adhesive layer 22 to energy radiation before picking up the chip 3. In this case, exposure to energy radiation decreases the adhesive strength of the adhesive layer 22, so that peeling of the adhesive layer 22 from the substrate 21 can be effectively accomplished. The exposure to energetic radiation may be performed before the above fifth step.

A seventh step of: each chip 3 is bonded to a given substrate (not shown) by an adhesive layer 22. The back side of the chip 3 has been provided with an adhesive layer 22 in step 6 above. The chip 3 can be fixed to the substrate by placing the chip 3 on the substrate through the adhesive layer 22 and causing the adhesive layer 22 to exert its adhesive strength with a desired means.

When the adhesive layer 22 is composed of the above adhesive containing the pressure-sensitive adhesive component curable by energy radiation and the thermosetting adhesive component as essential components, the bonding ability of the thermosetting adhesive component can be exerted by heating, thereby firmly bonding the chip 3 and the substrate to each other. When the adhesive layer 22 is composed of a polyimide resin and its compatible nitrogen-containing organic compound, the polyimide resin can be cured by heating as well, thereby firmly bonding the chip 3 and the substrate to each other.

Further, the adhesive layer 22 is a solid adhesive having substantially the same shape as the chip 3, so that problems such as leakage do not occur, and the occurrence of wire bonding failure, package cracking, and the like can be reduced.

As apparent from the foregoing, the semiconductor device manufacturing method according to the present invention can easily form an appropriate amount of adhesive layer on the extremely thin back surface of a chip, whereby chip cracking, or package cracking can be avoided, so that improvement in productivity can be achieved.

Examples of the present invention

The invention will be further illustrated with reference to the following examples, which are in no way intended to limit the scope of the invention.

Hereinafter, the "chip dicing (dicing) test", "wire bonding test", and "package cracking test" are performed in the following manner.

Chip cutting test "

The side faces of each 50 silicon chips provided with the adhesive layer produced in the above examples and comparative examples were observed by an optical microscope with respect to chip fracture and the presence of fracture, and in the case of fracture, the fracture width was measured.

Wire bonding test "

Wire bonding characteristics (failures and yields due to extrusion, rolling up, and leakage of the adhesive) between the aluminum pads (pads) on the upper surface of the silicon chip and the wiring portions on the lead frame were examined with respect to 100 semiconductor devices produced in the following examples and comparative examples. The aluminum pad is 100 μm away from one end of the silicon chip and the wire bonding portion of the wiring is 500 μm away from one end of the silicon chip.

Package cracking test "

The semiconductor devices obtained in the following examples and comparative examples were sealed under high pressure using a sealant resin (biphenyl epoxy resin). The resin was cured at 175 ℃ for 6 hours. Thus, 100 packages for package test were obtained. Each package was allowed to stand at high temperature and high humidity (85 ℃, 85% relative humidity) for 168 hours. Thereafter, each package was allowed to stand in the same environment (215 ℃) as vapor phase welding (VPS) for 1 minute, and then cooled to room temperature. This was done three times and the sealant resin was then examined for any cracking using Scanning Acoustic Tomography (SAT). The package cracking rate is the ratio of the number of cracked packages to the number of packages being inspected (i.e., 100).

The back-ground surface protective sheet, dicing tape, dicing/die bonding sheet, mounting tape and surface protective tape used in the following examples and comparative examples are described in detail below.

(1) The surface protective thin layer was prepared in the following manner.

A25% by weight ethyl acetate solution of an acrylic copolymer having a weight average molecular weight of 300,000 prepared from 60 parts by weight of butyl acrylate, 10 parts by weight of methyl methacrylate and 30 parts by weight of 2-hydroxyethyl acrylate was taken as 100 parts by weight, and 7.0 parts by weight methacryloyloxyethyl isocyanate (methacryloxyethyl isocyanate) was taken as a reaction with the solution, thereby obtaining a copolymer curable by energy radiation. 0.5 parts by weight of a polyisocyanate compound (Coronate L, manufactured by Nippon Polyurethane Co., Ltd.) as a crosslinking agent and 1 part by weight of 1-hydroxycyclohexylbenzophenone (Irgacure 184, manufactured by Ciba Specialty Chemicals) as a photopolymerization initiator were taken and mixed with 100 parts by weight (in terms of solid content) of an energy radiation curable copolymer to obtain an energy radiation curable pressure sensitive adhesive.

A 110 μm thick polyethylene film (young's modulus × thickness ═ 14.3kg/cm) was coated with a pressure-sensitive adhesive curable by energy radiation so that the coating thickness after drying was 20 μm. Drying was performed at 100 ℃ for 1 minute, thereby obtaining a pressure-sensitive adhesive thin layer.

(2) Slicing the strips:

adwill D-628(110 μm thick polyolefin substrate and 20 μm thick pressure sensitive adhesive layer curable by energy radiation, manufactured by LINTEC).

(3) Dicing/die bonding thin layer:

adball LE5000 (100 μm thick polyolefin substrate and 20 μm thick thermosetting adhesive layer, manufactured by LINTEC Corp.), or

A thin layer of thermoplastic polyimide (25 μm thick polyethylene naphthalate and 20 μm thick thermoplastic polyimide bond layer).

(4) Assembling the belt:

adwill D-650(110 μm thick polyolefin substrate and 20 μm thick pressure sensitive adhesive layer curable by energy radiation, manufactured by LINTEC).

(5) Surface protective tape for back grinding:

adwill E-6142S (110 μm thick polyolefin substrate and 30 μm thick pressure sensitive adhesive layer curable by energy radiation, manufactured by LINTEC).

Example 1

A silicon wafer having a diameter of 6 inches and a thickness of 700 μm was stuck to a dicing tape (Adwill D-628), and a groove was formed with a dicing depth of 400 μm and a chip size of 6 mm square using a wafer dicer (DAD 2H/6T, manufactured by Disco corporation) having a blade width of 35 μm. Subsequently, a thin surface protection layer is adhered to the grooved surface of the wafer. The dicing tape was peeled off, and the back surface of the wafer was ground by a back grinder (DFG 840, manufactured by Disco corporation) until the thickness thereof became 80 μm, thereby achieving division of the wafer into individual chips. Thereafter, a dicing/die bonding thin layer (advill LE5000) was stuck to the ground back surface of the wafer (chip), and the surface protective thin layer was irradiated with ultraviolet light and peeled off. The dicing/die bonding thin layer was irradiated with ultraviolet light, and the adhesive layer between the divided adjacent silicon chips was cut with a dicing saw (DAD 2H/6T, manufactured by Disco corporation) having a blade width of 30 μm under a cutting depth of 35 μm. Finally, the divided individual silicon chips are picked up from the dicing/die bonding sheet, and the silicon chips having the adhesive layer of the dicing/die bonding sheet adhered thereon are directly die-bonded to the die pad portions of the lead frame. Thermal curing was carried out under the given curing conditions (160 °, 30 minutes). Thus, a semiconductor device was obtained.

The results are given in table 1.

Example 2

A silicon wafer having a diameter of 6 inches and a thickness of 700 μm was stuck to a dicing tape (Adwill D-628), and a groove was formed with a dicing depth of 400 μm and a chip size of 5 mm square using a wafer microtome (DAD 2H/6T, manufactured by Disco corporation) having a blade width of 35 μm. Subsequently, a thin surface protection layer is adhered to the grooved surface of the wafer. The dicing tape was peeled off, and the back surface of the wafer was ground by a back grinder (DFG 840, manufactured by Disco corporation) until the thickness thereof became 80 μm, thereby achieving division of the wafer into individual chips. Thereafter, the dicing/die bonding thin layer (thermoplastic polyimide film) was heated and stuck to the ground back surface of the wafer (chip) at about 130 ℃, and the surface protective thin layer was peeled off. The adhesive layer between the divided adjacent silicon chips was cut with a dicing saw (DAD 2H/6T, manufactured by Disco corporation) having a blade width of 30 μm under a cutting depth of 35 μm. Finally, the divided individual silicon chips are picked up from the dicing/die bonding sheet, and the silicon chips having the adhesive layer of the dicing/die bonding sheet adhered thereon are directly die-bonded to the die pad portions of the lead frame at 150 ℃. Thus, a semiconductor device was obtained.

The results are given in table 1.

Comparative example 1

A silicon wafer having a diameter of 6 inches and a thickness of 700 μm was stuck to a dicing tape (Adwill D-628), and a groove was formed with a dicing depth of 400 μm and a chip size of 5 mm square using a wafer microtome (DAD 2H/6T, manufactured by Disco corporation) having a blade width of 35 μm. Subsequently, a thin surface protection layer is adhered to the grooved surface of the wafer. The dicing tape was peeled off, and the back surface of the wafer was ground by a back grinder (DFG 840, manufactured by Disco corporation) until the thickness thereof became 80 μm, thereby achieving division of the wafer into individual chips. Thereafter, a tape (Adwill D-650) was stuck to the ground back surface of the wafer (chip) to peel off the surface protective thin layer. The silicon chips are picked up and bonded to die pad portions of a lead frame, which portions have been previously coated with a paste adhesive for bonding. Thermal curing is carried out under given curing conditions. Thus, a semiconductor device was obtained.

The results are given in table 1.

Comparative example 2

A surface protective tape (Adwill E-6142S) for back grinding was stuck to a silicon wafer having a diameter of 6 inches and a thickness of 700 μm, and the back surface of the wafer was ground with a back grinder (DFG 840, manufactured by Disco corporation) until the wafer thickness became 80 μm. The surface protective tape for back grinding was peeled off. A thin dicing/die bonding layer (Adwill LE5000) was attached to the ground back side of the wafer and irradiated with UV light. With a wafer microtome (DAD 2H/6T, manufactured by Disco corporation) having a blade width of 35 μm, cutting (slicing) was performed under conditions of a cutting depth of 115 μm and a chip size of 5 square millimeters. The silicon chip with the adhesive layer thus obtained was directly die-bonded to the die pad portion of the lead frame. Thermal curing was carried out under the given curing conditions (160 ℃, 30 minutes). Thus, a semiconductor device was obtained.

The results are given in table 1.

TABLE 1

	Wire bond testing		Package cracking test	Chip dicing test
						Wire bonding characteristics	Yield (%)	Cracking Rate (%)	Chip cracking/splitting	Crack width (. mu.m)
	Example 1	Good effect	100	0	Is free of						0
Example 2						Good effect	100	0	Is free of	0
	Comparative example 1	Bad	30	20	Is free of						0
Comparative example 2						Good taste	100	0	Find out	13-20

Claims (1)

1. A method for producing a semiconductor device, characterized by comprising the steps of:

providing a wafer having a given thickness, the wafer having a surface provided with semiconductor circuitry and a back surface;

forming a groove having a cutting depth less than the thickness of the wafer, the groove extending from the wafer circuit surface;

adhering a surface protective thin layer to the whole surface of the wafer circuit;

grinding the back surface of the wafer to reduce the thickness thereof, thereby eventually resulting in dividing the wafer into individual chips with spaces therebetween, the spaces being formed by removing the bottoms of the grooves formed in the wafer;

adhering a dicing/die bonding sheet to the ground back surface of the wafer, the dicing/die bonding sheet comprising a substrate and an adhesive layer laminated on the substrate, the adhering being performed such that the adhesive layer is brought into contact with the ground back surface of the wafer;

peeling the surface protective thin layer from the wafer circuit surface so that the adhesive layer of the dicing/die bonding thin layer is exposed through each space between the adjacent chips;

dicing the exposed adhesive layer of the dicing/die bonding thin layer;

separating each chip having the diced adhesive layer adhered thereto from the substrate of the dicing die-bonding thin layer; and

each chip is bonded to a given substrate by an adhesive layer.