HK1094097B - Power inversion system - Google Patents

Description

Power conversion system

Technical Field

[0001]

The present invention relates to a power conversion system having a capacitor for smoothing a dc voltage between a rectifier and an inverter, and more particularly to a power conversion system in which a rectifier and an inverter operate in a pulse width modulation manner.

Background

[0002]

In recent years, a variable-frequency variable-voltage power conversion system called a VVVF inverter or the like has been used for controlling an ac motor represented by an induction motor and a synchronous motor. In this case, a power conversion system in which a rectifier portion (converter) and an inverter portion (inverter) are connected with a dc circuit interposed therebetween is generally used.

[0003]

As shown in fig. 8, in the power conversion system, for example, ac (three-phase ac power) supplied from a commercial power supply or the like is converted into dc (dc power) by a rectifier, a smoothing capacitor provided in a dc intermediate circuit is charged, and then the dc voltage of the charged smoothing capacitor is converted into ac (three-phase ac power) having a voltage and a frequency required by an ac motor as a load by an inverter.

[0004]

The power conversion system shown in fig. 8 will be described in detail below. The illustrated power conversion system is provided with a rectifier 1 and an inverter 2, and the rectifier 1 and the inverter 2 are controlled by PWM (pulse width modulation), and a three-phase alternating current supplied from an alternating-current commercial power supply 3 through a reactor 7 is converted into a direct current by the rectifier 1, and the direct current is converted into a three-phase alternating current by the inverter 2 and supplied to a motor 4 such as a three-phase induction motor.

[0005]

Then, on the rectifier 1 side, the voltage between the terminals of the smoothing capacitor 6 constituting the dc intermediate circuit is first fed back as a dc voltage e, and a current command iA on the power supply side is generated by an AVR (voltage control unit) 101 so that the dc voltage e matches the dc voltage command e. Then, based on the current command iA, a voltage command E on the power supply side of the rectifier 1 is generated by an ACR (current control part) 102 so that the power supply side current matches the command value.

[0006]

Then, a PWM (pulse width control) 103 compares the triangular-waveform carrier CA output from the carrier generator 104 with the voltage command E to generate a drive pulse PA for PWM control, and turns on/off the switching elements SRP, SSP, STP, SRN, SSN, and STN of the rectifier 1 to stably control the terminal voltage of the smoothing capacitor 6 and improve the current waveform and power factor of the ac power supply 3.

[0007]

The inverter 2 side will be explained below. First, as described above, the motor 4 is connected as a load to the inverter 2. At this time, the speed (rotational speed) R of the motor 4 is detected by the encoder 5 and fed back, so that the current command iB of the inverter 2 is generated by the ASR (speed control section) 201, and the speed of the motor 4 is made to coincide with the speed command R.

[0008]

Then, an inverter 2 voltage command V for matching the motor current with the command value is generated by an ACR (current control unit) 202 based on the current command iB, and is used as a modulation wave, which is compared with a carrier CB of a triangular waveform output from a carrier generation device 204 by a PWM (pulse width control unit) 203 to generate a drive pulse PB for PWM control, and the switching elements SUP, SVP, SWP, SUN, SVN, and SWN of the inverter 2 are turned on/off to supply three-phase ac power to the motor 4.

[0009]

In the power conversion system of the PWM control method, both the output of the rectifier 1 and the input of the inverter 2 are pulses having the same period as the carrier, and in this case, in the power conversion system shown in fig. 8, as described above, the carrier generation device 104 on the rectifier 1 side and the carrier generation device 204 on the inverter 2 side are separately provided, and the rectifier 1 and the inverter 2 are PWM-controlled by a carrier different from the carrier CA and the carrier CB, and therefore, it is impossible to avoid a phase deviation in the pulses between the output current on the rectifier 1 side and the input current on the inverter 2 side.

[0010]

At this time, a current, which is a difference between the pulse-shaped output current on the rectifier 1 side and the pulse-shaped input current on the inverter 2 side, flows through the smoothing capacitor 6. Therefore, if the phases of these currents are deviated, the current flowing into and out of the smoothing capacitor 6 increases, and the voltage fluctuation increases.

[0011]

Therefore, in order to suppress the fluctuation of the dc current and smooth the dc voltage, it is necessary to increase the capacity of the smoothing capacitor 6 at this time, and therefore, in the power conversion system shown in fig. 8, a large-capacity capacitor is necessary, which causes problems such as an increase in the size of the device and an increase in the cost.

[0012]

For this reason, for example, Japanese patent application laid-open No. 4-121065, which is one of patent documents, discloses a solution to the above-mentioned problems. The power conversion system according to this embodiment will be described below with reference to fig. 9. The power conversion system shown in fig. 9 is a single carrier generation device 304 in which the rectifier-side carrier generation device 104 and the inverter-side carrier generation device 204 in the conventional technique shown in fig. 8 are combined, and the other configuration thereof is the same as that in the conventional technique shown in fig. 8.

[0013]

Therefore, in the power conversion system shown in fig. 9, since the PWM control of the rectifier 1 and the inverter 2 is performed by the same carrier C output from the unified carrier generation device 304, there is no room for a phase difference between the pulses in the pulse-shaped output current on the rectifier 1 side and the pulse-shaped input current on the inverter 2 side, and thus the state in which the phase difference is 0 can be maintained at all times.

[0014]

As a result, according to the power conversion system shown in fig. 9, since the problem of an increase in the current flowing into the smoothing capacitor 6 due to the pulse phase deviation does not occur, the capacity of the smoothing capacitor 6 can be reduced accordingly.

Patent documents: japanese unexamined patent publication Hei 4-121065

[0015]

The above-described conventional technique has a problem that a large-capacity smoothing capacitor needs to be provided in the dc intermediate circuit because no consideration is given to the waveform difference between the pulse waveform of the output current on the rectifier side and the pulse waveform of the input current on the inverter side.

[0016]

In the above-described conventional technique, the same carrier wave for PWM is used on the rectifier side and the inverter side, but since there is a difference in pulse waveform between the rectifier side and the inverter side, when the phase difference between the carrier waves for PWM is 0, the capacitor current does not necessarily have a minimum value, and there is a problem that it is necessary to further suppress the current flowing into the smoothing capacitor.

Disclosure of Invention

[0017]

The purpose of the present invention is to provide a power conversion system that can minimize the capacity of a smoothing capacitor provided in a DC intermediate circuit.

[0018]

The above object is achieved by a power conversion system having a smoothing capacitor between a rectifier part of a pulse width modulation system and an inverter part of a pulse width modulation system, wherein a phase difference giving device is provided for giving a phase difference to a carrier wave for pulse width modulation of the rectifier part and a carrier wave for pulse width modulation of the inverter part, the phase difference being set to a phase difference when an overlapping area of an output current pulse of the rectifier part and an input current pulse of the inverter part is maximized.

[0019]

In this case, the above object can be achieved even if the phase difference is set to a value within 30 °, or the above object can be achieved even if the phase difference is set to a phase difference when an overlapping area of the output current pulse of the rectifier portion and the input current pulse of the inverter portion is the largest, and the above object can be achieved even if the phase difference is set to a phase difference when the current flowing into the smoothing capacitor is the smallest.

ADVANTAGEOUS EFFECTS OF INVENTION

[0020]

According to the present invention, since voltage fluctuation of the direct current intermediate circuit can be suppressed without increasing the capacity of the smoothing capacitor, it is possible to realize downsizing of the system and cost reduction.

Drawings

Fig. 1 is a block diagram showing a power conversion system according to an embodiment of the present invention.

Fig. 2 is a characteristic diagram of a capacitor current in a power conversion system.

Fig. 3 is a block configuration diagram showing an example of a control system according to an embodiment of the present invention.

Fig. 4 is a waveform diagram for explaining the operation of the PWM timing unit.

Fig. 5 is a flowchart showing an operation of an example of the control system according to the embodiment of the present invention.

Fig. 6 is a block configuration diagram showing another example of the control system according to the embodiment of the present invention.

Fig. 7 is a flowchart showing an operation of another example of the control system according to the embodiment of the present invention.

Fig. 8 is a block diagram showing an example of a power conversion system according to the related art.

Fig. 9 is a block diagram showing another example of a power conversion system according to the related art.

The symbols in the drawings illustrate that: rectifier 1, inverter 2, commercial power supply 3, motor 4 (ac motor), encoder 5, smoothing capacitor 6, carrier generation device 101, 201AVR (voltage control part), current control part 102, 202ACR (current control part), PWM (pulse width control part) 103, 203, carrier generation device 104, 204, phase difference carrier generation device 301, PWM timing unit 1000, 2000, 3000MPU, 1001, 2001, 3001CPU, 1002, 1003, 2002, 3002.

Detailed Description

[0021]

The power conversion system according to the present invention will be described in detail below with reference to the illustrated embodiments.

[0022]

Fig. 1 shows an embodiment of the present invention, and 301 shows a phase difference carrier generation device that can generate two types of carriers, i.e., a carrier CC having a triangular waveform and a carrier CI having a triangular waveform with a certain phase difference Δ from the carrier CC, and can supply the carriers to PWM103 and PWM203, respectively. Other structures are the same as those of the power conversion system in the related art described with reference to fig. 8 and 9.

[0023]

In the embodiment of fig. 1, first, the voltage between the terminals of the smoothing capacitor 6 is fed back as the dc voltage e on the rectifier 1 side, and the current command iA on the power supply side is generated by the AVR101 so that the dc voltage e matches the dc voltage command e. Then, based on the current command iA, the ACR102 generates a power supply side voltage command E of the rectifier 1, which matches the power supply side current with a command value.

[0024]

Then, the PWM103 compares the voltage command E with the carrier Cc output from the phase difference carrier generator 304 to generate a drive pulse PA for PWM control, and drives the switching elements SRP, SSP, STP, SRN, SSN, and STN of the rectifier 1 to be turned on and off, thereby controlling the terminal voltage of the smoothing capacitor 6 to be constant and improving the ac waveform and power factor of the ac power supply 3.

[0025]

Similarly, on the inverter 2 side, the current command iB of the inverter 2 is generated by the ASR201 by feeding back the speed R of the motor 4 detected by the encoder 5, and the speed of the motor 4 is made to coincide with the speed command R.

[0026]

Then, an inverter 2 voltage command V for matching the motor current with the command value is generated by the ACR202 based on the current command iB, and this is used as a modulation wave, which is compared with another carrier CI output from the phase-difference-equipped carrier generation device 304 by the PWM203 to generate a drive pulse PB for PWM control, and the switching elements SUP, SVP, SWP, SUN, SVN, and SWN of the inverter 2 are turned on/off to supply three-phase ac power to the motor 4.

[0027]

Therefore, in the embodiment shown in fig. 1, the rectifier 1 and the inverter 2 are PWM-controlled in the same manner, the three-phase ac power supplied from the commercial power supply 3 is converted into dc power by the rectifier 1, and the dc power is converted into three-phase ac power by the inverter 2 to be supplied to the motor 4 such as the three-phase induction motor 4, and the above configuration is the same as the above-described power conversion system in the related art, except that the carrier used in the PWM203 is another carrier CI having a certain phase difference Δ from the carrier CC used in the PWM 103.

[0028]

As a result, in the embodiment of fig. 1, the pulse phase of the current output from the rectifier 1 is the same phase as the carrier CC, and the pulse phase of the current input to the inverter 2 is the same phase as the carrier CI, and as a result, a phase difference corresponding to the phase difference Δ is given between the pulse phase of the current output from the rectifier 1 and the pulse phase of the current input to the inverter 2.

[0029]

As described above, a current, which is a difference between the pulse-shaped output current on the rectifier 1 side and the pulse-shaped input current on the inverter 2 side, flows through the smoothing capacitor 6. Therefore, it can be easily estimated that the current flowing into and out of the smoothing capacitor 6 increases if the pulse phases of the currents deviate.

[0030]

Therefore, in the conventional technique shown in fig. 9, the same carrier C is used on the rectifier 1 side and the inverter 2 side, and the phase difference between the pulse-shaped output current on the rectifier 1 side and the pulse-shaped input current on the inverter 2 side is set to 0, and fig. 2 is a characteristic diagram obtained by evaluating the magnitude of the capacitor current (current flowing into and out of the smoothing capacitor 6) against the carrier phase difference at that time, using the magnitude of the load as a parameter.

[0031]

In this case, fig. 2 shows a case where the capacitor current value at this time is normalized to 1.0 with reference to a case where the carrier phase difference is 90 °. The carrier phase difference here means a phase difference obtained by subtracting the carrier phase of the inverter 2 from the carrier phase of the rectifier 1. The load is the output power of the inverter 2, and the rated power is 100%.

[0032]

As can be understood from fig. 2, if there is a phase difference between the phases of the carriers of the rectifier 1 and the inverter 2, the capacitor current must increase, however, the condition that the phases of the carriers of the rectifier 1 and the inverter 2 are the same (the phase difference is 0) is not necessarily a condition that the capacitor current has a minimum value.

[0033]

The reason for this is presumably because there is a difference in waveform between the output current pulse of the rectifier 1 and the input current pulse of the inverter 2. This is because if the pulse waveforms are the same, all the current output from the rectifier 1 is input to the inverter 2 as long as the phase difference is 0, and therefore, theoretically, the capacitor current should be 0.

[0034]

As described above, when the pulse waveforms are different, the condition that the capacitor current becomes the minimum value is that the area where the pulses of both overlap becomes the maximum, and in this case, the area where the pulses overlap is changed by changing the phase. Therefore, the capacitor current can be minimized by adjusting the phase of the pulse, that is, the phase of the carrier.

[0035]

Here, according to the embodiment of fig. 1, a phase difference corresponding to the phase difference Δ is given between the pulse phase of the current output from the rectifier 1 and the pulse phase of the current input to the inverter 2. For this reason, by adjusting the phase difference Δ, the capacitor current can be adjusted to the minimum value.

[0036]

In this case, in the example of fig. 2, the minimum value of the capacitor current appears when the phase difference Δ is about 30 °, and in this case, the capacitor current is 0.5 to 0.6, and the capacitor current can be reduced as compared with the capacitor current 0.6 to 0.7 when the phase difference Δ is 0, so that the capacity of the smoothing capacitor 6 can be reduced according to the present embodiment, and the device can be downsized.

[0037]

In recent years, in the power conversion system, a microcomputer, a so-called microcomputer, is generally used to control the rectifier and the inverter. Therefore, an embodiment of the present invention controlled by a microcomputer will be described below.

[0038]

The embodiment shown in fig. 3 is an embodiment in which the section other than the main circuit including the rectifier 1, the inverter 2, and the smoothing capacitor 6 in the embodiment of fig. 1 is formed of an MPU (micro processor unit) 1000. For this purpose, as shown in the figure, the MPU1000 has a CPU1001 and PWM timing units 1002, 1003, output ports 1004, 1005, and an input port 1006. In addition, only the portions necessary for the following description are shown in the drawings, and the MPU1000 actually further includes auxiliary devices such as registers and memories.

[0039]

The CPU1001 is programmed to read necessary data from the input port 1006, and to realize the functions of the control system shown in fig. 1 by arithmetic processing, and as a result of the calculation, supplies the modulation signal of the rectifier 1 to the PWM timing unit 1002, supplies the modulation signal of the inverter 2 to the PWM timing unit 1003, and performs PWM control by the respective PWM timing units 1002, 1003, and outputs the drive pulse PA of the rectifier 1 and the drive pulse PB of the inverter 2 from the output ports 1004, 1005, respectively.

[0040]

In this case, the PWM timing sections 1002 and 1003 are provided with a timer, not shown, and the carrier signal for PWM can be acquired by performing up-counting and down-counting with the timer. Therefore, the detailed operation at this time will be described below with reference to fig. 4.

[0041]

First, the PWM timing unit 1002 has a register in which a voltage command E is set. Here, as shown in fig. 4(a), in the voltage command E, the interval between the upper line H and the lower line L corresponds to the command voltage value. Then, the voltage command E is compared with the carrier C, and when both are matched, the PWM pulse PA is generated and outputted from the output port 1004 as shown in the figure. As a result, the dc power having a voltage corresponding to the voltage command E is output from the rectifier 1.

[0042]

Also, PWM timing section 1003 similarly has a register to which voltage command V is set. Here, as shown in fig. 4(b), in the voltage command V, the interval between the upper line H and the lower line L also corresponds to the voltage value, but in this case, it also changes in a sine wave shape in accordance with the output frequency of the inverter 2.

[0043]

Then, the voltage command V is compared with the carrier C Δ, and when both are matched, the PWM pulse PB is generated and output from the output port 1005 as shown in the drawing. As a result, the inverter 2 outputs three-phase ac power having a voltage corresponding to the voltage command V.

[0044]

Further, the program of the CPU1001 is configured to further execute the processing shown in the flowchart of fig. 5. Here, the processing shown in the flowchart of fig. 5 is executed only once when the PWM timing units 1002 and 1003 are started up, and then, the processing is shifted to processing necessary for the PWM timing units 1002 and 1003 to generate the PWM pulses PA and PB.

[0045]

The processing shown in fig. 5 starts from P101, and initial settings such as setting of the operation modes of the PWM timer units 1002 and 1003 are performed from the processing of P101 to the processing of P102 and P103. Thereafter, the timer in the PWM timer section 1002 is started in P104, and then the timer in the PWM timer section 1003 is started in P106 after a predetermined time elapses in P105.

[0046]

As a result, since only the delay of the predetermined time set in P105 is given from the start of the timer of PWM timing section 1002 to the start of the timer of PWM timing section 1003, and the phase difference Δ is given to the carriers of rectifier 1 and inverter 2 in accordance with the delay, the capacity of smoothing capacitor 6 can be reduced by setting the predetermined time at this time to an appropriate value, that is, a value necessary for reducing the current of smoothing capacitor 6.

[0047]

However, in the embodiment shown in fig. 3, the control of the rectifier 1 and the inverter 2 is performed by one MPU1000, but the control of the rectifier 1 and the control of the inverter 2 may be performed by using different MPUs, respectively, and in this case, as shown in fig. 6, the drive pulse PA of the rectifier 1 is generated by one MPU2000, and the drive pulse PB of the inverter 2 is generated by the other MPU 3000.

[0048]

For this reason, in the MPU2000, processing necessary for control of the rectifier 1 is realized by operation of the CPU2001, and as a result of the operation thereof, a modulation signal of the rectifier 1 is sent to the PWM timing unit 2002 to perform PWM control, and the drive pulse PA of the rectifier 1 is output from the output port 2003.

[0049]

Similarly, in the MPU3000, processing necessary for controlling the inverter 2 is realized by the operation of the CPU3001, and as a result of the operation, a modulation signal of the inverter 2 is transmitted to the PWM timing unit 3002 to perform PWM control, and the drive pulse PB of the inverter 2 is output from the output port 3003.

[0050]

Fig. 7 is a flowchart showing processes required for operating the phase difference carrier generation device 301 shown in fig. 1 in the embodiment of fig. 6, where fig. 7(a) is a flowchart showing processes when the PWM timing section 2002 of the MPU2000 is started up, fig. 7(b) and (c) are flowcharts showing processes when the PWM timing section 3002 of the MPU3000 is started up, and these processes are executed only once before the normal control is started up, and at this time, the processes proceed to the processes of P201 and P301.

[0051]

In the processing performed by the MPU2000 shown in fig. 7(a), the process proceeds from step P201 to step P202, and initial settings such as setting of the operation mode of the PWM timer 2002 are performed. After that, an interrupt signal for the MPU3000 is output to the output port 2004 in processing step P203. Thereafter, in processing step P204, a timer, not shown, in the PWM timer section 2002 is started.

[0052]

In the processing performed by the MPU3000 shown in fig. 7(b), the process proceeds from step P301, and initial settings such as setting of the operation mode of the PWM timing unit 3002 are performed in step P302. Thereafter, the process stands by in a state of waiting for an interrupt signal in process step P303. Then, if the interrupt signal port 3004 detects an interrupt signal from the MPU2000, the process proceeds to process step P401, waits for a predetermined time to elapse in process step P402, and starts a timer, not shown, in the PWM timer unit 3002 in process step P403.

[0053]

Thus, the phase difference Δ between the carriers of the rectifier 1 and the inverter 2 is secured for the predetermined time set in the processing step of P105, and the current of the smoothing capacitor 6 can be reduced. In the present embodiment, the same computational load as that of the CPU1001 in the embodiment of fig. 3 can be distributed to both the CPU2001 and the CPU3001, and therefore, the cost can be reduced as compared with the MPU1000 of fig. 3.

[0054]

In the above-described embodiments, as shown in the drawings, the switching elements SRP, SSP, STP, SRN, SSN, and STN of the rectifier 1 and the switching elements SUP, SVP, SWP, SUN, SVN, and SWN of the inverter 2 have been described using IGBTs as an example, but it is needless to say that other semiconductor elements such as FETs (field effect transistors) may be used.

Claims (1)

1. A power conversion system having a smoothing capacitor between a pulse width modulation type rectifier section and a pulse width modulation type inverter section,

phase difference imparting means for imparting a phase difference to the carrier wave for pulse width modulation of the rectifier section and the carrier wave for pulse width modulation of the inverter section,

the phase difference is set to a phase difference at which an overlapping area of an output current pulse of the rectifier section and an input current pulse of the inverter section is maximum.