HK1091963B - Method and device of automatically tuning a loop-filter of a phase locked loop - Google Patents

Description

Method and apparatus for automatically tuning loop filter of phase-locked loop

Technical Field

The invention relates to a method for automatically tuning a loop filter in a phase locked loop. The invention relates equally to a phase locked loop comprising a loop filter, and to a unit comprising such a phase locked loop.

Background

As is known from the prior art, a Phase Locked Loop (PLL) is a negative feedback loop.

The PLL includes a Voltage Controlled Oscillator (VCO) that generates the output signal of the PLL. This output signal can be used as a local oscillator signal, for example, for a receiver mixer of a receiver chain or a transmitter mixer of a transmitter chain in a cellular phone. The VCO is driven by a loop filter that determines the loop characteristics of the PLL, such as settling time and loop stability. The response of the loop filter must be very accurate.

To reduce the number of external or discrete components, it is more desirable to use an integrated loop filter in the PLL. The use of an integrated loop filter also reduces the likelihood of destructive coupling. However, due to process variations or environmental influences, the variation of the value of the integrated component is more significant than the variation of the value of the more accurate external component. For example, an external negative positive zero (NP0) capacitor has very stable values over a wide temperature range, typically between-25 ℃ and +85 ℃.

Therefore, conventional PLLs typically include accurate external components for the loop filter. However, when using an integrated loop filter, a complex calibration procedure is employed.

Disclosure of Invention

It is an object of the invention to enable a simple tuning of the loop-filter of a PLL.

A method of automatically tuning a loop filter of a phase locked loop is presented. The loop filter forms a capacitance at an output of a charge pump of the phase locked loop, and the charge pump provides current pulses to the loop filter. The proposed method comprises adjusting the amplitude of the current pulses output by the charge pump substantially proportionally to the capacitance at the output of the charge pump.

Furthermore, a phase locked loop is proposed, which comprises a loop filter and a charge pump for supplying current pulses to the loop filter. The loop filter forms a capacitance at the output of the charge pump. The proposed phase locked loop further comprises a tuning component for adjusting the amplitude of the current pulses output by the charge pump substantially proportionally to the capacitance at the output of the charge pump.

Finally, a unit comprising the proposed phase locked loop is proposed.

The invention proceeds from the consideration that a constant response of the loop-filter of the PLL is obtained if the product of the impedance formed by the loop-filter at the output of the charge pump of the PLL and the current supplied by the charge pump to the loop-filter is constant. It is therefore proposed to compensate for the capacitance variation at the output of the charge pump by adjusting the amplitude of the current pulses output by the charge pump. More specifically, the amplitude of the current pulse is adjusted in proportion to the capacitance, i.e. the higher the capacitance, the higher the amplitude of the current pulse.

An advantage of the invention is that it allows simple tuning of the loop filter without the need for complex calibration circuits. The invention has particular advantages for integrated loop filters.

In one embodiment of the invention, the output current of the charge pump is adjusted by providing a bias current to the charge pump, the bias current being adjusted substantially proportionally to the capacitance at the output of the charge pump.

Such a bias current may be provided, for example, by a switched capacitor current generator adapted to generate a current proportional to the included capacitor. For this purpose switching elements like transistors are used for changing the direction of charging of the capacitor and conversion elements are used for converting the voltage of the capacitor into a proportional current, which conversion elements may also comprise one or more transistors. If the capacitor is integrated on a single chip with the loop filter and if the capacitor has a capacitance which substantially corresponds to the capacitance formed by the loop filter at the output of the charge pump, the capacitance change of the capacitor of the current generator and the capacitance change at the output of the charge pump will also correspond to each other. The current generator is thus able to generate a bias current proportional to the capacitance at the output of the charge pump. Switched capacitor connections are described, for example, in Microelectronic circuits published by Sedra Smith, university of Saunders.

Using a switched capacitor current generator as a tuning component has the advantage that it requires very little silicon area and is more robust to process variations.

The invention can be used in any unit that requires a PLL, for example in a communication unit like a cellular phone.

Other objects and features of the present invention will become apparent from the following detailed descriptions considered in conjunction with the accompanying drawings. It is to be understood, however, that the drawings are designed solely for purposes of illustration and not as a definition of the limits of the invention, for which reference should be made to the appended claims. It should be further understood that the drawings are not drawn to scale and that they are merely intended to conceptually illustrate the structures and procedures described herein.

Drawings

Fig. 1 is a schematic block diagram of an embodiment of a phase locked loop according to the present invention;

fig. 2 is a schematic circuit diagram of one possible tuning component for the PLL of fig. 1; and

fig. 3 is a flow chart illustrating the tuning of the PLL of fig. 1.

Detailed Description

Fig. 1 schematically shows a possible embodiment of a phase locked loop 20 according to the present invention. The phase locked loop 20 may be used, for example, in a cellular telephone 10, as shown in phantom in fig. 1.

The PLL 20 includes: phase detector 21, charge pump 22, loop filter 23, VCO24 and programmable divider 25, which are connected in turn to each other in a loop.

Thereby connecting the output of the charge pump 22 to the input of the loop filter 23. Within the loop filter 23, the input of the loop filter 23 is grounded via a first capacitor C1, and is grounded in parallel via a first resistor R1 and a second capacitor C2 connected in series. Further, within the loop filter 23, the input of the loop filter 23 is also grounded via a second resistor R2 and a third capacitor C3. The connection between resistor R2 and capacitor C3 forms the output of loop filter 23, which is connected to the input of VCO 24. The names of the capacitors simultaneously indicate their capacitance.

The PLL 20 further comprises a tuning component 26 connected to the charge pump 22.

The PLL 20 operates in a known manner, except for the influence of the tuning element 26. The VCO24 generates a signal having a phase determined by the applied voltage. The frequency of the VCO output signal is divided by the frequency divider 25 and the resulting signal is passed to the phase detector 21. In addition, a reference signal Ref having a known frequency is applied to a reference input of phase detector 21. The phase detector 21 compares the phase of the divided VCO signal with the phase of the reference signal Ref and outputs an error signal. When the two phases are the same, which means that the frequencies of the compared signals are also the same, the PLL 20 is locked.

To achieve or maintain the lock state, the charge pump 22 generates a current pulse whose length is controlled by the output signal of the phase detector 21. As its name suggests, the charge pump 22 then generates (pump) charge, i.e. the supplied current. The amplitude Icp of the pulses is controlled by the bias current of the charge pump 22. The current pulses of the charge pump 22 are fed to a loop filter 23.

The loop filter 23 provides at the output of the charge pump 22 a capacitance C defined by the sum of the respective capacitances of the three capacitors C1, C2, C3 of the loop filter 23, C1+ C2+ C3. The product of the corresponding impedance z (c) at the output of the charge pump 22 and the amplitude of the current pulses Icp output by the charge pump 22, i.e., Icp z (c), should be constant, regardless of possible process variations and possible environmental influences in the production of the PLL 20. Since the impedance Z (C) is proportional to 1/C, the quotient Icp/C should be constant.

According to the invention, it is achieved that the quotient Icp/C is constant by ensuring that the amplitude of the current pulses Icp output by the charge pump 22 is proportional to the capacitance C at the output of the charge pump 22. That is to say that it should be ensured that if the capacitance C is relatively large, for example due to process variations, the charging current Icp is also relatively large. Accordingly, it should be ensured that if the capacitance C is relatively small, the charging current Icp is also relatively small. Since the capacitance of the capacitor C2 is significantly larger than the capacitances of the other two capacitors C1 and C3, it will generally be sufficient to adjust the amplitude of the current pulses Icp depending on the size of the capacitor C2. In the embodiment of fig. 1, the tuning component 26 provides a bias current proportional to the value of C2 to the charge pump 22 for adjusting the amplitude of the current pulses Icp to be proportional to the value of C2, as will be explained further below.

Charging the capacitor with a current generates a potential difference across the capacitor that is proportional to the integral of the charging current. The loop filter 23 thus acts as an integrator. The voltage generated on the capacitor C3 is supplied as a control voltage to the VCO24 through the loop filter 23 so that the VCO24 generates a signal having a desired frequency. The frequency of the signal output by the VCO24 can be varied by varying a factor in the programmable divider 25. The phase locked VCO signal may be provided as, for example, a local oscillator signal to a mixer (not shown) of a transmitter chain of the cellular telephone 10.

The tuning component 26 may be, for example, a current generator relying on switched capacitor based capacitance, as described in the circuit diagram of fig. 2.

The current generator of fig. 2 comprises a capacitor C4, the capacitor C4 is fabricated on the same integrated circuit chip as the capacitors C1, C2, C3 of the loop filter 23, and the capacitor C4 has a capacitance corresponding to the capacitance of the capacitor C2 of the loop filter 23. The voltage supply Vcc of the current generator is connected to the first terminal of the capacitor C4 via the first MOSFET T1 and to the second terminal of the capacitor C4 via the third MOSFET T3. The first terminal of the capacitor C4 and the second terminal of the capacitor C4 are also connected to the drain and gate of the fifth MOSFET T5 via the second MOSFET T2 and the fourth MOSFET T4, respectively. The source of the fifth MOSFET T5 is grounded. Further, the gate of the fifth MOSFET T5 is connected to the gate of the sixth MOSFET T6. The source of the sixth MOSFET T6 is also connected to ground, while the drain of the sixth MOSFET T6 is connected to the bias current input of the charge pump 22.

The tuning of the loop filter 23 by means of the tuning component 26 is illustrated in the flow chart of fig. 3, which will be explained below.

To switch the capacitor C4, the CLOCK signal CLOCK is applied to the gate of the MOSFET T2, and the inverse of the CLOCK signal CLOCK is applied to the gate of the MOSFET T1. Meanwhile, a clock signal xCLOCK is applied to the gate of the MOSFET T4, and a reverse signal of the clock signal xCLOCK is applied to the gate of the MOSFET T3. The CLOCK signals CLOCK and xCLOCK are substantially complementary to each other.

As a result, the capacitor C4 is charged with a sign-alternating signal, the voltage that can be reached across the capacitor C4 depending on the capacitance of the capacitor C4. Therefore, a voltage proportional to the capacitance of the capacitor C4 is applied to the gate of the MOSFET T6, so that a current I proportional to the capacitance of the capacitor C4 will flow through the MOSFET T6.

Then, the current I flowing through the MOSFET T6 is applied as a bias current to the charge pump 22.

Since capacitor C4 is fabricated on the same integrated circuit chip as capacitor C2, both capacitors will be subject to the same process variations and the same environmental influences, and the absolute values of the capacitors will be similar to each other (follow). Thus, the bias current applied to the charge pump 22 is also proportional to the capacitor C2, and thus substantially proportional to the overall capacitance C at the output of the charge pump 22. Furthermore, since the amplitude of the current pulses Icp output by the charge pump 22 is determined by its bias current, the amplitude of the current pulses Icp will also be substantially proportional to the capacitance C at the output of the charge pump 22.

In summary, it is clear that the invention enables a simple tuning of the loop filter 23 without the need for complex calibration circuits.

The tuning component 26 shown in fig. 2 is very small and requires only a clock signal and a power supply as inputs. Furthermore, the tuning component 26 enables a continuous time system, if the capacitors in the IC are sensitive to e.g. temperature variations, the tuning component 26 may also be used in a continuous system such as WCDMA (wideband code division multiple access).

While there have been shown and described and pointed out fundamental novel features of the invention as applied to a preferred embodiment thereof, it will be understood that various omissions and substitutions and changes in the form and details of the devices and methods described may be made by those skilled in the art without departing from the spirit of the invention. For example, it is expressly intended that all combinations of those elements and/or method steps which perform substantially the same function in substantially the same way to achieve the same results are within the scope of the invention. Moreover, it should be recognized that structures and/or elements and/or method steps shown and/or described in connection with any disclosed form or embodiment of the invention may be incorporated in any other disclosed or described or suggested form or embodiment as a general matter of design choice. Accordingly, the invention is to be limited only by the scope of the appended claims.

Claims (7)

1. A method of automatically tuning a loop filter of a phase locked loop, the loop filter providing a capacitance at an output of a charge pump of the phase locked loop, the method comprising the steps of: the charge pump provides current pulses to the loop filter and adjusts the amplitude of the current pulses output by the charge pump in proportion to the capacitance at the output of the charge pump.

2. The method of claim 1, wherein the amplitude of the current pulses output by the charge pump is adjusted by providing a bias current to the charge pump, and the bias current is adjusted in proportion to the capacitance at the output of the charge pump.

3. The method of claim 2, wherein said bias current is adjusted by a switched capacitor current generator that changes a charging direction of a capacitor and converts a voltage on said capacitor into said bias current, said capacitor being integrated on a single integrated circuit chip with said loop filter, and said capacitor having a capacitance that is proportional to said capacitance at said output of said charge pump.

4. A phase locked loop comprising:

a loop filter;

a charge pump for providing current pulses to the loop filter, the loop filter providing a capacitance at an output of the charge pump; and

a tuning component to adjust an amplitude of a current pulse output by the charge pump in proportion to the capacitance at the output of the charge pump.

5. A phase locked Loop according to claim 4, wherein said tuning component is a current generator that generates a current that is adjusted in proportion to said capacitance at said output of said charge pump and provides said generated current as a bias current to said charge pump.

6. The phase locked loop of claim 5 wherein the current generator is a switched capacitor current generator comprising:

a capacitor integrated on a single integrated circuit chip with the loop filter and having a capacitance corresponding to the capacitance at the output of the charge pump;

a switching element for changing a charging direction of the capacitor; and

a conversion element for converting a voltage on the capacitor to the bias current.

7. A unit including a phase locked loop having:

a loop filter;

a charge pump for providing current pulses to the loop filter, the loop filter providing a capacitance at an output of the charge pump; and

a tuning component to adjust an amplitude of a current pulse output by the charge pump in proportion to the capacitance at the output of the charge pump.