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HK1083950A - Initial cell search in wireless communication systems - Google Patents

Initial cell search in wireless communication systems Download PDF

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Publication number
HK1083950A
HK1083950A HK06106043.8A HK06106043A HK1083950A HK 1083950 A HK1083950 A HK 1083950A HK 06106043 A HK06106043 A HK 06106043A HK 1083950 A HK1083950 A HK 1083950A
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HK
Hong Kong
Prior art keywords
chip
signal
synchronization channel
correlator
channel signal
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HK06106043.8A
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Chinese (zh)
Inventor
艾佩斯兰.戴米尔
唐纳尔德.M.格利可
约翰.W.海姆
安德鲁.F.贝纳斯
菲利普.J.佩特拉斯基
路易斯.J.古吉欧尼
伯拉哈卡.R.季塔布
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美商内数位科技公司
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Publication of HK1083950A publication Critical patent/HK1083950A/en

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Description

Initial cell search in a wireless communication system
Technical Field
The present invention relates to wireless transmit/receive units (WTRUs) synchronizing to a base station, and more particularly, to an improved initial cell search procedure.
Background
Wireless telecommunications systems are well known in the art and standards have been developed and implemented to provide global connectivity for wireless systems. One of the currently widely used standards is the global system for mobile telecommunications (GSM), which is considered to be the so-called second generation mobile radio system standard (2G) and its subsequent revision (2.5G), and GPRS and EDGE are examples of 2.5G technologies that offer higher speed data services relative to (2G) GSM networks. Each of these standards attempted to be improved upon the previous standard with additional features and enhancements, and at 1 month 1998, the european telecommunications standards institute, the special mobile group (ETSI SMG), agreed with a radio access mechanism for third generation wireless systems, known as the Universal Mobile Telecommunications System (UMTS). To further implement the UMTS standard, the third generation partnership project (3GPP) was established at 12 months of 1998, and the 3GPP is continuing to develop a common third generation mobile radio standard.
In accordance with current 3GPP specifications, fig. 1A depicts a typical UMTS system architecture. The UMTS network architecture includes a Core Network (CN) that is connected to a UMTS Terrestrial Radio Access Network (UTRAN) via an interface, referred to as Iu, which is defined in detail in the presently disclosed 3GPP specification. The UTRAN is configured to provide wireless telecommunications services to users through wireless transmit/receive units (WTRUs), which in 3GPP are User Equipments (UEs), via a radio interface also known as Uu. The UTRAN has one or more Radio Network Controllers (RNCs) and base stations, also known as node Bs in 3GPP, which collectively provide geographic coverage for wireless communications with UEs. One or more node Bs are connected to each RNC via an interface known as IuB in 3 GPP. The UTRAN may have several node Bs groups connected to different RNCs, two of which are illustrated in fig. 1A. If more than one RNC is provided in a UTRAN, communication between the RNCs is performed via Iur interfaces.
Communications with components outside the network are performed by node Bs at a user level via the Uu interface and CN at a network level via different CN connections to external systems.
Generally, the primary function of base stations, such as node Bs, is to provide wireless connectivity between the network of base stations and WTRUs, which typically transmit common channels to allow unconnected WTRUs to synchronize the timing of the base stations. In 3GPP, a node B performs a physical radio connection with the UEs, the node B receiving signals from an RNC over the Iub interface, which controls the radio signals transmitted by the node B over the Uu interface.
The CN is responsible for routing information to the correct destination, for example, the CN may route voice traffic from the UE to the Public Switched Telephone Network (PSTN) or packet data designated by the network, the voice traffic being received by the UMTS via one of the node Bs. In 3GPP, the CN has six main components: 1) a serving General Packet Radio Service (GPRS) support node; 2) a communication gate GPRS support node; 3) a boundary communication gate; 4) a visitor location register; 5) a mobile services switching center; and 6) a gateway mobile services switching center. The serving GPRS support node provides access to a packet switched domain, such as the internet. The gatekeeper GPRS support node is a gatekeeper support node connected to other networks through which all data traffic destined for other operating networks or the internet passes. The border gateway acts as a firewall to prevent intruders outside the network from attacking users within the network. The visitor location register is a current serving network "copy" of the subscriber data that needs to be served, this information initially coming from the database that manages the mobile subscribers. The mobile services switching center is in charge of the "circuit switched" connection from the UMTS terminal to the network. The gateway mobile service also receives and manages connections requested from users of external networks.
RNCs generally control the internal functions of the UTRAN and also provide intermediate services for communications having a local element connected to a node B via a Uu interface and having an external service element connected between the CN and an external system, for example, UMTS calls in the home using mobile phones.
Typically, an RNC oversees a plurality of base stations, manages radio resources within a geographic area covered by radio services served by node Bs, and controls the physical radio resources of the Uu interface. In 3GPP, the Iu interface of one RNC provides two connections to the CN: one to the packet-switched domain and the other to the circuit-switched domain, other important functions of the RNC include confidentiality and sanity protection.
In communication systems such as third generation partnership project (3GPP) Time Division Duplex (TDD) and Frequency Division Duplex (FDD) systems, multiple shared and dedicated channels of different data rates are combined to transmit. Prior specifications for such systems are publicly available and in constant development.
The initial cell search process is used to synchronize the WTRU to a base station via a shared downlink channel known as the Physical Synchronization Channel (PSCH). Referring to FIG. 1B, the PSCH has a structure in which the same Primary Synchronization Code (PSC) and three Secondary Synchronization Codes (SSC) based on group number complex modulation start with a t relative to slot k or k and k +8offsetAnd (4) transmitting.
The selection of three complex modulated SSCs is related to the group number. For example, in a 128-cell system, there are 32 groups in which the modulation mode and code combinations of the SSCs are different, and each code group is associated with four basic midamble codes, so there are 128 basic midamble codes. Each cell is assigned to a group in the 128 system so that no group is used by more than one cell in a given reception area.
Thus, the cell search synchronization system determines the scrambling code of the cell using an initial cell search procedure. The shared initial cell search procedure utilizes three main steps: step 1 the process detects the PSC and determines a chip offset; step 2 procedure uses the information obtained in step 1 and detects toffsetAnd a code group number; and step 3, the program utilizes the information provided by the step 2 program and detects the basic intermediate code. It is noted that an active Automatic Frequency Control (AFC) algorithm is implemented to reduce the frequency offset between the WTRU and the base station.
Although initial cell search is currently performed in wireless communications, there is a need for an improved method and system for performing initial cell search.
Disclosure of Invention
The present invention is a method and system for performing an initial cell search. The step 1 procedure is performed on even and odd samples to detect a peak Primary Synchronization Code (PSC) location (i.e., chip offset or chip location). Step 2 program execution to obtain toffsetAnd a code group. Step 3 processing is performed to identify the midamble of a base station with which the WTRU may synchronize when performing the initial cell search.
Drawings
FIG. 1A is a diagram illustrating a typical wireless communication system;
FIG. 1B shows a Physical Synchronization Channel (PSCH);
FIG. 2 is a block diagram of an initial cell search;
FIG. 3 is a logic diagram illustrating initial cell search;
FIG. 4 is a block diagram of step 1 of initial cell search;
FIG. 5 is a block diagram of step 2 of initial cell search; and
fig. 6 is a block diagram of step 3 of initial cell search.
Detailed Description
Thereafter, a wireless transmit/receive unit (WTRU) includes, but is not limited to, a user equipment, a mobile station, a fixed or mobile subscriber unit, a pager, or any other type of device capable of operating in a wireless environment. When referred to hereafter, a base station includes, but is not limited to, a node-B, a site controller, an access point, or any other type of interfacing device in a wireless environment.
Referring first to FIG. 2, a block diagram 200 of Initial Cell Search (ICS) is shown. An initial cell search is input to a receiver root-raised cosine filter (Rx-RRC) at twice the chip rate, typically 38400 chips in a frame, so receiving the input at twice the chip rate provides 76800 samples. These 76800 samples are divided into two groups, preferably an odd group and an even group. The even and odd samples are processed by the identified sequence of processing routines, which are shown in FIG. 2.
The sequence of steps is as follows: step 1 or Primary Synchronization Code (PSC) procedure for determining the location of the Synchronization Channel (SCH) (i.e., chip offset); step 2 or Secondary Synchronization Code (SSC) procedure based on toffset(which is code group specific) and the chip offset provided in step 1 to determine the code group (i.e., the group of cells corresponding to the detected PSC) and slot synchronization; and step 3 or midamble procedure for determining cell parameters corresponding to the detected PSC. Initial cell search steps 1, 2 and 3 are performed on each group of samples on a particular frequency, and if not detected on another frequency.
A controller 202 is provided to coordinate the three processing steps, each providing a noise estimator 204 and detection thresholds and frame parameters (N, W, T). Although any parameters may be specified, it is preferable to specify the number of frames accumulated before reset, the noise threshold coefficient (T), and the search window size (W) displayed in the chip. It is noted that step 1 does not require the size of the search window (W) to be specified, since the entire frame is searched. N1 is the number of frames in step 1, N1 is preferably 4. N2 is the number of frames for step 2, N2 is preferably 8. N3 is the number of frames for step 3, N3 is preferably 4. T1, T2, T3 are different threshold coefficients based on a false alarm rate.
The output of the step 3 procedure is input to a selection block 206 which generates the final output of the initial cell search, the output of step 3 identifying the base stations with which the WTRU performing the initial cell search must synchronize. More precisely, the output is the code group, cell parameters, case number, relative positions of slots k and k +8 for case 2, and midamble correlation values. As described, the midamble process (i.e., step 3) has both even and odd processing, and therefore two correlation results are generated for each stream, with the midamble correlation value being the correlation result generated for each stream. The selection block 206 selects between the two step 3 outputs and provides the final output of the initial cell search. The selection made at selection block 206 is between even and odd maximums. The obtained correlation results belong to four different basic midamble codes. The maximum value is determined between the odd and even results, and once determined between the odd and even results, the corresponding basic midamble is determined. Similarly, the first significant path (i.e., the path that passes the threshold value for the first time in the time sequence) is also determined based on the correlation result.
More precisely, still referring to fig. 2, an initial cell search begins with a command to the initial cell search controller 202, which processes the command and sends a "step 1 start" command signal to step 1 block 208 and noise estimator block 204. After step 1, the step 1 block 208 sends a "success/failure" signal to the initial cell search controller. A "success" signal causes the initial cell search controller to send a "step 2" start signal to the step 2 block 210, at which point the step 1 block 208 will stop processing incoming signals. A "fail" signal will cause the initial search controller to divert the signal outside of ICS block 200 in order to enhance signal amplification and/or alter the carrier signal. After the step 2 process is completed, the step 2 block 210 sends a "done" signal to the initial cell search controller 202, which sends a "start step 2" signal to the step 3 block 212, and the step 2 block 210 stops its process. When the processing of step 3 is completed, the final selection process is completed and the output of the ICS is generated, thereby completing the ICS process.
It is noted that another way to select the final output is to combine the even and odd outputs after each step and select the preferred one of the two for the remaining steps. If the last even or odd processing path of block 208 of step 1 fails, an appropriate fail flag is generated and the process continues on the successful path. In this case, after step 3, the selection box 206 will select the result provided by this path.
Referring now to fig. 3, a method 300 for performing an initial cell search is shown. The method 300 begins at step 203 by initiating all initial cell search steps (i.e., steps 1, 2 and 3 of the initial cell search). Next, in step 206, step 1 of the initial cell search is performed, preferably for 4 frames, although any number of frames may be performed as desired. As previously described, in step 1 of the initial cell search, the WTRU finds the PSC correlation peak location with the highest power.
In step 308, it is determined whether there is a PSC detection. If there is a PSC detection, the method 300 proceeds to step 316. In step 316, an AFC algorithm is performed, preferably for 24 frames, to reduce any offset between the WTRU and the base station frequency, preferably to 2 kHz. After step 316, the method 300 proceeds to step 312 where step 2 of the initial cell search is performed for 8 frames.
After step 312, the method 300 proceeds to step 318 to determine whether there has been detection of SSCs. If there is a check, step 3 of the initial cell search is performed for 4 frames (step 322), and as previously described, the encrypted code and unique midamble base station identification number are determined in step 3 of the initial cell search. In step 324, it is determined whether there is a detection while performing the initial cell search step 3. If there is a detection, step 300 ends at step 326, and if there is no detection, step 3 is performed for 4 more frames at step 328. In steps 322 and 328, 4 frames are preferred, but step 3 can be performed for any number of frames as desired. If there is a detection (step 330), the method 300 ends at step 326, if not, then there is a failure and the method 300 ends at step 320.
Referring again to steps 308 and 318, if there is no detection in step 1 or step 2, the method 300 proceeds to step 332. In step 332, it is determined whether there are more gain settings present, and if no gain settings are present, it fails and the method 300 ends in step 320, if there are additional gain settings, the method 300 proceeds to step 334 where the WTRU Automatic Gain Controller (AGC) is set to the next gain setting. For example, the gain setting is the amount by which the analog signal is amplified before being input to the analog-to-digital converter, typically four gain settings, and typically the highest gain setting is used first. Thus, in step 334, the Automatic Gain Controller (AGC) is preferably set to the next lowest gain setting, and once the AGC sets the next gain setting, the method 300 proceeds to step 306 and continues as described above.
Referring now to fig. 4, a block 400 of initial cell search step 1 is shown. The purpose of step 1 is to find the strongest path of the samples detected by the WTRU for a frame and determine the chip offset (i.e., location) of the strongest path. As previously described, the input signal is sampled at twice the chip rate and split or demultiplexed by a splitter 402 to produce even and odd samples.
Once the sample signal is split by splitter 402, the even and odd samples are passed through Hierarchical Golay Correlators (HGCs) 404, 406 at the chip rate. Each set of samples is processed in the same manner and therefore processing of even samples is only discussed here for ease of illustration. The HGC404 resembles an effective matched filter of the PSC sequence, with the HGC404 performing correlation between the received signal and the Primary Synchronization Code (PSC) at successive chip locations. When the complete PSC is in the HGC404, a peak is generated that will be at the same location within each frame because the PSC is transmitted at the same location within each frame. Of course in case 2, there would be two PSC locations.
Thus, by passing the PSC through the HGC, a peak is generated at the last chip of the PSC, so to identify the beginning of the PSC, the peak location is subtracted by 255 chips, which provides the starting location of the PSC sequence since the PSC is 256 chips long. The output of the HGC404 is a complex output that is input to an absolute value conversion block 406, although any method of converting a complex number to a quantity may be used in block 406. The block 406 output is a complex quantity that is output by the HGC 404. The amount provided by block 406 is input to a delay block 408 which tells eight chip delays to align the HGC404 relative to the noise threshold estimator 418, which is necessary because, as shown in fig. 4, the HGC404 output is eventually divided by the noise estimate (which comes about 8 chips after the HGC404 value), so both values must be time aligned.
The 8 chip delay block 408 outputs are input to an accumulator 410. Assuming a case 1 to illustrate, there is a single PSC per frame that provides a single peak per frame in slot k, remembering that each is a quantity in the accumulator, once the first frame passes, there becomes a single point in the frame at a particular location with a peak value that repeats at the same location in the following frame. Accumulator 410 accumulates on each point, one by one, which sums all the peaks to obtain immunity to noise, which is preferably performed over 4 frames, since noise cannot accumulate on it as quickly as a signal. To accomplish this summing over 4 frames, there is a 38400 point buffer 412 (i.e., a point sufficient for 38400 chips of a complete frame to use) and a frame delay block 414. The output Xe is a vector of 38400 points in length, where each point in the vector is the sum of the amount of each point for four different frames, so Xe is the signal value for each chip in a typical signal-to-noise ratio.
To obtain the noise value, which is Y in fig. 4, the noise estimate for each chip (i.e., Y) is provided by noise threshold estimator block 418, and Xe is divided by Y in divider 416 to obtain the SNR for each chip. It is noted that wherever an even or odd accumulator value (i.e., X) is less than the threshold (Y), no division is required and zeros may be directly input as the result of the division. The SNR for each chip is input to an equal proportion buffer 420 having 38400 points so that it can hold all chips of a frame, although more or fewer points may be provided using different frame lengths. The chip with the highest SNR value between even and odd samples is selected as the PSC location, noting that the peak at the beginning of the PSC sequence can be directly input to step 2, and if the peak location is the end of the PSC sequence, the peak location is subtracted by 255 chips to provide the beginning of the PSC sequence to step 2.
To simplify step 1, decision block 422 has a reference. As described, the even and odd samples are input to step 1, the chip with the largest SNR and the corresponding index (i.e., the chip location at which the largest SNR is located, also referred to as the peak location) is determined by evaluating all of the even and odd samples, then performing a check to ensure that the detected largest SNR is above a certain threshold, if the largest SNR is above the threshold, it is successful and setting the flag to 1, otherwise the flag is set to 0. The output of step 1 is thus the step 1 flag and the chip offset (i.e., peak location), which is preferably the beginning of the PSC sequence. As described, the chip offset corresponding to the PSC sequence should be reduced by 255 chips before beginning step 2.
Referring now to fig. 5, a block diagram 500 of initial cell search step 2 is shown. Initial cell search step 2 is used to obtain the ciphering code group number and t at the beginning of the slotoffsetThe Synchronization Channel (SCH) location input is input to a correlator 502 that is aligned such that the SCH location input is the beginning of the PSC sequence that can be used as the beginning of the open SCH because the SCH consists of a PSC and three SSCs where all four codes (PSC and three SCCs) are located on the same chip in each frame. Similarly, all chip samples corresponding to the PSC are input to the correlator 502, noting that the chip locations identified in step 1 as corresponding to the PSC are stored in memory so that they can be input to step 2. Thus, samples input at twice the chip rate, 512 samples are input to the correlator 502, and samples input at the chip rate, 256 samples are input to the correlator 502. Thus, assume for purposes of describing block diagram 500 that 256 samples are input into correlator 502.
When SSCs are generated, an envelope sequence is provided in the columns of a Hadamard (Hadamard) matrix to have some orthogonality between the PSC and SSCs. The envelope must be removed before proceeding with the rest of step 2, which is performed by the correlator 502.
Once the envelope is removed from the input signal, the signal is output by the correlator 502 to a Fast Hadamard Transform (FHT) block 504, which FHT block 504 reduces the complexity of pure Hadamard correlation, reducing the 256 x 256 matrix to a 16 x 16 matrix.
The output of FHT block 504 is preferably multiplied by the conjugate of the peak PSC provided by the HGC in step 1 in block 506. to obtain the conjugate of the peak PSC, 256 samples and the SCH location are input to a PSC correlator/phase estimator 518 and then to a conjugator 516, which obtains the conjugate of the peak PSC. The conjugate of the peak PSC is then multiplied by the output of FHT block 504, as described above, which is a preferred embodiment. In another embodiment, the PSC correlator/phase estimator block 518 estimates the phase of the PSC and represents it as a complex number, the output of the PSC correlator/phase estimator block 518 is then input to a conjugator 516 that takes the complex conjugate and inputs it to the complex multiplier 506 as described previously where it is multiplied by the output of the FHT block 504.
The output of the complex multiplier block 506 is input to an accumulator and storage block 508. In the complex multiplier block 506, all phase uncertainties are removed from the signal, which allows the output of the complex multiplier block 506 to be accumulated and stored consistently in the accumulator and storage block 508. This means that the real values can be directly accumulated on the real values without converting the complex numbers into quantities and then storing them, which not only reduces the performance, but more importantly, in the step 2 procedure, it results in no way of detecting the group number because the information carries the complex modulation sequence.
The output of the accumulator and storage block 508 is input to a calculation block 510 which maps the input based on the group number, case information, k or k +8, and modulation, which values are obtained from a predetermined look-up table and mapped into decision variables. Mapping is performed using the information obtained in step 1 as to whether the peak position is at k or k +8, the desired decision variable is compared to the noise estimate provided by noise estimate block 512, and the position of k and the code group are determined. It is noted that in case 2, this position may be the position of k + 8. In addition to the k-positions and code groups, indications are provided that specify case 1 or case 2, the System Frame Number (SFN) (i.e., whether the detection is based on odd or even frames), and whether step 2 detection occurred.
Referring now to fig. 6, a block diagram 600 of step 3 of initial cell search is shown, once again, with an incoming communication signal provided by RX-RRC at twice the chip rate and divided into odd and even samples, again, for simplicity only the even samples are described herein because the even and odd processing is the same. At this point, the start of the slot and the code group are known, and the goal is to identify a particular cell for which synchronization is desired. The code groups are associated with four basic midambles, and each basic midamble is associated with two midambles M1 and M2, so that for each midamble group M1 and M2 a correlator is provided, i.e. correlator 0602 is provided for the midambles of the first group, correlator 1604 for the midambles of the second group, correlator 2606 for the midambles of the third group, and correlator 3608 for the midambles of the fourth group. For example, each midamble is associated with a particular base station (or cell), and the goal is to select the best base station for synchronization. It is noted that assuming transmit diversity is used, each antenna of a base station may use a different midamble, and it is also noted that midambles M1 and M2, which are transmitted at the same time, are used purely for synchronization and are not used for traffic.
As in step 1, when the midamble is completely within the correlator, there is a peak, the M2 correlator is informed of a 57-chip delay to align the peaks of M1 and M2 and sum the two peaks. When summing the peaks, it is preferable to alternate between correlators, so it is important to use the SFN value obtained in step 2. For example, with respect to buffer 618, when SFN is 0, the output of correlator 0602 is input to buffer 618, and when SFN is 1, the output of correlator 1604 is input to buffer 618, which ensures that peaks are not mixed in when summed and that midamble alternates. However, if each frame produces the same midamble, no alternation is required.
Assuming the buffer size is 100 points, the quantum provides 400 points for even processing and 400 points for odd processing for a total of 800 points, so that the point with the largest amount is selected at 800 points in decision block 626. Then, preferably also in the decision block, it is determined which buffer (i.e., accumulator) produced the point with the largest amount, and once that buffer is identified, the SFN is used to identify the correlator that produced the largest amount. For example, if correlator 0602 is identified, the cell parameter (i.e., cell identification) corresponding to correlator 0602 is provided as the cell parameter output, the cell identification providing the encryption code of the identified cell, and based on a comparison of the detected signal strength of the midamble and the noise estimate, a FIRM indication is provided, i.e., if the signal is sufficient for the noise estimate, the FIRM indication is provided. With respect to the offset portion, an offset is preferably provided as a starting location for the channel response, by identifying the start of the channel response, the WTRU performing the initial cell search knows when to read the beacon of the identifying cell, and then may synchronize the cell and communicate.
It is noted that the decision blocks, correlators, conjugators, dividers, etc., as described herein, represent suitable processing devices within a WTRU, which may be any number of processors as desired.
It is important to note that the present invention may be used in any wireless communication system utilizing any form of Time Division Duplex (TDD) technology as desired. For example, the present invention may be used in UMTS-TDD, TDSCDMA, or any type of wireless communication system. Furthermore, although the present invention has been described in terms of various embodiments, other variations within the scope of the invention, as set forth in the claims below, will be apparent to those of skill in the art.

Claims (16)

1. A method for initiating wireless communications for a wtru configured to communicate with a base station of a wireless system, wherein each base station transmits an identified synchronization channel signal in a selected portion of a system time frame at a predetermined chip rate, the method comprising the steps of:
receiving a wireless signal comprising at least one synchronization channel signal;
identifying a received synchronization channel signal using a power threshold based on a plurality of chip samples sampled at twice the chip rate;
selecting an identified synchronization channel signal for decoding; and
decoding the selected synchronization channel signal to determine system time frame timing and base station identity by identifying the start of the synchronization channel signal determined by a chip location having a highest signal-to-noise ratio, wherein the noise is calculated using a predetermined number of chips that is less than the total number of chips in a frame.
2. The method of claim 1 wherein the synchronization channel signal is transmitted in a predetermined time slot of a system time frame and includes a primary synchronization code transmitted in a predetermined chip offset time slot, and wherein the decoding includes determining toffset for the selective synchronization channel signal transmission.
3. The method of claim 2 wherein the PSC with the highest power is obtained by summing peak PSCs of four frames and dividing the summed power by an estimated noise value to obtain a signal-to-noise ratio for each chip in a frame.
4. The method of claim 2 wherein the chip with the highest signal-to-noise ratio is selected to obtain the location of the PSC sequence.
5. The method of claim 4 wherein the PSC sequence location is adjusted to identify the chip location where the PSC sequence begins.
6. The method of claim 3 wherein the dividing step is not performed when the signal value is below the threshold.
7. The method of claim 1, further comprising the steps of:
the chip location identifying the PSC sequence is obtained from an even sample or an odd sample, wherein the PSC sequence is identified by processing a wireless communication signal at twice the chip rate.
8. A method of detecting a synchronization channel signal having a received communication signal transmitted in a selected time slot of a system at a predetermined chip rate, the received communication signal sampled at twice the chip rate, the method comprising the steps of:
identifying a chip offset within a time frame, the time frame having a maximum power value;
determining whether the chip offset is obtained from an even sample or an odd sample, wherein the chip location is identified by processing the wireless communication signal at twice the chip rate;
judging whether the maximum power value is higher than a preset threshold value; and
outputting the chip offset so that the chip offset corresponds to the start of the synchronization channel, wherein the maximum power value is higher than the preset threshold.
9. A method of identifying a code group representing a predetermined number of base stations, the base stations comprising a base station that synchronizes wireless transmit/receive units for communication, the method comprising:
inputting a chip offset in a frame to a first correlator;
inputting a plurality of chip samples to the first correlator, wherein a primary synchronization code in the plurality of chip samples has been detected;
inputting a peak primary synchronization code to a second correlator and obtaining a complex conjugate of the primary synchronization code;
multiplying the output of the first correlator by the complex conjugate of the primary synchronization code to obtain the amount of signal transmitted on the chip input to the first correlator;
summing the amount over four frames;
evaluating the summed signal in view of a predetermined decision variable; and
based on the evaluation and a noise evaluation, a case number, a code group, a slot location, and a system frame number are determined.
10. The method of claim 9 wherein the output of the first correlator is multiplied by the complex conjugate of an estimate of the phase of a previously detected primary synchronization code.
11. The method of claim 9 wherein 256 samples are input to the first correlator.
12. The method of claim 9 wherein 512 samples are input to the first correlator.
13. A method of identifying a base station that can synchronize a wtru based on previously determined primary synchronization codes and code groups, comprising:
identifying two midambles associated with a basic midamble belonging to a previous identifier group, wherein the identifier group comprises a plurality of midambles;
inputting each set of midambles to a number of correlators, wherein the number of correlators corresponds to the number of midambles in the identity group;
accumulating the signal values of each midamble during a predetermined number of frames; and
the midamble with the highest accumulated signal is selected.
14. The method of claim 13 wherein one of the two midambles is signaled with a 57 chip delay, the two midambles being associated with a base midamble prior to accumulation of the signal values.
15. The method of claim 14 wherein the two midambles are accumulated in an alternating manner to avoid accumulation of midambles by a single correlator.
16. A wireless transmit/receive unit configured to communicate with a base station of a wireless system, wherein each base station transmits an identification synchronization channel during a selected portion of a system time frame, the wireless transmit/receive unit comprising:
a receiver configured to receive a wireless signal, the wireless signal comprising at least one synchronization channel signal;
at least one correlator configured to identify a received synchronization channel signal using a power threshold based on a plurality of chip samples sampled at twice the chip rate;
a selection processor for selecting an identified synchronization channel signal for decoding;
a decoding processor for decoding the selected synchronization channel signal to determine system time frame timing and base station identity by identifying the start of the synchronization channel signal determined by a chip location having a highest signal-to-noise ratio, wherein the noise is calculated using a predetermined number of chips below a total number of chips in a frame.
HK06106043.8A 2003-02-05 2004-02-05 Initial cell search in wireless communication systems HK1083950A (en)

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US60/445,331 2003-02-05

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HK1083950A true HK1083950A (en) 2006-07-14

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