HK1081710B - Display device and addressing method - Google Patents

Description

Display device and addressing method

The present invention relates to display devices having at least two stable states and in particular to matrix addressing devices and addressing methods for such devices.

There are various display devices that exhibit two or more states that are stable in the absence of an applied electric field. The most common devices of this type use liquid crystal materials. However, other devices are also known, such as electrophoresis, electrochromism, micro-electro-mechanical systems (MEMS), particle displays.

The particles of bistable liquid crystal displays include surface-stabilized ferroelectric liquid crystal (SSFLC) devices described by N A Clark and S T lagerwa ll in appl.Phys.Lett., 36, 11, 899 (1980). Berleman and Heffer in applied. Phys. Lett., Vol 37, pg109, 1980 and patent applications WO91/11747 ("Bistable electric controlled crystal optical device") and WO92/00546 ("New liquid crystal display with surface bipolar controlled by easy electrically conductive effect") have shown that Nematic liquid crystal materials can be switched between two stable states by using a chiral ionic and flexoelectric (flexoelectric) coupling. Dozov also describes a bistable nematic display in (2003) Proc. SID, pp 946-948. Liang, r.c. describes electrophoretic displays in (2003) proc.sid, pp838-841, and electrochromic displays are also known. Powder-based displays of the type described by Hattori et al (2003) proc.sid, pp846-849 are also known.

WO97/14990 shows how a Zenithally Bistable Device (ZBD) can be constructed with a surface alignment grating of a given design to enable nematic liquid crystal molecules to adopt two stable pretilts in the same azimuthal plane. One of these states is a high pretilt state and the other is a low pretilt state, and devices are described which can employ either of these two stable liquid crystal structures and can be easily switched between them. The two top-stabilized liquid crystal structures of WO97/14990 remain after the driving electrical signal is removed and the device has been shown to be strongly resistant to mechanical vibrations, providing a microsecond blocking time at low driving voltages (< 20V) and allowing a high degree of multiplexing capability; see "Zenithial stable devices (ZBD) requirements for portable applications" in Proceedings of SID, 2000, v31, 11.2, p124-127(2000) of E.L.Wood et al. It has also been recently shown by Jones et al in (1003) proc.sid, pp954-959 that the latching threshold (latching threshold) for such ZBD devices can be changed in response to a previously applied voltage pulse (e.g., a d.c. balance or blanking pulse).

WO99/34251 demonstrates another ZBD device with a negative dielectric anisotropy material in a twisted nematic structure. Alternative bistable devices are also described in WO01/40853, EP1139151A1, EP1139152A1 and EP1139150A 1. Patent application WO02/08825 describes a roof stabilising device which exhibits a multistability with more than two stable states.

The ferroelectric and ZBD type devices described above operate using polarity latch-up. In other words, a pulse of a first polarity (e.g., a positive pulse) causes latching to a first stable state, while a pulse of a second polarity (e.g., a negative pulse) causes latching to a second stable state. Bistable cholesteric and bistable twisted nematic displays operate with flow effects; in such a device, the pulse shape, rather than the polarity, can be selected to transition to either stable state.

To provide a display having a number of separately addressable elements, a liquid crystal device is typically constructed with a series of row electrodes on one cell wall and a series of column electrodes on the other cell wall. In this way a matrix of separately addressable elements is formed and a given voltage can be applied to each individual element of the device by applying a specific voltage to a given row and column. The technique of applying appropriate column and row voltage waveforms to individually latch each element of the display in turn is commonly referred to by the term multiplexing.

It should be noted that the terms row and column are not intended herein to limit the waveform to a particular set of electrode applications. Rather, the term is simply used to distinguish between the two sets of electrodes and may be interchanged throughout. Also, other electrodes are possible, from alphanumeric characters to axial and radial circular electrodes. There are also configurations for in-plane electrodes that are used on the in-plane electrodes themselves or with out-of-plane electric fields.

Bistable liquid crystal devices have traditionally used so-called "line-at-a-time" multiplexing schemes. During the time it takes to write a complete frame, data is applied to one set of electrodes (e.g., columns) in succession and the other set of electrodes (e.g., rows) are addressed in succession with a strobe voltage. The waveform generated at a pixel (i.e., the composite of the strobe and data waveforms) causes the pixel to latch into a positive state (i.e., when a select data pulse is applied) or to remain unchanged (i.e., when a non-select data pulse is applied).

Two general line (line) types are known in a time addressing scheme; addressing and blanking of both fields. Using two-field operation, a frame is divided into two fields for addressing black and white pixels, respectively; a known waveform for implementing such a scheme is shown in fig. 1. With blanking operations, a blanking pulse is present some time before the address pulse, the blanking pulse arbitrarily selecting one state regardless of the data applied. A known waveform implementing the blanking scheme is illustrated in fig. 2. The blanking may be applied before one or more lines or may be applied over the entire frame or a given number of lines.

As described above, the combination of the select data pulse and the gate voltage pulse causes latch-up, and the combination of the gate voltage pulse and the non-select data pulse does not cause latch-up. The voltages and duration of the select and non-select data waveforms are conventionally selected to ensure that when combined with the strobe, the pixels are latched or unlatched as desired; i.e. each pixel is selectively blocked. So that the data and strobe pulses are selected according to the latching response of the particular display being addressed.

The latching response of a typical prior art bistable liquid crystal device is illustrated in fig. 3. In this example, an electrical pulse of the correct polarity and sufficient energy begins to nucleate a domain of one state that causes, for example, a change in reflectivity. These small domains remain after the pulse without further change in reflectivity. Applying a pulse with greater energy causes additional more domains to be created and the area of the new state to increase. The reflectivity is increased from, say, 0% to (. tau.V)₁₀10% of (d) in (τ V)₉₀90% of the pixel and finally the pixels all latch to the new state. The width of the latch transition is referred to as partial latch. By convention, this is considered to be the width of the transition measured over a display area that cannot be discerned by the naked eye.

Furthermore, as schematically shown in fig. 4, two or more regions of the display panel 2 may have different latching characteristics. For example, the first region 4 may have a different latching threshold than the second region 6. Latch-up profile differences across the cell can be caused by detrimental changes such as random variations in voltage (e.g., overall resistive losses along the electrodes or potential differences between driver circuits) and temperature, in alignment and surface energy, or in long-range variations in cell gap. The response of the first region 4 and the second region 6 is shown in fig. 5 by curves 8 and 10, respectively. Likewise, the dashed line represents a 10% latch point and the implementation represents a 90% latch point.

In fig. 5 it is indicated by dashed line 12 how the gate voltage (V) is normally selected in this case_s) And data voltage (V)_d). Here, V is selected_sAnd V_dSuch that the resultant Vs + Vd causes an ideal change in the state of both the first and second regions, while V_s-V_dInsufficient to latch either region. It is clear that this represents V_dHigh is required to count the change of the whole cell. If not, V_dA partial latching width of the device can be achieved. Need toV of interest_dIs given by:

this is typically between 4V and 8V (depending on the size of the display).

The result of using a relatively high data voltage (e.g. 4V to 8V) is a high power consumption of the display panel. For example, assuming a polar response of the type described above, the data waveforms are typically bipolar pulses (+/-and-/+) to ensure dc balance. Using a large number of rows, the energy (E) consumed by a plate with a plate cell gap f and a capacitance C is determined by the data waveform voltage (V)_d) Controlling and displaying the image within the following range:

it can thus be seen that the data voltage has a considerable effect on the power consumption of the board.

Furthermore, the application of a high data voltage to each column may also have a deleterious effect on the optical properties of the rows at any one particular time, rather than on the addressed rows. As mentioned above, bistable cholesteric and bistable twisted nematic displays are caused to latch by flow effects, whereas ferroelectric and zenithal bistable devices are caused to latch by switching polarity. However, most bistable liquid crystal devices will respond to the RMS signal of the applied field in addition to any polarity latching response. For a positive dielectric anisotropy material the director (director) orientation is parallel to the applied field, whereas for a negative material the liquid crystal orientation is perpendicular to the field. The amount of repositioning of the liquid crystal for the RMS signal is directly related to the elastic constant of the liquid crystal and inversely related to the dielectric anisotropy.

In such devices, the repositioning of the director caused by the RMS effect can cause unwanted changes in orientation (and hence optical transients) when addressing the display. For example, dark display areas before and after the addressing signal may become bright, causing a diffuse "flash" of the image. To reduce this effect, the material is chosen so that the Frederichsz transition occurs at high voltage and the gradient of the transition is low. However, this severely limits the choice of device materials.

Another problem that arises in bistable devices in connection with the use of high data voltages is that the effect of any RMS voltage causes a detrimental locking of one (continuous for positive dielectric anisotropy mixtures in ZBD devices) state. This effect is called "rollback". Similar effects occur in other devices, such as bistable twisted nematic devices.

Although bi-stable displays have only two stable states, gray scales can be provided in a number of ways. For example, grey scales can be achieved using temporal and/or spatial dithering, where the perception of grey values is provided by turning each pixel "on" or "off" at a faster rate than can be perceived by a viewer, or by dividing each pixel into two or more weighted and separately addressable sub-pixel regions.

The use of spatial and/or temporal dithering techniques in bi-stable display devices comes at the cost of increased complexity and thus increased cell cost. For example, spatial dithering increases the number of row and column drivers, requires thinness, thereby increasing track resistance and resistive power dissipation within the panel, and also requires more precise etching to ensure linearity of the gray scale response. Increasing the number of separately addressable regions also increases the area of the display within which the inter-pixel gaps exist; this reduces the aperture ratio of the device. For these reasons, the ability of passively addressed bi-stable devices known to those skilled in the art to produce, at least to some extent, a large number of gray levels and moving video images is now limited.

Analog (or domain) gray scales are also known. This is the case where partial (i.e. incomplete) switching transitions of domains within separately addressable pixel regions are used, enabling different grey levels to be formed by varying the number and/or size of domains in the pixel. This has previously been used in ferroelectric liquid crystals and bistable cholesteric. See, for example, GB2315876, which describes additional spheres to provide nucleation sites for analog gray scale.

The first disadvantage associated with the use of domain gray scale is that there is no operating window for the addressing waveform; i.e. each grey level is implemented with a specific addressing waveform. Ensuring that the ideal waveform is applied to a particular pixel is problematic because variations due to temperature of the drive circuitry (which will depend on use and therefore will vary across the panel) or batch variations in the drive circuitry may cause variations in the waveform applied to the row and/or column due to losses along the resistive electrodes. The response of the liquid crystal to the same domain in the entire device may also be changed by the change in cell gap, the thickness of the alignment layer, the cell temperature, the alignment of the liquid crystal, and possibly the image history. Any such deviation causes a change in the electro-optic response and hence an error in the observed analogue grey level.

It is also known to provide devices with multiple thresholds in order to obtain analog grey scales. In such devices, each pixel is subdivided into regions that respond differently to an applied electric field; for example by forming holes in the electrodes, including passive dielectric layers, or introducing alignment variations, etc. An example of introducing multiple thresholds is set forth by Bryan-Brown et al (1998) Proceedings of asia Display, p1051-1052, which demonstrates that grey scales can be achieved in vertex bistable devices using grids of different pitch and shape that allow local switching of one region of a pixel. A similar analog gray scale technique in SSFLC is described below in Bonnett, Towler, Kishimoto, Tagawa and Uchida (1997) "Limitations and performance of MTM Greyscal for FLCs", Proceedings of the 18th International display research conference, L46-47.

Analog addressing of multi-threshold bistable LCDs such as those described above still relies on one row at a time addressing as described above for two-state bistable devices: a gate signal is applied to a first electrode (e.g., a row) and the appropriate data signals are applied to groups of electrodes (referred to as columns) on opposing interior surfaces of the display. Selection between the different states is achieved by modulating the data signal so that it combines with the strobe to latch one or more of the sub-pixel regions, producing the desired intermediate state.

Addressing multiple thresholds exacerbates the problems associated with the use of high data voltages described above. For example, assume that the lowest data voltage required to ensure a distinction between two data signals (i.e., ± Vd ═ latched or unlatched) across a panel due to random variations is | Vd_minThe | is given. For m gray scales to be distinguished (i.e., non-overlapping addressing windows), the data voltage must be (m-1) Vd_min. For example, a 4V data board is required to display a black-and-white image on the entire board. If each pixel is subdivided into three regions to provide four distinguishable and addressable analog levels, the voltage peak to peak required to ensure that each grey scale is addressed in all parts of the panel increases to 12V. This adds to the cost of the required drivers, the power wasted during refresh is high, and the contrast of the panel is greatly reduced due to the unwanted "flash" that is produced simultaneously with addressing.

According to a first aspect of the invention, a device comprises a layer of material disposed between first and second cell walls, capable of adopting at least two stable configurations and capable of being electrically latched therebetween, said material layer comprising one or more separate electrically addressable areas and said device further comprising addressing means for writing each of said electrically addressable areas with a voltage pulse to selectively latch said material layer as required, wherein the addressing means is written to each of said one or more separate electrically addressable areas using at least first and second latching scans, the first latching scan for selectively latching material having a latching threshold within a first range, the second latching scan for selectively latching material having a latching threshold within a second range, wherein the first latching scan is applied before the second latching scan is applied and the second latching scan is insufficient to latch material having a latching threshold within the first range.

In this manner, the first latching scan will selectively latch to material within each electrically addressable area having a threshold within a first range. In other words, the required stable structure of the material having a threshold value in the first range will be selected by the addressing device during the first scan; depending on the initial and final desired configuration of the material, this may require application of a voltage pulse sufficient to provide latch-up (i.e., change the material from one stable configuration to another) or insufficient to latch-up the material. Thus a particular desired pattern (e.g. an image to be displayed) is written across the device to any region where the latching threshold is within the first range. Preferably the first latching scan will also latch material with an undifferentiated (i.e. blank) latching threshold within said second range.

After the first latching scan is applied, a second latching scan is applied. The second latching sweep is used to selectively latch material having a threshold value within a second range to a desired state. In other words, a stable structure of material requiring a threshold value within the second range will be selected by the addressing device during the second scan; depending on the initial structure of the material, this may require application of a voltage pulse sufficient to provide latch-up or prevent latch-up. The second latching scan is arranged to latch-up material having a threshold within a first range. Thus, one specific pattern (e.g., one image to be displayed) is written to an arbitrary area having a threshold value within the second range over the entire apparatus.

Additional scans may also be applied, as described below. But each scan follows the underlying rule of latching material within a selected range without having a latching effect on material within the threshold range of the previous scan. In this way, the entire layer of material on the display is addressed consecutively (e.g. by applying voltage pulses of reduced duration or voltage) by a series of two or more latching scans (latching regions with reduced latching thresholds).

It should be noted that when using one polar bi-stable device (e.g., one ZBD device), each of the latching thresholds in the first and second ranges will include sub-ranges that define a continuous-to-fault and a fault-to-continuous transition (e.g., see fig. 12). One such transition (e.g., fail to continue) would cover a sub-range of a first (e.g., positive) polarity, while a second sub-range (e.g., continue to fail) would cover a sub-range of a second (e.g., negative) polarity. However, defining one such transition (e.g., continuity to failure) inherently defines a second transition (e.g., failure to continuity) for a particular device.

The selective latching during the second latching scan may have some overlap with the selective latching of the first latching scan. The overlap can be advantageously used to overcome problems associated with asymmetry of the latching response described below with reference to fig. 12 to 14. Thus, the term "first range" as used herein refers to any material having a latching threshold within a range that is selectively latched by the first scan but not the second scan.

The device may have defined regions in which the material latches in the first and second (and any subsequent) ranges, or such threshold variation may be caused by manufacturing or other random variations. This technique may also be used to allow devices to be addressed over a large temperature range. For example, at a first temperature, the entire display may have a threshold value within the first range, while at a second temperature, the entire display may have a threshold value within a second range. As the temperature of the device changes from the first temperature to the second temperature, the proportion of the device selectively occluded by the first occlusion scan will gradually decrease from one hundred percent to zero.

Thus, using multiple scans to address a device having two or more stable architectures in accordance with the present invention has many advantages. First, where a device has many regions with different latching thresholds, the different latching regions can be addressed consecutively using two or more scans. This allows the number of separately addressable areas to be greater than the number of separately electrically addressable areas, thereby reducing the inter-pixel gap and/or providing a higher resolution device. Two different occlusion regions can be intentionally formed or can be created from randomly varying species. If these regions are deliberately structured, the different latching regions within each separate electrically addressable region can be controlled or "weighted" to provide gray scale, as described in more detail below.

In the case of a multiplexed device, the use of two or more scans in accordance with the present invention will reduce the data voltage required for each scan. As described by equation (2) above, reducing the data voltage will greatly reduce the power consumption of the device even if the scan number increases. In effect, the present invention allows the minimum data voltage required to address the entire device to be reduced to nearly a fraction of a scan (1/nearly a scan). Thus, the use of the first dwell scan and the second dwell scan nearly halves the device power consumption relative to the prior art single scan. Many further advantages associated with reducing the data voltage include reduced light transients or so-called "flashes" and less "back-off" from one state to another.

Furthermore, the invention can be used to increase the range of latching thresholds at which the device can operate. This means that, for example, an image can be written to the device across a wider temperature range (allowing, for example, a display to be operated without a temperature sensor), or can be combined with a manufacturing process that allows for wider lot-to-lot/board-to-board variations than is acceptable using prior art devices. It will be apparent to those skilled in the art that reducing power consumption and increasing the threshold range in which the device can operate are complementary. Increasing the range of device operation comes at the cost of increasing the number of scans or increasing the data voltage per latching scan.

Advantageously, said first latching sweep comprises an initial blanking waveform to latch all of said material into one of said at least two stable configurations. In other words, a blanking addressing scheme may be used. The blanking scan may comprise unipolar, bipolar pulses or pulses of any desired shape. Various such blanking pulses, preferably dc balanced, are known and used in prior art blanking addressing schemes. Additional blanking waveforms may also be applied between the first and second dwell scans. This further blanking serves to indiscriminately latch up material having a threshold value in the second range, but has no effect on the material selectively latched up during the first scan (i.e. material having a threshold value in the first range). Alternatively, the blanking effect of the first dwell scan on materials having dwell thresholds in the second range may eliminate the need for additional blanking pulses.

Conveniently, the addressing means applies one or more further latching scans after applying said second latching scan, wherein each further latching scan is for selectively latching material having a latching threshold within a given range but is insufficient to latch material having a threshold within the threshold range of any previous scan. Preferably, the latching (i.e., blanking) of each scan, also without distinction, is any material having a latching threshold within a given range of all subsequent latching scans.

Preferably the blocking of the material is polarity dependent. The ideal state for a material dependent on polarity can be selected with voltage pulses of appropriate amplitude, duration and polarity. Examples of such devices include the ZBD and SSFLC devices described above, in which (say) pulses of positive polarity are latched to a first state, while pulses of negative polarity are latched to a second state. It will also be appreciated that the invention is equally applicable to non-polarity dependent devices such as bistable cholesteric and bistable twisted nematic devices in which the latching between states is controlled by the shape of the pulses. When using polarity dependent materials, it is advantageous for the first latching scan to use latching pulse latching material of a first polarity and for the second scan to use latching pulse latching material of the opposite polarity to the latching pulse of the first polarity.

It should be noted that each latching pulse may be combined with one or more further pulses of opposite polarity to ensure that dc-balance is maintained. For example, each latching pulse (i.e., the pulse that causes selective latching) may be preceded or followed by a pulse of opposite polarity that is shaped to not cause latching. Alternatively, the first and second latching scans may comprise latching pulses of the same polarity (e.g. positive), and blanking pulses of opposite polarity (e.g. negative) are applied between the first and second scans to (only) blank material having a threshold value in the second range. DC balancing may also be performed over several scans.

Conveniently, the layer of material comprises a first region having a latching threshold within the first range and a second region having a latching threshold within the second range. As described above, many techniques may be used to provide different thresholds in one device. In addition to changing the properties of the material, for example by controlling the alignment of the material on the surface, the alignment may also change the electrode properties. Separately latching regions having different and known thresholds enables driving from the same (scan line) drive circuit, thereby enabling a reduction in the number of electronic drivers required and hence a reduction in the cost of the board.

Advantageously, when applying further (e.g. third and subsequent) latching scans, the layer of material comprises one or more further regions, each of which has a latching threshold within a given range of the further latching scan.

Conveniently, the layer of material comprises a plurality of separate electrically addressable regions. Advantageously, each of the plurality of separately electrically addressable regions comprises two or more regions having different latching thresholds. The proportions of the layers of material having different latching threshold regions may advantageously be weighted within each separate electrically addressable region. This allows for the implementation of spatial dithering.

It should be apparent that it is known to provide regions with different latching thresholds within a device. However, the prior art uses analog gray scale techniques to take advantage of this threshold difference. Analog gray scale applying a blocking voltage within a predetermined range in a single scan; the proportion of the separate electrically addressable regions that are latched depends on the applied voltage. Thus, the analog gray scale of the prior art does not provide the ability to selectively latch materials having different thresholds and within a single separate electrically addressable area to different states. It should be noted that the present invention can therefore be combined with analog gray scale techniques. For example, a first latching scan can be used to cause partial latching of a material having one threshold value within a first range. Likewise, the second and any additional latching scans can be used to cause partial latching.

Preferably row electrodes are provided on said first cell walls and column electrodes are provided on said second cell walls, thereby providing a matrix of separately addressable areas. In this arrangement the at least first and second latching scans are advantageously applied to each separately electrically addressable area by the addressing means by applying gating voltage pulses to the row electrodes and applying the data voltage pulses to the column electrodes, the gating and data voltage pulses being used to generate a composite voltage pulse required at each separately addressable area. This allows performing so-called row-by-row addressing.

Conveniently, the energy or time-voltage product of the voltage pulse of the first latching sweep is greater than the energy of the voltage pulse of the second latching sweep. The energy can be varied from scan to scan by decreasing the pulse voltage, the pulse width, or both. Different attributes may also change between successive scans; for example, the voltage of the gate pulse can be decreased from the first scan to the second scan while the pulse duration is decreased (or the pulse shape is changed, etc.) from the second scan to the third scan. It is apparent that for a particular device, the pulse energy may be constant and the pulse shape or timing (e.g., delay) changed to change the latching effect of the pulse.

Conveniently, the addressing means is arranged to provide selected or non-selected data pulses to be latched or unlatched, respectively. In other words, row-by-row addressing can be achieved using a strobe pulse in combination with select and non-select data pulses to provide a select and non-select resultant pulse.

Advantageously, each row is addressed sequentially with the first latching scan and the second latching scan (i.e., sequential addressing). Alternatively, it may prove advantageous in certain circumstances to address each row using the first latching scan and then the second latching scan (i.e., sequential addressing).

Also, a combination of sequential and sequential addressing may be used so that a portion of the display is occluded by the first and second occluded scans, and then a second portion of the display is occluded by the first and second occluded scans. For example, the upper half of the display may be locked with first and second lock-out scans, followed by locking the lower half of the display with the first and second lock-out scans.

To prevent charge from increasing over time, it is preferred that the applied data and strobe waveforms be substantially dc balanced.

Those skilled in the art will appreciate that the present invention can be implemented with any of a number of different addressing schemes. In fact, most of the prior art blanking and two-field schemes will be able to be employed in accordance with the present invention.

Advantageously, the device is configured such that for each separate electrically addressable area, the addressing means is adapted to latch a material configuration having a latching threshold in the second range to the same configuration as a material configuration having a latching threshold in the first range. In this way, the desired pattern can be written to each of the separate electrically addressable areas of the device, despite any change in latching threshold across the device. In the case of a multiplexing device, this reduces the required data voltage, and thus can reduce the power consumption of the device, as described below.

Alternatively, the device may advantageously be configured such that, for each separate electrically addressable area, the addressing means is configured to be able to selectively latch the configuration of material having a latching threshold in the second range into a configuration different from the configuration of material having a latching threshold in the first range. Thus, any material within the separate electrically addressable regions having a threshold within the first range may be selectively locked out to a stable structure that is different from the structure employed for the material within the region having the second threshold. This has many advantages, especially when the separately addressable regions are made with well-defined regions having different latching thresholds. In particular, this configuration allows the amount of scanning electrons and electrodes to be reduced in the device while keeping the number of cells that can latch to the desired state unchanged.

Conveniently, selective latching during said first and/or second scan is arranged to latch material having a threshold value within said first range or said second range respectively. In other words, known analog gray scale techniques can be used in conjunction with the present invention.

The device may advantageously comprise a photosensitive layer such that the latching threshold of said layer of material is variable in response to optical illumination. For example, a photoconductive layer may be included in the device to cause the latch-up threshold of the material layer to change. This will allow the threshold to be varied between different frames and can be used to control the number of layers of material forming a first region having a latch-up threshold in the first range and/or the number of layers of material forming a second region having a latch-up threshold in the second range.

Color filter elements may also be advantageously provided.

Advantageously, the layer of material comprises liquid crystals, such as nematic liquid crystal material. Here, the term nematic shall include long pitch cholesteric materials. Chiral dopants may also be included in the nematic liquid crystal to impart any desired twist.

Advantageously, the transition between the two stable structures is mediated by an alignment transition at the first cell wall.

Conveniently, the surface of the first cell wall in contact with the layer of nematic liquid crystal material is profiled to provide at least two stable surface alignment structures of liquid crystal material adjacent the first cell wall. Many known techniques can be used to provide the contoured surface, such as photolithography or embossing of deformable materials.

A monostable surface treatment may be applied to the inner surface of the second cell wall. For example, a vertical (homeotropic) surfactant or a flat homogenous layer, such as a polymer to be polished.

Conveniently, the profiled surface of the first cell wall comprises a bistable surface alignment grating structure. Alternatively, any suitably contoured bistable surface may be used, for example of the type disclosed in WO01/40853, EP1139151A1, EP1139152A1 or EP1139150A 1.

Advantageously, the surface of the second cell wall in contact with the layer of nematic liquid crystal material is profiled so as to provide at least two stable surface alignment structures of liquid crystal material in the vicinity of the second cell wall. Furthermore, the profiled surface of the second cell wall advantageously comprises a bistable surface alignment grating structure.

Advantageously, the device may be used to provide a pi cell structure.

In such a pi-cell structure, the liquid crystal material layer is switchable between at least a first state and a second state, the first state and the second state having sufficiently low splay to enable rapid electrical transition therebetween, wherein the inner surface of the first cell wall is adapted to provide two or more surface alignment structures with different pretilt to the layer of liquid crystal material.

In other words, the first and second states are non-splayed states that can be rapidly transitioned between. The inner surface of the first cell wall may comprise a surface profile providing two or more arrangements to give two stable surface arrangements. For example, the inner surface may comprise a surface alignment grid in a layer of material that is molded onto the inner surface of the first cell wall. The pi-cell device may advantageously be arranged such that the first state and/or the second state persists in the absence of an applied electric field.

Thus, the pi cell of the present invention provides a liquid crystal device having advantages over known pi cells. For example, the stability of the state with substantially no splay when no electric field is applied means that the image written into the device will persist when the addressing voltage is removed. This combines the fast transition speed of the pi cell structure with the ability to store images in the absence of an applied electric field. In this way, the inherent stability of the device only allows regions of the device to be addressed when an image needs to be updated, thereby enabling the power consumption of the device to be reduced when displaying static or slowly updated images. This allows, for example, electronic books and laptops to be able to display high definition television video rate images when needed, while a reduced update rate can be used to conserve battery power when the frequency of updates or partial updates is low.

The pi-cell device does not require an initial (slow) addressing step to transition the material from the splay state to the splay-less state, or the use of a polymer stabilization matrix to stabilize a particular splay-less state. As described below, even if the splayed state is formed, the surface transition increases the speed at which the non-splayed state can be selected.

The terms bend, splay and twist are produced in view of the elastic deformation of nematic liquid crystal materials and are described in detail in chapter 3 of the "Physics of liquid crystals", by De Gennes and Prost, published in 1993 (second edition) at oxford university Press (ISBN 0198520247). In short, any deformation of a nematic liquid crystal material can be described by splay, bend and twist deformation components. In a device, any structure that is adopted by liquid crystal materials can be described by these three deformation components (i.e., splay, bend, and twist).

Most alignment conditions will involve two or more elastic deformations. This is particularly true for parallel wall elements where the uniform change in slope from one surface to another includes splay and bend deformation. Also, near the grid alignment surface, the director may undergo substantial elastic deformation, and also includes splay and bend. In this case, at some distance from the surface profile (typically within one separation distance from the repeating profile within a unit cell), the two-dimensional variation of the director will be reduced and the surface is considered to provide a uniform pre-tilt. Further into the body of the cell, the director change in a particular state is one-dimensional, typically varying in a direction parallel to the plane of the device according to the applied electric field and elastic deformation associated with the interaction of the two surfaces. Note that the term pre-tilt is used to indicate that this uniform alignment of the director is very close to the surface and is caused by the structure of said surface. The tilt of the director represents the local orientation of the director field that can be altered by the alignment or electric field.

The term non-splayed state as used herein means a liquid crystal structure having a small splay component; for example, a state in which the main deformation component is bending. It should be noted that a vertical (homeotropic) state has zero skew and therefore falls within the definition of substantially no skew state.

One particularly important example of a non-splayed state is a bent state. In the curved state, the director inside the cell body has a tilt equal to or greater than the pre-tilt of the two alignment walls. In particular, the curved state generally has a point within the cell body where the director aligns perpendicular to the plane of the cell. For this reason, such a non-splayed curved state may sometimes be referred to as the vertical or "V-state", as described in US6512569, column 1, line 56. Also, in this curved state, the two-sided bending deformation directions of the vertically aligned director are opposite. As explained in more detail below, the twist component is determined by the rotation of the liquid crystal director in any plane through the thickness of the cell (e.g., from the first cell wall to the second cell wall) and can be selected as desired to suit the optical response. In other words, both the splayed and substantially non-splayed states can be provided in either a twisted or non-twisted form.

Advantageously, the first state of the pi cell is a bend state, wherein the tilt of the liquid crystal material at a point in the cell body is greater than the pre-tilt of the liquid crystal material at said first cell wall and said second cell wall. This may be a ZBD fault condition.

As described above, a bistable or multi-stable device exhibits one or more failure states (i.e., a state in which a liquid crystal defect provides a surface alignment structure on one surface) and a continuous (non-failure) state. It should be noted that prior art ZBD devices exhibit a mixed-aligned nematic fault state, a planar homogeneous fault state or a twisted homogeneous fault state, rather than a fault state in which the liquid crystal director (i.e. the average direction of the long molecular axis) in the cell body points in a direction substantially perpendicular to the cell walls. An advantage of providing this type of substantially non-splayed (e.g., bent) fault condition is the ability to quickly transition to the second substantially non-splayed condition described above.

Here, the cell midpoint is taken as a plane within the liquid crystal material that is parallel to the first and second cell walls and substantially midway between the first cell wall defined by the plane and the second cell wall defined by the plane. For a device having one or more grating surfaces, the halfway point is taken within one grating pitch of the average distance from one surface to the other surface, where the average is taken over at least one pixel area within the device. The point substantially midway may be anywhere from 1/4 the distance between the walls to 3/4 the distance.

Conveniently, when the pi-cell is switched to said first state, the liquid crystal molecules near the midpoint of the cell are oriented in a direction substantially perpendicular to the first and second cell walls. In other words, the tilt of the liquid crystal material at said point within the cell body is substantially 90 °. This may be a so-called ZBD continuous state.

An electrical addressing signal is applied to the pi-cell device to latch into one of two states, both of which are non-splayed states and preferably one of which is a bent state. The electrical addressing means are arranged to ensure that the bistable surface in at least one pixel region latches to a continuous state during at least a portion of the addressing signal. Conveniently, the addressing means is provided at the beginning of each pixel transition event, as it ensures that the director is in a non-splayed state and not in an unwanted splayed state. The initial no-ramp state is preferably a HAN state, as this ensures that the transition of the director field to the subsequent state is fast.

Preferably, the inner surface of the second cell wall is configured to provide the liquid crystal material layer with two or more surface alignment structures having different surface pretilt. In other words, a "double ZBD" pi cell device is provided in which two surfaces are capable of imparting two or more different surface pre-tilt angles to the liquid crystal material.

Conveniently, the second state is a substantially vertical (continuous) state. In other words, in the second substantially splay-free state, the liquid crystal molecules lie in a direction perpendicular to the cell walls throughout the cell thickness.

Advantageously, in the double ZBD pi-cell device of the invention, the latching threshold between the two or more surface-aligned structures provided by the inner surface of the first cell wall is greater than the latching threshold between the two or more stable surface-aligned structures provided by the inner surface of the second cell wall. In this case, it is also preferred that the pretilt of the alignment structure at the lowest pretilt surface of the second cell wall is less than the pretilt of either of the two or more stable alignment structures provided at the second cell wall; that is, the pretilt of the ZBD fault state on the higher threshold surface is greater than the pretilt of the ZBD fault state on the lower threshold surface.

Preferably the inner surface of said second cell wall is monostable and is arranged to provide a unitary alignment structure giving said liquid crystal material a pretilt of less than 90 °. Advantageously, the pretilt of each of the two or more surface alignment structures at the first cell wall is greater than the pretilt provided at the second cell wall. Conveniently, the tilt at the midpoint of the cell is greater than 5 °. Advantageously, any one or more of the at least first and second states is twisted. In other words, a twisted pi cell structure may be formed. The twist can advantageously be increased to 180 °.

The first cell wall and the second cell wall preferably carry electrodes to define a plurality of separate electrically addressable regions. For example, row electrodes are provided at the first cell walls and column electrodes are provided at the second cell walls, thereby providing a matrix of separately addressable areas. Some or all of the pixels may include non-linear elements such as back-to-back diodes, thin film transistors, or silicon logic circuits. Alternatively, the device may be a single pixel fast optical shutter.

The second state is the most energetically favorable state that the liquid crystal material can adopt. For example the second state may be a continuous high tilt state, wherein the device is arranged such that the second substantially non-splayed state is the most energetically favourable state that the liquid crystal material can adopt. In this manner, the device will tend to form a second substantially non-splayed state (i.e., a continuous state) when configured. Thus, the liquid crystal material in the inter-pixel gap will form a continuous state, which will ensure that a first substantially splay-free state (rather than a splay state) is always formed in each pixel.

For example, if the top bistable surface is arranged to naturally form a highly tilted continuous state upon first cooling, at least a portion of the inter-pixel gap will remain in a non-tilted state after the transition. For example, the grid may be made relatively shallow so that it is still bistable (i.e., there is an energy barrier between the high tilt and low tilt states), but the high tilt state is of lower energy than the low tilt fault state. Thus, the inter-pixel gap is not used to nucleate a splay state, but may advantageously nucleate a non-splay state. Unlike previous methods for introducing non-splayed nucleation sites to the interpixel gap (preferably around each pixel), this method can be accomplished without additional manufacturing costs, which are inherent to surface design. More information on designing the surface to control the pre-tilt can be found in the prior art described above.

Advantageously, the layer of liquid crystal material is a nematic liquid crystal material. Here the nematic liquid crystal material comprises long pitch cholesteric. A chiral dopant may also be mixed to provide any desired twist. Preferably the liquid crystal material has a positive dielectric anisotropy.

Conveniently, the first cell walls are arranged to provide two surface alignment structures having different pretilt. In other words, the first cell wall has a bistable surface structure; for example, a surface-arranged grid. Alternatively, more than two surface alignment structures may be provided, as described in WO 99/34251.

The pi-cell device may also include a layer of liquid crystal material deposited between a pair of cell walls, one or both of the cell walls being arranged to provide two or more stable alignment structures to the layer of liquid crystal material, the two or more stable alignment structures including a continuous state and one or more failure states, the device being transitionable between the continuous state and any one of the one or more failure states, wherein one of the one or more failure states is a curved state in which the tilt of the liquid crystal material at a point within the cell volume is greater than the pre-tilt of the liquid crystal material at the two cell walls. Preferably the molecules of liquid crystal material at the midpoint of the cell are perpendicular to the cell walls when the device is in the curved state.

It is also possible to provide a pi cell liquid crystal device in which each transition state persists in the absence of an applied electric field.

Also, a pi-cell device may comprise a layer of liquid crystal material between a pair of cell walls and comprising a plurality of pixels separated by inter-pixel gaps, wherein at least the inner surfaces of said pair of cell walls are arranged in two of said pixels and inter-pixel gaps to provide two or more different pretilt surface alignment structures, wherein the material is arranged to adopt a substantially non-splayed state in the absence of an electric field such that said substantially non-splayed state persists in said inter-pixel gaps.

In addition, the pi-cell device may comprise a layer of liquid crystal material disposed between a pair of cell walls, said layer of liquid crystal material being rapidly electrically transformable between at least two substantially non-splayed states, and said device being also transformable from a splayed state to any one of said non-splayed states prior to use, wherein the inner surface of at least one of said cell walls is arranged to impart two or more different pre-tilt angles in the same azimuthal plane. Advantageously, the splay state is capable of transitioning to a non-splay state in less than 1 second.

Conveniently, the latching threshold between the at least two stable surface alignment structures of liquid crystal material on said first cell wall is greater than the latching threshold between the at least two stable surface alignment structures of liquid crystal material on said second cell wall. Also, it is preferable that the latching threshold of the liquid crystal material on the first cell wall in the first range falls within the first range, and the latching threshold of the liquid crystal material on the second cell wall falls within the second range.

It will be appreciated that two or more of the at least two stabilizing structures are preferably optically distinguishable. Those skilled in the art will appreciate how to enable the use of polarizers, retarder films, etc. to provide optical contrast between the various structures. Preferably the material layers used are bistable. Alternatively, the material may advantageously comprise three or more stabilizing structures. Electrophoretic particles (e.g., charged particles or charged droplets) may also be included in the layer of material.

The layer of material may advantageously comprise droplets of a bistable material in a matrix of carriers. The droplets may be coloured and may comprise cholesteric liquid crystal material. The material may alternatively comprise particles.

A device having a layer of the first material described above may additionally comprise one or more further layers of material, each of the further layers of material being disposed between a pair of cell walls and comprising one or more separate electrically addressable regions, wherein each of the one or more separate electrically addressable regions of each of the further layers of material is electrically connected to the addressing means in parallel with one of the electrically addressable regions of the layer of material. The first material layer and the one or more further material layers may advantageously be arranged in an optical stack. Thus, an optical stack device of the type described in detail below is provided.

According to a second aspect of the present invention there is provided a method of addressing a display device comprising a constrained layer of material capable of being deployed and electrically latched between at least two stable configurations, said layer of material having one or more discrete electrically addressable regions. The method comprises the following steps: (a) addressing each separately electrically addressable region of the display device with a first latching scan to selectively latch material having a latching threshold within a first range, and (b) subsequently addressing each separately electrically addressable region of the display device with a second latching scan to selectively latch material having a latching threshold within a second range, wherein the second latching scan is insufficient to latch material having a threshold within the first range.

Conveniently, the first latching scan may indiscriminately latch (i.e. blank) material having a latching threshold within the second range to one of the at least two stable structures.

Advantageously, the method further comprises, after the step of addressing the device with the first and second latching scans, the step of addressing the display with one or more further latching scans, each further latching scan for selectively latching material having a latching threshold within a given energy range, wherein the high energy of the given energy range is lower than the high energy of the energy range of the previous latching scan.

Conveniently, the device comprises a plurality of separate electrically addressable regions.

According to a third aspect of the present invention there is provided a method of writing a frame of information to a display device having two or more stable structures and comprising a matrix of separate electrically addressable areas, wherein the method comprises the step of multiplexing the device using three or more addressing fields. The first field advantageously blanks the display device and the second field may selectively latch material having a latching threshold in a first range, while the third field selectively latches material having a latching threshold in a second range.

The invention will now be described, by way of example only, with reference to the accompanying drawings, in which:

figure 1 shows a prior art two-domain addressing scheme,

figure 2 shows a prior art blanked addressing scheme,

figure 3 depicts a prior art bistable liquid crystal device having a partially latched region,

figure 4 shows the random variation across the plate of the prior art that can provide an area with two different latching ranges,

figure 5 shows the principle of data voltage selection according to the prior art,

figure 6 illustrates a multiple scan technique according to the present invention,

figure 7 shows a panel constructed in accordance with the present invention,

figure 8 shows a cross-sectional view of the plate of figure 7 along the line II-II,

figure 9 illustrates a device with sequential transitions using multiple scan addressing,

figure 10 shows a five-level multi-scan technique,

figure 11 illustrates how the variation in gate pulse width can be used in a multi-scan technique,

figure 12 shows a typical ZBD latch-up curve with no change in asymmetry,

figure 13 shows the ZBD latch-up curve with asymmetry not maintained,

figure 14 provides an expanded view of the four transition regions of a ZBD device,

figure 15 gives an expanded view of the display of figure 7 when addressed according to the invention,

figure 16 provides an example of row and data signals that can be used to implement the present invention,

figure 17 shows the strobe and data signals capable of providing three latching scans in accordance with the present invention,

figure 18 shows how each scan of figure 17 can be applied to the entire display in sequence,

figure 19 shows how each of the three latching scans of figure 17 can be applied to each row in sequence,

figure 20 shows the measured latch-up response of one ZBD unit,

figure 21 shows the measured fault-to-continuity and continuity-to-fault transitions for a cell comprising regions of different grid spacing,

figure 22 is a series of photomicrographs showing a cell using multiple scans to occlude regions containing different grid spacings,

figure 23 depicts experimental data for fault-to-continuity and continuous-to-fault transitions for two regions of 0.6 μm and 0.8 μm pitch of one ZBD cell,

figure 24 shows a micrograph of two 0.6 um and 0.8 um pitch ZBD cell regions addressed using the present invention,

figure 25 shows the electro-optical response of a dual ZBD device,

figure 26 shows how a dual ZBD device can be addressed with multiple scans from the first blanking state,

figure 27 shows how a dual ZBD device can be addressed with multiple scans from the second blanking state,

figure 28 shows an exploded view of a double ZBD device made according to the invention,

figure 29 shows the operation of a prior art pi-cell device,

figure 30 illustrates the operation of the ZBD surface pi-cells of the present invention,

figure 31 illustrates the operation of another ZBD surface pi-cell of the present invention,

figure 32 shows the prior art transition from the splayed to the bent state in more detail,

fig. 33 shows a counter example of a prior art ZBD device, where the surface transition does not occur when forming a curved state,

figure 34 illustrates a pi-cell dual ZBD device according to the invention,

figure 35 shows an example of a substantially un-tilted state,

figure 36 shows the various tilted out states,

figure 37 shows the energy of the fault and the continuous state in a ZBD device,

figure 38 shows rms operation of a device of the present invention,

FIG. 39 shows a cholesteric device operable in accordance with the invention, and

fig. 40 illustrates a multilayer stack device operable in accordance with the present invention.

Referring to fig. 6, the principles of the present invention are illustrated. The graph of pulse duration versus voltage of fig. 6 illustrates the latching properties of the first region 60 and the second region 62 of a bistable device. The first and second regions have different latching energies. For each region, the solid line represents the point of 90% latch-up (i.e., τ V)_90％) The dotted line represents the 10% lock-up point (i.e., τ V)_10％). This nomenclature is well known in the art and is described above with reference to fig. 3.

According to the invention, the first area 60 and the second area 62 are addressed in separate scans. The selection of data voltages for two regions with distinct behavior is shown in fig. 6. Using V_s1First scanning and selection (+ V) of the gate voltage pulse of (b)_d) Or non-selective (-V)_d) The data voltage pulses are combined to provide selective transitions of the first region 60. Using a gating voltage V_s2Second scan and select (+ V)_d) Or non-selective (-V)_d) The data voltage pulses are used in combination to provide selective transitions of the second region 62.

The use of two scans (i.e., a first scan and a second scan) reduces the number of electronic drivers required to address the entire panel and/or allows the use of lower data voltages (albeit with longer row addressing times). The invention thus allows a bistable panel to be latched to a desired state using a reduced number and/or potential of scan electrodes and/or drivers with low data voltages. The method may be used to compensate for changes in latching response with multiple scans of the display.

The use of two scans (i.e., a first scan and a second scan) in which the first scan includes one initial blanking pulse may also be described as a three-domain multiplexed scheme. In other words, domain one is a blanking pulse, domain two is pulsed to address regions having one latching threshold within a first range, and domain three is pulsed to address regions having one latching threshold within a second range. Such a frame (i.e. the pattern information written into the display) is written through three fields.

Thus, it can be seen that the present invention allows two regions to be distinguished using a data voltage that is slightly larger than the partial latch-up width, namely:

this has the potential to reduce the data voltage substantially towards the minimum of the partial latch-up width. The low data voltage reduces power consumption during refresh and reduces light transients and the effects of back-up.

If this variation occurs on the same scan electrode (whether by design or because the variation is random), the same data is required to address regions 1 and 2. This is done by ensuring that the high voltage region (region 1) is addressed first. Signals for addressing the regions to the ideal state (say Vs1-Vd for black and Vs1+ Vd for white) are also applied to region 2 on the same row. The portion of the row addressed with the low threshold (region 2) is latched with any synthetic latch, so that white appears (in this example) regardless of the data. However, in the next row scan, the gate voltage is lowered to Vs2, allowing these regions to be addressed. In this subsequent scan, neither composite (Vs2-Vd or Vs2+ Vd) has sufficient energy to latch onto region 1, so the entire row is addressed with the desired image.

Figure 7 shows a plate designed to exhibit three separate thresholds on each row electrode. The plate has four row electrodes 70a-70d (collectively referred to as row electrodes 70) and eight column electrodes 72a-72h (collectively referred to as column electrodes 72). A row electronic driver 74 and a column electronic driver 76 are also provided. The row and column electrodes overlap to provide thirty-two areas that can be addressed separately by applying voltages to the appropriate rows and columns. Each row electrode 70 includes three regions having different latch-up thresholds; a first region 80, a second region 82, and a third region 84.

A cross-sectional view along line II-II of the plate shown in fig. 7 is given in fig. 8. Referring to fig. 8, an alignment grid is shown forming a first region 80, a second region 82, and a third region 84. Also shown are column electrode 72h, row electrodes 70a and 70b, an underlying (vertical, monostable) alignment layer 86 and an optical element 88. Optical component 88 may include a polarizer, a compensator disk, a diffuser and/or a reflector used in any of a number of configurations well known to those skilled in the art. It should be noted that one or both of the illustrated optical components 88 are not necessary to implement a particular device architecture.

It should be noted that regions 80, 82, and 84 may be formed by other methods to vary the threshold. These methods include providing holes in the electrode, providing alignment changes (e.g., photo-alignment), pre-tilt differences, changes in grid shape or anchoring properties. The change may be on a bistable surface, or on an opposing unit surface.

The dielectric material forming the alignment grid of the first, second and third regions 80, 82 and 84 is selected to have a different thickness in each of these three regions. This changes the cell gap and the voltage applied across the modulating medium (due to the voltage drop across the dielectric layer), resulting in different latching thresholds in the first, second and third regions 80, 82 and 84. The third region 84 is assumed to have the highest blocking threshold because the dielectric mismatch of the alignment layers is more pronounced than the variation in cell gap. It is, however, obviously also possible to design the cell such that the first region 80 has the highest threshold value.

In operation, each of the four rows 70 is sequentially blanked, followed by three scans with the appropriate data synchronously applied to the columns 72. Alternatively, all lines may be initially blanked, while and then each scanned sequentially or in some particular order. For the first scan of a particular row, the voltage (Vs1) is high enough to indiscriminately latch the two low threshold regions (i.e., the first and second regions 80 and 82) into one state regardless of the data applied to the columns. However, the data signal is combined with the Vs1 to latch the third region 84 into a desired state or to keep it unchanged. In the second scan of the row, the applied voltage is reduced to Vs2, and Vs2 is selected so that it indiscriminately latches the first region 80 without distinguishing between data, while leaving the third region 84 unchanged; the second region 82 is differentially blocked according to data ± Vd. The addressing of the rows is completed in a third scan, where Vs3 keeps the second and third regions 82 and 84 unchanged, but differentially latches the first region based on the data.

In this way it is possible to reduce the number of electronic drivers required to address the entire panel. It can thus be seen that the number of pixels that can be addressed is tripled without the expense associated with additional electronic drivers. In the panel described with reference to fig. 7 and 8, the image is 12 by 8 (i.e. 96) pixels, although only four row electrodes 70 are used. Other advantages include reducing the gap between pixels (i.e., the inter-electrode gap is smaller) and thus improving contrast and reflectance (i.e., increasing the aperture ratio of the pixels).

It should be emphasized again that the present invention is very different from the various prior art techniques used to obtain analog gray scales. The present invention allows the electro-optic response of the device to be varied within a single electrically addressable area (e.g., the area where the row and column electrodes overlap) by multiple addressing scans. Instead, each data signal is modulated using analog gray scale to block a desired portion of the pixel area. The invention thus provides a gate voltage (which is typically a much higher voltage than the data voltage) that is modulated in successive scans. This strobe modulation in combination with multiple scans maintains a relatively low data voltage, which provides many benefits, as described above. Of course, the invention can be combined with analog gray scale techniques to provide a gray scale device with a smaller number of electronic drivers.

The method is also used to reduce the number of drivers required to generate grey scales by spatial dithering. In such a configuration, the regions (i.e., regions 80, 82, and 84 of fig. 7) may be arranged to have different areas within each pixel. For example, the first region 80 may be four times the area of the third region 84, while the second region 82 may be half as large as the third region 84. Such digital weighting is well known to those skilled in the art of producing linear gray scale with a minimum number of separately addressable regions. If analog gray scale levels are also included, different area weightings may be used. For example, if three analog levels are possible, a total of 27 gray levels can be achieved with a 1: 3: 9 weighted area. This occurs for a single row and column (i.e., separate electrically addressable regions) using the present invention.

Instead of using the present invention for panels designed to exhibit multiple thresholds, multiple modulation scans can be used to compensate for random variations across the panel. This is the same way as the previous example, except that the same data is used for each of the multiple scans. In other words, each scan writes the same data pattern, but each scan selectively latches only materials with a defined threshold range. In this way, data is written to all areas of the material of the display where all latching thresholds are within the scan range.

In fact, the randomly varying latch-up curve across the panel may change in a continuous manner rather than forming two distinct operating regions. However, even in this case, the display can advantageously be fully addressed in two scans.

FIG. 9 illustrates data and strobe voltages suitable for addressing a panel with successive latch transitions. The device can be seen as having a lowest threshold region (curve 90) and a highest threshold region (curve 92). Selecting a data pulse (+ V)_dand-V_d) And a strobe pulse (V)_s1And V_s2) Enabling the entire display to be addressed with two scans; the first with Vs1 merged with the required data, the second with V_s2Merging with the required data, where V_s1＞V_s2

The result of using two such scans is that the data voltage is (almost) halved, albeit at the expense of a double update rate. As described below, it is preferable that there be some overlap (e.g., approximately (δ V)/2) in the resulting voltage to ensure that the region of the cell with transition energy close to the cross over latches to the desired state.

In the case of a device having the characteristics shown in fig. 9, the data voltage required to ensure correct addressing of all plate areas is given by:

this is half the power required for a typical prior art solution given by equation (2).

In practice, it is preferable to use a Vd slightly higher than the equation of equation (4) to ensure that the entire display is in an ideal state. By increasing the number of scans with successively decreasing gate voltages, it is possible to further decrease Vd. In general, for n-scan, the data voltage is reduced from 1/n:

the maximum number of scans considered worth is:

wherein, V_100％-V_0％Is the intrinsic partial latch-up width of the microscopic region.

The energy per update using n line scans is in the following range:

where f is the number of frame updates (e.g., the frequency of the device for which the updates are fixed) and C is the capacitance. Using an n-fold multi-scan approach results in an n-fold reduction in the energy required to update the display compared to conventional update techniques.

FIG. 10 shows how each row can be scanned 5 times (i.e., with voltage V) for the successive transitions shown in FIG. 9_s1，V_s2，V_s3，V_s4，V_s5) The data voltage is reduced almost to 1/5. It should be noted that the highest remnant voltage must beUsed at each successive scan.

Referring to fig. 11, it is illustrated how the slot width of the gate pulse can be changed instead of modulating the gate voltage Vs between the consecutive scans. In this case, the longest duration time slot is used first, and the following scans are successively shorter. In order to ensure a wide operating range, a combination of pulse width (τ) and pulse voltage (V) modulation is preferred. In addition to varying pulse width and duration, changes to the shape of the resultant pulse and/or varying the delay between pulses may be used to provide the desired differentiation.

Referring to fig. 12, a transition curve of a ZBD device is shown, which includes first, second and third regions having different latch-up characteristics. A first curve 121, a second curve 122 and a third curve 123 illustrate the voltage and time gap required to latch the device from the fault condition to the continuous condition in the first, second and third regions respectively, the first curve 121 ', the second curve 122 ' and the third curve 123 ' illustrating that a negative voltage pulse of a given time slot can latch the device from the fault condition with the continuous condition. The three distinct latching regions may be engineered or may result from non-uniformities on the device.

A symmetric device is called when voltage pulse locks of the same magnitude (i.e., | τ V |) continue to fault and fault to continue, or the transition threshold difference remains unchanged from one transition to another. A three zone symmetric ZBD device with the characteristics shown in fig. 12 can be latched to the fault state by the following steps:

(i) the entire device is blanked to a fault state by applying a blanking pulse 124 of negative polarity.

(ii) A1 st scan of positive polarity (i.e., transition from the failed state to the continuous state) is applied using the non-selected data. This provides a first composite pulse 126 that leaves the first region (i.e., the region having the first curve 121) unchanged. The second region (i.e., the region having the second curve 122) is partially blanked to the continuous state, and the third region (i.e., the region having the third curve 123) is fully blanked to the continuous state.

(iii) The 2 nd scan of negative polarity (i.e., transition from continuous state to failed state) is applied using the select data. This provides a second composite pulse 128 that leaves the first region unchanged, still in a fault state. The second and third zones are now all selected to the fault state.

Thus, the device gives the desired final state even if region two is only partially latched to the fault state during the first scan. Also, as an additional matter, a blanking pulse 124' will be used to transition the three regions to a continuous state if the data waveforms are reversed. The first scan would then contain select data to provide composite pulses 130 transitioning all regions to a fault state and the second scan would have non-select data, providing composite pulses 132 not transitioning any of the three regions.

However, the above addressing method assumes that any asymmetry between the two transitions (i.e., continuous to failure and failure to continuous) remains unchanged. Changes in offset, cell gap, or grid spacing will produce little or no change in the amount of asymmetry that the device responds to. However, certain variations (e.g., the shape of the grid or mark-to-space ratio) may produce variations in the amount of asymmetry observed.

The effect of asymmetry in the latching response on the multiple scan technique of the present invention is illustrated in fig. 13. A first curve 131, a second curve 132 and a third curve 133 illustrate the voltage and time slots required to latch the device from a fault condition in the first, second and third regions to a continuous condition, respectively. The first curve 131 ', the second curve 132 ' and the third curve 133 ' illustrate how a negative voltage pulse for a given time slot can latch a device from a continuous state to a fault state.

The device of fig. 13 thus has three sampling regions exhibiting latch-up characteristics with fixed asymmetry and equidistant separation of the transition voltages. If the gate and data voltages are selected such that both scans overlap the partial latch-up width of the second region (i.e., curves 132 and 132'), a clear transition is observed on both scans.

Fig. 14 shows an expanded view of the first, second and third curves 131, 131 ', 132, 132 ', 133 and 133 '. The transition curves 132A and 132A' of the fourth region are now also shown. The fourth region (i.e., curves 132A and 132A ') has similar latching characteristics as the second region (i.e., curves 132 and 132'), but with variations in the asymmetry of the transition.

It can be seen that if the device is blanked to a fault state by the blanking pulse 134, the non-selection pulse applied during the first scan (i.e. the resultant pulse 136) will partially latch the fourth region to a continuous state. In addition, the select pulse applied during the second scan (i.e., resultant pulse 138) will only partially latch the fourth region back into the failed state. If the second region has partially latched before the second scan is applied, a voltage below the full transition voltage will be sufficient to transition the partial state to the failed state; but this will not apply where there is a large variation in asymmetry, which would not be possible. However, it can be seen that widening the overlap of adjacent scans will eliminate this result.

The basis of the invention has been described above, but in a practical device the invention can be implemented using a series of addressing pulses to enable a plurality of pixels of the device to reach the desired state. Also as mentioned above, prior art solutions include two fields and blank addressing. Both addressing types are possible to use by the present invention.

The following example shows an addressing scheme applied to a bi-stable device that can be in either state a or state B for a given point in the device. Considering two points or areas on the cell (i.e., AA, AB, BA or BB), the first requires a higher latch-up threshold (i.e., high, low) than the second. Assume that a positive voltage (+ Vs and + Vd) tends to latch the pixel to state a, while a negative voltage (-Vs, -Vd) latches the pixel to state B. In a display device it will be common for one state to appear reflective or white (say state a) and the other state to be dark (say state B). The pixel is not the same as the ideal state (i.e., error), which is shown in bold. The purpose of the addressing scheme is to ensure that there are no errors after the addressing sequence is complete and that the ideal state (i.e. the minimum number of steps) is reached in the shortest time.

To highlight the advantages of the present invention, a few opposite example addressing sequences will be considered first. First, the case shown in table 1 below was employed. This uses a blanking pulse to latch the high and low regions to state b (bb). During the row address period, the first pulse has an amplitude of V2 and has a positive polarity to latch into state A. Selectively low (second) threshold region latching occurs depending on whether the data is positive; neither of the high (first) threshold regions receives a pulse of sufficient energy to cause latch-up. In the second cycle, + V1 is applied, which combines with the data to latch the high regions to state a or leave them unchanged, depending on the data. However, regardless of the data, all low regions latch to state A. If the voltage is-V1 for this duration, the low region will instead latch indiscriminately to state B. Both cases do not produce ideal images regardless of the starting structure.

TABLE 1 Blanking Low followed by high/No data inversion

Initial state	Ideal final state	Blanking to B	Data of	+V2	+V1
						BB	AA	BB	+	BA	AA
BB	BB	BB	-	BB	B
						AA	AA	BB	+	BA	AA
AA	BB	BB	-	BB	BA
						BA	AA	BB	+	BA	AA
BA	BB	BB	-	BB	B
						AB	AA	BB	+	BA	AA
AB	BB	BB	-	BB	BA

In Table 2, for the following period at-V2, no portion of the signal is sufficient to latch the high threshold region to the A state. When merged with the same data this means that the entire second duration has no effect and is redundant. If the data were to be inverted during the second period, the pixel would latch to BB regardless of the initial conditions.

TABLE 2 Blanking all Low/No data inversion

Initial state	Ideal final state	Blanking to B	Data of	+V2	-V2
						BB	AA	BB	+	BA	BA
BB	BB	BB	-	BB	BB
						AA	AA	BB	+	BA	BA
AA	BB	BB	-	BB	BB

BA	AA	BB	+	BA	BA
						BA	BB	BB	-	BB	BB
AB	AA	BB	+	BA	BA
						AB	BB	BB	-	BB	BB

Tables 3 and 4 show examples of two-field addressing, which do not give ideal results. In table 3, positive voltages are applied to the first domain and negative voltages are applied to the second domain. The second cycle in each domain is redundant. Data inversion in the second domain (as in the scheme of table 4) does not reduce errors.

TABLE 3 two-Domain high followed by Low/No alternation/No data inversion

Initial state

Ideal final state

Data of

+V1

+V2

-V1

-V2

BB

AA

+

AA

AA

AB

AB

BB

BB

-

BA

BA

BB

BB

AA

AA

+

AA

AA

AB

AB

AA

BB

-

AA

AA

BB

BB

BA

AA

+

AA

AA

AB

AB

BA

BB

-

BA

BA

BB

BB

AB

AA

+

AA

AA

AB

AB

AB

BB

-

AA

AA

BB

BB

TABLE 4 two-Domain high followed by Low/No alternation/No data inversion

Initial state

Ideal final state

Data field 1

+V1

+V2

Data field 2

-V1

-V2

BB

AA

+

AA

AA

-

BB

BB

BB

BB

-

BA

BA

+

AB

AB

AA

AA

+

AA

AA

-

BB

BB

AA

BB

-

AA

AA

+

AB

AB

BA

AA

+

AA

AA

-

BB

BB

BA

BB

-

BA

BA

+

AB

AB

AB

AA

+

AA

AA

-

BB

BB

AB

BB

-

AA

AA

+

AB

BB

Table 5 shows a scheme using the + V1 and-V2 gating sequences, but still producing errors when the high threshold region needs to be locked from the initial state A to the ideal state B.

TABLE 5 Single Domain high followed by Low/alternate polarity/No data inversion

Initial state	Ideal final state	Data of	+V1	-V2
					BB	AA	+	AA	AA
BB	BB	-	BA	BB
					AA	AA	+	AA	AA
AA	BB	-	AA	AB
					BA	AA	+	AA	AA
BA	BB	-	BA	BB
					AB	AA	+	AA	AA
AB	BB	-	AA	AB

Tables 6-9 provide examples of how two regions can be addressed with different thresholds according to the present invention. These examples all use a scheme that reduces the data voltage required to address the plate and ideally are AA or BB (not AB or BA). The same principle applies to the case where the threshold is deliberately varied to give individually addressable regions, but then the data may vary between adjacent periods.

Table 6 shows a simple addressing scheme in which each region is blanked before application of the appropriate addressing signals. Initially there is no restriction on blanking, and regardless of the initial state, blanking is chosen so that the entire panel is in state B. This blanking may be applied to all rows simultaneously or may be limited to one or several rows before the addressing sequence. It may be the DC balance itself or may include a portion that compensates for the net DC of the entire frame. Data can be applied to the columns to ensure blanking during this period, but the blanking pulses will typically be applied simultaneously to the scan signals on other rows of the display. In this case, the pulse is designed to latch to a particular state (i.e., data associated with the scan signal on other rows) regardless of the data applied to the column.

Blanking is followed by a high latching pulse (in this example + V1) with the appropriate data on the column, selectively latching the high threshold region and indistinguishably latching the low threshold region to the opposite state. Once the high threshold regions are addressed, the low threshold regions only have to blank back to the first state to prepare them for addressing the low threshold state in the next cycle. Ideally, the blanking pulse is chosen such that it blocks the low threshold region without affecting the already addressed high threshold region at all.

TABLE 6-for high-followed-low split blanking

Initial state

Ideal final state

Blanking high (and low) to B

Data of

+V1

Blanking only down to B

+V2

BB

AA

BB

+

AA

AB

AA

BB

BB

BB

-

BA

BB

BB

AA

AA

BB

+

AA

AB

AA

AA

BB

BB

-

BA

BB

BB

BA

AA

BB

+

AA

AB

AA

BA

BB

BB

-

BA

BB

BB

AB

AA

BB

+

AA

AB

AA

AB

BB

BB

-

BA

BB

BB

An alternative and potentially more advantageous scheme is shown in table 7. This scheme takes advantage of the fact that the first transition voltage (+ V1) effectively blanks the low threshold regions while selectively addressing the high threshold regions. Thus, if the subsequent signal polarity is reversed (and set to the appropriate amplitude), it is combined with the data to give the ideal state. In this way, two time slots are required to ensure that low data addresses two areas.

TABLE 7-Blanking high followed by Low/alternate polarity

Initial state

Ideal final state

Blanking high (and low)To B

Data of

+V1

-V2

BB	AA	BB	+	AA	AA
						BB	BB	BB	-	BA	BB
AA	AA	BB	+	AA	AA
						AA	BB	BB	-	BA	BB
BA	AA	BB	+	AA	AA
						BA	BB	BB	-	BA	BB
AB	AA	BB	+	AA	AA
						AB	BB	BB	-	BA	BB

Tables 8 and 9 illustrate a similar scheme to that shown in table 7, but without blanking pulses, instead of using three slots to achieve the desired final state.

TABLE 8-one half-field high-followed-by-low/alternating polarity

Initial state	Ideal final state	Data of	+V1	-V1	+V2
						BB	AA	+	AA	AB	AA
BB	BB	-	BA	BB	BB
						AA	AA	+	AA	AB	AA
AA	BB	-	AA	BB	BB
						BA	AA	+	AA	AB	AA
BA	BB	-	BA	BB	BB
						AB	AA	+	AA	AB	AA
AB	BB	-	AA	BB	BB

TABLE 9 half-Domain high-followed-Low/polarity Change

Initial state

Ideal final state

Data of

+V1

-V2

+V2

BB	AA	+	AA	AA	AA
						BB	BB	-	BA	BB	BB
AA	AA	+	AA	AA	AA
						AA	BB	-	AA	AB	BB
BA	AA	+	AA	AA	AA
						BA	BB	-	BA	BB	BB
AB	AA	+	AA	AA	AA
						AB	BB	-	AA	AB	BB

As described above, the addressing sequence described in Table 7 above can be used to address each row with a high number of scans, allowing further substantial reduction in data voltage. Example 10 the scheme of example 7 was extended by dividing the range of random thresholds into three (i.e., three regions of different thresholds). This illustrates the use of the present invention to compensate for random variations.

TABLE 10 addressing three regions with multiple scans

Initial state

Ideal final state

All blanked are B

Data of

+V1

-V2

+V3

BBB

AAA

BBB

+

AAA

AAB

AAA

BBB

BBB

BBB

-

BAA

BBB

BBB

AAA

AAA

BBB

+

AAA

AAB

AAA

AAA

BBB

BBB

-

BAA

BBB

BBB

BAA

AAA

BBB

+

AAA

AAB

AAA

BAA

BBB

BBB

-

BAA

BBB

BBB

BBA

AAA

BBB

+

AAA

AAB

AAA

Etc. of

Figure 15 shows how the scheme of example 10 can be used to address 2 rows (scan) and 8 columns (data) divided into regions with three different thresholds, as described with reference to figures 7 and 8.

Fig. 15a shows a two-row (i.e., rows 70a and 70b) by four-column (i.e., columns 72a, 72b, 72c, 72d) segment of the display shown in fig. 7 and 8. The row 70a is blanked black by a resultant blanking pulse generated by applying appropriate signals to the row 70a and columns 72a-72 b. Row 70b remains unchanged by the data signals applied to columns 72a-72d being represented in a gray state.

Fig. 15b shows the high threshold region (i.e. first region 80) of the upper row being addressed. The select data waveform is applied to column 72b while the non-select data waveform is applied to columns 72a, 72c and 72 d. The desired pattern is thus written to the pixels of the first area 80 of the row electrode 70 a. The result is sufficient to blank the low threshold regions (i.e., the second region 82 and the third region 84) indiscriminately to white.

In fig. 15c, the gate voltage is reduced to Vs2 and the polarity is reversed. This blanks the lowest threshold region (i.e., third region 84) back to black while leaving the highest threshold region (i.e., region 80) unchanged. Only the middle region (i.e., the second region 82) is merged with the select and non-select data applied to the columns 72a-72d to give a distinction.

Fig. 15d shows a third scan with the voltage reduced to Vs3 and polarity reversed. This addresses only the lowest threshold region (i.e., the third region 84) to the ideal state while leaving the high threshold regions (i.e., the first region 80 and the second region 82) unchanged. Now row 70a is fully addressed.

Fig. 15e and 15f show how the above process with reference to fig. 15a and 15b is repeated for row 70 b. In this way, data can be written to each pixel of the display.

This can be seen that although only two rows need to be addressed by the drivers, a total of 6 by 8 pixels are addressed instead of 2 by 8 pixels. For simplicity, unipolar strobe and data signals are shown. However, those skilled in the art will appreciate that bipolar data may be preferred in practice. For example, ZBD devices operate better in frame scan, line scan or partial scan arrangements using such bipolar pulses.

When implementing the present invention, standard rules related to prior art addressing techniques should also generally be followed. For example, all signals applied to a row must be DC balanced for a particular period, typically taking a complete frame. The row data signals should also be DC balanced for each row to prevent unwanted latching for a particular pixel pattern. Also, the gating (also sometimes referred to as scanning) pulses may be bipolar or unipolar, as long as the net resultant DC is zero over time. The DC smoothing prevents breakdown of the liquid crystal material. In fact, ZBD devices using bipolar pulses have recently been found to operate better. The reduction effect on the latching threshold of the trailing (latching) pulse is now reduced by the leading (non-latching, dc-balancing) pulse.

An example will now be given of a scanning sequence employing a succession of each row, each following the other, until the row is complete and the next row is addressed (in any order). This combines the advantages of using both bipolar addressing and the addressing scheme of the present invention.

It should be noted that the display may not address each row in time, but may scan from top to bottom on a first gate pulse, followed by scanning the entire display with a reduced gate voltage. This arrangement is also advantageous because it allows all rows (electrodes) to be connected to a single driver chip and scanned first at one voltage, and so on, before the total voltage level from the driver is reduced in a subsequent scan. This enables the use of low cost four-level (STN) drivers. In this case it is preferable to ensure that both blanking and scanning signals are bipolar.

Figure 16 shows an example of a scheme for addressing a single row using the method described in table 7. This shows a four time slot scheme (-1, -1, +1, -2) Vs _ (± 1, +1,) Vd, where the first two slots provide blanking and the last two slots give distinctive lockouts (1 > 2). Four time slots are required to allow the data signal DC balance. Although selective locking occurs only in the last two time slots, good results are achieved with the first two time slots, providing cancellation immediately prior to selectionAnd (4) hiding.

The traveling waveform at this time is not DC balanced within the row. This can be done with additional pulses before or after the signal. The DC balancing pulse is used to improve blanking if clocked immediately before the scan signal as shown. Or (e.g., due to limitations of the waveform that may come from the driver circuit) the entire waveform may be introduced into one six-slot row: (+2, +1, -1, -1, +1, -2) Vs _(+1, -1, +1,)Vd。

referring to fig. 17, a three scan multiplexing scheme of the present invention is shown. The blanking pulses are followed by first, second and third strobe pulses synchronized with the appropriate select or non-select data. The duration of each gate pulse decreases from scan to scan and is opposite in polarity to the previous gate pulse.

Fig. 18 shows how a first scan (i.e. the use of a first strobe) can be applied to each row, followed by a second scan to each row, followed by a third scan to each row. Thus, the entire display receives a first scan, followed by a second scan, and finally a third scan. Fig. 19 shows an alternative arrangement in which each row is blocked with three scans before they are applied to the next row.

It should be noted that combinations of the schemes shown in fig. 18 and 19 are also possible. For example, consider a ten-line display. Rows one to five, say, can be addressed in turn by the first, second and third scans. Then, rows six to ten (say) can be addressed sequentially next by the first, second and third scans. Various other combinations can be used as desired, so long as each separate electrically addressable region in each frame receives the first scan, the second scan, and the third scan in the correct order.

FIG. 20 shows the bipolar pulse latch-up response of a 3.5 μm ZBD cell at 25 ℃ measured with bipolar pulses. This shows an asymmetric latching threshold, which may require overlapping addressing regions as described above. With respect to the grid, fields that are negative latch to the continuous state B at a lower voltage than positive fields that latch to the fault state a. The inversion switching threshold caused by ionic contamination of the liquid crystal is also shown. The voltage may also be varied to compensate for global variations, such as temperature variations. The voltage may also be selected taking into account any pole-to-plate variation.

A test cell has been established to demonstrate the present invention. The cell used for this investigation is shown as cell Z641, which is a ZBD grayscale cell with many regions made from an array grid with different pitches and mark-to-space ratios. However, for purposes of illustrating the present invention, regions having fixed mark-to-space ratios and varying pitches will be considered because these regions exhibit two transition thresholds with substantially constant asymmetric transitions.

The pitch of the discrete regions in the cell varied between 0.6 μm and 1.0 μm in 0.1 μm increments, and the latch-up transitions from all these regions at a temperature of 25 ℃ are shown in fig. 21. The dashed and solid lines in the figure show the 10% and 90% transition levels, respectively. In particular, various continuous-to-fault lockout transitions are shown in FIG. 21a, while various fault-to-continuous transitions are shown in FIG. 21.

It can be noted that the width of the bistable window is not sufficient for the entire grid pitch range. This causes thickness non-uniformity for the 0.6 μm pitch region, increasing the pitch from 0.9 μm to 1.0 μm, with little or no shift in the transition. Fig. 21 shows a typical partial transition width: the C to D conversion is from 0.4V to 1.1V, and the D to C conversion is from 0.7V to 2.1V.

This unit is used first to demonstrate how to use multiple scans according to the invention to reduce data voltages while correcting for non-uniformities in device transitions. Note that the following steps are performed next on a light box (light box) so that the entire apparatus is observed at any time. This means that the temperature cannot be controlled and will be greater than 25 ℃, thus resulting in a lower transition voltage across all regions. However, there will still be a voltage shift for each transition of the grid spacing region.

If a 100 mus time slot is selected, it is found that 2.25V data voltage to D conversion and 2.75V data voltage to D to C conversion are required for the C to D conversion in order to fully transition all regions under application of a single bipolar pulse. If two scans are applied, with an overlap of 1.0V between them being chosen (note that the effect of the partial transition width is discussed above), the voltage V for the first scan is_s＝19.6V，V_d1.6V transition D to C, second scan voltage V_s＝19.9V，V_dAll regions of unit Z641 with a fixed mark-to-space ratio are fully addressed to a continuous state or a failed state for the 1.4V transition C-to-D.

Referring now to FIG. 22, the effect of the multi-scan technique on the test cell is shown. Fig. 22d shows the pitch (in μm) of the grid in different areas of the test cell.

To illustrate the multi-scan technique, the device initially blanks to the failed state, and then applies two scans, the first scan having a polarity to transition to the continuous state and the second scan having a polarity to transition to the failed state. When transitioning the device to a fault state, the first scan contains non-selective data, and because non-selective synthesis is insufficient to transition to a continuous state, the region with the higher threshold voltage remains in the fault state after the first scan. Whereas the other regions transition to a continuous state because their threshold voltages are lower. This is shown in fig. 22a, where the shorter pitch (and thus lower threshold voltage) regions transition to a continuous (black) state.

It can be seen that there is no clear distinction between, for example, 0.8 μm and 0.9 μm pitch regions, and that much non-uniformity is present in the test cell. In addition, a large number of receding failure regions occur within the 0.6 μm region, thus resulting in a larger proportion of failure states in this region than would actually be the case. Those skilled in the art will appreciate that the number of faults and the level of non-uniformity present in the test cell will be greatly reduced in any finished display.

FIG. 22(b) shows the device transitioning completely to the failed state after a second scan transition scan that incorporates select data in addition to polarity gating to transition the failure. The voltage is sufficient to transition to the failure state to a continuous region in the first scan, and is insufficient to transition to a failure state to a non-continuous region.

When transitioning the device to the continuous state, the first scan now incorporates the select data, which transitions all regions to the continuous state, and the second scan incorporates a non-select data, which keeps all regions in the continuous state unchanged. The final state is shown in fig. 22(c), although the device is not changed by the second scan.

Thus, it has been demonstrated that all areas of the fixed mark-to-space ratio grayscale unit Z641 can be addressed with two scans of opposite polarity, where data voltages of 1.6V and 1.4V are used in the first and second scans, respectively. This compares to a 2.25V data voltage, which requires the use of a single scan transition in the same area. A 33% drop in data voltage has therefore been demonstrated.

Note that a further reduction in the applied data voltage would be required in order to lower the data voltage to a level below the Fredericksz transition, which is in the range of 1V for this device. However, in a typical cell (i.e., a grid formed with a fixed pitch and mark-to-space ratio), the local partial transition width is typically 0.5V, which is much narrower than the 1-2V in many cases of the grayscale cell used here. In view of such a narrow local partial transition region, data voltages of less than 1V may be used, which are lower than the Fredericksz conversion. As described above, reducing the data voltage below the Fredericksz conversion prevents the display from "flashing" during addressing.

The locations of the regions with grid spacing 0.6 μm and 0.8 μm on the grey scale device are adjacent to each other, thus allowing the investigation of using the second application of the present invention which reduces the number of drivers by making the regions of different threshold voltages. The cell is now placed in a temperature station and set at a temperature of 25 ℃. The transition curves of the two regions considered are shown in fig. 23. Fig. 23a shows the fail-to-fail transition for two regions of a grayscale unit Z641 having 0.6 μm and 0.8 μm grid pitches, while fig. 23b shows the continue-to-fail transition for the same region. The dashed line and the achievement represent transition levels of 10% and 90%, respectively. The first scan is defined by a first arrow 200 (fig. 23a) and the second scan is defined by a second arrow 202 (fig. 23 b).

It can be seen from fig. 23 that the maximum difference in transition voltage for these two regions occurs between the time slots of 50 μ s to 100 μ s (100 μ s being chosen as the time slot in the proof). If we therefore use the D-to-C transition as the first scan with a 24.5V gate voltage and the C-to-D transition as the second scan with a 24V gate voltage, we can select 4 separate states using a data voltage of 1V for both scans, depending on the combination of the selected or non-selected data waveforms for both scans.

FIGS. 24a-24d are photomicrographs of the 0.6 μm and 0.8 μm regions described with reference to FIG. 23 above. Fig. 24e illustrates the position of two different areas in the micrograph.

The cell blanks to a fault state to latch both regions white. The fail-to-continuous transition serves as the first scan, where the gate voltage is one 24.5V. Continuing to the faulty load is the second scan with 24V gate voltage. The first and second scans use a data voltage of 1V. Depending on the combination of the selected and non-selected data waveforms for the two scans, 4 separate states can be selected. FIG. 24a shows 0.6 μm/off, 0.8 μm/on; FIG. 24b shows 0.6 μm/on, 0.8 μm/on; FIG. 24c shows 0.6 μm/off, 0.8 μm off and FIG. 24d shows 0.6 μm/on, 0.8 μm/off. The definition of the tag shown in fig. 24 is the polarity of data in the first/second scan, where + data has the same polarity as the corresponding strobe, and-data has the opposite polarity to the corresponding strobe.

Two regions with a grid pitch of 0.6 μm and 0.8 μm can thus be addressed using two scans and one 1V data pulse. Four separate states can be selected depending on the combination of the selective or non-selective waveforms for the two scans. This allows the number of drivers used in a grey scale or standard black and white device to be reduced. This is achieved by making areas of different grid spacing.

Multiple scanning techniques can also be used to ensure operation across a wide temperature range, which requires temperature sensors. A first scan is used to latch in materials with high thresholds (e.g., low temperatures), and a subsequent scan latches in materials with thresholds in a reduced range (i.e., higher temperatures). This removes the need for temperature sensing circuitry and thus reduces costs. The temperature shift may be partial or global.

Thus, it has been demonstrated that a display can be addressed with multiple scans in all cases, provided that the overlap of adjacent transition scans is sufficient. This overlap corresponds to a local partial transition width if the asymmetry of the two transitions of the entire cell is not changed. However, if the asymmetry of the two transitions changes, then a greater overlap is required, which may reduce the data voltage reduction benefits of the technique.

As outlined above, patent application WO97/14990 describes a top bistable device (ZBD) having an alignment grid on at least one surface. Furthermore, WO97/14990 describes the use of a grid of top bistable alignment on both surfaces of a device; such a device shall be referred to herein as a dual ZBD device.

First, it has been found that applying an electric field of a specific polarity on a dual ZBD cell generates an electric field that is directed into one surface and away from the other surface. Thus, the electric field is used to latch one surface from state a to B (say from a low slope, fault state to a high slope, continuous state), while the same field tends to latch the opposite surface from B to a.

If the two surfaces of the dual ZBD device are identical, the a-to-B and B-to-a transitions of the two surfaces will be identical, and thus the applied field will always tend to latch the device to either of the mixed states AB or BA. In other words, both surfaces will transition at the same applied voltage (negative or positive) and therefore only a mixed state can be selected.

It has been found that a first improved dual ZBD can be produced by constructing a device having the same grating on both surfaces, but arranging each surface so that it has a higher threshold energy (τ V) from a low tilt (e.g., state a) to a high tilt state (e.g., state B) than the opposite transition (B to a). In other words, the transition from a to B occurs at a first voltage magnitude (but different voltage polarity) for both surfaces, while the transition from B to a occurs at a second voltage magnitude (but different voltage polarity) for both surfaces. These so-called asymmetries provide an independent degree of control over each surface transition.

Fig. 25 shows the measured electro-optic response of a dual ZBD device with asymmetric switching. The curve 221A represents the transition from the high inclination state (state B) to the low inclination state (state a) at the first surface (S1), while the curve 222B represents the transition from the low inclination state (state a) to the high inclination state (state B) at the second surface (S2). Curve 221B represents the transition from the low tilt state (state a) to the high tilt state (state B) at the first surface, while curve 222A represents the transition from the high tilt state (state B) to the low tilt state (state a) at the second surface. The dashed line represents the start of the transition and the solid line represents full latch-up. Due to the equivalence of the mixed states AB and BA, the cell has three different optical transmission states.

Latching pulses were measured for the bipolar pulses, the latching defined in each case using trailing pulses. The transition results, graphically illustrated in fig. 25, are summarized in table 11 using a data signal of ± 3V applied to the column for a 750 μ s pulse.

TABLE 11 results for double ZBD units

Transformation of	Turn-on voltage	Completion voltage
			S2＝B to A	-15.2	-15.8
S1＝A to B	-12.6	-13.4
			S2＝A to B	12.6	13.4
S1＝B to A	15.2	15.8

As an example, consider the use of an addressing scheme used in the prior art to address the dual ZBD device described with reference to fig. 22. The first pulse of +20V applied to the addressed row ensures that S1 latches to state A and S2 latches to state B (i.e., state AB). Such as blanking pulses are typically applied one or more lines ahead of an appropriate addressing signal. Regardless of the data applied, the +20V amplitude is high enough for blanking to BA. This allows some of the previous row of data to be applied to the blanking pulse at the same time.

After blanking, the line of interest is ready to be addressed. The first pulse of the addressing sequence should be of opposite polarity to blanking and centered between the asymmetric switching energies. In this example, a pulse of-14V is applied. When the data is +3V, this latches S1 to the A state and latches S2 to state B because the resultant-17V is higher than two transitions, but leaves both surfaces unchanged for negative data (-11V resultant).

The polarity is reversed and the amplitude is reduced at the end of the addressing sequence so that the data causes the low threshold surface to latch or unlatch, but leaves the high threshold surface unaffected. In this example, +11V is applied. When the data is +3V, the voltage drop across the cell is only +8V and the pixel does not change (AB or BA from the first pulse). If the data is-3V, +14V results in latch S2 to state B and the pixel is AB or BB. However, if the pixel is in state AB from the first pulse, it will remain so even after the second pulse. State AA has not yet been achieved. This addressing sequence is summarized in table 12, where the first letter corresponds to S1, the second letter corresponds to S2, and the bold letters indicate errors. It can be seen that any attempt to latch S2 to the desired A state will inevitably latch S1 to state B.

TABLE 12 example of Prior Art addressing sequences applied to Dual ZBD

Ideal final state	Blanking (+)	Data 1	-V1	Data 2	+V2
						BB	AB	+	BA	-	BB

AB	AB	-	AB	-	AB
						BA	AB	+	BA	+	BA
AA	AB	-	AB	+	AB

The above-described multi-scan technique can be applied to dual ZBD when the two surfaces have different latch-up thresholds, regardless of the tilt produced in the low pre-tilt state. It is then possible to address the device so that surfaces with a high threshold are selectively latched in the first scan, while surfaces with a low threshold are selectively latched in the second scan.

The latching energy of a bistable grating surface can be changed by changing the grating shape (e.g., changing the pitch to depth ratio, mark to space ratio, or asymmetry) or surface characteristics (e.g., surface energy). Providing different top and bottom surfaces results in a wider addressing window where the selection of the ideal state is possible independent of changes or variations in conditions. In such a case, the bistable arrangement of each surface may be a differently shaped grating, but different grating materials may be used for both surfaces. The difference in the dielectric constants of the two surfaces results in different electric field distributions on the surfaces (even for the same grid shape), thereby creating different thresholds. Alternatively, the grid may be covered with a different material, thereby changing the switching threshold due to the difference in surface energy.

A dual ZBD device can thus be constructed in which the threshold voltage of the transitions on the first surface is different from the threshold voltage of similar transitions on the second surface. This may even be achieved with top and bottom surfaces having equally small alignment properties because of the field reversals for the top and bottom surfaces. In other words, when an asymmetric transition is used, an improved window of operation results, but the polarities are reversed (i.e., a to B is lower than B to a for one surface, and vice versa for the other transition).

As an example, consider the selection of conditions AA and BB, where the first letter represents a high threshold surface state and the second letter represents a low threshold surface state. The use of multiple scan addressing requires high threshold surface first latching if desired. The first pulse applied to selectively latch the high threshold surface will always latch the low threshold surface, resulting in a transient mixing state. The first pulse may be followed by a second pulse that may selectively (i.e., according to the data) latch the low threshold surface without affecting the state of the high threshold surface.

The use of two scans to separately address the top and bottom surfaces allows all four states (AA, AB, BA and BB) to be differentially selected, as shown in table 13. In this example, | V1| > | V2|, + Vd data pulses latch to AB, while-Vd pulses latch to BA. In each case, the first letter in table 13 represents a high threshold surface and the second letter represents a low threshold surface. It is possible that the negative and positive thresholds are reversed, but the same basic principles will still apply.

Table 13: addressing sequence of a double ZBD according to the invention

Initial state

Ideal final state

Blanking (-)

Data 1

+V1

Data 2

-V2

BB

Aa

BA

-

AB

+

AA

BB

Ba

BA

+

BB

+

BA

BB

AB

BA

-

AB

-

AB

BB

BB

BA

+

BB

-

BB

AA

Aa

BA

-

AB

+

AA

AA

Ba

BA

+

BB

+

BA

AA

AB

BA

-

AB

-

AB

AA

BB

BA

+

BB

-

BB

BA

Aa

BA

-

AB

+

AA

BA

Ba

BA

+

BB

+

BA

BA

AB

BA

-

AB

-

AB

BA

BB

BA

+

BB

-

BB

AB

Aa

BA

-

AB

+

AA

AB

Ba

BA

+

BB

+

BA

AB

AB

BA

-

AB

-

AB

AB

BB

BA

+

BB

-

BB

Referring to fig. 26, an addressing sequence for a dual ZBD according to the present invention is illustrated.

Fig. 26a shows a ZBD cell comprising a nematic liquid crystal layer 230 comprised between first and second bonded glass walls 232 and 234. First and second electrodes 236 and 238 are applied to the inner surfaces of the first and second bonded glass walls 232 and 234, respectively. The liquid crystal cell in fig. 26a can be of any initial configuration; for example, a mixture of different optical states is shown.

The first alignment surface is applied to the first electrode 236 and the second alignment surface 242 is applied to the second electrode 238. Each alignment surface comprises a surface relief structure (e.g. a grid) which is capable of giving two stable alignment conditions to the nematic liquid crystal material in its vicinity. However, the first bank of surfaces is used to provide a latch between two bistable surface states at a higher voltage threshold than the second surface.

Fig. 26b shows the orientation of the ZBD cell after blanking with a high negative pulse. This forms a mixed state (i.e., AB).

A positive gate pulse is then used to apply the first scan. If the negative (i.e., select) data pulse is merged with the positive strobe, the resultant pulse is sufficient to latch the high and low threshold surfaces; thereby forming a mixed state BA shown in fig. 26 c. If the positive (i.e., non-select) data pulse is merged with the positive strobe pulse, the resultant pulse is insufficient to latch on the high threshold surface, but will latch on the low threshold surface; this results in the state AA shown in fig. 26 d. The first scan thus indiscriminately latches on the low threshold surface and selectively latches on the high threshold surface.

Once the first scan is complete, the second scan is applied with a negative gate pulse of lower amplitude and duration than the positive gate pulse of the first scan. The second scan is used to selectively latch the low threshold surface but not the high threshold surface.

If the BA state of fig. 26c is selected during the first scan, the resultant pulse generated during the second scan will latch the low threshold surface to the state shown in fig. 26e if a positive (select) data voltage is applied. The non-selected data pulse produces the BA state of fig. 26c, which is maintained in fig. 26 f.

If the AA state of fig. 26d is selected again for the first scan, the resultant pulse generated during the second scan will latch the low threshold surface to the state shown in fig. 26 if a positive (select) data voltage is applied. The application of the non-selected data pulse produces the AA state shown in fig. 26d, which is maintained in fig. 26g as shown.

In this way, multiple scans allow the state of both surfaces of the device to be easily selected. In other words, states AA, BB, AB or BA may be selected as desired. It should be noted that although fig. 26 shows initial blanking to state AB, it is also possible to use this technique after the device has blanked to BA. This is depicted in fig. 27.

Fig. 27a shows a liquid crystal material of a hybrid structure. After application of the positive blanking pulse, the mixed state BA of fig. 27b is formed. The first scan can form the BB state of fig. 27c or the AB state of fig. 27 d. This can be maintained (fig. 27e) or the BA state of fig. 27f can be selected if the BB state is selected at the first scan. This can be maintained (fig. 27h) or the AA state of fig. 27g can be selected if the AB state is selected at the first scan.

Those skilled in the art will appreciate that the dual ZBD device can be used in various optical configurations known to those skilled in the art. It should be noted that good optical response is obtained when state a of both surfaces has zero tilt and state B has a 90 ° tilt (i.e. parallel to the surface material). For example, two polarizers or one polarizer can be used to create a transmissive device, and one reflector can be used to provide a reflective device. The optical characteristics can also be changed with a compensation film, a color filter, or the like. The double ZBD alignment gives good viewing angle characteristics for the vertical and twisted nematic states.

Referring to fig. 28, four parts of a dual ZBD device are shown. The device comprises a first cell wall 250 and a second cell wall 252 which confine a layer 254 of nematic liquid crystal material. A first row electrode 256 and a second row electrode 258 are provided on the inner surface of the first cell wall 250. A first column electrode 260 and a second column electrode 262 are provided on the inner surface of the second cell wall 252. A first surface alignment grating 264 is provided to align the liquid crystal material at the first cell walls 250 and a second alignment grating 266 is provided to align the liquid crystal material at the second cell walls 252. The groove directions of the first and second grids are orthogonal. A pair of polarizers 268 is also provided; a polarizer is placed on one side of the cell and arranged so that their optical axes are orthogonal and along the groove direction of the respective surface grids. A backlight 270 is also provided.

Thus, the device of fig. 28 comprises four separate electrically addressable areas. The liquid crystal in the first electrically addressable region 270 (defined by the overlap of the second row electrode 258 and the second column electrode 262) is shown to latch to the BB state and provide the black state. The liquid crystal in the second electrically addressable region 271 (defined by the overlap of the first row electrode 256 and the second column electrode 262) is shown in the BB state and provides a white state.

The a-state of the second alignment grating is used to give a higher pretilt than the a-state of the first alignment grating. Thus, the third electrically addressable region 274 (defined by the overlap of the second row electrode 258 and the first column electrode 260) provides a light gray level when in the AB state. This should be compared to the fourth electrically addressable area 274 (defined by the overlap of the first row electrode 256 and the first column electrode 260) which provides a light gray state when in the BA state.

Thus, it is possible that the transmission difference between AB and BA represents four transmission levels, as described above. This arrangement can provide a satisfactory viewing angle if the optical system is carefully selected; note that the zero tilt, three-state devices AA, AB ═ BA, BB have perfect LCD optics.

It has thus been shown that it is possible to use a top bistable alignment surface on both inner surfaces of an LCD. Designing the surfaces to give different transition thresholds for the two surfaces allows addressing three or four states respectively. Preferably the device uses zenithal bistable grating surfaces with the grating axes aligned at substantially 90 to each other. It is secondly preferred that the low tilt states of the two surfaces are substantially different (although the pretilt from the average surface plane should be below 60 deg.) and that the high tilt states are both in the pretilt range 88 deg. to 90 deg.. Furthermore, it is described how an electronic signal can be provided to allow (at least) independent latching of the device to both surfaces low tilt or both surfaces high tilt.

Although the described dual ZBD device is shown with a periodic surface alignment grid, a surface of the type described in WO01/40853 may be used as one or both of the top bistable alignment layers. In such an alignment layer, the surface alignment of the low tilt state greatly changes from one point on the surface to another point. Examples of such surfaces include vertical double gratings, grating grids or other such gratings or pseudo-random surface features (posts or blind holes) having a range of sizes, shapes and spacing that give the zenithal bistability.

It should also be noted that the two scans that transition the two surfaces can be combined with multiple scans to address different areas across the display. In other words, adjacent dual ZBD regions may have different thresholds. This can reduce the data voltage or reduce the number of electrodes/drivers, as described above.

A pi cell device can also be provided.

Referring to fig. 29, the operation principle of the pi cell of the related art is explained. The pi-cell device comprises a layer 2 of liquid crystal material contained between a pair of cell walls 4. The walls include electrode structures and each wall is pre-treated so that liquid crystals in contact with the wall are aligned in a single or particular direction.

In the absence of an applied voltage, the liquid crystal material 2 adopts a splayed configuration as shown in figure 1a, in which the liquid crystal molecules in the centre of the device are substantially parallel to the cell walls 4. The center of the device represents a plane parallel to the cell walls and approximately equidistant between them. A higher voltage than a certain value is applied to allow the liquid crystal material to adopt a first bent (or un-splayed) state after a certain time as shown in fig. 1 b.

In the first bend state, the liquid crystal molecules in the center of the liquid crystal layer are substantially perpendicular to the cell walls 4. The first bend state remains after removal of the applied field and may last for several second periods or longer. Application of a higher voltage causes the formation of the second curved (or non-splayed) state shown in figure 1c, due to the coupling of the electric field with the positive dielectric anisotropy of the liquid crystal material and the reorientation of the director perpendicular to the surface. In the second bend state, the liquid crystal director remains substantially perpendicular to the cell wall 4 at the cell midpoint, and all of the remaining liquid crystal material of the cell (in principle the regions near each surface, which are controlled by the anchoring effect of the surface) is also forced substantially perpendicular to the cell wall.

The surface of the pi-cell is designed to give a pre-tilt of the liquid crystal director, which is typically between 5 deg. and 30 deg.. The surface alignment directions are typically arranged in substantially opposite directions. However, it is possible to produce the desired bend state with parallel or near parallel surface directions, with liquid crystal mixtures and device cell gaps having appropriate spontaneous twist (i.e. with a specific pitch).

The pi-cell device provides optical contrast when transitioning between a first curved (low voltage) state shown in fig. 29b and a second (high voltage) curved state shown in fig. 29 c. Moreover, a very fast (about 1-2 milliseconds at 25 ℃ in a typical cell gap of about 4 μm) transition between the first and second curved states can be achieved. However, removing the applied voltage for a long period of time will cause the liquid crystal material to release back to the energetically favorable splayed configuration of fig. 29 a. The transition from the splayed state to the un-splayed (bent) state is much slower than the transition between the bent states, typically requiring 30 seconds or more.

A particular disadvantage of the known pi-cell structures is that the first bending state is nucleated and stabilized in subsequent operations. It has been found that high pressures may be required to initially transition from the splayed state to the bent (i.e., non-splayed) state. In certain devices, such as those where each pixel is driven by a Thin Film Transistor (TFT), the voltage required to transition from the splay state to the bend state may be difficult to generate and add additional cost.

Koma et al (1999) Proceedings of the SID, p28-31 found that the curved state was nucleated at a specific "starting point" within each pixel, often associated with random irregularities such as surface or electrode roughness. Devices without such nucleation sites are not readily formed into the desired curved state. Attempts have also been made to provide a bend state using a high voltage of sufficient duration and then to stabilize the bend state with a polymer stabilization network. This requires the addition of UV-correctable monomers to the liquid crystal and the monomers are cross-linked after the nucleation signal is applied to form the desired curved state. But this has been found to cause ionic contamination of the liquid crystal material and significantly increase processing and production costs.

It has also been found that a particular problem arises when using pixellated (pixellated) pi-cell devices. In such devices it is not possible to apply sufficient voltage to the interpixel gap regions, especially for the midpoints between adjacent pixels. Thus, the liquid crystal material in the inter-pixel gap is maintained in a splayed state. The presence of the splay state in the inter-pixel gap region tends to promote nucleation of the splay state in any pixel that has transitioned to the bend state. US6512569 describes how a patterned inter-pixel gap is used which promotes nucleation of a curved state in the region of the inter-pixel gap. Just as the curved state does not form when the device has no nucleation sites, if there are no nucleation sites for the low energy splay state, the device transitioning to the curved state will remain in that state. Changing the alignment characteristics in the inter-pixel gaps requires precise alignment of the patterned alignment areas with the inter-pixel gaps of the electrode structures.

Referring to fig. 30, a bistable pi-cell device in accordance with the present invention is shown. The device comprises a layer 500 of liquid crystal material sandwiched between a first cell wall 502 and a second cell wall 504.

The inner surface of the first cell wall 502 has one surface profile (not shown) giving the liquid crystal material two stable alignment structures with different pretilt. The inner surface of the second cell wall is subjected to a monostable surface treatment (e.g. silica, a suitably designed surface-embossing structure or a suitably prepared polymer surface such as a rubbed polymer or a photo-aligned polymer) which imparts a pre-tilt of less than 45 ° to the liquid crystal material in its vicinity. Preferably the pre-tilt of the monostable surface is greater than 5 ° and more preferably greater than 10 °.

In operation, the liquid crystal latch near the first cell wall latches between a low pretilt (failure) state shown in fig. 30a and a high pretilt (continuous) state shown in fig. 30 b. It can be seen that the failure state is a bent state, and the continuous state is a mixed state in which the splay component is small. Thus, the transition speed is high (typically less than 5 milliseconds) due to the device latching between the bent state and the second substantially non-splayed state.

Preferably, the low tilt, failure state pretilt of the top bistable surface is higher than the pretilt on the opposite surface shown in FIG. 31. In this case, if an unwanted splayed state is formed, the splay occurs closer to the zenithal bistable surface. A pulse is applied to latch the material adjacent the bi-stable surface to a high tilt continuum, causing the splay to move closer to the grating surface. This splaying then quickly disappears when the surface latches to a high tilt state.

This should be compared to the prior art pi-cell device shown in fig. 22, where both surfaces are monostable, and the ZBD device shown in fig. 33, where the pre-tilt of the top and bottom surfaces is the same and where the transition to the curved state occurs without surface transition. In these cases, the transition from splay to bend takes more time than when using a surface-mediated transition in accordance with the present invention.

In this way, the device is designed to provide surface latching mediated transformation to a curved state. The use of such surface transitions allows the transition from the splay to the bend state to occur at a time that is orders of magnitude faster than is possible using conventional technology pi-cell devices.

For applications where the optical contrast is maintained over a long period of time without the need for addressing (i.e. image storage), the device is designed to eliminate the formation of the splay state. This is done by ensuring that there are no nucleation points for the splay state and/or that the energy of the bend state is relatively low (e.g., a relatively high pre-tilt is used on both surfaces).

Other applications, such as those requiring fast update speed and regular updates, the device can be designed to give other important characteristics, such as wide viewing angle, high transmission/reflection coefficient, high contrast and good (saturated) white state. This means that the splayed state is much lower in energy than the bent state and the device releases to this state after a period of time, which is of similar (but more) duration than the frame update period. For example, the pretilt may be as low as 10 ° and may be as low as 5 ° on both surfaces.

Referring to fig. 34, a second pi-cell device in accordance with the present invention is shown. The pi-cell device includes a second cell wall 502 and a second cell wall 506 sandwiching a layer of nematic liquid crystal material 500. The surface profiles of the first cell wall 502 and the second cell wall 506 can give two aligned states with different pretilt and can latch between them. In other words, a so-called double ZBD device is formed. However, unlike the double ZBD device described above, the fault condition (i.e., the condition shown in fig. 34 a) is arranged to form a substantially non-splayed (bent) condition.

To enable latching between the two substantially non-splayed states, the latching thresholds on the first and second cell walls are arranged differently than described above. This allows the multi-scan technique described above to be used for latching between the two structures. Because latching occurs between the two substantially non-splayed states, the transition speed is greatly increased compared to the speed obtained when latching to/from the splayed state.

Ideally, the apparatus is arranged so that the vertical (continuous) state of FIG. 34b is more aggressive than any fault condition. This is achieved by careful selection of the surface profile of the alignment surface. In a pixelated device, this also means that the inter-pixel gap regions will tend to form the continuous state of fig. 34 b. This helps to ensure that any liquid crystal material that latches from the vertical state of FIG. 34b adopts the substantially un-splayed state of FIG. 34a, rather than the splayed state. This should be contrasted with conventional monostable pi-cell devices, in which the interpixel gap region relaxes to a splayed state and thus nucleates growth in the splayed state in the pixel region.

There are many bistable surfaces whose characteristics can be varied to ensure that upon first cooling a high tilt state is spontaneously formed. Instead of using a shallow grating (e.g., low amplitude and/or long pitch), such a surface may be provided with rounded features (e.g., a blazed sinusoidal grating) or a relatively low anchoring energy.

It is also possible to arrange the two surfaces to be monostable, with a single surface having substantially weaker top anchoring energy, while maintaining a low tilt state when deformed by an applied electric field. A blanking pulse is then applied at the beginning of each addressing sequence which causes anchoring discontinuities with the alignment director perpendicular to said weakly anchored surface. In this way, the curved state transitions from the low tilt to the high tilt state again mediated by the surface transition. However, one disadvantage of such a device is that the alignment characteristics of the cells need to be carefully arranged to give the two required states (e.g. stable states with different twist).

While bi-stable surfaces are described above, it will be appreciated that surfaces comprising three or more states (e.g., surfaces of the type described in W099/34251) can be used. In this case an intermediate state will be formed which can for example allow grey scales to be realized.

Referring to FIG. 35, a number of substantially non-splayed states are shown.

These states include homeotropic alignment (VAN), in which both surfaces are substantially vertically aligned (i.e., pre-tilt greater than 70 °, typically greater than 85 °). This is a special case because the 1D director distribution contains neither splay nor bend. A Hybrid Aligned Nematic (HAN) is another non-splayed state in which one surface is highly inclined (typically greater than 70 °) and one surface is less inclined (typically between 0 ° and 45 °).

The bent state is also a non-splayed state, and B1, B2, and BT are bent states. A curved state can be defined as a state in which the director at some point within the cell (i.e. between the two surfaces) is tilted more than the pre-tilt at the two surfaces. There is usually a point between the walls where the director is perpendicular to the cell plane and in this case the direction of curvature changes on both sides. In B1, the pretilt is the same for both surfaces, and the tilt is substantially 90 ° near the center of the device. In B1, the pretilt between the two surfaces is very different, and the tilt in the cell body near the higher and tilted surfaces is substantially 90 °. In the twisted example BT, the director includes a twisted deformation from one surface to the other, and the director at some point within the cell (in this case near the center of the cell) is perpendicular to the cell walls. The transition from HAN to B1 will typically take 2 ms.

Referring to fig. 36, a number of splayed states are shown. In each of these cases, the director within the cell body includes a point of tilt equal to or less than the higher pretilt on one cell wall. Note that S4 is the transient state that may occur when an applied field is applied to the S1 state. Although the director may be 90 deg. at a point within the cell (i.e. the director is aligned parallel to the applied field) with the same direction of curvature at both sides of that point. Furthermore, there is a point within the cell body where the director is substantially splayed (close to the bottom surface) and has a lower tilt than both alignment walls. ST is an example of a splay-twist state in which the director within the cell is equal to or lower than the higher of the two alignment surface pretilt.

Referring to fig. 37, the theoretical energy of the continuous and fault state of a blazed sinusoidal grating surface comes from US 6249332. The shaded area represents an exemplary range of grid shapes that give an energy barrier between continuous and failed surface states and the surface remains bistable. It is possible to design the grating to give a spontaneous formation of the first cooled C-state, for example by using a groove depth to pitch ratio to the left of the intersection point but in the bistable range.

A device of the invention also operates as a monostable device in which surface transitions are used at the beginning of a frame sequence to ensure that a curved state is achieved. This improves the need for high blocking voltages, nucleation sites for bending states, and/or long switching periods from one ramp to bend.

The device may initially be in a ramp state when transitioning to constant update mode. Before each frame addressing, a series of pulses may be applied to latch the device into the desired initial substantially un-skewed state, possibly using RMS multiplexing (Alt-Pleshko, MLA, 4-row addressing, etc. -standard TN or STN methods) or TFT addressing. Preferably the initial state is a curved state. The BAN state is caused, for example, when in a splayed state and an initial DC pulse latches the top bistable surface to the C state. The director in the middle of the cell quickly transitions to vertical. The subsequent latching back to the failure state causes a bending state. If the curved state has been reached within a period of typically 1 millisecond or faster, the curved state can be modulated in a similar manner to a standard pi cell arrangement (i.e. between the states of fig. 29b and 29 c) by applying an electric field.

Alternatively, a symmetrical grid can be used which has a failure state with two high tilts but opposite pretilts. The anchored transition between these symmetric states enables a direct transition from the splayed energy to the bent state.

Alternatively, one weak anchoring surface may be vertically transitioned and then the tilt direction reversed (by appropriate balancing of pitch and pre-tilt) to the curved state. In this case, the shape of the trailing portion of the addressing pulse is changed to selectively latch into the desired bent state rather than the splayed state. This is schematically shown in fig. 38.

Although the examples described herein are primarily directed to ZBD type devices, it should be apparent that the present invention is also applicable to any of a number of different display technologies, including all of the prior art display technologies described above. It should also be noted that the term "display" does not necessarily mean that the image writing is viewable by the user. One display may comprise a spatial light modulator or the like, in which light is amplitude and/or phase modulated.

For example, referring to fig. 39, a droplet-based display 800 is shown. The display includes a pair of cell walls 802 with a layer of material 804 therebetween. The material layer 804 includes a matrix medium 806 containing a first droplet 808 and a second droplet 810. The cell wall 802 is typically a glass plate carrying ITO electrodes 812 and having a black background layer 814 on the lower plate (or the lower plate may be formed of some other black conductive electrode structure).

The droplet may be formed of a bistable material that reflects some wavelengths in one state and transmits those wavelengths in a second stable state. The apparatus can be used to give two droplets 808 and 810 of different sizes so that the threshold for switching one droplet will be different from the other droplets. More than two types of droplets may be used and the droplet sizes may be the same or different as shown.

An example of one such device would be made using cholesteric liquid crystals, for example in the manner of Yang et al, Proceedings of SID XXXIV, Book2, pp959-961 (2003). The droplet will be large enough to give two stable states, a selectively reflective substantially planar (Granjean) state, or a forward scattering multi-domain sampling (i.e. focal conic (foca 1-cosmetic-like)), preferably greater than 15 μm. In the planar state, the larger droplet 808 will reflect, say, red light, but transmit blue and green light. In other states, the larger droplet 808 will transmit all wavelengths. The smaller droplet 810 will have a lower threshold than the larger droplet 808 and reflect, say, a green wavelength in the planar state.

The device may contain a further droplet C (not shown) which in the planar state has a lower reflection wavelength. The droplet form is easily formed separately in an emulsion and then mixed in a matrix material (contrary to prior art methods such as those of Yang et al).

To provide a color device, the three types of droplets are mixed approximately equally, but the color balance and off-axis reflectance can be enhanced with other mixing ratios. Preferably, the substrate is made of a photo-polymerized or similar cross-linkable (cross-linkable) material such that the layer forms a rigid plastic layer. One way to achieve different thresholds for different droplets is to ensure that the cholesteric compound or mixture within each droplet has a different dielectric anisotropy. Other methods include using droplets of different sizes, using aspheric droplets with different eccentricities or arrangements, or by using different surfactants or wall materials for each droplet to alter the interaction between the liquid crystal and the droplet wall.

According to the invention, three scans can be applied to lock out droplet types a, B and C of different threshold values. On the first scan, the highest threshold droplet a latches to the reflective planar state or to the dispersed focal conic state. Since droplets B and C do not reflect red light, if in the scattering state, red light is eventually absorbed by black at the back electrode when droplet a is in the scattering structure. In the second scan, droplet B is selected by the data to reflect green light or scatter green light, and not reflect (and preferably scatter almost no) red and blue light. A third scan will select droplet C to be either blue reflecting or blue scattering. In this way, a full color display can be made without the poor reflectivity problems associated with spatially divided color plates or the cost conditioning problems associated with multiple stacks.

Or the bi-stable medium may comprise charged particles in which the optical properties differ depending on the particle orientation (see, for example, Hattori et al (2003) proc.sid, pp 846-849). In such a system, the charge density of the droplet, the droplet size, shape and interface characteristics may be controlled to give different thresholds. Such particles will typically cause light absorption, but will allow different colors to mix.

Referring to fig. 40, the present invention may also be applied to an apparatus including a stack having two or more boards. A stack device 900 includes a first plate 902, a second plate 904, and a third plate 906. Each plate is used to modulate light within a particular wavelength range.

The row and column electrodes of each plate are connected to a set of drivers. In other words, each column driver 908 is electrically connected to a column of each plate, and each row driver 910 is electrically connected to a row of each plate. The three plates are arranged to have different latching thresholds. For field effect devices, one simple way to change the latch-up characteristics is to change the cell gap of the different plates. The application of three scans in accordance with the techniques described above thus enables a single set of driver circuits to latch each plate to a desired state. In this way, a color display can be constructed with a stack of three plates, with reduced cost of drivers.

Claims (41)

1. A device having at least two stable structures, comprising first and second cell walls and a layer of material disposed between said first and second cell walls, said layer of material being capable of adopting at least two stable structures and of being electrically latched between the at least two stable structures, said layer of material comprising one or more separate electrically addressable regions, each separate electrically addressable region comprising a first region set to have a latching threshold in a first range and a second region set to have a latching threshold in a second range, and said device further comprising addressing means to write each of said electrically addressable regions with a voltage pulse to selectively latch said layer of material as required, wherein the addressing means writes to each of said one or more separate electrically addressable regions using at least two latching scans, a first latching scan of said latching scans being used to selectively latch material having said latching threshold in the first range to a single one A second latching scan of the latching scans for selectively latching material having the latching threshold within a second range to a stable structure, wherein the first latching scan additionally includes a blanking waveform to latch the material to one of the at least two stable structures prior to selectively latching material having a latching threshold within a first range, wherein the first latching scan is applied prior to application of the second latching scan and the second latching scan is insufficient to latch material having a latching threshold within the first range.

2. The apparatus of claim 1, wherein said first latching scan indiscriminately latches material having a latching threshold within said second range.

3. A device according to claim 1 wherein the addressing means applies one or more further latching scans after applying said second latching scan, wherein each further latching scan is for selectively latching material having a latching threshold within a given range but insufficient to latch material having a threshold within the threshold range of any previous scan.

4. A device according to claim 3 wherein each further latching scan indiscriminately latches any material having a latching threshold within a given range of any subsequent latching scan.

5. The apparatus of claim 1, wherein a time-voltage product of the voltage pulse of the first latching sweep is greater than a time-voltage product of the voltage pulse of the second latching sweep.

6. The apparatus of claim 1, wherein the latching of the material is polarity dependent.

7. The apparatus of claim 6, wherein the first latching scan latches material with a latching pulse having a first polarity and the second scan latches material with a latching pulse having a polarity opposite the latching pulse of the first polarity.

8. The apparatus of claim 1, wherein said layer of material comprises one or more additional regions, each of said additional regions having an occlusion threshold within a given range of an additional occlusion scan.

9. The device according to claim 1, wherein the layer of material comprises a plurality of separate electrically addressable regions.

10. A device according to claim 9 wherein the proportion of said layer of material having regions of different latching thresholds is weighted within each separate electrically addressable region.

11. A device according to claim 1, wherein row electrodes are provided on said first cell wall and column electrodes are provided on said second cell wall, thereby providing a matrix of separate electrically addressable areas.

12. A device according to claim 11 wherein said at least first and second latching scans are applied to each separate electrically addressable area by addressing means by applying gating voltage pulses to said row electrodes and data voltage pulses to said column electrodes, said gating and data voltage pulses being used to generate the required resultant voltage pulse at each separate electrically addressable area.

13. A device according to claim 12, wherein the addressing means provides selective or non-selective data voltage pulses for latching or unlatching, respectively.

14. A device according to claim 12 or 13, wherein each row is addressed in turn with said first latching scan and said second latching scan.

15. A device according to claim 12 or 13, wherein each row is addressed in turn with said first latching scan and each subsequent row is addressed in turn with said second latching scan.

16. Apparatus according to claim 12 or 13, wherein the applied data and strobe waveforms are substantially dc balanced.

17. A device according to claim 1 wherein, for each separate electrically addressable area, the addressing means is for latching material having a latching threshold in the second range to the same configuration as material having a latching threshold in the first range.

18. A device according to claim 1 wherein, for each separate electrically addressable region, the addressing means is arranged to be able to selectively latch material having a latching threshold in the second range into a different configuration to material having a latching threshold in the first range.

19. A device according to claim 1 or 12, wherein the selective latching during said first and/or second scan is arranged to partially latch material having a threshold value within said first range or said second range respectively.

20. A device according to claim 19 when dependent on claim 12 wherein a plurality of data voltage pulses are used to provide said partial latch.

21. Apparatus according to claim 1, wherein the apparatus comprises a photosensitive layer such that the latching threshold of said layer of material is variable in response to optical illumination.

22. A device according to claim 1 and additionally comprising one or more colour filter elements.

23. The apparatus of claim 1, capable of adopting two stable configurations and electrically latching between the two stable configurations.

24. The device of claim 1, wherein the layer of material comprises liquid crystal.

25. The device of claim 24, wherein the liquid crystal comprises a nematic liquid crystal material.

26. The apparatus of claim 24, wherein the transition between said two stable structures is mediated by an alignment transition at said first cell wall.

27. A device according to claim 26 wherein the surface of the first cell wall in contact with said layer of liquid crystal material is profiled to provide at least two stable surface alignment structures of liquid crystal material adjacent said first cell wall.

28. A device according to claim 27 wherein the profiled surface of said first cell wall comprises a bistable surface alignment grating structure.

29. A device according to claim 27 wherein the surface of the second cell wall in contact with said layer of liquid crystal material is profiled to provide at least two stable surface alignment structures of liquid crystal material adjacent said second cell wall.

30. A device according to claim 29 wherein the profiled surface of said second cell wall comprises a bistable surface alignment grating structure.

31. A device according to claim 29 wherein the latching threshold between at least two stable surface alignment structures of liquid crystal material at said first cell wall is greater than the latching threshold between at least two stable surface alignment structures of liquid crystal material at said second cell wall.

32. A device according to claim 31 wherein the latching threshold of the liquid crystal material at said first cell wall falls within said first range and the latching threshold of the liquid crystal material at said second cell wall falls within said second range.

33. The apparatus of claim 1, wherein said layer of material comprises an electrophoretic composition.

34. A device according to claim 1 wherein the layer of material comprises droplets of bistable material in a carrier matrix.

35. The apparatus according to claim 34, wherein said droplet is coloured.

36. A device according to claim 34 wherein the bistable material comprises droplets of cholesteric material.

37. A device according to claim 34 wherein the bistable material comprises particles.

38. A device having a layer of material according to claim 1, further comprising one or more further layers of material, each of said further layers of material being disposed between a pair of cell walls and comprising one or more separate electrically addressable regions, wherein each of the one or more separate electrically addressable regions of each of said further layers of material is electrically connected to said addressing means in parallel with one of the electrically addressable regions of said layer of material.

39. The apparatus of claim 38, wherein said layer of material and said one or more additional layers of material are arranged in an optical stack.

40. A method of addressing a display device comprising a frustrating layer of a material capable of adopting at least two stable structures and of being electrically occluded between the at least two stable structures, the frustrating layer of material having one or more separate electrically addressable regions, each separate electrically addressable region comprising a first region arranged to have an occlusion threshold in a first range and a second region arranged to have an occlusion threshold in a second range; the method comprises the following steps:

(a) addressing each separate electrically addressable region of the display device with a first latching scan to selectively latch material having a latching threshold within the first range, and

(b) each separate electrically addressable region of the display device is then addressed with a second latching scan to selectively latch material having a latching threshold within the second range,

wherein the first latching scan indiscriminately latches material having a latching threshold within the second range to one of the at least two stable structures, and the second latching scan is insufficient to latch material having a threshold within the first range.

41. A method according to claim 40, further comprising, after the step of addressing the device with the first and second latching scans, the step of addressing the display device with one or more additional latching scans, each additional latching scan for selectively latching material having a latching threshold within a given energy range, wherein the high energy of the given energy range is lower than the high energy of the energy range of the previous latching scan.