HK1073926B - Thermally enhanced component substrate - Google Patents

Description

Thermally enhanced component substrate

Technical Field

The present invention generally relates to dissipating thermal energy (heat) from a die pad. More particularly, the present invention relates to thermally enhanced substrates that reduce the thermal resistance of the circuit package and integrate thermal dissipation and electrical conductivity into specialized pins.

Background

In order to more efficiently use the area on Printed Wiring Boards (PWBs) and Printed Circuit Boards (PCBs), semiconductor chip manufacturers have moved from larger, more cumbersome interconnect technologies such as pin grid arrays ("PGAs") and perimeter leaded quad flat packages ("QFPs") to smaller components such as ball grid arrays ("BGAs"). Using BGA technology, semiconductor chips are typically interconnected to their supporting substrate using solder connections. However, the weld columns are typically designed to be relatively short to maintain the integrity of the welded structure, which reduces the elastic properties, resulting in: sensitivity to solder cracking is increased due to the difference between the coefficient of thermal expansion ("CTE") of the chip relative to the CTE of the support substrate. Thus, as the die heats up during use, both the die and the substrate expand; when the heat is removed, both the chip and the substrate shrink. The difference between the CTE of the chip and the CTE of the substrate can cause catastrophic deformation.

Accordingly, the ability to dissipate heat generated by the operation of Integrated Circuits (ICs) is a major design concern for the electronics industry. This is emphasized because the density of circuits on IC devices has increased considerably in recent years, and the reliability and performance of these high density circuits is affected by the thermal environment. In addition, size considerations require an increased number of electronic packages to be mounted in a small space, which also greatly increases the need to efficiently dissipate heat from the IC package. As the size of the components of semiconductor chips continues to decrease, the number of chips packaged into a given area will be greater, and the heat dissipated by each of these chips will have a greater impact on the thermal mismatch problem described above.

Furthermore, IC devices are increasingly being used for high power applications. While many early IC chips operated below a few watts, ICs are being designed to operate at around 10 watts, which greatly increases the need for heat generation, as well as efficient heat dissipation.

In some conventional semiconductor packages, heat generated by a semiconductor chip or Integrated Circuit (IC), which is typically mounted on a die pad of a substrate, is dissipated through two pathways. The first is through the external connection terminals of the package and the second is through the surface of the package.

To more effectively dissipate heat, a heat sink may be attached to the package. In a Ball Grid Array (BGA) package including a package resin formed by molding a semiconductor chip with a plastic resin, a heat spreader may be directly attached to the package resin of the package. In this way, heat generated from the chip is conducted to the heat sink via the package, and is dissipated to the outside by convection.

Other approaches to addressing the heat dissipation problem include adding additional thermal balls under the die area. However, this approach requires modification of the package design, and possible wiring changes, and possible modification of the PWB or PCB design. Another approach is to modify the package type and/or reduce the power required. These methods are unsatisfactory because they require changes to the primary design. Bourdelaise et al, U.S. Pat. No.5027191, disclose a die paddle assembly using a cavity down chip with a grid array of pads. The IC chip within the chip holder is mounted against a surface opposite the PWB to which the chip is attached, so that heat from the IC chip is presented to the heat sink along a shorter path to allow for greater heat transfer rates. The improvement in heat transfer rate remains quite limited due to the small gaps typically required on the top surface of the IC chip to allow bond wires to extend from the chip to the connection pads surrounding the chip. The small gap between the IC chip and the flat thermal pad acting as a heat sink greatly reduces the heat transfer rate. Huang et al, in U.S. patent No.6525942, disclose a heat dissipating Ball Grid Array (BGA) package. The heat dissipating BGA package includes a plurality of first thermal ball pads formed on an underside of the substrate in an area covered by the chip. The BGA package also includes a plurality of second thermal ball pads or heat dissipation rings external to the first thermal ball pads. A plurality of signal ball pads are formed outside the second thermal ball pad or the heat dissipation ring. The second thermal ball pad or the heat dissipation ring is connected to the first thermal ball pad through a conductive wire. A plurality of first thermal balls are attached to the respective first thermal ball pads, and signal balls are attached to the respective signal ball pads. The first thermal ball and the signal ball are in contact with corresponding contacts on the printed circuit board. A plurality of second thermal balls are attached to a surface of the respective second thermal ball pad or heat dissipation ring. The heat dissipation disclosed by Huang is limited because the die pads only conduct thermal energy through the vias to the first and second thermal balls.

Chao et al, in U.S. patent No.6483187, disclose a heat diffusion substrate that includes a metal heat spreader having a surface with a cavity adapted to support a die. The surface also includes a ground ring disposed at a periphery of the cavity, a substrate support surface surrounding the periphery of the ground ring, a plurality of ground pads disposed at the periphery of the substrate support surface, and a plurality of ground pads disposed on and protruding from the substrate support surface. The substrate also has a plurality of vias, a plurality of mounting pads, and a plurality of ball pads. Chao discloses performing a thickness reduction process on one surface of a metal heat spreader to reduce the thickness of that portion of the surface. The thickness reduction process is achieved by a stamping process, or by multiple photolithography and half-etching. One disadvantage of varying the thickness of the heat spreader to dissipate heat is that it requires special manufacturing steps to produce the desired heat spreader shape.

Due to the above-mentioned limitations and difficulties, there remains a need in the art of IC packaging technology to address these difficulties and limitations. In particular, there is a need in the art to provide improved heat dissipation for high power ICs while increasing the integration of the package.

Disclosure of Invention

The foregoing and other problems are overcome, and other advantages are realized, in accordance with the preferred embodiments of these teachings.

Accordingly, one embodiment of the present invention is directed to an integrated circuit package and a method of manufacturing the same. The package includes a substrate material and a die pad area having dimensions suitable for mounting an integrated circuit. A plurality of thermally and electrically conductive ball pads are disposed on the first surface of the substrate material outside the die pad area and a plurality of vias are disposed on associated ball pads. These vias provide thermal and electrical conductivity from the first surface of the substrate material to the second surface of the substrate material. A plurality of electrically and thermally conductive protrusions radiate outwardly from the die pad area such that each protrusion covers an associated ball pad, and each protrusion conducts thermal energy from the first surface of the substrate material to the second surface of the substrate material through one or more vias and also conducts electrical signals to the associated ball pad.

Another embodiment of the invention is directed to an integrated circuit package and method as described above, and further comprising a plurality of thermal balls disposed on the second or bottom surface of the substrate material and outside the die pad area. One or more thermal balls are in thermal contact with an associated via, and the thermal balls conduct an electrical signal.

Yet another embodiment of the present invention is directed to an integrated circuit package and method as described above, further comprising a printed wiring board on which the substrate is mounted. Thermal energy is dissipated from the die pad area to the printed wiring board through the thermal balls.

Drawings

The foregoing and other aspects of these teachings are made more evident in the following detailed description of the preferred embodiments, when read in conjunction with the attached drawing figures, wherein:

FIG. 1 shows an IC package mounted on a printed circuit board;

FIG. 2 shows a conventional substrate from the solder ball side;

FIG. 3 shows a conventional substrate from the upper side;

FIG. 4 shows a substrate according to the present invention from the solder ball side;

FIG. 5 shows a substrate according to the present invention from the upper side;

FIG. 6 shows a side view of the heat transfer path from the die pad to the PWB;

FIG. 7 shows a side view of a thermal ball of the present invention below a heat transfer channel; and

fig. 8-13 illustrate exemplary conductive layer structures of the present invention in the die pad area.

Detailed Description

For integrated circuit packages and MCM components, the present invention addresses the need to minimize thermal resistance from the die to the Printed Circuit Board (PCB) by integrating thermal and electrical functions into the same pins and extending the thermally active area of the package. The invention is particularly useful in applications requiring enhanced thermal pathways from die to solder balls, and particularly in applications where there is no overlap between die and solder balls, for example, peripheral pins without center solder balls in BGA (ball grid array) packages (e.g., Tessera BGA, STLF-and TFBGA, etc.).

The present invention integrates both thermal and electrical functions into the same pin. In particular, I/O pins that do not overlap with the die may be thermally connected to the die by using a thermally conductive element, such as copper, between the pins and the underside of the die. The pin may be under the die, or it may be a peripheral pin. The central thermal ball may also have an electrical function. Thus, one feature of the present invention is that the signal path can be used for heat dissipation, i.e., thermal conduction.

By using multiple conductive elements or protrusions extending from the die area, the small area of the die can be expanded, so that the thermal conduction area becomes wider and the overall thermal resistance of the package is reduced. The shape and size of the conductive elements are a factor of design choice. The particular dimensions of the conductive elements or protrusions are a function of the particular application and are influenced by factors such as circuit parameters, component materials, and environment.

Some advantages of the present invention include: the package has better thermal performance; cheaper and smaller package size since no additional thermal balls are required; easier routing and wider lines/spaces in the PWB (printed wiring board), which reduces the cost of the PWB; without increasing the manufacturing effort or the cost of the material; the thermal effect of die shrinkage is reduced; the thermal resistance of the package is reduced; increased package power; increased package reliability; when the die shrinks, the package does not need to be changed; PWB redesign is not required; less thermal sensitivity; firm assembly; and lower overall cost.

In the present invention, the heat conducting element is integrated in the component when the copper surface of the substrate is formed. The thermal path is created by extending the signal pads/traces underneath the die area to the ball pads. The thermal vias conduct heat directly to the solder balls and PWB. The present invention may be used with single and/or multi-layer substrates.

An epoxy/solder resist coating may be used to isolate electrical contact between the die and the signal.

Fig. 1 shows an IC (integrated circuit) package 10 that includes a substrate 102 and an IC chip 106. The IC package 10 is typically mounted on a PCB or PWB120 via interconnects 118 (a.) (n), where n is any suitable number commensurate with the design of the IC package 10.

The IC chip 106 is typically mounted on the substrate 102 by an epoxy or resin suitable for adhering the IC chip 106 to the die pad area of the substrate 102. Preferably, the material used to adhere the chip 106 to the substrate 102 has acceptable thermal conductivity characteristics. Wires 108(a) · (n) (where n is any suitable number) electrically connect portions of the IC chip 106 to a selected one of the solder ball pads 114 (a.) (n), where n is any suitable number. Solder balls may be mounted on corresponding solder ball pads to electrically connect the wire 108 to another location. The substrate 102 has a first surface 102(a) (chip-facing surface) and a second surface 102(b) (PWB-facing surface).

Fig. 2 shows a view 20 of a conventional substrate from the solder ball side or PWB-facing surface 102 (b). The substrate 102 has a die pad area 123 mounted on the surface 102 (b). The solder ball pads 114(a). -. (n), generally 114, support associated thermally conductive solder balls 142(a), which dissipate thermal energy. The corresponding via, through hole, or hole 126(a) facilitates the dissipation of thermal energy (heat) by providing a passage for the thermal energy through the substrate material 102. One embodiment of the invention is that each solder ball pad 114 may have a corresponding solder ball and via, or the solder ball pad may have no solder ball thereon. As shown in fig. 2, the die pad 123 is thermally insulated from the solder ball pads 114, and thus the solder balls 142, by a thermally insulating material 146. This design reduces the efficiency of removing thermal energy (heat) generated by the IC chip mounted on the die pad area 123.

Fig. 3 shows a view 30 of a conventional substrate 102 from the chip-facing side. The substrate 102 has an upper surface 102(a) on which a die pad region 122 is mounted. Solder ball pads 115 and circuit traces 144 are also shown. Vias, through holes or holes 126 allow thermal energy to be conducted through the substrate 102.

Fig. 4 shows a view 40 of a substrate according to the invention from the solder ball side. Substrate 102 has a PWB-facing surface 102(b) having a first region 133 and a second region 135. The first region 133 includes the die pad region 123 and a first set of thermally conductive elements 111 (a.) (n), where n is any number. The die pad area 123 is adapted to support an IC chip thereon. The first set of thermally conductive elements (generally 111) may be, for example, solder ball pads or metal surface areas. The thermally conductive element 111 is adapted to be connected to a solder ball for heat dissipation or signal transfer. (n) first solder ball pads 111, which may be solder ball pads or metal surface areas, and second heat-conducting elements 113(a). - > may be provided on the PWB-facing surface 102(b), where n is any suitable number.

Solder masks may be used to expose the solder ball pad surfaces, or the solder ball pads 111, 113 may be deposited on the surface 102(b) by chemical deposition, etching, stamping, or other techniques. The first solder ball pads 111 are located near the die pad area 123, which is denoted as area 133, and the second solder ball pads 113(a). -. (n) (113 as a whole) are located further away from the die pad area, in the area denoted by 135. Typically, solder balls, not shown, are mounted on the surfaces of the ball pads 111, 113.

The die pad mounting area 123 is disposed in a first region 133 of the surface 102 (b). A thermally and electrically conductive material, such as copper, is disposed on the substrate. The thermally and electrically conductive material includes conductors or fingers or petals 125 (a.) (n), where n is any suitable number that extends or radiates from the die pad area to include selected thermally conductive elements or solder ball pads. The selected heat conducting element is typically the first heat conducting element 111. Each petal or finger of thermally and electrically conductive material is typically associated with a particular one of the first set of thermally conductive elements (i.e., petal 125(a) contacts thermally conductive element 111(a), petal 125(b) contacts thermally conductive element 111(b), etc.).

The thermally and electrically conductive material 125 is typically formed by etching, stamping, photoresist, chemical vapor deposition, or other techniques. Typically, the plurality of first solder ball pads 111 are in contact with the conductor 125, where the conductor 125 is described herein as a finger, a petal, and an extension. In this manner, the thermally conductive petals 125 provide a path for thermal energy to dissipate from the die pad area 123 to the solder ball pads 111. While it is an embodiment of the present invention that the conductive fingers 125(a) contact the corresponding thermally conductive elements 111(a) and the conductive fingers 125(b) contact the thermally conductive elements 111(b), it is within the scope of the present invention for the petals 125 to use other designs and shapes to dissipate heat through the substrate 102. It is an advantage of the present invention that the electrical signal paths also serve as thermal conduction paths to dissipate or transfer thermal energy from the die pad area to the substrate and/or PWB.

The size of the thermally conductive petals 125 is generally a function of the package structure and can have a variety of shapes. The thermally conductive petals 125 can flare outward and be wider near the solder ball pads 111 than at the center of the die pad area.

Solder balls may be used to connect with contacts on a printed circuit board to form an electrical connection or a thermally conductive joint. The solder balls are typically made of a material including a lead-tin alloy or copper or a copper-based alloy. The first thermal balls may be attached to respective first thermal ball pads, also referred to herein as thermally conductive elements or ball pads 111, and to respective contacts on the printed circuit board. In addition to transferring heat generated by the chip on the die pad area 123 away from the die pad area to the printed circuit board, the solder balls also form an electrical connection between the printed circuit board and the IC chip, which serves as a ground connection or a power point connection. Signal balls may also be attached to the ball pads 111 and corresponding contacts on the printed circuit board to form electrical connections for the transmission of signals, such as input/output signals.

(n) vias or through holes 128(a). -. (n) are provided on the conductors or petals 125 and provide a path for thermal energy and electrical current to pass through the substrate 102, where n is any suitable number. Typically, each passage 128 is associated with a respective petal (i.e., petal 125(a) has passages 128(a), etc.). Additional or second vias or through holes, designated 130(a). · (n), are provided on the second region 135 of the substrate 102. Typically, each second via 130 is associated with a respective one of the second set of thermally conductive elements or ball pads 113 (i.e., conductive element 113(a) has vias 130(a), etc.). The ball pad 113 is distinguished from the ball pad 111 because the ball pad 111 is associated with a conductive bump, while the ball pad 113 is not associated with a conductive bump.

(n) insulating members 141 (a.) electrically and thermally insulate petals 125 from each other, where n is any suitable number. The insulating material 141 may be applied by a masking layer such as photoresist or other deposition technique that deposits the insulating material on the desired areas of the substrate material. A centrally disposed thermal ball 138 may be positioned on the die pad area 123 to provide a thermal and conductive path for thermal energy (heat) and current, respectively.

Fig. 5 shows a view 50 of a substrate 102 according to the invention from the top side. The surface 102(a) has a die pad region 122 with fingers or petals or conductors 124 (a. (n) (collectively 124) radiating away from the die pad region 122 so that each finger or petal 124 contacts a respective one of the first set of thermally conductive elements 110 (a.) (n) (also referred to herein as a solder ball pad, a thermal ball pad, or a thermal pad). (the die pad region 122 shown in fig. 5 is a die pad on surface 102(a) and is similar in size to the die pad region 123 of surface 102(b) as shown in fig. 4. furthermore, the petals 124 shown in fig. 5 may have similar dimensions to the petals 125 shown in fig. 4.) the petals 124 enhance heat dissipation from the die pad region 122 to the solder ball pads 110.

A second set of thermally conductive elements (also referred to herein as solder ball pads, thermal ball pads, or thermal balls) 112(a). (n) is located in the second region 134, which is outside of the first region 132. The thermally conductive element 112 may be used to support solder balls for thermal or electrical conduction. Also shown are circuit or pattern lines 144 for conducting electrical current. The substrate 102 typically has an insulating layer laminated. The insulating layer may be formed of glass epoxy (FR-4, FR-5), bismaleimide-triazine (BT) or epoxy. The patterned wire layer may be formed by depositing a conductive material such as copper, nickel, silver, nickel palladium alloy, or alloys thereof. Alternatively, the patterned wire layer may be formed by techniques such as photolithography, etching, plating, or other chemical processes depending on design considerations.

The insulating material forms insulating regions 140(a) · (n) between the petals or fingers 124, thereby thermally and electrically insulating the petals 124 from one another. In particular, as shown in fig. 5, the insulating fingers 140(a) isolate the conductors 124(a) from the conductors 124(b), the insulating fingers 140(b) isolate the conductors 124(b) from the conductors 124(c), and so on. Vias or through holes 130(a). -. (n) are also shown in fig. 5. These vias 130 extend from surface 102(a) to surface 102(b), as shown in fig. 4.

Fig. 6 shows a side view 60 of the heat transfer path from the die pad to the PWB. The substrate 602 has a lower or second surface 602 (b). Chip 606 is mounted on die pad area 623 by adhesive 603. Adhesive 603 may be, for example, glue, epoxy, resin, or any suitable adhesive material that adheres chip 606 to die pad area 623. Interconnects 608(a) and 608(b) are shown as wires, however, other connection means may be used to connect regions of chip 606 to thermal pads or to solder ball pads 611(a) and 611(b), respectively. Vias 626(a). (n) provide a thermal and electrical path from associated pad 611 to one of thermal balls 643(a). (n), where n is any suitable number, typically disposed on lower surface 602 (b). The solder balls 643 (a.) (n) are mounted on the PWB629 using associated bond sites or pads 631 (a.) (n). A thermally conductive protrusion, shown generally as 625, provides a thermal and electrical path from the die pad area 623 to the pad 611.

Fig. 7 shows a side view 70 of the heat transfer path from the die pad area 623 to the PWB 629. Fig. 7 is similar to fig. 6, however, fig. 7 shows additional thermal balls 653(a) and 653(b) located under the die pad area 623. The associated vias 627(a) and 627(b) provide a heat transfer path from the die pad area 623 to the thermal balls 653. Although only two thermal balls 653(a) and 653(b) and their associated vias 627(a) and 627(b) are shown, any suitable number of thermal balls may be used. The other elements shown in fig. 7 have already been described with reference to fig. 6. Fig. 7 shows an area on a substrate below a die pad area.

Fig. 8-13 illustrate the present invention in a typical conductive layer structure in the die pad area. These conductive layer structures are alternative embodiments of the present invention. The relationship between the conductive material and the insulating material is a function of design and application requirements.

Fig. 8 shows a view 80 that includes a substrate 802 having a die pad area 833 and a second area 835, the second area 835 being outside the die pad area 833. (n) a first thermal pad, or solder ball pad, or conductive element, generally 811, is in thermal and electrical contact with petal or projection or finger 825(a). Petals or fingers, generally 825, are separated from one another by insulating material 841(a). The insulating spacers 842 isolate the inner portion of the conductive material 826 from the outer portion fingers or petals 825. A second thermal pad is shown generally as 813. These thermal pads are in second region 835 and are not in contact with petals 825.

Fig. 9 shows a view 90 of the present invention. Fig. 9 shows a conductive protrusion or petal 825 that includes a portion 825(a). There is also a conductive portion 826 located in the die pad area. The conductive portions 826 are separated by an insulating material 842. The insulating materials 841 and 842 produce the desired structure of portions of the conductive materials 825 and 826. Thermal pads 811 and 813 are also shown, as well as first and second regions 833 and 835, respectively.

Fig. 10-13 illustrate alternative configurations 1000, 1100, 1200 and 1300 of the conductive petal or finger 825 and the inner portion 826 and the insulating materials 841 and 842, respectively. Other elements have already been described with reference to fig. 8 and 9.

While the present invention has been described in terms of a "chip-on" configuration, it is also an embodiment of the present invention to utilize heat dissipation techniques in a "flip-chip" or chip-on configuration. Further, the chip may be encapsulated by epoxy or resin.

Although an IC package is described herein, it should be understood that these teachings have applicability in other types of packages where heat dissipation is desired. Furthermore, it should be recognized that the above teachings are exemplary and should not be construed as limiting the practice of the invention.

Claims (18)

1. An integrated circuit package, comprising:

a substrate having a first surface and a second surface;

a die pad area having dimensions suitable for mounting an integrated circuit thereon;

a plurality of thermally and electrically conductive signal elements disposed on the first surface of the substrate outside the die pad area,

a plurality of vias, one or more of the vias connected to an associated signal element, the one or more vias providing thermal and electrical conductivity from the first surface of the substrate to the second surface of the substrate; and

a plurality of electrically and thermally conductive tabs radiating outwardly from the die pad area, each tab connected to an associated signal element,

wherein each of the plurality of protrusions conducts thermal energy from the die pad region to at least one of the plurality of signal elements.

2. The apparatus of claim 1, further comprising:

a plurality of signal balls disposed on the second surface of the substrate and outside the die pad area, one or more of the signal balls in thermal contact with an associated one of the plurality of vias, and one or more of the signal balls adapted to conduct thermal energy.

3. The apparatus of claim 2, wherein: at least one via of the plurality of vias is located outside the die pad area.

4. The apparatus of claim 2, further comprising:

a printed wiring board having a plurality of printed wiring boards,

wherein the substrate is mounted on the printed wiring board and thermal energy is dissipated from the die pad area to the printed wiring board through the signal balls.

5. The apparatus of claim 1, further comprising an integrated circuit disposed on the die pad area.

6. The apparatus of claim 1, further comprising:

a central thermally conductive element disposed at a location on the die pad area.

7. The apparatus of claim 6, wherein: the central thermally conductive element is adapted to conduct electrical current.

8. The apparatus of claim 1, wherein: the plurality of projections are electrically insulated from each other.

9. The apparatus of claim 1, wherein: a plurality of the protrusions comprise a thermally and electrically conductive material.

10. A method for dissipating heat energy from a die pad, comprising the steps of:

providing a substrate having a first surface and a second surface;

providing a die pad area having dimensions suitable for mounting an integrated circuit thereon;

providing a plurality of thermally and electrically conductive signal elements disposed on the first surface of the substrate outside the die pad area,

providing a plurality of vias, one or more vias disposed over an associated signal element, the one or more vias providing thermal and electrical conductivity from the first surface of the substrate to the second surface of the substrate;

providing a plurality of electrically and thermally conductive projections that radiate outwardly from the die pad area, each projection overlying an associated signal element;

transferring thermal energy from the die pad area to at least one of the plurality of signal elements using the electrically and thermally conductive protrusions; and

electrical current is delivered to the associated signal element by at least some of the plurality of electrically and thermally conductive protrusions.

11. The method of claim 10, further comprising:

a plurality of signal balls disposed on the second surface of the substrate and outside the die pad area are provided, one or more of the signal balls being in thermal contact with an associated one of the plurality of vias, and one or more of the signal balls being adapted to conduct thermal energy.

12. The method of claim 11, wherein: at least one via of the plurality of vias is located outside of the die pad area.

13. The method of claim 11, further comprising:

there is provided a printed wiring board which is,

the substrate is mounted on the printed wiring board such that thermal energy is dissipated from the die pad area to the printed wiring board through the signal balls.

14. The method of claim 10, further comprising mounting an integrated circuit on the die pad area.

15. The method of claim 10, further comprising:

a thermally conductive element is provided at a location on the die pad area.

16. The method of claim 15, further comprising:

an electrical current is transmitted through the thermally conductive element.

17. The method of claim 10, further comprising:

electrically insulating the plurality of projections from each other.

18. The method of claim 10, further comprising:

a plurality of the protrusions are made of a thermally and electrically conductive material.