HK1069693A - Null-pilot symbol assisted fast automatic frequency control - Google Patents

Description

Null pilot symbol assisted fast automatic frequency control

Technical Field

The present invention relates generally to digital communication systems, and more particularly to synchronization of digital information in a digital communication system for coherent demodulation of a continuous phase modulated signal.

Background

Frequency synchronization is important for reliable digital communication between receive (Rx) and transmit (Tx) radios. As is well known in the art, when a transmitter and a receiver communicate with each other, they should have the same nominal frequency. In fact, the reference oscillators on the two radio frequencies (Tx and Rx) have different errors from the nominal frequency. Therefore, in order to receive information, the receiver should tune within a certain tolerance of the transmitter's true frequency. This is commonly referred to as frequency synchronization. In particular, coherent demodulation methods used in communication systems are highly sensitive to frequency deviations between Tx and Rx radio frequencies. It is desirable to use an automatic yield control system (AFC) to control and maintain the frequency error within the tolerance allowed by the modulation method.

Most mobile communication links are susceptible to multipath fading in the channel. This will cause distortion of the phase of the communication signal. This problem is particularly pronounced in the case of Continuous Phase Modulated (CPM) signals, where information is contained in the phase of the signal. The pilot symbols are a priori symbols known to the receiver and periodically inserted by the transmitter in the transmitted sequence in order to help the receiver estimate the phase distortion caused by the new arrival. In the case of Continuous Phase Modulation (CPM), each pilot position needs to be accompanied by a symbol, controlling the phase state to a "known" state. It is often referred to as a "null" symbol. A typical null pilot symbol assisted continuous phase modulation system is described by Ho et al in us patent 5,712,877, which is incorporated herein by reference. Ho et al describe an apparatus for transmitting and receiving digital information using pilot symbol insertion means for periodically inserting pilot symbols associated with data into a frame of digital data and using it to estimate the phase distortion of the channel.

A fast acquisition solution enables the operation of the transmit interrupt feature, which is a unique feature in Carrier Phase Modulation (CPM) used in the new information & signal digital switching (DIIS) standard, that can transmit with continuous technology in current low-level dedicated mobile radio frequency (PMR) systems. Such systems can implement high speed (12Kbps) digital communications, supporting both voice and data communications. It has evolved from the earlier european standard, binary exchange of information and signals (BIIS), also known as ets300,230.pmr protocol (DIIS).

The operation of the synchronization acquisition system depends on a known sequence of thirty symbols, which is periodically (once every 720 ms) embedded into the transmitted symbol bit stream. This sequence of symbols, known a priori by the receiver, is called a sync word. Typically, the call related information is sent immediately after the sync word. In this manner, when communication is initially established, all receivers begin to poll the sync word and call information to determine whether it is participating in a communication or "call". In addition, pilot symbols are also inserted into the data stream to assist the receiver in estimating the phase distortion of the channel. Pilot symbols are inserted at a frequency (20ms) exceeding the sync word. Therefore, in order to perform frequency correction quickly and accurately, AFC based on pilot symbols can obtain more estimates of frequency error than frequency control based on a sync word.

Coherent demodulation requires knowledge about the frequency and phase of the received signal. Even if the transceiving radios have the same nominal frequency, the actual frequencies of their oscillators will typically differ. Automatic Frequency Correction (AFC) is used to estimate and correct for this frequency offset in the received signal. In order to achieve a high degree of accuracy, it is necessary to correct the frequency offset in as short a time as possible. Therefore, there is a need to solve the problem of fast acquisition of frequency synchronization. This problem is particularly acute in the case where communication is entered later when the call has already started. The time spent in acquiring frequency synchronization causes additional symbol loss. Such fast frequency acquisition becomes critical.

The functional diagram of a typical digital receiver is similar to (a receiver of) the prior art shown in fig. 1. A common problem associated with this type of receiver is acquisition time. The acquisition time refers to the time required for the transmitted data to synchronize with the received data, i.e., the time it takes for the receiver to fail to receive the data because the receiver still cannot synchronize with the transmitted data. Digital in-phase (I) and quadrature (Q) baseband (zero intermediate frequency or low frequency IF or very low frequency IF) signals 102 are fed into a coarse automatic product rate control (AFC)104 that controls the (frequency) range of the Radio Frequency (RF) input signal to be within the (frequency band) range of a sensitive digital Channel Selection (CS) filter 106.

For DIIS modulation, although a typical CS filter has a 3-dB bandwidth of 3KHz, selecting such a CS filter can select the desired signal while the off-channel power is filtered out. However, without coarse AFC104, the digital signal may be moved outside the pass band of the CS from a frequency perspective. Typically, for DIIS modulation, the digital I-Q input signal 102 needs to be controlled within 600Hz around the center frequency of the CS filter 106, otherwise too much signal is lost.

The filtered signal is then fed to a frame sync detector 108. the frame sync detector 108 is a device that looks up the sequence of digital symbols known a priori by the receiver. Thus, whenever the receiver detects energy in the IF filter passband, it initiates the process of detecting a known bit sequence for frame synchronization. By using the fine symbol time estimator 110, the receiver determines the boundaries between symbols and achieves frame synchronization (i.e., identifies the known pattern of the received information code).

Based on the time symbol estimates, the receiver 100 will next perform a fine estimation of the frequency to further reduce the frequency error between the transmit and receive frequencies. In order to properly decode the data, it is necessary that this frequency deviation be less than the tolerance range allowed by the symbol detection scheme. In the case of coherent detection of the DIIS signal, the deviation may be as small as 10Hz, while in the case of non-coherent detection of the DIIS signal, the deviation may reach 100 Hz. Since time synchronization has been achieved, fine frequency estimation is performed on the known signal using the fine frequency estimator 112. Since coarse AFC104 can only adjust the received I-Q baseband data to within 600Hz, fine frequency estimator 112 can fine tune the frequency of the received data to an accuracy of about 10Hz to correctly detect the received data symbols. This correction is applied to mixer 114 where it is mixed with the signal from IF filter 106. The output of the mixer 114 is then applied to a signal detector 116 where correct detection of the signal is achieved.

There are some weaknesses in the prior art receiver synchronization system shown in fig. 1. Typically, a CS filter with 3-dB bandwidth of 3KHz is required to meet the requirement of adjacent channel interference protection. With such a 3dB bandwidth, a maximum frequency offset of 600Hz can be allowed at the input of the IF filter. According to the regulations of the relevant standards, the frequency of the mobile transmitter may be allowed to deviate from its nominal frequency by up to 1.5KHz for the case of a channel spacing of 12.5 KHz. If the baseband I-Q signal is fed directly to the CS filter, and in the worst case, the Tx and Rx are offset by 3KHz, a significant portion of the desired signal is attenuated by the CS filter. This is why coarse AFC104 is placed before CS filter 106. Assume that coarse AFC104 reduces the filter offset from 3kHz to 600 Hz. However, in order for the sync word to pass through the IF filter, coarse AFC104 has to process the unknown data symbols before processing the sync word. This will eventually result in a delay and time period greater than acceptable, during which time no synchronization signal is generated and the receiver cannot receive the information. Furthermore, in the prior art based on sync words, the frequency of generating updated estimates for the frequency error is low (once every 720 ms).

Therefore, there is a need for: a digital receiver synchronization system for continuous phase modulation is provided which is capable of easily and accurately providing frequency synchronization to a received data stream with minimal delay, thereby preventing loss of any received digital information.

Brief description of the drawings

Fig. 1 is a block diagram illustrating synchronization used in a typical digital receiver system in the prior art.

Fig. 2 is a block diagram illustrating the operation of a null pilot symbol assisted fast AFC system according to the present invention.

Fig. 3 is a flow chart illustrating the principle of operation of a null-pilot symbol assisted fast AFC system in accordance with a preferred method of implementing the present invention.

Detailed description of the preferred embodiments

Referring now to fig. 2, in a high level functional diagram of a digital baseband channel of a null pilot symbol assisted fast Automatic Frequency Control (AFC) system in accordance with a preferred embodiment of the present invention, an in-phase (I) and quadrature (Q) I-Q digital input signal 201 is included. The I-Q input signal 201 is then applied to a channel select filter 203 which functions to pass the desired I-Q signal and filter out the out-of-band noise power. The frequency offset of the signal from the channel selection filter 203 is then estimated by a synchronization based frequency estimator 205 or any equivalent frequency estimator and corrected in a frequency correction circuit 207, such as a digital frequency mixer. The modified signal from the frequency correction circuit 207 contains some residual frequency error that needs to be corrected before coherent demodulation of the CPM signal. This signal is then fed to a null pilot based frequency estimator 209 which produces a frequency estimate of the residual frequency error (the residual not corrected by 207) using the data processing method described below. The symbol detector 211 uses this frequency correction estimate and the output of the frequency correction circuit to generate a fine frequency correction estimate.

Fig. 3 shows details of the null pilot based frequency estimator 209. In the frequency estimator, the frequency corrected I-Q signal is first sampled 251 under control of a pilot clock 253 (which should be 259). Pilot clock 259 has the same frequency as the pilot symbols that are input to null pilot based frequency estimator 209 along with the signal. Therefore, if the pilot symbol is inserted every 20ms, the frequency of the pilot clock is 50 Hz. After the sampling operation, the phase of the I-Q complex signal may be found in the pilot clock 253 using a suitable algorithm, such as a coordinate rotation digital computer (CORDIC). The phase of the complex signal is stored (255) in the storage element to provide a phase delay.

The phase delayed signal is then sent from the storage element to a series of process steps 256, which may be performed by a microprocessor. Then, a phase difference between the phase of the previous pilot position and the current pilot position is determined (257) using a subtraction unit in the processor. This phase difference is divided by the pilot period (M x T, where M represents the number of symbols between consecutive pilot symbols and T is the symbol period), and an estimate of the residual frequency error is obtained at the output of divider 261. The estimate in radians per second is converted (263) to a magnitude of cycles per second (Hz) by a factor of 2 pi. It should be noted that many different residual frequency error values will cause the same phase offset at the output of 257. All possible residual frequency error values are referred to as "(frequency) aliasing".

Then, the maximum possible value is determined 265 from the aliasing values. This can be achieved by the following steps: assume that the output of division 261 is f 1. The selected residual frequency estimate is then: f. of_OFFSET＝m*f_ALIAS+ f1, wherein the value of m is chosen such that f_OFFSETIs the smallest. Although process step 256 is defined herein, it should be apparent to one skilled in the art that any number or process steps can be used to achieve the same result.

Then, the determination result of the aliasing selection (265) is supplied to the smoothing filter 267. The output of the smoothing filter is fed to a signal detector 211 shown in fig. 2.

The process of null pilot symbol assisted fast AFC, described herein, can be expressed mathematically.

(1) In continuous phase modulated signals, with symbol I_kThe phase of the corresponding kth symbol interval may be written as:

formula (1)

Wherein σ_kFor the current phase state determined by the previous symbol, T is the symbol period, h is the modulation index, and q (T) is the cumulative phase function (integral of the impulse response of the phase shaping filter).

(2) It is assumed that the pulse shaping filter is non-zero in the time range 0 < t < LT and is very small when t < 0 and t > LT. Then, the current state of the modulator is given by:

formula (2)

(3) The expression for the phase of the kth symbol is rewritten,

formula (3)

(4) Assume that at each pilot position, one null symbol and two pilot symbols (P1 and P2) are inserted every M symbols. Then, during the second pilot symbol after each null symbol for the nth pilot position, the ((nM +2) T < T < (nM +3) T) phase can be written as:

*(t)＝2πh[P2×q(t-(nM+2)T)+P1×q(t-(nM+1)T)]+2πK_n，n＝1，2，…

formula (4)

(5) At this time, the integer K_nIs determined by the following formula:

formula (5)

(6) Received with residual frequency offset of f_OFFThe signal of (a) can be expressed as:

r(t)＝c(t)s(t)exp[j2πf_OFFt]+ w (t) formula (6)

Where c (t) represents the complex fading channel.

(7) Then, at the nth null pilot symbol position (found at the output of 253 in FIG. 3), (nM +2) T < T < (nM +3) T, the phase is:

∠r(t)＝θ_r(t)＝θ_c(t)+*(t)+2πf_OFFt, equation (7)

(8) Then, the phase of the signal received during the second pilot symbol after the nth null symbol can be written as:

θ_n，r(t)＝θ_r(T + (nM +2) T), T < 0 < T equation (8)

(9) Then, as a result of the calculation at the output of 261 in fig. 3, the phase difference between the current pilot position n and the previous pilot position n-1 is: theta_n，r(t)-θ_(n-1)，r(t)＝Δθ_n，c+2πf_OFFMT+2π[K_n-K_n-1]，0≤t＜T，n＝2，3，…

Formula (9)

Wherein

θ_n，c＝θ_c(t+(nM+2)T)-θ_c(T + ((n-1) M +2) T), 0 ≦ T < T equation (10)

The offset frequency can be expressed as:

formula (11)

Therefore, in summary, the effects of the present invention are: fast automatic rate control (AFC) using periodic insertion of null-pilot symbols in the pilot of a Carrier Phase Modulation (CPM) system that includes a memory for storing phase information of in-phase (I) and quadrature (Q) complex digital input signals at each pilot symbol position. The memory includes a phase detector for determining the phase of complex digital in-phase (I) and quadrature (Q) digital signal samples and a phase detector for determining the phase. A pilot clock driven phase differentiator is then used at the output of the memory, and functions to work once every pilot clock cycle to determine the deviation between the phase of the current pilot symbol position and the phase of the previous pilot symbol position. The frequency offset selector uses a mathematical process to select the most likely frequency offset from a set of all frequency offsets that cause the same phase difference. A smoothing filter is also included in the system for reducing noise from the frequency estimate of the frequency offset selector.

While the preferred embodiments of the invention have been illustrated and described, it will be clear that the invention is not so limited. Modifications, changes, adaptations, substitutions and equivalents will occur to those skilled in the art without departing from the spirit and scope of the present invention as set forth in the following claims. As used herein, the terms "comprises," "comprising," or any other variation thereof, are not intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus.

Claims (8)

1. A null-pilot symbol assisted fast Automatic Frequency Control (AFC) system for coherent demodulation of Carrier Phase Modulation (CPM), comprising:

a pilot clock driven phase differentiator for working once every pilot clock cycle to determine the deviation between the phase of the current pilot symbol position and the phase of the previous pilot symbol position; and

a frequency offset selector for selecting the most likely frequency offset from a set of all frequency offsets causing the same phase difference.

2. The null-pilot-symbol-assisted fast AFC of claim 1, further comprising:

a smoothing filter for reducing noise in the frequency estimate from the frequency offset selector.

3. A fast automatic rate control (AFC) using null-pilot symbols periodically inserted at a pilot frequency in a Carrier Phase Modulation (CPM) system, comprising:

a memory for storing phase information of in-phase (I) and quadrature (Q) complex digital input signals at each pilot symbol position;

a pilot clock driven phase differentiator which works once per pilot clock cycle using the output of the memory to determine the deviation between the phase of the current pilot symbol position and the phase of the previous pilot symbol position; and

a frequency offset selector for selecting the most likely frequency offset from a set of all frequency offsets causing the same phase difference.

4. The fast automatic AFC of claim 3, further comprising:

a smoothing filter for reducing noise from the frequency estimate of the frequency offset selector.

5. The fast AFC of claim 3, wherein the memory comprises:

a sampler for sampling a complex in-phase (I) and quadrature (Q) digital signal at each pilot clock.

6. The fast AFC of claim 5, wherein the memory further comprises:

a phase detector for determining the phase of the complex in-phase (I) and quadrature (Q) digital signal samples from the sampler.

7. A method for extracting frequency offset information from null-pilot symbols periodically inserted by a transmitter, comprising the steps of:

operating the pilot clock driven phase differentiator once per pilot clock cycle;

judging the deviation between the phase of the current pilot frequency code element position and the phase of the previous pilot frequency code element position; and

the most likely frequency offset from the frequency offset selector is selected from a set of all frequency offsets that cause the same phase difference.

8. The method of extracting frequency offset information according to claim 7, further comprising the steps of:

a smoothing filter is used to reduce the noise of the frequency estimate.