HK1055862B - Digital communication system - Google Patents

Description

Digital communication system

RELATED APPLICATIONS

This application claims the benefit of the following U.S. provisional applications: 60/198, No. 014, submitted on day 18, month 4, 2000 and No.60/255,476, submitted on day 13, month 12, 2000.

Technical Field

The present invention relates to transmitting and/or receiving digital data.

Background

In the united states, the standard for transmitting digital television signals is 8VSB data (ATSC digital television standard a/53). This 8VSB data has a pattern consisting of 8 symbol levels. In the VSB system, the 8 symbol levels are all in phase. In QAM systems, however, the symbols are transmitted in a phase quadrature relationship.

The above standards specify the format and modulation of digital audiovisual data. The transmitted data is in the form of symbols, each symbol representing two bits of data, and trellis coded into three bits of trellis coded data. Each three bit trellis encoded data is mapped to one symbol having a corresponding one of 8 levels. Reed/solomon coding and interleaving may also enhance the robustness of the transmitted information.

Auxiliary data (non-digital audiovisual data) may also be transmitted in the digital television channel, formatted and modulated in the same manner as the audiovisual data in accordance with the standard. A receiver manufactured according to the 8VSB standard can read a Packet Identification (PID) that allows the receiver to distinguish between audio data, video data, and auxiliary data.

However, while the transmitted digital television signal is robust enough for digital television reception, it is not necessarily sufficient to transmit auxiliary data, especially when the auxiliary data is important. Accordingly, one of the applications of the present invention is to transmit the supplemental data in VSB format, with outer coding to enhance robustness. The supplemental data transmitted in accordance with this application of the present invention is referred to herein as robust VSB data (RVSB).

Disclosure of Invention

The present invention provides an apparatus comprising: an input for providing a received digital television signal, wherein the received digital television signal comprises a data frame, the received digital television signal comprises first data symbols and second data symbols having the same pattern, the first data symbols and the second data symbols correspond to different numbers of data bits, and the first and second data symbols are intermixed within the data frame; and a decoder for decoding at least one of the first and second data symbols.

In one aspect of the present invention, a method of transmitting a digital signal includes: providing first and second digital data streams; rearranging the digital data of the first digital data stream according to a first interleaving method to obtain a third digital data stream; digital data of the second and third digital data streams are rearranged in accordance with a second interleaving including the inverse first interleaving, and a time division multiplexed output including the second digital data stream rearranged in accordance with the second interleaving and the third digital data stream rearranged to reflect the order of the first digital data stream is provided.

In another aspect of the present invention, a transmitter for transmitting robust VSB data includes an outer encoder and first and second interleaves. The outer encoder receives input data and encodes it into first robust VSB data, which is normally ordered. The first interleaving reorders the first robust VSB data to obtain reordered first robust VSB data. The second interleaving reorders the reordered first robust VSB data to obtain second robust VSB data. The second robust VSB data is normally ordered with the first and second interleaving relationships being reciprocal.

In yet another aspect of the invention, a system includes a receiver, an inner decoder, a data loss unit, and an outer decoder. The receiver receives the data. The received data includes normally ordered first data formed by inner and outer layer encoding of the first input data and two interleaving operations, and rearranged second data formed by inner layer encoding of the second input data and one interleaving operation. The inner decoder performs inner decoding on the received data to restore the normally ordered first data and the rearranged second data. A discard unit is located downstream of the inner decoder for discarding the rearranged second data. The outer decoder is located downstream of the data loss device and performs outer decoding on the normally ordered first data.

In still another aspect of the present invention, a method for processing received data includes: receiving data, wherein the received data comprises normally ordered first data formed by inner and outer layer coding and two interleaving operations on first input data and rearranged second data formed by inner layer coding and one interleaving operation on second input data; the received data is decoded by the inner layer, and the normally ordered first data and the rearranged second data are recovered; the recovered normally sorted first data is discarded.

In another aspect of the invention, a system includes a receiver, a decoder, and a data loss unit. The receiver receives the data. The received data includes normally ordered first data resulting from two interleaving operations and reordered second data resulting from an interleaving operation. The decoder decodes the received data to restore the normally ordered first data and the rearranged second data. A data discard unit is located downstream of the decoder and discards the recovered rearranged second data.

In yet another aspect of the present invention, a method of processing received data comprises: receiving data, wherein the received data comprises normally ordered first data obtained by inner and outer layer coding and two interleaving operations on first input data and rearranged second data formed by inner layer coding and one interleaving operation on second input data; decoding the received data to recover the normally ordered first data and the rearranged second data; the restored normally sorted first data and the rearranged second data are rearranged according to a user's selection, followed by discarding the rearranged normally sorted first data, or the restored rearranged second data is discarded, followed by rearranging the restored normally sorted first data.

In still another aspect of the present invention, a receiver providing method includes: providing a plurality of first receivers, wherein each first receiver processes received N-level robust VSB data and discards N-level ATSC data; and a number of second receivers are provided, each of which processes the received level NATSC data and discards the N-level robust VSB data.

In another aspect of the invention, the electrical signal comprises first and second data symbols of the same configuration, but at different specific bit rates of the first and second data symbols. The first and second symbols are mixed in a data frame.

In yet another aspect of the invention, an apparatus includes a receiver and a lost data device. The receiver receives an electrical signal containing first and second 8VSB data having different bit rates. The data dropper discards the first or second 8VSB data.

In yet another aspect of the invention, a receiver receives an ATSC frame comprising a plurality of ATSC segments. The ATSC segment includes a non-outer coded ATSC transport header, non-outer coded ATSC reed/solomon parity data, and outer coded data.

Drawings

The various features and advantages of the present invention will become more apparent upon a detailed study of the disclosure when taken in conjunction with the drawings wherein:

FIG. 1 illustrates a robust VSB transmitter for transmitting robust VSB data and ATSC data in accordance with the present invention;

fig. 2 illustrates a general ATSC receiver receiving ATSC data transmitted from the robust VSB transmitter of fig. 1;

FIG. 3 illustrates a robust VSB receiver for receiving robust VSB data transmitted by the robust VSB transmitter of FIG. 1;

FIG. 4 shows the 2/3 rate encoder of FIG. 1 in more detail;

FIG. 5 illustrates the mapping function performed by the mapper of FIG. 4;

FIG. 6 illustrates the operation of the 2/3 rate decoder of FIGS. 2 and 3;

FIG. 7 illustrates another robust VSB transmitter for transmitting robust VSB data and ATSC data in accordance with the present invention;

fig. 8 illustrates a general ATSC receiver receiving ATSC data transmitted from the robust VSB transmitter of fig. 7;

fig. 9 illustrates a robust VSB receiver for receiving the robust VSB data transmitted by the robust VSB transmitter of fig. 7;

FIG. 10 shows a circuit for generating relevant control signals on the discard control line of FIG. 9;

FIG. 11 illustrates yet another robust VSB transmitter for transmitting robust VSB data and ATSC data in accordance with the present invention;

FIG. 12 illustrates an example of four data segments comprising rate 1/2 outer coded data transmitted by a robust VSB transmitter in accordance with the present invention;

FIG. 13 illustrates an example of four data segments comprising rate 1/4 outer coded data transmitted by a robust VSB transmitter in accordance with the present invention;

FIG. 14 illustrates an example of four data segments comprising rate 3/4 outer coded data transmitted by a robust VSB transmitter in accordance with the present invention;

FIG. 15 shows the interleaver (Ir) of FIGS. 1, 9 and 11 in more detail;

FIG. 16 shows the de-interlacer (Dr) of FIGS. 3 and 9 in greater detail;

FIG. 17 illustrates a map definition structure for a first robust VSB data packet in a frame;

FIG. 18 shows a frame sync segment of a portion of a frame carrying a map indicating where robust VSB data can be found in the frame;

FIG. 19 illustrates an enhanced data slice predictor of an embodiment of the present invention;

FIG. 20 illustrates the mesh layout of the inner layer decoding of FIG. 19;

FIG. 21 shows possible state transitions for the outer decoder of FIG. 19;

fig. 22 illustrates an enhanced data slice predictor of another embodiment of the present invention.

Detailed Description

Transmission and reception of RVSB and ATSC data

Fig. 1 illustrates a robust VSB transmitter 10 for transmitting ATSC data and robust VSB data according to an embodiment of the present invention, fig. 2 illustrates a general ATSC receiver 12 for receiving ATSC data transmitted from the robust VSB transmitter 10, and fig. 3 illustrates a robust VSB receiver 14 for receiving robust VSB data transmitted from the robust VSB transmitter 10.

The robust VSB transmitter 10 includes a reed/solomon encoder 16 for encoding the reed/solomon parity bytes by adding them to the non-encoded auxiliary data bytes. The non-encoded auxiliary data bytes and reed/solomon parity bytes are interleaved by an interleaver 18 and then are bit-wise encoded by an outer encoder 20 using a convolutional code or other error correcting code. The outer encoder 20 improves the robustness of the non-encoded auxiliary data bytes and the reed/solomon parity bytes by converting them into robust data bytes (hereinafter robust VSB data bytes) and reed/solomon parity bytes.

For example, outer encoder 20 may be an 1/2-rate encoder that produces two output bits per input bit, a 1/4-rate encoder that produces four output bits per input bit, or a 3/4-rate encoder that produces four output bits per three input bits. Other encoders may be substituted.

At the output of the outer encoder 20, each set of 184 encoded robust VSB data packets is combined with a reed/solomon byte plus a three byte transport (tx) header to form robust VSB data packets. Multiplexer 24 multiplexes these robust VSB data packets with ATSC data packets (typically audio data video data) that each contain a three byte transport header and 184 bytes of ATSC data. The inputs to the multiplexer 24 may be selected on a packet-by-packet basis and each selected input may be provided to the ATSC transmitter 26. The multiplexer 24 selects the input to the ATSC transmitter 26 based on the robust VSB map to be described below.

The ATSC transmitter 26 generally comprises a reed/solomon encoder 28, an interleaver 30 and an 2/3 rate inner layer encoder 32, all operating in accordance with the ATSC standard.

A conventional ATSC receiver, such as the conventional ATSC receiver 12 of fig. 2, is used to receive and process ATSC data and discard robust VSB data. Accordingly, the receiver 12 includes an 2/3 rate inner decoder 34, a deinterleaver 36, and a reed/solomon decoder 38 operating in accordance with the ATSC standard. However, the conventional ATSC receiver 12 is programmed to decode ATSC data and the robust VSB data transport header (including the packet identifier or PID, and not encoded by the outer encoder 20). The receiver 12 reads the PIDs of all packets and discards the packets with the PIDs of the robust VSB data at 40. The receiver 12 also includes a data slice predictor 42 (e.g., the data slice predictor disclosed in U.S. patent No.5,923,711) responsive to the inner layer decoded data and providing an output back to the phase tracker and/or equalizer, as is well known in the art.

The robust VSB data packets may be received, decoded and processed by a robust VSB receiver 14 shown in fig. 3. As shown in fig. 4, the 2/3 rate inner layer encoder 32 of the ATSC transmitter 26 includes a precoder 44 and a four-state trellis encoder 46, which together may be considered an eight-state encoder, producing three trellis-encoded output bits (Z0, Z1, Z2) for every two input bits (X1, X2). Mapper 48 maps the three trellis coded output bits to symbols having one of the eight levels shown in fig. 5. As can be seen from convolutional code theory, the operation of the precoder 44 and the four-state trellis encoder 46 can be viewed as an eight-state 4-ary trellis arrangement.

Thus, in the robust VSB receiver 14, the 2/3 rate inner layer decoder 50 can operate in an eight state trellis arrangement, looking together as in fig. 6 at the precoder 44 and the four state trellis encoder 46 of the 2/3 rate inner layer encoder 32 to make soft Output decisions (e.g., applying the SSA algorithm described by Li, vunetic and Sato in "optimal Output Detection for Channels with inter reference" (ieee transactions on Information Theory, May, 1995)). This soft decision operation is more complex than the commonly applied Viterbi algorithm, which produces a hard decision output, but makes more full use of the coding gain provided by outer encoder 20.

2/3 the output of the rate inner decoder 50 is deinterleaved by a deinterleaver 52. The robust VSB receiver 14 reads the PIDs of all the packets at the output of the deinterleaver 52. Based on these PIDs, the receiver 14 discards at 54 those packets having ATSC data PIDs as well as discards the transport header and parity bytes applied by the reed/solomon encoder 28 following the outer layer encoder 20. Thus, the receiver 14 passes at 54 only robust VSB data packets containing the robust VSB data encoded by the outer encoder 29. To reconstruct the original non-encoded auxiliary data provided to the reed/solomon encoder 16 of fig. 1, the robust VSB data packets are decoded by an outer decoder 56, deinterleaved by a deinterleaver 58 (inverted interleaver 18), and reed/solomon decoded by a reed/solomon decoder 60.

In order to restore the order of the outer decoded data to the order of the data in the channel, an interleaver 62 (corresponding to interleaver 30) interleaves the reliable outputs (soft or hard outputs may be used) of outer decoder 56. This interleaved outer decoded data may be used, for example, by the slice predictor 66 to generate reliable feedback to the phase tracker and/or equalizer. However, the total feedback delay introduced by the de-interleaver 52 and interleaver 62 in the robust VSB receiver 14 is too long to provide useful feedback to the phase tracker and/or equalizer in general.

The configurations shown in fig. 7-9 avoid feedback delays caused by the de-interleaver 52 and interleaver 62 of the robust VSB receiver 14. In the robust VSB transmitter 80 shown in fig. 7, the non-encoded auxiliary data bytes are encoded by a reed/solomon encoder 82, with the encoder 82 adding reed/solomon parity bytes to the non-encoded auxiliary data bytes. The interleaver 84 interleaves the non-coded auxiliary data bytes with reed/solomon parity bytes and the outer encoder 86 encodes them bit-by-bit using a convolutional code or a Turbo product code, as described above. To reduce the effect of channel burst errors on outer decoding, the bitwise output of outer encoder 86 is a small data block interleaved by small data block interleaver 88. The data provided by the small data block interleaver 88 is referred to as Rdata (n.o.) and represents the normally ordered robust VSB data.

An input of the first multiplexer 92 receives ATSC format data packets, each of which includes (i) a valid three-byte transport header with a robust VSB data PID number, (ii) 184 placeholder bytes emulating robust VSB data, and (iii) 20 placeholder bytes emulating ATSC reed/solomon parity data. Another input of the first multiplexer 92 receives ATSC format emulation data packets each containing 207 bytes of emulation ATSC data. These ATSC format emulation packets act as placeholders for actual ATSC data packets that are ready to be added downstream. These inputs to the first multiplexer 92 may be selected on a packet-by-packet basis, and this selection is based on a robust VSB map to be described later.

An interleaver 94 interleaves the output selected by the first multiplexer 92 in accordance with the ATSC standard for convolutional byte interleaving. A data permuter 96 receives the outputs of both the interleaver 94 and the small block interleaver 88 and permutes each dummy robust VSB data placeholder byte of the interleaver 94 with the next normally ordered robust VSB data byte of the small block interleaver 88.

The output of the data permuter 96 comprises normally ordered robust VSB data with interspersed transport headers, emulated ATSC reed/solomon parity bytes, and emulated ATSC data packet bytes. The deinterleaver 98, which operates according to the byte deinterleaving ATSC standard, deinterleaves the output of the data permuter 96, effectively "repackaging" the data into packets consisting of transport headers, rearranged robust VSB data (rda (r.o.)), emulated ATSC reed/solomon parity bytes, and emulated ATSC data. The rearrangement of the normally rearranged robust VSB data is performed by the deinterleaving of the deinterleaver 98, and the rearranged data may be referred to as rearranged robust VSB data.

The emulated ATSC reed/solomon parity bytes (20 per packet) and emulated ATSC data packets (207 bytes per packet) of the robust VSB packets are discarded at the data dropper 100. The second multiplexer 102 multiplexes the remaining robust VSB packets (each containing a transport header and reordered robust VSB data) with actual ATSC data packets containing 187 bytes of transport header and ATSC data, respectively. Either input of the second multiplexer 102 may be selected on a packet-by-packet basis and supplied to the ATSC transmitter 104. The second multiplexer 102 selects which input to pass to the ATSC transmitter 104 based on the robust VSB map to be described below.

The ATSC transmitter 104 generally comprises a reed/solomon encoder 106, an interleaver 108 and a 12 way 2/3 rate inner layer encoder 110 all operating in accordance with the ATSC standard. The reed/solomon encoder 106 outputs packets consisting of the transport header, the reordered robust VSB data, and the ATSC reed/solomon parity bytes, multiplexed with packets consisting of the transport header, the ATSC data, and the ATSC reed/solomon parity bytes. The ATSC reed/solomon parity bytes of the robust VSB data are calculated from the reordered robust VSB data. In addition, the interleaver 108 changes the ordering of the robust VSB data such that the robust VSB data at the output of the interleaver 108 is still the normally ordered robust VSB data. Interleaver 108 also spreads the transport header, ATSC reed/solomon parity bytes with the ATSC data. The data is transmitted after being rate-coded 2/3 by 12-way 2/3 rate inner encoder 110. The transmitted robust VSB data is in the normal order, that is, the order provided at the output of the small data block interleaver 88, thereby allowing the robust VSB receiver to avoid the delay caused by the deinterleaver 52 and interleaver 62 of the robust VSB receiver 14.

As shown in fig. 8, a conventional ATSC receiver 120 includes a 12-way 2/3 inner decoder 122 that decodes the transmitted data to provide an output data stream comprising normally ordered robust data with interspersed transport headers, ATSC data, and ATSC reed/solomon parity bytes interleaved in the ATSC convolutional bytes provided by interleaver 108. ATSC deinterleaver 124 restores the transport headers, ATSC data, and ATSC reed/solomon parity bytes to their transport "packed" position. The ATSC deinterleaver 124 also converts the normally ordered robust VSB data into reordered robust VSB data, which in its reordered form allows the ATSC reed/solomon decoder 126 of the conventional ATSC receiver 120 to correctly test the parity of the robust VSB data packets. The normal ATSC receiver 120 then reads the robust VSB data packet transport header and gracefully discards the robust VSB data packet at 128 according to its PID.

As shown in fig. 9, the robust VSB receiver 130 includes a soft output 12-way 2/3 rate inner layer decoder 132. (the hard output 2/3 decoder would significantly lose coding gain) the output of the soft output 12-way 2/3 rate inner decoder 132 comprises normally ordered robust VSB data with reordered ATSC data, transport header, and ATSC reed/solomon parity symbols interspersed within the robust VSB data, the location of which is indicated by a discard control line 134, described below. A discard block 136 discards the reordered ATSC data, transport header and ATSC reed/solomon parity symbols under control of a discard control line 134.

The small data block deinterleaver 138 deinterleaves the robust VSB data with a relatively short delay. This de-interleaving spreads the possible burst errors in the robust VSB data at the output of the soft output 12-way 2/3 rate inner decoder 132. The outer decoder 140 decodes the normally ordered robust VSB data bit by bit, and also groups the robust VSB data into bytes. At R_MAPThe data input provides mapping information to outer decoder 140 that tells the decoder 140 which decoding rate to use for which data. Neither the deinterleaver 52 nor the interleaver 62 is required in a robust VSB receiver 130 that provides a lower overall feedback delay to the phase tracker and/or equalizer. For example, the enhanced data slice predictor 142 may use outer-coded data to generate feedback to the phase tracker and/or equalizer. This feedback may be gated, if desired, or the step size of the equalizer gradient algorithm may be adjusted in proportion to the reliability of the decoded data.

To reconstruct the original non-encoded auxiliary data supplied to the reed/solomon encoder 82 of fig. 7, the robust VSB packet payload decoded by the outer decoder 140 is deinterleaved by a deinterleaver 144 (inverted interleaver 84) and reed/solomon decoded by a reed/solomon decoder 146 (corresponding to the reed/solomon encoder 82).

As specified by the ATSC standard, a frame comprises a plurality of segments, each segment containing a predetermined number of bytes. The first segment of the frame is the frame sync segment and the remaining segments are the data segments. Although the robust VSB data can be transmitted in segments or partial segments, segment pair transmission is convenient. The above-described robust VSB map indicates which segment pairs contain robust VSB data, so that discard block 136 can correctly discard the reordered ATSC data before it reaches outer decoder 140. The discard block 136 must also discard the transport header and ATSC reed/solomon parity data for all segments (robust VSB and ATSC).

Fig. 10 shows the theoretical simplified circuitry and associated parts of the robust VSB receiver 130 for generating an associated control signal on the drop control line 134 to control the drop function. In creating the emulation 207 byte segments, the robust VSB receiver 130 uses the received mapping information (the transmission and reception method for the mapping information is described below) to control the emulation segment generator 150, which also uses the frame synchronization signal. For each ATSC emulation segment, emulation segment generator 150 sets all bytes to FF. For each robust VSB data emulation segment, the emulation segment generator 150 sets the transport header and ATSC reed/solomon parity bytes to FF. Generator 150 sets the remaining bytes of each robust VSB data emulation segment to 00.

The artificial segment generator 150 feeds these artificial segments to an ATSC convolutional byte interleaver 152, which then uses the output of the latter to control the discard block 136, and the discard block 136 correctly discards the reordered ATSC data, transport header, and ATSC reed/solomon parity data interleaved within the received data stream in response to FF and 00 codes. Accordingly, the discard block 136 passes only the robust VSB data.

Fig. 11 illustrates a multiple outer code robust VSB transmitter 160, which is similar in operation to the robust VSB transmitter 80 of fig. 7. The transmitter 160 has a first reed/solomon encoder 162 that encodes the first non-encoded auxiliary data by adding reed/solomon parity bytes to it, a second reed/solomon encoder 164 that encodes the second non-encoded auxiliary data by adding reed/solomon parity bytes to it, and a third reed/solomon encoder 166 that encodes the third non-encoded auxiliary data by adding reed/solomon parity bytes to it. The reed/solomon encoded first, second and third non-encoded auxiliary data are interleaved by first, second and third interleavers 168, 170 and 172, respectively. Next, the interleaved reed/solomon encoded first, second and third non-encoded auxiliary data are bit-wise encoded by first, second and third outer encoders 174, 176 and 178, respectively. The bitwise outputs of the first, second and third outer encoders 174, 176 and 178 are interleaved by first, second and third small block interleavers 180, 182 and 184, respectively.

The first outer encoder 174 is an 1/4 rate encoder, the second outer encoder 176 is a 1/2 rate encoder, and the third outer encoder 178 is a 3/4 rate encoder, although any other combination of various outer encoders with different coding rates may be used. Multiplexer 186 selects the data outputs of first, second and third small block interleavers 180, 182 and 184 under the control of a select input which determines the order in which the different outer-coded data is inserted into the ready to transmit frame. The data at the output of multiplexer 186 is referred to as Rdata (n.o.) and, as before, represents the normally ordered robust VSB data.

The upper three inputs of multiplexer 190 receive ATSC format packets each having an effective three-byte transport header with the PID number of the robust VSB data, the emulated robust VSB data of 184 placeholder bytes, and the ATSC reed/solomon parity data of 20 emulated placeholder bytes. The robust VSB data at the uppermost input of the multiplexer 190 corresponds to the 1/4 rate encoded data of the first outer layer encoder 174, the robust VSB data at its next input corresponds to the 1/2 rate encoded data of the second outer layer encoder 176, and the robust VSB data at its next input corresponds to the 3/4 rate encoded data of the third outer layer encoder 178. The data supplied to the bottommost input of multiplexer 190 comprises ATSC format emulation packets each containing 207 bytes of emulated ATSC data. These dummy ATSC data packets act as placeholders for real ATSC data packets that are to be added downstream of multiplexer 190. The input of multiplexer 190 is selected on a packet-by-packet basis according to the input on the select line. This selection is based on the robust VSB data map to be described below.

To achieve proper ATSC convolutional interleaving, an interleaver 192 interleaves the output of multiplexer 190. A data permuter 194 receives the outputs of both interleaver 192 and multiplexer 186. Data permuter 194 permutes each dummy robust VSB data placeholder byte from multiplexer 190 with the next corresponding normally ordered robust VSB data byte from multiplexer 186.

The output of the data permuter 194 contains normally ordered robust VSB data (appropriately rate-coded 1/4, rate-coded 1/2, and/or rate-coded 3/4), transport headers with interspersed, dummy ATSC reed/solomon parity bytes, and dummy ATSC data packet bytes. The convolutional byte deinterleaver 196 (as described in the ATSC standard) deinterleaves the output of the data permuter 194 to effectively "repackage" the data into packets consisting of transport headers, rearranged robust VSB data (rate coded 1/4, 1/2, and/or 3/4), emulated ATSC reed/solomon parity bytes, and ATSC data emulation packets. The deinterleaving action of the deinterleaver 196 reorders the normally ordered robust VSB data.

The manner in which the emulated ATSC reed/solomon parity bytes (20 per packet) and emulated ATSC data packets (207 bytes per packet) are discarded at data dropper 198 is similar to the manner in which control lines 134 and discard block 136 are discarded in fig. 9. The multiplexer 200 multiplexes the remaining robust VSB packets, each including a transport header and reordered robust VSB data, with actual ATSC data packets containing 187 bytes of the transport header and ATSC data. Either input of multiplexer 200 is selected on a packet-by-packet basis and provided to the ATSC transmitter. Multiplexer 200 selects which input to pass to ATSC transmitter 202 based on the robust VSB map to be described below.

The ATSC transmitter 202 generally comprises a reed/solomon encoder 204, an interleaver 206, and a 12 way 2/3 rate inner layer encoder 208, all operating according to the ATSC standard. The reed/solomon encoder 204 outputs packets composed of the transport header, the reordered robust VSB data, and the ATSC reed/solomon parity bytes, multiplexed with packets composed of the transport header, the ATSC data, and the ATSC reed/solomon parity bytes. Based on the reordered robust VSB data, ATSC Reed/Solomon parity bytes are calculated for the robust VSB data. In addition, the interleaver 206 changes the order of the robust VSB data so that the robust VSB data at the output of the interleaver 206 are still normally ordered robust VSB data. Interleaver 206 also spreads the transport header bytes, ATSC reed/solomon parity bytes, and ATSC data. These data are transmitted after being encoded by a 12-way 2/3 rate inner layer encoder 208. The transmitted robust VSB data is in the normal order, i.e., the order specified at the output of multiplexer 186. This normal data order allows robust VSB reception without the delay caused by the deinterleaver 52 and interleaver 62.

As described above, the ATSC frame includes a frame sync segment and a plurality of data segments, and for convenience, robust VSB data is packed in groups of 4 segments. Specifically, fig. 12 illustrates an example of 4 data segments that may be used to transmit 1/2 rate encoded robust VSB data in a frame, fig. 13 illustrates an example of 4 data segments that may be used to transmit 1/4 rate encoded robust VSB data in a frame, and fig. 14 illustrates an example of 4 data segments that may be used to transmit 3/4 rate encoded robust VSB data in a frame. These examples represent the frames preceding the interleaver 108 and assume that each group of 4 robust VSB data segments contains an integer number of robust reed/solomon encoded data blocks, each 184 bytes long and 20 bytes are parity bytes.

For the 1/2 rate outer layer, FIG. 12 shows that the outer layer encoder outputs two bits for each input bit. One robust VSB data packet is wrapped (one bit per symbol) as one RVSB reed/solomon data block for a pair of data segments, so for the 1/2 rate outer layer coding, 4 segments contain two robust reed/solomon coded data blocks. As shown in fig. 13, for the 1/4 rate outer code, the outer encoder outputs four bits for each input bit. Robust VSB data is packed into one RVSB reed/solomon data block (1/2 bits per symbol) for every four data segments, so for rate 1/4 outer coding, 4 segments contain one robust reed/solomon coded data block. As shown in fig. 14, for the 3/4 rate outer code, which outputs four bits for each three-input bit, the transmitted symbol does not always match the byte boundary. However, the three complete RVSB reed/solomon data blocks will be packed exactly into 4 data segments (1.5 bits per symbol), so for the 3/4 rate outer layer coding, the 4 segments contain three robust reed/solomon coded data blocks.

Accordingly, FIGS. 12-14 may be represented by the following tables:

S	X	Y
			1/2	1	2
1/4	1	4
			3/4	3	4

in the table, X represents the number of complete robust reed/solomon encoded data blocks and Y represents the number of frame segments required to obtain the corresponding number X of robust reed/solomon encoded data blocks.

It is to be understood that the invention may be used in conjunction with other coding ratios and thus the above table will vary depending on the particular coding ratio used.

Fig. 15 shows the interleavers 18, 84, 168, 170 and 172 in more detail, and fig. 16 shows the de-interleavers 58 and 144 in more detail, assuming that the robust reed/solomon encoded data block is chosen to be 184 bytes long. Interleavers 18, 84, 168, 170 and 172 are convolutional interleavers of B46, M4 and N184, byte-by-byte interleaving for robust VSB data. The interleaving scheme is the same as the ATSC interleaving scheme described in the ATSC digital television standard a/53 and ATSC digital television standard a/54 usage guidelines, except that the B parameter of the robust interleaver is 46, instead of 52, and the parameter N is 184, instead of 208. Such an interleaver is necessary to enable a robust VSB receiver to overcome long noise bursts on a channel, even if the ATSC deinterleaver (Da) is bypassed, as shown in fig. 9.

As shown in fig. 16, deinterleavers 58 and 144 are convolutional interleavers of B46, M4 and N184, which perform byte-by-byte deinterleaving of the robust VSB data. The deinterlacing scheme is also the same as the ATSC deinterlacer scheme described in the ATSC digital television Standard A/53 and ATSC digital television Standard A/54 usage guidelines, except that the B parameter of the robust deinterlacer is 46 instead of 52 and the parameter N is 184 instead of 208.

Since the robust VSB reed/solomon data block includes 184 bytes and the data frame has an integer number of robust VSB reed/solomon data blocks, the number of robust VSB reed/solomon parity bytes plus the robust VSB reed/solomon data bytes in a data frame can always be averaged by 46. Thus, the frame sync segment can be used as a sync symbol for de-interleavers 58 and 144(Dr) in the receiver, regardless of the value of G (described below). The de-interlacer commutators are forced into the top position when the frames are synchronized. Both deinterleavers 58 and 144 are byte-by-byte deinterleavers.

Data mapping

As described above, each data frame is mixed with a robust VSB data segment and an ATSC (non-robust coded) data segment. Furthermore, the robust VSB data may include data encoded with a mixed coding ratio. The robust VSB receiver 14 or 130 must have a robust VSB map indicating which segments are robust VSB encoded and which outer codes are used for the robust VSB encoding so that the robust VSB receiver 14 or 130 can properly process the robust VSB data and discard the ATSC data. The robust VSB transmitters 10, 80, and 160 also use the robust VSB map to control their respective multiplexing and dropping functions. The robust VSB transmitter 10, 80, or 160 transmits the robust VSB map to the robust VSB receiver 14 or 130 along with all other data, as follows.

In use of a specificThe presence, amount and location of robust VSB data in a data frame encoded by the outer code is indicated by one or more numbers Sc that appear as bi-level data in the frame sync of the data frame. As is well known, the frame sync segment is the first segment in a frame, so for the outer layer coding described above (1/4, 1/2, and 3/4 ratios), the frame sync segment should preferably contain [ S ]_1/4、S_1/2、S_3/4]. Each Sc is as S_1/4Or S_1/2Or S_3/4Encoded as 18 symbols (bits) of data. For all three codes, the mapping of the robust VSB would be defined with a total of 3 × 18-54 symbols. These symbols are inserted into a reserved region (just before the 12 precoding bits) near the end of the sync segment of each frame. For each group of 18 bits (b)₁₈……b₁) The last 6 position (B)₆……b₁) The number of groups G of 8 segments (8 segments being 2, 4 or 6 robust VSB data packets according to the outer code) as a map of the robust VSB data in the current frame. These 12 pre-coded bits are used for comb filter compensation (see ATSC digital television standard a/54 usage guide). Thus, as shown in FIG. 18, bit b₈……b₁Representing data G, bit b₁₈……b₁₃Is bit b₆……b₁Complement of, and bit b₁₂……b₇May be alternating +1 and-1 (or any other way).

Let S be S_1/4+S_1/2+S_3/4. Since 312/8 is 39, groups 0-39 of 8 segments may be mapped to robust VSB data or 8VSB data (ATSC data). Therefore, each value of Sc may be 0 … 39 as long as the sum S ≦ 39.

The robust VSB data segments are preferably distributed as uniformly as possible within the data frame. For example, if S ═ 1, the following 8 segments are mapped as robust VSB data segments, and all other segments are mapped as ATSC data segments: 1, 40, 79, 118, 157, 196, 235 and 274. If S is 2, then the following 16 segments are mapped as robust VSB data segments, and all other segments are mapped as ATSC data segments: 1,20. 39, 58, 77, 96, 115, 134, 153, 172, 191, 210, 229, 248, 267, and 286. These examples continue until S39, where the entire data frame is mapped into robust VSB data segments. The spacing of the pairs of robust VSB data segments is preferably non-uniform for some S values. But for any S value the interval is fixed in advance and known to all receivers.

If a frame contains robust VSB data provided by three outer encoders operating at 1/4 rate, 1/2 rate and 3/4 rate, the data from these three encoders may be partitioned within the frame, thus the first 8 XS for the RVSB segment_1/4The segment contains 1/4 rate outer layer coded data, the next 8 × S_1/2The segments contain 1/2 rate outer layer coded data, and the last 8 × S_3/4The segment contains 3/4 rate outer layer encoded data. However, the three outer encoders or any other type of outer encoder of any number may have other robust VSB data segment structures.

As described above, since such robust VSB and map are contained within the frame sync segment, the map does not enjoy the same level of coding gain as the robust VSB data. However, the robust VSB receiver can still reliably obtain the robust VSB map by correlating it over some number of frames, so the map does not change often (e.g., no more than about every 60 frames).

The mapping method described above allows the receiver to reliably and simply obtain a robust VSB map using correlation. The receiver, once it has obtained the mapping, wishes to reliably track the changes in the mapping immediately. To this end, the definition of each outer code for the robust VSB map may be replicated within the first robust VSB reed/solomon coded block of the frame, but excluding the comb compensation bits. In addition, there is data indicating (i) the time of future changes to the mapping and (ii) the definition of a new mapping in the future. Thus, the first robust VSB data packet of the outer encoder frame has the structure of fig. 17, and the robust VSB map definition data is given as follows: 8 bits specify the current mapping (only 6 bits of which are used); the 8 bits specify the number of frames before the mapping changes (1-125; if 0, no change); there are also 8 bits specifying the next mapping (still only 6 bits of it). The remainder of the first robust VSB data packet is data. The configuration of the first RVSB segment in each outer encoder frame is shown in figure 17.

In this way, the receiver can track the change in the map with reliable robust VSB data. Even if a burst error destroys some frames, the receiver can keep its own frame countdown with frame data read from previously received frames. If the receiver finds at any time that the definition of the outer code previously obtained by frame sync correlation does not match the definition of the outer code in the first robust VSB data segment, then it restarts its map acquisition process.

RVSB enhanced data slice prediction and equalizer feedback

The major applications of the ATSC 8VSB receiver for adaptive equalization and phase tracking are described in the ATSC digital television standard a/53 and ATSC digital television standard a/54 usage guide, both published by the advanced television systems committee. As described above, RVSB is characterized by improved adaptive equalization and phase tracking.

An improvement is achieved by feeding back a reliable estimate of the input symbol level delay to the adaptive equalizer and/or phase tracker based on the sequence estimate from the enhanced Viterbi algorithm (see "the Viterbi algorithm, g.d. forney, jr., proc.ieee, Vol61, pp, 268-. This type of feedback does not require "re-encoding" where state initialization problems exist.

U.S. patent No.5,923,711, entitled Slice Predictor for a Signal Receiver, discloses an ATSC 8VSB Receiver that uses Slice prediction to provide more reliable feedback to a phase tracker or adaptive equalizer. This feedback may be made more reliable by the enhanced data slice prediction system 300 of fig. 19. The inner and outer layer decoders 302 and 304 of system 300 operate in a similar manner to the inner and outer layer decoders described above.

The data slice prediction output by the inner layer decoder 302 operates in a similar manner as described in the above-mentioned U.S. patent No.5,923,711. As described above, the inner layer decoder 302 is arranged based on an 8-state 4-ary trellis containing a precoder. The chip predictor of the inner decoder 302 determines the most likely state at time t based on the best path metric at the current time t and then selects the four predicted input levels (selected from 8 levels) for the next symbol at time t +1 based on the next pair of possible states. As shown in fig. 20 organized by the inner layer decoder trellis, if the most likely state at time t is state 1, then the next state is e [1526], and thus the next input level at time t +1 is-7, +1, -3, or +5, which correspond to decoded bit pairs 00, 10, 01, and 11, respectively.

The outer layer decoder 304 also finds the best path metric for each mesh layout at the current time t. Fig. 21 illustrates a portion of the mesh layout for an exemplary outer layer decoder, which is generally applicable to all three outer layer codes. As shown in FIG. 21, two possible outer decoder input bit pairs are selected for time t +1 based on the next possible state pair. For example, the two bit pairs may be 11 or 01. The bit pairs selected by the outer decoder 304 are fed to the prediction enhancer 306. like the enhanced slice prediction at time t +1, the prediction enhancer 306 selects either the magnitude level +5 or-3 from the four level set previously selected by the slice predictor of the inner decoder 302. Since the chip prediction of the inner decoder 302 is almost zero delay and the outer decoder 304 must wait until the inner decoder 302 provides the decoded soft output before it can operate on the same symbol, the delay provided by the delay block 308 is slightly greater than the seek delay of the inner decoder 302 and the chip prediction provided by the prediction enhancer 306 is provided as feedback to the equalizer of the phase tracker 310.

Outer decoder 304, with some additional delay, makes a final hard decision for time t +1 and selects the single most likely input bit pair. For example, if its Vitervi algorithm determines 11 to be the most likely input bit pair for the outer decoder 304, the outer decoder 304 sends this information to the prediction enhancer 306, which then selects the corresponding bit pair from the four-level set that has been selected by +5 and the slice predictor for the inner decoder 302. The outer code may be a convolutional code or other type of parity code. Prediction enhancer 306 is disabled during a period of time when ATSC data is received.

The Viterbi algorithm is applied by the feedback enhanced Maximum Likelihood Sequence Estimator (MLSE) slice prediction system 320, which is shown in fig. 22 along with other relevant components of the RVSB receiver. The inner decoder 322 and the outer decoder 324 of the system 320 operate in a manner similar to the inner decoder 302 and the outer decoder 304 described above, but instead of using the slice prediction output of the inner decoder 302, the enhanced MLSE module 326 is configured to perform the general Vitervi algorithm on the received signal by operating the 8-state 2/3 rate-trellis diagram (the same trellis diagram used by the inner decoder 322, including the precoder).

The enhanced MLSE module 326 selects as its next input either (i) the noisy 8-level received signal delayed by delay module 328 (if the next input is a non-RVSB symbol) or (ii) the output of the outer decoder 324 bit pair decision (soft or hard) (if the next input is a RVSB symbol), using the symbol information in the RVSB map to make this selection by the symbol.

The enhanced MLSE module 326 takes one of the 8 symbols as its data slice prediction and feeds this data slice prediction (symbol decision) as feedback to an equalizer or phase tracker 330.

The enhanced MLSE module 326 follows a more accurate path through the 8-state trellis than the inner decoder 322 because it gets more reliable input from the outer decoder 324 when there are RVSB symbols.

The output of the enhanced MLSE module 326 may be a hard data slice decision or a soft level. Also, the step size of the equalizer LMS algorithm may be changed with any symbol reliability indication from the inner decoder 322 or the outer decoder 324 (see ATSC digital television standard a/54 usage guide).

The designated portion of the first RVSB segment of the data region may contain an optional predetermined coded training sequence known a priori to the transmitter and receiver. When the outer decoder 324 outputs the decoded training sequence, the input to the enhanced MLSE module 326 is switched to a stored form of the decoded training sequence.

While certain modifications of the invention have been discussed above, other modifications may occur to those skilled in the art to which the invention pertains. For example, while the normal ATSC receiver 12 and the robust VSB receiver 14 are shown above as separate receivers, the functions of the two may be combined in the two data paths of a single receiver that is capable of decoding both types of data (ATSC data and robust VSB data).

Accordingly, the description of the present invention is intended to be illustrative only and is intended to teach those skilled in the art the best mode of carrying out the invention. Significant changes in detail may be made without departing from the spirit of the invention and without departing from the exclusive use of all modifications which come within the scope of the appended claims.

Claims (19)

1. An apparatus, characterized in that it comprises:

an input for providing a received digital television signal, wherein the received digital television signal comprises a data frame, the received digital television signal comprises first data symbols and second data symbols having the same pattern, the first data symbols and the second data symbols correspond to different numbers of data bits, and the first and second data symbols are intermixed within the data frame; and

a decoder for decoding at least one of the first and second data symbols.

2. The apparatus of claim 1, wherein the first data symbol comprises an ATSC data symbol and the second data symbol comprises a robust data symbol.

3. The apparatus of claim 1, wherein the data frame comprises a plurality of ATSC data segments, the data frame comprising first data symbols and second data symbols, one complete reed/solomon data block of the first data symbols packed into one complete ATSC data segment, and one complete reed/solomon data block of the second data symbols packed into two complete ATSC data segments.

4. The apparatus of claim 1, wherein the data frame comprises a plurality of ATSC data segments, the data frame comprising first data symbols and second data symbols, one complete reed/solomon data block of the first data symbols packed into one complete ATSC data segment, and one complete reed/solomon data block of the second data symbols packed into four complete ATSC data segments.

5. The apparatus of claim 1, wherein the data frame comprises a plurality of ATSC data segments, the data frame comprising a first data symbol and a second data symbol, the data frame further comprising a third data symbol, the first data symbol, the second data symbol, and the third data symbol corresponding to different numbers of data bits, one complete reed/solomon data block of the first data symbol packed into one complete ATSC data segment, one complete reed/solomon data block of the second data symbol packed into two complete ATSC data segments, and one complete reed/solomon data block of the third data symbol packed into four complete ATSC data segments.

6. The apparatus of claim 1 wherein the decoder includes a first convolutional deinterleaver for deinterleaving the received television signal to produce a deinterleaved signal, wherein the decoder includes a second convolutional deinterleaver for deinterleaving the deinterleaved signal, wherein the first convolutional deinterleaver is characterized by first, second, and third deinterleaving parameters, the first convolutional deinterleaver includes a digital path corresponding to the first deinterleaving parameter, the second deinterleaving parameter corresponds to a unit delay of the path through the first convolutional deinterleaver, the third deinterleaving parameter is equal to a product of the first and second deinterleaving parameters, wherein the second convolutional deinterleaver is characterized by fourth, fifth, and sixth deinterleaving parameters, the second convolutional deinterleaver includes a digital path corresponding to the fourth deinterleaving parameter, the fifth deinterleaving parameter corresponds to a unit delay of the path through the second deinterleaver, the sixth de-interlacing parameter is equal to the product of the fourth and fifth de-interlacing parameters.

7. The apparatus of claim 6, wherein the data frame includes a frame sync segment, and the first and second convolutional deinterleavers are synchronized with the frame sync segment.

8. The apparatus of claim 6, wherein the first interleaving parameter is equal to 52, the second interleaving parameter is equal to 4, the third interleaving parameter is equal to 208, the fourth interleaving parameter is equal to 46, the fifth interleaving parameter is equal to 4, and the sixth interleaving parameter is equal to 184.

9. The apparatus of claim 1, wherein the decoder is configured to decode at least the second and third data symbols.

10. The apparatus of claim 9, wherein the first data symbol comprises an ATSC data symbol and the second data symbol comprises a robust data symbol.

11. The apparatus of claim 9 wherein the decoder includes a first convolutional deinterleaver for deinterleaving the received television signal to produce a deinterleaved signal, wherein the decoder includes a second convolutional deinterleaver for deinterleaving the deinterleaved signal, wherein the first convolutional deinterleaver is characterized by first, second, and third deinterleaving parameters, the first convolutional deinterleaver includes a digital path corresponding to the first deinterleaving parameter, the second deinterleaving parameter corresponds to a unit delay of the path through the first convolutional deinterleaver, the third deinterleaving parameter is equal to a product of the first and second deinterleaving parameters, wherein the second convolutional deinterleaver is characterized by fourth, fifth, and sixth deinterleaving parameters, the second convolutional deinterleaver includes a digital path corresponding to the fourth deinterleaving parameter, the fifth deinterleaving parameter corresponds to a unit delay of the path through the second deinterleaver, the sixth de-interlacing parameter is equal to the product of the fourth and fifth de-interlacing parameters.

12. The apparatus of claim 11, wherein the data frame includes a frame sync segment, and the first and second convolutional deinterleavers are synchronized with the frame sync segment.

13. The apparatus of claim 11, wherein the first interleaving parameter is equal to 52, the second interleaving parameter is equal to 4, the third interleaving parameter is equal to 208, the fourth interleaving parameter is equal to 46, the fifth interleaving parameter is equal to 4, and the sixth interleaving parameter is equal to 184.

14. The apparatus of claim 1, wherein the received digital television signal includes a third data symbol in addition to the first data symbol and the second data symbol, the first data symbol, the second data symbol, and the third data symbol corresponding to different numbers of data bits, the decoder configured to decode at least the second and third data symbols.

15. The apparatus of claim 14, wherein the first data symbol comprises an ATSC data symbol, the second data symbol comprises a first robust data symbol, and the third data symbol comprises a second robust data.

16. The apparatus of claim 14 wherein the decoder includes a first convolutional deinterleaver for deinterleaving the received television signal to produce a deinterleaved signal, wherein the decoder includes a second convolutional deinterleaver for deinterleaving the deinterleaved signal, wherein the first convolutional deinterleaver is characterized by first, second, and third deinterleaving parameters, the first convolutional deinterleaver includes a digital path corresponding to the first deinterleaving parameter, the second deinterleaving parameter corresponds to a unit delay of the path through the first convolutional deinterleaver, the third deinterleaving parameter is equal to a product of the first and second deinterleaving parameters, wherein the second convolutional deinterleaver is characterized by fourth, fifth, and sixth deinterleaving parameters, the second convolutional deinterleaver includes a digital path corresponding to the fourth deinterleaving parameter, the fifth deinterleaving parameter corresponds to a unit delay of the path through the second deinterleaver, the sixth de-interlacing parameter is equal to the product of the fourth and fifth de-interlacing parameters.

17. The apparatus of claim 16, wherein the data frame includes a frame sync segment, and the first and second convolutional deinterleavers are synchronized with the frame sync segment.

18. The apparatus of claim 16, wherein the first interleaving parameter is equal to 52, the second interleaving parameter is equal to 4, the third interleaving parameter is equal to 208, the fourth interleaving parameter is equal to 46, the fifth interleaving parameter is equal to 4, and the sixth interleaving parameter is equal to 184.

19. The apparatus of claim 1 wherein the first data symbol comprises a first 8VSB data symbol, and wherein the second data symbol comprises a second 8VSB data symbol.