HK1055857B - Method and apparatus for recovery of particular bits of received frame - Google Patents
Method and apparatus for recovery of particular bits of received frame Download PDFInfo
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- HK1055857B HK1055857B HK03108152.4A HK03108152A HK1055857B HK 1055857 B HK1055857 B HK 1055857B HK 03108152 A HK03108152 A HK 03108152A HK 1055857 B HK1055857 B HK 1055857B
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Description
Technical Field
The present invention relates to communications. More particularly, the present invention relates to novel methods and apparatus for recovering specific bits of an erroneous frame.
Background
Communication systems have been developed that allow information signals to be transmitted from an originating station to a physically separate destination station, the information signals being first converted into a form suitable for efficient transmission over a communication channel when the information signals are transmitted from the originating station over the communication channel. The conversion or modulation of the information signal involves changing the parameters of the carrier in some manner in accordance with the information signal so that the resulting modulated carrier spectrum is confined within the channel bandwidth. At the destination station, the original message signal is reproduced from the modulated version of the carrier wave received after propagation through the channel. Such a recurrence is usually obtained by means of an inverse process employing the modulation process used by the originating station.
Moreover, the transitions are selected according to additional characteristics of the channel, including but not limited to: signal to noise ratio, signal attenuation, time variation, and other features known in the art. Thus, transmitting information signals over a wireless communication channel requires different considerations than transmitting over a wired channel such as coaxial cable, fiber optic cable, and other channels known in the art.
Modulation also facilitates multiple access (i.e., simultaneous transmission), such as transmitting several signals simultaneously over a common channel. Multiple access communication systems often include multiple subscriber units that require intermittent service for relatively short periods of time rather than continuous access to the communication channel.
There are several multiple access communication system techniques such as Time Division Multiple Access (TDMA), Frequency Division Multiple Access (FDMA), and Amplitude Modulation (AM) techniques known in the art as amplitude companded single sideband. Another type of multiple access Spread Spectrum System IS a Code Division Multiple Access (CDMA) modulation System, which conforms to the TIA/EIA/IS-95 Mobile Station-Base Station Compatibility Standard for Dual-Mode Wide-Band Spread Spectrum Cellular System, hereinafter referred to as the IS-95 Standard. CDMA systems support voice and data communications between users over a terrestrial link. The use of CDMA technology IN MULTIPLE ACCESS COMMUNICATION SYSTEMs is disclosed IN U.S. Pat. No.4,901,307, entitled "CDMA COMMUNICATION System Using subscriber station OR TERRESTRIAL REPEATERS," and U.S. Pat. No.5,103,459, entitled "SYSTEM AND METHOD FOR GENERATING COMMUNICATION System A CDMA COMMUNICATION System," both assigned to the assignee of the present invention and incorporated herein by reference.
Multiple access techniques are disclosed in the above-mentioned U.S. patent No.4,901,307, which allow a large number of mobile telephone system users having transceivers to communicate via satellite repeaters or ground stations using CDMA spread spectrum communication signals. When using CDMA communication, the spectrum can be reused multiple times, thus allowing for increased capacity for users in the system. The use of CDMA results in much higher efficiency of spectrum usage compared to the use of other multiple access techniques.
Typically, the transmitted information signal is divided into a number of "frames", each frame comprising a specified number of information bits and a number of quality measure bits. Each frame is processed in accordance with a selected modulation scheme and transmitted over a communication channel. At the destination station, the frame is extracted from the communication channel by demodulation. To ensure the integrity of the information in the extracted signal, the information bits in the frame are maintained by a quality measure derived from the information bits. Such a quality measure may be a parity bit, a Cyclic Redundancy Check (CRC), or any other quality measure known to those skilled in the art. After extracting the signal from the received frame, a quality measure is determined from the extracted information bits and compared with the extracted quality measure. If the two quality measures match, the frame is considered to be received correctly. Otherwise, the frame is erased.
The integrity check described above works well when all information bits in a frame are of equal importance, but some applications use bits in a frame that are grouped into blocks of different importance. An example of a frame of such a structure IS disclosed in a copending provisional patent (serial No. 60/175,371) entitled "adapting the WCDMA AMR Data Rates in IS-2000MC," filed 10.3.january 2000, assigned to the assignee of the present invention and incorporated herein by reference. An Adaptive Multi-Rate (AMR-Adaptive Multi-Rate) speech coder groups information bits into three classes called class a, class B and class C. In Wideband Code Division Multiple Access (WCDMA) systems, each type of bit is transmitted on a different transport channel with possibly different codes and rate matching. The class a bits are the most significant bits, followed by the class B bits and finally the class C bits. The WCDMA method uses 8-bit CRC and tail-off convolutional coding for class a bits, no CRC but only tail-off convolutional coding for class B bits, and no CRC and convolutional coding for class C bits. The Industry Standard-2000 Multi-Carrier (IS-2000MC) of the Telecommunications Industry Association (TIA) provides an AMR speech encoder by forming a single frame containing all three classes A, B and C in reverse order of the AMR information bit classes so that the last (least significant) bit class (class C) IS sent first. Because flexible rate insertion (puncturing) starts from a signal that is first encoded and repeated and stops after the necessary number of information is inserted, bits located at the end of a frame are more reliable. Insertion is a technique that affects bits that legally belong to a certain location or locations in a frame. Thus, for example, in power control insertion, information bits at certain locations are replaced by power control bits. In another example, interleaving may produce bits that exceed the length of the frame, with the excess bits being discarded. The frame is encoded with a single tail-biting convolutional code. A single CRC whose length depends on the number of information bits is determined by all the information bits. Such a frame is depicted in fig. 1. Fig. 1 shows a frame structure 100 in which information bits in a frame are classified into a class a 106, a class B104, and a class C102. Different classes have different importance. All information bits are protected by a single CRC108, as is known in the art. The frame also contains tail bits 110. Tail bit 110 has no information and is all 0's. The tail bits 110 are used to initialize the encoder (not shown) for the next frame. However, if the integrity check of the CRC fails, all information bits, regardless of their significance, are unrecoverable.
The above description uses a wireless communication system as a specific example of frames with different importance bits. Those skilled in the art will appreciate that this is for exemplary purposes only, as the problem of recovery of a particular bit of an erased frame is an inherent problem in any communication system.
Because it is desirable to recover one or more blocks of bits that are relatively more important from an erased frame, there is a need in the art for an integrity checking mechanism that enables recovery of one or more blocks of bits from an erased frame.
Disclosure of Invention
The present invention is directed to a method and apparatus for recovering specific bits of a received frame in a communication system.
Thus, at the originating end a data frame is first formed by determining an external quality measure in terms of a number of information bits. Then, at least one internal quality measure is determined in terms of a set of information bits. A frame comprising at least a plurality of information bits, an outer quality measure and at least one inner quality measure is transmitted to the destination.
When the outer quality measure indicates that the frame was received correctly, the target station first attempts to recover at least one group of information bits. When the frame is not received correctly, at least one set of information bits can still be recovered. Recovery is possible when an internal quality measure corresponding to at least one group of information bits indicates that at least one group of information bits was correctly received within a frame.
According to a first aspect of the invention, there is provided a method comprising: receiving a plurality of information bits; determining an outer quality measure according to the plurality of information bits and an inner quality measure according to at least one information bit group comprised in the plurality of information bits; and composing a frame comprising a plurality of information bits, an outer quality measure for protecting said plurality of information bits and an inner quality measure for protecting said at least one group of information bits.
According to a second aspect of the invention, there is provided a method comprising: receiving a frame comprising an outer quality measure and an inner quality measure, said outer quality measure being used to verify whether said frame was correctly received and said inner quality measure being used to verify whether a corresponding group of information bits contained in said frame has been correctly received; if it is determined that the outer quality measure indicates that the frame has been correctly received, recovering information contained in the frame, including the corresponding set of information bits; and restoring the corresponding set of information bits if it is determined that the outer quality measure indicates that the frame was not correctly received and the inner quality measure indicates that the corresponding set of information bits was correctly received.
According to a third aspect of the invention, there is provided an apparatus comprising: means for generating a plurality of information bits; and means for determining an outer quality measure from said plurality of information bits, determining an inner quality measure from an information bit group comprised in said plurality of information bits, forming a frame comprising the plurality of information bits, the outer quality measure for protecting said plurality of information bits and the inner quality measure for protecting said at least one information bit group.
According to a fourth aspect of the invention, there is provided an apparatus comprising: decoder for decoding a frame comprising an outer quality measure and an inner quality measure, the outer quality measure being used for verifying whether the frame has been correctly received and the inner quality measure being used for verifying whether a corresponding group of information bits contained in the frame has been correctly received, the decoder retrieving information contained in the frame, including the corresponding group of information bits, if it is determined that the outer quality measure indicates that the frame has been correctly received, and the decoder retrieving the corresponding group of information bits if it is determined that the outer quality measure indicates that the frame has not been correctly received and the inner quality measure indicates that the corresponding group of information bits has been correctly received.
According to a fifth aspect of the invention, there is provided a system comprising: a transmitter for composing and transmitting a frame comprising a plurality of information bits, an outer quality measure for protecting said plurality of information bits and an inner quality measure for protecting a specific part of said plurality of information bits; and a receiver for receiving and decoding said frame, said receiver recovering information contained in said frame, including a specific part of said plurality of information bits, if it is determined that said outer quality measure indicates that said frame has been correctly received, and recovering a specific part of said plurality of information bits if it is determined that said frame has not been correctly received and said inner quality measure indicates that said specific part has been correctly received.
Drawings
The features, objects, and advantages of the present invention will become more apparent from the detailed description set forth below when taken in conjunction with the drawings in which like reference characters identify correspondingly throughout and wherein:
fig. 1 shows a frame structure of groups of bits with different importance protected by a single quality measure;
fig. 2 is a flow diagram of a method for recovering particular bits from a data frame using multiple CRCs, according to one embodiment.
Fig. 3 shows a frame structure of groups of bits with different importance protected by a plurality of quality measures according to an embodiment of the invention; and
fig. 4 is a simplified circuit block diagram according to an embodiment of the present invention.
Detailed Description
Fig. 2 is a flow diagram of a method for recovering particular bits from a data frame using multiple CRCs, according to one embodiment.
Receiving information bits forming a frame at step 200. in one embodiment of the present invention, the information bits are generated by an AMR speech encoder. The control flow then proceeds to step 202.
In step 202, an outer quality measure is determined in terms of all information bits. In one embodiment the quality measure is CRC and the flow of control then proceeds to step 204.
At step 204, an internal quality measure is determined. By way of explanation, a certain group or groups of bits of information bits in a frame may be considered of higher importance and should be further protected. Thus, an additional internal quality measure is determined in terms of each such set of information bits. In one embodiment, the inner quality measure is a CRC. In one embodiment, using information bits generated by an AMR speech encoder, an internal CRC is used that holds a set of bits (class A). Control then proceeds to step 206.
In step 206, a frame is formed containing information bits, an inner quality measure, an outer quality measure and tail bits. In one embodiment, the information bits generated by the AMR vocoder are used to generate the frame structure shown in FIG. 3. The flow of control then proceeds to step 208.
At step 208, a frame is transmitted from an originating station (not shown) to a destination station (not shown). Step 208 includes any processing of the frame prior to transmission. Those skilled in the art recognize that processing depends on many variables. Such variables include, but are not limited to: transmission media (i.e., wireless or wireline), modulation (i.e., code division, frequency division, time division), and other variables well known to those skilled in the art. This process is not discussed in depth because the use of the present invention is independent of those variables. In one embodiment, the AMR vocoder data rate in IS-2000MC IS adjusted and processing IS done in accordance with IS-2000 MC. The flow of control then proceeds to step 210.
At step 210, a frame is received at a destination station (not shown). Step 210 includes any processing of the previous frame prior to decoding. In one embodiment, the AMR vocoder data rate in IS-2000MC IS adjusted and processing IS done as IS-2000 MC. The flow of control then proceeds to step 212.
At step 212, the frame is decoded. As used at step 212, the term "decode" describes a process that receives the encoded frame and outputs a signal indicating whether the frame was received correctly or whether the frame was erased. An external quality measure is used at step 212. In one embodiment, the decoder (not shown) has no information about the rate at which the frame was transmitted by the originating station (not shown). Thus, the decoder must also determine at which of several rates the originating station transmits the frame. A detailed example OF such a decoder is disclosed in U.S. patent No.5,751,725 entitled "METHOD AND APPARATUS FOR DETERMINING THERATE OF RECEIVED DATA IN A VARIABLE RATE communication system," which is assigned to the assignee OF the present invention AND incorporated herein by reference. Referring to fig. 4, a simplified description of an exemplary decoding process according to U.S. patent No.5,751,725 is provided. Those skilled in the art will recognize that this description is for exemplary purposes only and that any other structure capable of performing the described functions may be used. In a further embodiment, the decoder has information about the rate at which the frame was transmitted by the originating station. The flow of control then proceeds to step 214.
At step 214, a further processing decision for the frame is made based on the signal indicating whether the frame was received correctly or erased. If the frame is declared to be received correctly, control flow continues at step 216, otherwise control flow continues at step 218.
At step 216, the frame is processed according to its intended application because the information bits in all frames are correctly received. In one embodiment, adjusting the AMR comment speech encoder rate in IS-2000MC IS accomplished by an IS-2000MC compliant multipath Sublayer. The flow of control then proceeds to step 218.
At step 218, a determination is made whether the frame contains an internal quality measure. In one embodiment, the decision is made on the assumption of a data rate because the protocol that manipulates the framing of the frame determines what data rate contains an internal quality measure, and in another embodiment, the frame may contain an extra bit indicating whether the frame contains an internal quality measure. If the frame does not contain internal measures, control flow continues at step 220, otherwise control flow continues at step 222.
At step 220, frame processing is terminated and the frame is discarded.
In step 222 the frame is again subjected to integrity-related processing, which is the integrity of one or more groups of bits of the frame protected by the corresponding internal quality measure. An embodiment of integrity determination is discussed in detail with reference to fig. 4. The flow of control then proceeds to step 224.
At step 224, the result of the integrity determination is checked and if the internal quality measure indicates that the integrity of the group of bits is intact, the control flow continues at step 226. Otherwise the control flow continues at step 228.
At step 226, the groups of bits are processed according to the desired function. One example of such processing is to send groups of bits to an AMR vocoder (not shown).
The processing of the frame is ended and the frame is discarded, step 228.
Fig. 3 shows a frame structure 300 with groups of bits of different importance protected by quality measures according to an embodiment of the invention. The frame structure 300 contains three types of information bits: class A306, class B304, and class C302. Different classes have different importance. For purposes of discussion, assume that class A306 information bits are more important than class B304 and class C302. All information bits are protected by an outer CRC 310. The more important class a 306 information bits are further protected with an inner CRC 308. The frame also includes tail bits 312. The tail bits carry no information and are all 0's. The tail bits 312 are used to initialize the encoder (not shown) for the next frame.
Although a particular embodiment of the frame structure is described as having only one bit group (class a 306) protected by one internal CRC, those skilled in the art will appreciate that this method can be generalized to any number of groups. Thus, if additional protection of class B304 is desired, an additional inner CRC (not shown) protecting class B304 may be added to the frame structure 300.
Those skilled in the art will appreciate that there are many circuit configurations that can form the frame structure 300. For example, such a circuit configuration may be: a general purpose processor, a digital signal processor, a programmable logic array, or any other device designed to perform the functions described herein as known to those skilled in the art. Further, a processor may receive a set of instructions from a memory coupled to the processor. The memory may be part of one or more of the processors described above, or a separate unit. Memory implementation is a design choice. Thus, the memory may be any medium capable of storing information, such as a magnetic disk, a semiconductor integrated circuit, and other storage media known to those skilled in the art.
Fig. 4 is a simplified block diagram of a circuit according to an embodiment of the present invention.
The frames output by demodulator 402 are provided to multi-rate decoder 404, which provides a frame for error correction decoder 404 to decode data according to a predetermined set of hypothesized rates. In the exemplary embodiment, DECODER 404 is a multi-rate Viterbi DECODER disclosed in U.S. Pat. No.5,710,784 entitled "Multi SERIAL VITERBI DECODER FOR CDMA SYSTEM PAPLICATIONS," which is assigned to the assignee of the present invention and incorporated herein by reference.
In an exemplary embodiment, the decoder 404 decodes the frame symbols for each possible rate to provide a decoded data frame, respectively, and stores the decoded frames in the buffers 406a, 406b, 406c, 406 d. Although only four data rates are shown, those skilled in the art will recognize that the concepts are equally applicable to any number of data rates. The output of each data buffer 406a, 406b, 406c, 406d is provided to Rate Detection Algorithm (RDA) logic 408.
RDA logic 408 includes a CRC detector 408 a. The CRC detector 408a determines whether the CRC received in the frame matches the CRC determined from each decoded data frame. CRC detector 408a performs a CRC check on the CRC bits in the four decoded frames to help determine whether the currently received frame was sent at full rate, half rate, 1/4 rate, or 1/8 rate. The CRC detector 408a provides four check bits, C1, C2, C4, and C8, corresponding to possible rates.
Further, in one embodiment, RDA logic 408 includes a Symbol Error Rate (SER) detector 408 b. SER detector 408b receives decoded bits 410. SER detector 408b also receives estimates of the symbol data received from buffers 406a, 406b, 406c, 406 d. SER detector 408b re-encodes the decoded bits 410 and compares them to estimates of the symbol data received from buffers 406a, 406b, 406c, 406 d. The SER is a count of the number of differences between the re-encoded symbol data and the symbol data received from the buffers 406a, 406b, 406c, 406 d. Thus, SER detector 408b produces four SER values: SER1, SER2, SER4, and SER8, the SER values at different frame rates are normalized to account for differences in the number of signals per frame. The SER value helps to provide a determination of the rate of the current frame and the integrity of the frame in addition to the CRC.
In addition, in one embodiment, the RDA logic 408 includes a Yamamoto measure detector 408c that provides a measure of confidence in terms of the difference between the selected path through the grid (trellis) and the next closest path through the grid. While CRC detection depends on bits in each of the four decoded frames, Yamamoto detection depends on frame processing prior to decoding. Yamamoto detector 408c provides four Yamamoto values for each of the four possible rates: y1, Y2, Y4 and Y8.
RDA logic 408 receives CRC detection bits, SER values, and Yamamoto values from detectors 408a, 408b, 408c, respectively. The RDA logic 408 then determines at which of the four rates the currently received frame was transmitted. A signal is provided to the decode frame buffers 406a, 406b, 406c, 406d at a rate determined by the RDA logic 408. The particular frame buffer 406a, 406b, 406c, 406d outputs the stored decoded frames for further processing at a determined rate or does not output frames if an erasure is declared. In yet another embodiment, the RDA logic 408 outputs a signal indicating a frame erasure if an erasure is declared.
When the RDA logic 408 declares a frame erasure, the contents of those frame buffers 406a, 406b, 406c, 406d containing frames with internal quality measures are provided to an internal quality measure Processor (Inner quality measure Processor-IQMP) 412. In one embodiment, IQMP412 functions similarly to RDA logic 408 by receiving data decoded frames containing frames with an internal quality measure at a possible rate and outputting a signal indicating whether the bit-set protected by the internal quality measure is complete. In one embodiment, IQMP412 has no information about the rate at which frames are transmitted by the originating station (not shown). Therefore, the IQMP412 must also determine at which of several rates the originating station transmits frames. Thus, the structure of the IQMP412 may advantageously be similar to the RDA logic 408. Thus, in one embodiment, IQMP412 comprises CRC detector 412a, SER detector 412b, and Yamamoto metric detector 412c, which operate in a substantially similar manner as CRC detector 408a, SER detector 408b, and Yamamoto metric detector 408 c. The CRC detector 412a, SER detector 412b and Yamamoto metric detector 412c only function on bit groups of the frame that are protected by the internal quality metric.
IQMP412 receives the CRC check bits, SER values, and Yamamoto values from detectors 412a, 412b, 412c, respectively. The IQMP412 then determines at which rate the currently received frame is transmitted, including an internal quality measure. The decoded byte(s) at the decided rate are output for further processing at the rate determined by IQMP 412. Otherwise, if IQMP412 cannot determine the rate, the frame is discarded.
Although decoder 404, RDA logic 408 and IQMP412 are shown as separate units, those skilled in the art will appreciate that physical separation is merely for ease of illustration. Decoder 404, RDA logic 408, and IQMP412 may be combined into a single processor that performs the above-described processing. Thus, such a processor may be, for example, a general purpose processor, a digital signal processor, a programmable logic array, or any other device designed to perform the functions described herein and known to those skilled in the art. Further, the processor may receive a set of instructions from a memory coupled to the processor. The memory may be part of the one or more processors described above, or a separate unit. The implementation of the memory is a design choice. Thus, the memory may be any medium capable of storing information, such as a magnetic disk, a semiconductor integrated circuit, or any other storage medium known to those skilled in the art.
The previous description of the preferred embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without the use of the inventive faculty. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (24)
1. A method, comprising:
receiving a plurality of information bits;
determining an outer quality measure according to the plurality of information bits and an inner quality measure according to at least one information bit group comprised in the plurality of information bits; and
forming a frame comprising a plurality of information bits, an outer quality measure for protecting said plurality of information bits and an inner quality measure for protecting said at least one group of information bits.
2. The method of claim 1, wherein said external quality measure comprises a cyclic redundancy check.
3. The method of claim 1, wherein said outer quality measure comprises parity bits.
4. The method of claim 1, wherein said internal quality measure comprises a cyclic redundancy check.
5. The method of claim 1, wherein said internal quality measure comprises parity bits.
6. The method of claim 1, further comprising:
transmitting the frame to a destination;
receiving the frame at a destination; and
determining whether the frame was received correctly based on an external quality measure contained in the frame.
7. The method of claim 6, further comprising:
if said frame is not received correctly, determining whether said at least one group of information bits was received correctly based on an internal quality measure contained in said frame; and
restoring the at least one group of information bits if the inner quality measure indicates that the at least one group of information bits has been correctly received.
8. A method, comprising:
receiving a frame comprising an outer quality measure and an inner quality measure, the outer quality measure being used to verify whether the frame was correctly received and the inner quality measure being used to verify whether a corresponding group of information bits contained in the frame has been correctly received;
if it is determined that the outer quality measure indicates that the frame has been correctly received, recovering information contained in the frame, including the corresponding set of information bits; and
restoring the corresponding set of information bits if it is determined that the outer quality measure indicates that the frame was not correctly received and the inner quality measure indicates that the corresponding set of information bits has been correctly received.
9. The method of claim 8, further comprising:
determining whether the frame has been correctly received by checking the outer quality measure; and
if the outer quality measure indicates that the frame was not correctly received, it is determined whether the corresponding set of information bits has been correctly received by checking the inner quality measure.
10. The method of claim 8, wherein said internal quality measure comprises a cyclic redundancy check.
11. The method of claim 8, wherein said internal quality measure comprises parity bits.
12. The method of claim 8, further comprising:
discarding the frame if the outer quality measure indicates that the frame was not correctly received and the inner quality measure indicates that the corresponding portion of the frame was not correctly received.
13. The method of claim 8, wherein said outer quality measure comprises a cyclic redundancy check and said inner quality measure comprises a cyclic redundancy check.
14. An apparatus, comprising:
means for generating a plurality of information bits; and
-means for determining an outer quality measure from said plurality of information bits, -determining an inner quality measure from an information bit group comprised in said plurality of information bits, -forming a frame comprising the plurality of information bits, the outer quality measure for protecting said plurality of information bits and the inner quality measure for protecting said at least one information bit group.
15. The apparatus of claim 14, wherein said external quality measure comprises a cyclic redundancy check.
16. The apparatus of claim 14 wherein said outer quality measure comprises parity bits.
17. The apparatus of claim 14, wherein said internal quality measure comprises a cyclic redundancy check.
18. The apparatus of claim 14, wherein said internal quality measure comprises parity bits.
19. The apparatus of claim 14, further comprising:
-means for receiving said frame at a destination, said means restoring said plurality of information bits, including said information bit-set, if it is determined that said outer quality measure in said frame indicates that said frame has been correctly received, and said means restoring said information bit-set, if it is determined that said outer quality measure contained in said frame indicates that said frame has not been correctly received and said inner quality measure contained in said frame indicates that said information bit-set has been correctly received.
20. An apparatus, comprising:
decoder for decoding a frame comprising an outer quality measure and an inner quality measure, the outer quality measure being used for verifying whether the frame has been correctly received and the inner quality measure being used for verifying whether a corresponding group of information bits contained in the frame has been correctly received, the decoder retrieving information contained in the frame, including the corresponding group of information bits, if it is determined that the outer quality measure indicates that the frame has been correctly received, and the decoder retrieving the corresponding group of information bits if it is determined that the outer quality measure indicates that the frame has not been correctly received and the inner quality measure indicates that the corresponding group of information bits has been correctly received.
21. The apparatus of claim 20, wherein said decoder determines whether said frame has been correctly received by checking said outer quality measure, and if said outer quality measure indicates that said frame has not been correctly received, determines whether said corresponding group of information bits has been correctly received by checking said inner quality measure.
22. A system, comprising:
a transmitter for composing and transmitting a frame comprising a plurality of information bits, an outer quality measure for protecting said plurality of information bits and an inner quality measure for protecting a specific part of said plurality of information bits; and
a receiver for receiving and decoding said frame, said receiver recovering information contained in said frame, including a specific part of said plurality of information bits, if it is determined that said outer quality measure indicates that said frame has been correctly received, and recovering a specific part of said plurality of information bits if it is determined that said frame has not been correctly received and said inner quality measure indicates that said specific part has been correctly received.
23. The system of claim 22, wherein said transmitter includes a processor for determining said outer quality measure based on said plurality of information bits and determining an inner quality measure based on said particular portion and forming said frame.
24. The system of claim 22, wherein said receiver comprises a decoder for determining whether said frame has been correctly received based on an external quality measure contained in said frame and for determining whether said particular portion has been correctly received based on an internal quality measure contained in said frame.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US09/588,072 | 2000-06-05 | ||
| US09/588,072 US7159164B1 (en) | 2000-06-05 | 2000-06-05 | Method and apparatus for recovery of particular bits of a frame |
| PCT/US2001/018254 WO2001095501A2 (en) | 2000-06-05 | 2001-06-04 | Method and apparatus for recovery of particular bits of received frame |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| HK1055857A1 HK1055857A1 (en) | 2004-01-21 |
| HK1055857B true HK1055857B (en) | 2006-09-22 |
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