HK1049914A - Circuit board, method for manufacturing same, and high-output module - Google Patents

Description

Circuit board, manufacturing method thereof and high-output module

Technical Field

The present invention relates to a ceramic circuit board for a semiconductor device, and to a method of manufacturing such a circuit board, and to a high-output module.

Background

The semiconductor element includes: LD (laser diode or semiconductor laser), APD (avalanche photodiode), and other such optical semiconductor elements; HEMT (high mobility transistor), HBT (hetero bipolar transistor), and other semiconductor elements using GaAs, InP, Si/SiGe, or the like capable of high-speed operation; IGBTs (insulated gate bipolar transistors) and other such inverter/rectifier silicon devices; BiTe and other such thermoelectric semiconductor elements. For higher integration and speed, circuit boards for these component ranges require low electrical resistance, good heat radiation, well-matched thermal expansion, and very fine wiring patterns.

A conventional circuit board is described by referring to fig. 4A to 4F. As shown in fig. 4A-4E, the method has so far been described as follows. A metal mask or photo mask 2 is applied to the ceramic substrate 1 (fig. 4A), a first metal layer 3 is formed by evaporation or sputtering, and the metal mask or photo mask 2 is removed (fig. 4B), followed by formation of a resist layer 4 (fig. 4C), and then a second metal layer 5 is formed by evaporation or sputtering (fig. 4D), and the resist layer is removed to obtain a final product (fig. 4E).

The ceramic substrate 1 is made of AlN or alumina. This has been disclosed, for example, in Japanese patent No. 2-271585. The first metal layer serves as a resist layer in which TaN, NiCr or tungsten is typically used. The second metal layer serves as a conductive line or an inductor and has a laminated structure including Ti/Mo/Au, Ti/Pt/Au, Cr/Mo/Au, or Ti/V/Au. The reason why titanium or chromium is used for the layer in contact with the ceramic substrate is to improve adhesion to the substrate. Because platinum, molybdenum or vanadium has a high melting point, it is inserted in the middle in order to prevent the top layer from alloying with the metal used in the contact portion, such as titanium or chromium. Gold is used as the top layer, which is selected for smooth wire bonding or die bonding. An example of the material combination in the final product is shown in fig. 4F.

For a substrate for a power semiconductor, copper or gold is applied to the entire upper surface of a ceramic substrate by evaporation, plating, or melting, followed by forming a wiring pattern by etching.

In order to produce high-output modules, semiconductor elements are mounted on these circuit boards by a die bonding method.

For the current high output module, in addition to making the module smaller to reduce the size of the final device, the wiring pattern needs to be made finer and reduced in size so that it can handle higher frequencies. In order to reduce the loss of high frequency performance and to reduce power consumption, it is also necessary to reduce the resistance of the lead metal portion, and for this reason it is necessary to increase the thickness of the wiring pattern by using a thick film technique.

In order to satisfy both of these requirements, it is necessary that the thickness of the metal layer used as the lead is less than 5 μm, and it is also necessary that the aspect ratio (D/L) between the thickness D of the lead and the distance L between adjacent wiring pattern lines is D/L > 0.4, but the conventional circuit board cannot be handled so that both of these requirements can be satisfied.

The reason for this is that a fine wiring pattern cannot be formed on a substrate on which a thick film resist layer is formed by an evaporation method by means of a metal mask or a photomask with a fine wiring method conventionally used in practice, and the evaporation must be continuously performed for a long time in order to obtain a thick film, so that practical application is difficult. Further, when the wiring pattern is formed by etching, since side etching occurs, it is difficult to perform fine processing of the pattern smaller than the thickness of the lead, and etching removal is particularly difficult. Therefore, a small high-performance and high-output module cannot be realized.

Summary of The Invention

An object of the present invention is to provide a circuit board having a thick film fine wiring pattern and realize a miniaturized high-performance high-output module.

In order to solve the above problems, the present invention is configured as follows.

(1) A circuit board includes: a first metal layer pattern formed on the ceramic substrate; a second metal layer pattern formed on the first metal layer; and forming a third metal layer covering the upper surface of the second metal layer and most of the side surfaces thereof, wherein the first metal layer and a portion of the second metal layer not covered by the third metal layer are reduced in width by etching.

(2) The circuit board according to (1), wherein the combined thickness D (μm) of the first, second and third metal layers and the distance L (μm) between adjacent wiring pattern lines satisfy the following relationship,

D/L＞0.4。

(3) the circuit board according to (1) or (2), wherein the combined thickness D μm of the first, second and third metal layers is at least 5 μm.

(4) The circuit board according to any one of (1) to (3), wherein the second metal layer comprises at least one metal selected from the group consisting of copper, nickel, silver and aluminum.

(5) The circuit board according to any one of (1) to (4), wherein the outermost layer of the third metal layer is gold.

(6) The circuit board according to any one of (1) to (5), wherein the ceramic substrate comprises at least one member selected from the group consisting of alumina, AlN, and Si₃N₄A ceramic in an amount of at least 90% by weight.

(7) The circuit board according to any one of (1) to (5), wherein the ceramic substrate is diamond or cBN.

(8) A method of making a circuit board comprising:

evaporating or sputtering a first metal layer on the ceramic substrate;

forming a resist pattern;

plating a second metal layer on the first metal layer by using the resist layer as a mask;

making the resist layer into a thin layer;

plating the upper surface of the second metal layer and most of the side surface of the second metal layer to form a third metal layer;

the resist layer is removed and then the first metal layer is etched such that the first metal layer and a portion of the second metal layer not covered by the third metal layer are reduced in width by the etching.

(9) A high-output module in which at least one high-output semiconductor element generating heat of at least 10mW is mounted on a circuit board according to any one of (1) to (7) via solder or a conductive resin.

Brief description of the drawings

Fig. 1 is a sectional view illustrating an example of wiring in a circuit board of the present invention.

Fig. 2A-2H are simplified diagrams illustrating the steps of circuit board fabrication of an example of the invention.

Fig. 3 is a schematic diagram of the structure of a high output module produced in the example.

Fig. 4A-4E are diagrams illustrating steps in fabricating a conventional circuit board, and fig. 4F shows a material composition diagram of the completed circuit board.

Detailed description of the preferred embodimentsDetailed description of the invention

The circuit board of the present invention is manufactured as follows. First, a first metal layer, such as Ti/Mo/Ni, is deposited or sputtered on a ceramic substrate to adhere well to the substrate. A photoresist pattern is formed on the first metal layer using a photomask. At this stage, the entire surface of the substrate can be used as an electrode, and thus can be selectively plated to form a second metal layer thick film where there is no photoresist. A thin resist layer is then formed. A third metal layer such as gold, Ni/Au or a layer having a multilayer structure in which an intermediate layer (a layer preventing diffusion of gold) such as palladium, platinum, molybdenum, tungsten or vanadium is interposed between the nickel and gold layers, for example, a Ni/Pt/Au layer, is formed by plating on the second metal layer. The resist layer is made as a thin layer as described above, allowing plating to cover the entire upper surface of the second metal layer and the removed sidewalls of the resist layer. After this, the resist layer is entirely removed.

The first metal layer not covered by the third metal layer is then removed by etching. If the outermost layer of the third metal layer is not etched by the etching liquid used on the first metal layer, the portion covered by the third metal layer is not etched, which allows selective etching. For example, if the outermost layer of the third metal layer is gold and the first metal layer is comprised of Ti/Mo/Ni, gold will not be etched by the etching solutions used for nickel and molybdenum, and thus gold can be used as a mask for etching here. Titanium dissolves only in a separate hydrofluoric acid based etching solution, but gold can be used as a mask for selective etching since gold is not even etched by such an etching solution.

Fig. 1 depicts an example of a layer structure of a metal layer obtained in this way. The sidewalls, which are not covered by the gold of the third metal layer, have been excavated by the sidewall etch, with the titanium being even larger.

It is also possible to initially apply a chrome-based (e.g., NiCr) metallization pattern as the lowermost metal layer to position the photomask or as a resist layer. This lowermost metal layer will not be etched by any etching liquid and will therefore remain to the end. It also has good adhesion to ceramics.

With the present invention, the second metal layer can be formed by a plating method, and therefore the metal layer can be easily made into a thick film, and as mentioned above, if the second metal layer is partially covered with the third metal layer, the outermost layer of the third metal layer is not etched by the etching liquid for the first metal layer, and then the wiring pattern can be formed by etching.

The first metal layer has a multi-layer structure, for example, including Ti/Mo/Ni, Ti/Pt/Ni, Ti/V/Ni, or Ti/Pd/Ni. The thickness of the first metal layer is suitably 0.12 to 1.2 μm. If this layer is too thin, it is difficult to obtain uniform metallization over the entire upper surface of the substrate, but if this layer is too thick, there will be too much sidewall etching to make fine processing difficult. When the first metal layer is composed of Ti/Mo/Ni, the thickness of titanium should be 0.01 to 0.3 μm, the thickness of molybdenum should be 0.01 to 0.3 μm, and the thickness of nickel should be 0.1 to 0.6 μm.

In order for the combined thickness of the first, second and third metal layers to be at least 5 μm, the thickness of the resist layer formed over the first metal layer should be at least 5 μm. If the resist layer is too thin, the second metal layer will cover the top of the resist layer, resulting in an undesirable mushroom shape. Further, adjacent lines of the second metal layer are interconnected on the resist layer. Although it is difficult to increase the thickness of the resist layer, the thickness can be increased by optimizing the exposure conditions, making it possible to form a fine wiring pattern with vertical sidewalls. Light exposure with SOR (synchrotron orbital radiation). The thick film resist layer is formed to minimize the mushroom shape mentioned above.

The pattern accuracy of the photoresist used for plating is from submicron to 10 nm. The micro-space portions between the photoresist lines can be covered with a surfactant. The resist layer can be made thin by polishing or the like.

For the circuit board of the present invention, the second metal layer suitably comprises at least one metal selected from the group consisting of copper, nickel, silver and aluminum. It is possible to form a thick film of at least 5 μm with plating. Even up to 200 um, for example. Keeping the thickness of the second metal layer at least 5 μm can reduce the resistance of the wiring, for example, suitable for thermoelectric semiconductor elements such as peltier elements that require thick wiring to reduce thermal stress. Examples of the second metal layer include copper, Cu/Ni, Ni/Cu/Ni, aluminum, Ni/Al/Ni, and silver. If subsequent alloying is performed to improve the bonding strength, copper alone is good, but the bonding to gold or Ni/Au is better if nickel is formed on top of copper to a thickness of at least 0.5 μm.

It is preferable that as much as possible of the sidewall surface of the second metal layer is covered with the third metal layer. It is desirable that at least 80% of the sidewall surface of the second metal layer is covered with the third metal layer. A sidewall surface covering at least 80% of the second metal layer results in little sidewall etching that is caused during the etching of the first metal layer. If all of the second metal layer is covered, it will be necessary to reduce the thickness of the resist layer used to form the second metal layer. However, it is difficult to uniformly reduce the thickness of the resist layer to the level of the first metal layer. Thus, during the formation of the third metal layer, the resist layer used to form the second metal layer serves as a partial mask, and thus the entire second metal layer is not completely covered by the third metal layer.

Examples of the third metal layer include gold, Ni/Au and a multilayer structure in which an intermediate layer (layer for preventing gold diffusion) such as palladium, platinum, molybdenum, tungsten or vanadium is interposed between nickel and gold layers, such as Ni/Pt/Au. The outermost layer of the third metal layer can be any metal that is not etched by the etching liquid used for the first metal layer, but the use of gold as the outermost layer is particularly suitable in terms of being able to facilitate the subsequent steps.

With the circuit board of the present invention, the second metal layer can be formed by plating, and therefore the metal layer can be a thick film, and a fine wiring pattern with vertical side walls can be formed by using a resist layer, and therefore processing can be performed so that the aspect ratio (D/L) between the lead thickness D (in μm) and the distance L (in μm) between adjacent wiring pattern lines is D/L > 0.4. In the present invention, the lead thickness D is the combined thickness of the first, second and third metal layers, and the line interval L represents the distance between the lines of the second metal layer pattern covered by the third metal layer.

Alumina may be used as the ceramic substrate, but diamond or cBN, or AlN and/or Si-containing, is more suitable since heat radiation is important for high-output modules₃N₄A ceramic in an amount of at least 90% by weight. AlN provides a low cost and high leakage resistance substrate. When strength is required, Si is used₃N₄Is preferred. AlN and Si may also be used₃N₄A mixture of (a). In addition, if the substrate surface is too rough, disconnection may occur due to the thickness of the delaminated first metal layer, and thus surface treatment may be required.

The present invention is also a high-output module comprising at least one high-output semiconductor element generating heat of at least 10mW, which is attached to the above-obtained circuit board by solder or conductive resin.

Examples of the invention will now be described with reference to the accompanying drawings.

Example 1

In fig. 2A, a high heat-radiating ceramic substrate containing AlN in an amount of at least 90% by weight, containing yttrium, and having a thermal conductivity of 170W/(m · K), is used as the ceramic substrate 11. The surface of the ceramic substrate is treated to have a surface roughness Ra of less than 0.8 μm. This is because the thickness of the first metal layer of the subsequent stack is 0.5 μm or less, and disconnection may occur if the surface is too rough.

A metal mask 12 is applied to the ceramic substrate 11 to form an NiCr metal layer 13 as the lowermost metal layer. Sputtering apparatuses are used for this purpose. Although this layer may be used as a resist layer or as a registration mask during subsequent substrate scribing, a NiCr layer is chosen here to be used as a resist layer. FIG. 2B depicts the stage when the metal mask 12 has been removed, after which the NiCr pattern remains on the surface of the ceramic substrate 11 as the lowermost metal layer 13.

Then, as shown in FIG. 2C, a multilayer-structured first metal layer 14Ti/Mo/Ni is vapor-deposited on the entire upper surface of the ceramic substrate 11. The thickness of titanium was 0.05. mu.m, the thickness of molybdenum was 0.05. mu.m, and the thickness of nickel was 0.3. mu.m.

At this time, a resist layer 15 is formed with a photomask, as shown in fig. 2D. The thickness of the resist layer 15 is 120 μm in consideration of the thickness of the second metal layer.

Then, as shown in FIG. 2E, a second metal layer 16 comprising Ni/Cu is formed using the plating stack. In order to improve the adhesion of the plating, the thickness of nickel was 0.5 μm and the thickness of copper was 100 μm.

As shown in FIG. 2F, the thickness of the resist layer is represented by O₂The polishing was reduced to 10 μm. This is because the gold plating proceeds up to the copper portion of the sidewall surface of the second metal layer. At this stage, the third metal layer 17 including Ni/Au is plated so as to cover the copper wire portion. The thickness of nickel was 1.3 μm and the thickness of gold was 1.0. mu.m.

The resist layer is removed as shown in fig. 2G, after which the nickel and molybdenum are etched as shown in fig. 2H. Here, a nickel oxide film is formed on the surface during the protective film removal, and therefore the nickel and molybdenum are etched with a reactive etching solution immediately after the oxide film is removed. The titanium is removed with a hydrofluoric acid based etching solution.

The combined thickness D (μm) of the first, second and third metal layers was 100 μm, and the distance L (μm) between the pattern lines was 40 μm. The resistance between the leads is at least 1M omega and the resulting circuit board also has excellent insulation.

In this example, the metal wiring pattern is formed on one side of the ceramic substrate, but can be applied to both sides.

Example 2

A circuit board having a pattern as shown in FIG. 3 was produced by the method in example 1 above. In the wiring layer 20, the first metal layer is Ti/Mo/Ni, the second metal layer is Ni/Cu, the third metal layer is Ni/Au, and the resist layer 21 is Ni/Cr. A high-output LD (semiconductor laser) 18 with an integrated modulator, generates heat of at least 10mW, is mounted on a circuit board by die bonding with solder, and is wire bonded with a bonding wire 19 to produce a high-output module as shown in fig. 3. After the LD is mounted, the SN ratio of the modulation performance of the module is 0.1dB, which is better than using a conventional circuit board. The size of a circuit board for mounting the LD is only one-fourth of that of a conventional circuit board, and the speed limit is increased to 40Gbps or more.

The present invention makes it possible to obtain a miniaturized high-performance circuit board having a thick-film fine wiring pattern. It is therefore possible to obtain a miniaturized high-performance high-output module.

Claims (9)

1. A circuit board, comprising: a first metal layer patterned on a ceramic substrate; a second metal layer patterned on the first metal layer; and a third metal layer formed to cover the entire upper surface of the second metal layer and most of the side surface thereof, wherein the first metal layer and a portion of the second metal layer not covered by the third metal layer are reduced in width by etching.

2. The circuit board of claim 1, wherein the combined thickness D μm of the first, second and third metal layers and the distance L μm between adjacent wiring pattern lines satisfy the following relationship,

D/L≥0.4。

3. the circuit board of claim 2, wherein the combined thickness, Dμ m, of the first, second and third metal layers is at least 5 μm.

4. The circuit board of any one of claims 1 to 3, wherein the second metal layer comprises at least one metal selected from the group consisting of copper, nickel, silver, and aluminum.

5. A circuit board as claimed in any one of claims 1 to 3, wherein the outermost layer of the third metal layer is gold.

6. The circuit board according to any one of claims 1 to 3, wherein the ceramic substrate comprises at least one selected from the group consisting of alumina, AlN, and Si₃N₄A ceramic in an amount of at least 90% by weight.

7. The circuit board of any one of claims 1 to 3, wherein the ceramic substrate is diamond or cBN.

8. A method of making a circuit board comprising:

evaporating or sputtering a first metal layer on the ceramic substrate;

forming a resist pattern;

plating a second metal layer on the first metal layer by using the resist as a mask;

making the resist layer into a thin layer;

plating the upper surface of the second metal layer and most of the side surface of the second metal layer to form a third metal layer;

the resist layer is removed and then the first metal layer is etched such that the first metal layer and a portion of the second metal layer not covered by the third metal layer are reduced in width by the etching.

9. A high-output module in which at least one high-output semiconductor element generating heat of at least 10mW is mounted on the circuit board of any one of claims 1 to 7 via solder or a conductive resin.