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HK1047991B - Mechanism for handling failing load check instructions - Google Patents

Mechanism for handling failing load check instructions Download PDF

Info

Publication number
HK1047991B
HK1047991B HK03100089.9A HK03100089A HK1047991B HK 1047991 B HK1047991 B HK 1047991B HK 03100089 A HK03100089 A HK 03100089A HK 1047991 B HK1047991 B HK 1047991B
Authority
HK
Hong Kong
Prior art keywords
load check
failing load
check instructions
handling
handling failing
Prior art date
Application number
HK03100089.9A
Other languages
Chinese (zh)
Other versions
HK1047991A1 (en
Inventor
K Arora Judge
Original Assignee
Intel Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US09/471,308 external-priority patent/US6598156B1/en
Application filed by Intel Corporation filed Critical Intel Corporation
Publication of HK1047991A1 publication Critical patent/HK1047991A1/en
Publication of HK1047991B publication Critical patent/HK1047991B/en

Links

HK03100089.9A 1999-12-23 2000-11-20 Mechanism for handling failing load check instructions HK1047991B (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/471,308 US6598156B1 (en) 1999-12-23 1999-12-23 Mechanism for handling failing load check instructions
US09471308 1999-12-23
PCT/US2000/032087 WO2001048598A1 (en) 1999-12-23 2000-11-20 Mechanism for handling failing load check instructions

Publications (2)

Publication Number Publication Date
HK1047991A1 HK1047991A1 (en) 2003-03-14
HK1047991B true HK1047991B (en) 2005-02-08

Family

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