GB2636078A

GB2636078A - Photonic integrated circuit

Info

Publication number: GB2636078A
Application number: GB2317942.7A
Authority: GB
Inventors: Sacchetto Davide; Goyvaerts Jeroen
Original assignee: Ligentec SA
Current assignee: Ligentec SA
Priority date: 2023-11-23
Filing date: 2023-11-23
Publication date: 2025-06-11
Also published as: GB202317942D0; WO2025108755A1

Abstract

A photonic integrated circuit 1 comprises a cladding 3 layer having first 4 and second 5 surfaces, wherein an opening 6 is formed on the first surface, and a first waveguide 2 disposed below the opening. Preferably, the first waveguide is formed of silicon nitride, trisilicon tetranitride, silicon oxynitride, doped silicon dioxide, aluminium oxide or aluminium nitride. The first waveguide may be embedded in the cladding layer. The photonic integrated circuit may also comprise a first intermediary cladding layer between the second surface and the first waveguide, a first waveguide cladding layer into which the first waveguide is embedded, where the cladding layer is a top cladding layer. Preferably the first waveguide tapers towards a first end and/or at a second opposite end. The first waveguide may be offset relative to the opening along a direction parallel to the plane in which the first waveguide is disposed. Preferably there is a second waveguide disposed below the first waveguide that is arranged to evanescently couple with the first waveguide. A photonic device and a method of manufacturing a photonic integrated circuit are also claimed.

Description

Photonic integrated circuit

Technical Field

The present invention relates to a photonic integrated circuit and a photonic device comprising the photonic integrated circuit. The present invention also relates to methods of manufacture thereof.

Background

Typical active photonic integrated circuits based on waveguides, such as lasers and photodetectors, comprise an active part or layer which is built on dedicated technology, for example III-V direct-band gap semiconductor technology. This is because direct-band gap semiconductor platforms, such indium aluminium gallium arsenide (AlGaAs) and indium phosphide (InP), are capable of generating light at the required wavelengths and with a better performance than, for example, indirect band-gap semiconductors or thermal emitters.

Direct band-gap semiconductors are also suitable for fast photodetection because they have a tendency to absorb light with high quantum efficiencies. However, this means that these materials are unsuitable for waveguiding light with very low losses. Indirect bandgap semiconductors, such as Si-on-insulator photonics or dielectric-based silicon nitride photonics are more suitable to waveguide light due to these materials' very low light absorption.

Therefore, there is a challenge to provide photonic integrated circuits with ultra-low-loss light waveguiding combined with integration of state-of-the art lasers and/or photodetection or opto-electrical light modulation.

To address this challenge, integration schemes have been used in the art that can couple light between the non-semiconductor-based waveguides and active semiconductor components, such as Si or InP.

The hybrid integration approach typically relies on fibre-to-chip coupling. However, this solution is unpractical for miniaturization because a large space is needed to accommodate all the optical connections. In addition, fibre-to-chip coupling leads to additional losses and packaging costs.

Another approach focuses on heterogenous integration of an active photonic integrated circuit (APIC) to a passive photonic integrated circuit (PPIC). In this case, the light coupling structures usually exploit lateral tapering or heterogeneous die bonding. However, such solutions are very sensitive to fabrication tolerances and lead to large scattering losses due to the surface preparation of the receiving substrate. In addition, the cladding on top of the waveguiding layer is completely removed to allow for optical coupling. This negatively impacts the propagation losses of the PPIC.

Summary

According to a first aspect of the present invention, there is provided a photonic integrated circuit comprising a cladding layer having first and second surfaces, wherein an opening is formed on the first surface, and a first waveguide disposed below the opening.

The present photonic integrated circuit may help to minimise coupling losses between the present photonic integrated circuit and another photonic integrated circuit provided in the opening.

The opening may also herein be referred to as a "trench".

The photonic integrated circuit (PIC) may be a silicon nitride-based photonic integrated circuit. As used herein, the term "silicon nitride-based photonic integrated circuit" refers to PICs which comprise waveguide(s) and/or other components comprising silicon nitride.

The first waveguide may be formed of silicon nitride.

The first waveguide may be formed of trisilicon tetranitride, Si3N4, or silicon-rich silicon nitride.

The first waveguide may be formed of silicon oxynitride, SION, doped silicon dioxide, SiO2, aluminium oxide, A1203, or aluminium nitride, AIN.

The first waveguide may be formed of a combination of two or more of silicon-rich nitride, SION or Si3N4, doped 5102, A1203, SION, and AIN.

The first waveguide may be embedded in the cladding layer.

The photonic integrated circuit may further comprise a first intermediary cladding layer between the second surface and the first waveguide, and a first waveguide cladding layer into which is embedded the first waveguide, wherein the cladding layer is a top cladding layer.

The cladding material in the top cladding layer may be partially removed to form the opening such that some cladding material is provided (or remains) between the base of the opening and the second surface.

The cladding material in the top cladding layer may be completely removed to form the opening such that a portion of the first intermediary cladding layer forms the base of the opening.

The first waveguide may taper towards a first end and/or at a second, opposite end.

The first waveguide may be offset relative to the opening along a direction parallel to the plane in which the first waveguide is disposed.

The first waveguide may be disposed such that the opening overlays the first waveguide.

The photonic integrated circuit may comprise a second waveguide disposed below the first waveguide and arranged to evanescently couple with the first waveguide.

The second waveguide may be offset relative to the first waveguide along a direction parallel to the plane in which the second waveguide is disposed.

The second waveguide may be formed of silicon nitride, such as trisilicon tetranitride, Si3N4, or silicon-rich silicon nitride.

The second waveguide may be formed of silicon oxynitride, SION, doped silicon dioxide, SiO2, aluminium oxide, A1203, aluminium nitride, AIN, or gallium nitride, GaN.

The first waveguide may be formed of a combination of two or more of silicon-rich nitride, SION or Si3N4, doped SiO2, A1203, SION, and AIN.

The second waveguide may taper towards a first end and/or at a second, opposite end.

The photonic integrated circuit may comprise a second intermediary cladding layer between the first waveguide and the second waveguide and a bottom cladding layer into which is embedded the second waveguide.

The top cladding layer, the first waveguide cladding layer, and the bottom cladding layer may be formed of the same material/materials having the same refractive index.

The first waveguide and second waveguide may be each formed of a material having a higher refractive index than each of the top cladding layer, the first intermediary cladding layer, the first waveguide cladding layer, the second intermediary cladding layer, and the bottom cladding layer.

Each of the top cladding layer, the first intermediary cladding layer, the first waveguide cladding layer, the second intermediary cladding layer, and the bottom cladding layer may be formed of any dielectric material with a refractive index lower than the refractive indices of the first and second waveguides, such as SiO2, dopedSiO2, or SiON, or any combinations thereof.

The first and second waveguides may be formed of a polycrystalline material having a higher refractive index than the top cladding layer, the first intermediary cladding layer, the first waveguide cladding layer, the second intermediary cladding layer, and the bottom cladding layer. These cladding layers may be formed of SiO2.

The photonic integrated circuit may comprise a third intermediary cladding layer disposed at a base of the opening.

The third intermediary cladding layer may be configured to mechanically bond a second photonic integrated circuit with the present photonic integrated circuit ("first photonic integrated circuit").

The third intermediary cladding layer may be formed of benzocyclobutene (BCB), polymethyl methacrylate (PMMA), reflowable oxides, or other die-attach adhesives.

The photonic integrated circuit may not comprise the third intermediary cladding layer. In which case, an external integrated circuit may directly attach or bond to the photonic integrated circuit according to the first aspect.

The photonic integrated circuit may comprise an active layer arranged to transmit and receive light signals with the first waveguide or, if present, the second waveguide.

The photonic integrated circuit may comprise more than one opening formed on the first surface.

The photonic integrated circuit may comprise more than two waveguides.

According to a second aspect, there is provided a photonic device comprising the photonic integrated circuit according to the first aspect, the photonic integrated circuit being a first photonic integrated circuit, and a second photonic integrated circuit provided in the opening.

The second photonic integrated circuit may be arranged to be in optical communication with the first photonic integrated circuit.

The first photonic integrated circuit may be a passive photonic integrated circuit and the second photonic integrated circuit may be an active photonic integrated circuit.

The first and second photonic integrated circuits may be heterogeneously integrated.

Thus, the integration of the photonic integrated circuit according to the first aspect and an external photonic integrated circuit (which is provided in the opening) may form a photonic device of enhanced functionality and improved operating characteristics, such as reduced optical loss.

The photonic device may be a light escalator.

The second photonic integrated circuit may be configured as an electro-optic modulator.

The electro-optic modulator may comprise an active layer comprising a perovskite crystal structure ABX3 in which A and B are metals and X is oxygen. Alternatively, the active layer may comprise a material that exhibits x2 non-linearity (Pockels effect), such as Lithium Niobate (LN) and Barium Titanate (BTO). Alternatively, the active layer may comprise a material exhibiting a large x3 non-linearity (Kerr effect), such as electro-optic polymers.

Wherein the active layer of the modulator comprises ABO3, the first waveguide may be formed of silicon-rich silicon nitride having a refractive index between 2.0 and 3.0 and the second waveguide may be formed of Si3N4.

The second photonic integrated circuit may be configured as a laser.

The laser may comprise an active layer comprising a semiconductor, such as indium phosphide, InP, gallium arsenide, GaAs, indium gallium arsenide, InGaAs, indium aluminium gallium arsenide, InAlGaAs, gallium nitride, GaN and combinations thereof.

Wherein the active layer of the laser comprises a III-V compound semiconductor, such as InP, the first waveguide may have a refractive index of between 2.5 and 4.0.

The second photonic integrated circuit may be configured as an optical amplifier.

The second photonic integrated circuit may comprise an active layer arranged at an angle vertical to the first waveguide.

According to a third aspect of the present invention, there is provided a method of manufacturing the photonic device according to the second aspect, the method comprising providing the first photonic integrated circuit, providing the second photonic integrated circuit, and bonding the second photonic integrated circuit to the first photonic integrated circuit.

The bonding may be by die-bonding, transfer-printing, anodic bonding, or provision of one or more solder bumps.

According to a fourth aspect of the present invention, there is provided a method of manufacturing a photonic integrated circuit, the method comprising providing a cladding layer, and forming an opening in the cladding layer.

The opening may be formed using a dry etching technique or a wet etching technique.

Brief Description of Drawings

Certain embodiments of the present invention will now be described, by way of example, with reference to the accompanying drawings in which: Figure 1 schematically illustrates a cross-sectional view of a photonic integrated circuit; Figure 2 schematically illustrates an aerial view of a photonic integrated circuit; Figure 3a schematically illustrates an aerial view of a photonic integrated circuit; Figure 3b schematically illustrates an aerial view of a photonic integrated circuit; Figure 4a schematically illustrates a cross-sectional view of a photonic integrated circuit; Figure 4b schematically illustrates a cross-sectional view of a photonic integrated circuit; Figure 5 schematically illustrates a cross-sectional view of a photonic integrated circuit; Figure 6a schematically illustrates an aerial view of a photonic integrated circuit; Figure 6b schematically illustrates an aerial view of a photonic integrated circuit; Figure 7 schematically illustrates a cross sectional view of a photonic integrated circuit with another photonic integrated circuit; Figure 8a schematically illustrates an aerial view of a photonic integrated circuit; Figure 8b schematically illustrates an aerial view of a photonic integrated circuit; Figure 9a schematically illustrates an aerial view of a photonic integrated circuit; Figure 9b schematically illustrates an aerial view of a photonic integrated circuit with another photonic integrated circuit; Figure 9c schematically illustrates an aerial view of a photonic integrated circuit with another photonic integrated circuit; Figure 10 schematically illustrates a cross-sectional view of a photonic integrated circuit; Figure 11 schematically illustrates a cross-sectional view of a photonic integrated circuit with an another photonic integrated circuit; Figure 12a schematically illustrates a cross-sectional view of a photonic device; Figure 12b schematically illustrates a cross-sectional view of a photonic device; Figure 13a schematically illustrates a cross-sectional view of a photonic device; Figure 13b schematically illustrates a cross-sectional view of a photonic device; Figure 14 schematically illustrates a cross-sectional view of a photonic integrated circuit; Figure 15 schematically illustrates an aerial view of a photonic integrated circuit with another photonic integrated circuit; Figure 16 schematically illustrates an aerial view of a photonic integrated circuit with other photonic integrated circuits; Figure 17 schematically illustrates a cross-sectional view of a photonic integrated circuit; Figure 18 schematically illustrates an aerial view of a photonic integrated circuit with other photonic integrated circuits; Figure 19 schematically illustrates an aerial view of a photonic integrated circuit with other photonic integrated circuits; Figure 20 schematically illustrates an aerial view of a photonic integrated circuit with other photonic integrated circuits; Figure 21 schematically illustrates an aerial view of a photonic integrated circuit with other photonic integrated circuits; Figure 22 schematically illustrates an aerial view of a photonic integrated circuit with other photonic integrated circuits; Figure 23 schematically illustrates an aerial view of a photonic integrated circuit with another photonic integrated circuit; Figure 24 is a process flow diagram of a first method of manufacture; and Figure 25 is a process flow diagram of a second method of manufacture.

Detailed Description of Certain Embodiments

In the following, like parts are denoted by like references.

The present application is concerned with a photonic integrated circuit having an opening in which may be provided another photonic integrated circuit. These integrated circuits may be heterogeneously integrated.

Referring to Figure 1, a first example of a photonic integrated circuit 1, 11 (herein also referred to as "first example circuit") is shown. Figure 1 shows a cross-sectional view in the x-y plane of the first example circuit The first example circuit li comprises a first waveguide 2 embedded in a cladding layer 3 of the first example circuit li. The cladding layer 3 has a first surface 4 and a second, opposite surface 5.

The first and second surfaces 4, 5 each lie within a plane, wherein the normal vector of each plane is along a thickness direction of the first example circuit 11. In the example shown in Figure 1, the thickness direction is along the y axis and the planes of the first and second surfaces 4,5 lie within the x-z planes.

-10 -An opening 6 (or "trench") is formed on the first surface 4. As will be explained hereinafter, a photonic integrated circuit (not shown), which is external to the first example circuit li, may be provide in the opening 6.

The opening 6 may have a maximum depth, do, of between 100 nm and 20,000 nm, a maximum width, w0, of between 1 pm and 30 mm, and a maximum length, /0, of between 10 pm and 20 mm. In the example shown in Figure 1, the width wo direction is along the x axis, the depth do direction is along the y axis, and the length k direction is along z direction (see Figure 2). The opening 6 may have dimensions such that the opening 6 is a cuboid, for example a cube. Other shapes of the opening 6 are possible and may be set according to the size of the external photonic integrated circuit (not shown).

The first waveguide 2 is positioned or disposed at a distance, dwz, below the base 7 of the opening 6. This distance, dwi, may be between 50 nm and 2,000 nm. The first waveguide 2 is configured to carry an optical signal, for example to the external photonic integrated circuit (not shown). Thus, the first waveguide 2 is positioned such that, when the external photonic integrated circuit (also herein referred to as "external circuit") is provided in the opening 6, light (light signals/optical signals) may travel or be transmitted between the first waveguide 2 and the external photonic integrated circuit. The first waveguide 2 may have a thickness, twi, of between 10 nm and 1000 nm.

The first waveguide 2 will now be further described in reference to Figure 2, which shows a top or aerial view of the first example circuit 11.

The first waveguide 2 extends between first and second ends 21, 22. The optical signal is arranged to propagate between these ends 21, 22 and the direction of propagation depends on how the first example circuit 11 is being operated. For example, the optical signal may propagate in a direction towards the first end 21 for transmission to the external circuit.

The first waveguide 2 may be offset relative to the opening 6 such that the first end 21 is overlaid by the base 7 of the opening 6 and the second end 22 is not. In another example, the first waveguide 2 may be completely overlaid by the base 7.

The width ww2 direction is defined as normal to the direction extending between the first and second ends 21, 22. In the example shown in Figure 2, the width wwi direction is along the x axis and the first waveguide 2 is along the z axis. The width, vv.', of the first waveguide 2 may be unform between the first and second ends 21, 22 such that the first waveguide 2 has a rectangular shape from an aerial view.

Referring to Figures 3a and 3b, which show alternatives of the first example circuit li in an aerial view, the first waveguide 2 may taper towards the first end 21 (Figure 3a) and, optionally, towards the second end 22 (Figure 3b). The first waveguide 2 may only taper towards the second end 22. In other words, the first waveguide 2 may have one or two tapered regions 8 wherein the width wwi gradually decreases to a point at the end 21, 22.

As will hereinafter be described, the photonic integrated circuit 1 according to the present application may include more than one waveguide, for example two or three waveguides. Use of the tapered region 8 of the first waveguide 2 may help to enhance optical coupling with another waveguide, which also will be hereinafter explained.

The first waveguide 2 may be formed on any material suitable for waveguiding light.

Preferably, the first waveguide 2 is formed of silicon nitride. Silicon nitride is preferable for waveguiding light compared to direct/indirect band-gap semiconductors due to its comparatively low light absorption. Specifically, the first waveguide 2 may be formed of trisilicon tetranitride, Si3N4, or silicon-rich silicon nitride.

Alternatively, the first waveguide 2 may be formed of silicon oxynitride, SiON, doped silicon dioxide, S102, aluminium oxide, A1203, or aluminium nitride, AIN. The first waveguide may be a composition-for example a combination of two or more of silicon-rich nitride, SION or Si3N4, doped 5102, A1203, SION, and AIN.

The cladding layer 3 may be formed of any dielectric material with a refractive index lower than the refractive index of the first waveguide 2, such as silicon dioxide (SiO2), doped-SiO2, or silicon oxynitride (SiON), or any combinations thereof.

The first example circuit li may further comprise an active layer (not shown) arranged to transmit and receive light signals with the first waveguide 2. In other words, the active layer is arranged to receive the optical signal transmitted from the second end 22 of the first waveguide 2. Thus, the first example circuit li may be an active photonic integrated circuit configured as, for example, a modulator.

-12 -The first example circuit 11 may be a passive photonic integrated circuit. As will be hereinafter described, the first example circuit Si (or other example circuits 1) may be heterogeneously integrated with an external, active photonic integrated circuit (not shown).

The first example circuit 11 may further comprise a substrate 9 on which is disposed the cladding layer 3. The substrate 9 may be formed of silicon or fused silica, for example.

Referring now to Figure 4a, a second example of the photonic integrated circuit 1, 12 (herein also referred to as "second example circuit") is shown. Figure 4a shows a cross-sectional view in the x-y plane of the second example circuit 12.

The second example circuit 12 is the same as the first example circuit 11. However, in second example circuit 12, the cladding layer 3 of the first example circuit 11 is replaced by a top cladding layer 10, a first intermediary cladding layer 11, and a first waveguide cladding layer 12. The first intermediary cladding layer 11 is disposed between the top cladding layer 10 and the first waveguide cladding layer 12.

The opening 6 is formed on a first surface 13 of the top cladding layer 10 in the same way as hereinbefore described with respect to the cladding layer 3 of the first example circuit 11. The first waveguide 2 is embedded in the first waveguide cladding layer 12. The first waveguide 2 may be in directed contact with the first intermediary cladding layer 11 (as shown in Figure 4a). Alternatively, the first waveguide 2 may be surrounded by the first waveguide cladding layer 12 such that the first waveguide 2 does not directly contact the first intermediary cladding layer 11.

A second, opposite surface 14 of the top cladding layer 10 is in direct contact with the first intermediary cladding layer 11. The first intermediary cladding layer 11 may have a thickness, tai, of between 50 nm and 2,000 nm.

As with the cladding layer 3 of the first example circuit Si, the first and second surfaces 13, 14 of the top cladding layer 10 each lie within a plane, wherein the normal vector of each plane is along a thickness direction of the second example circuit 12. In the example shown in Figure 4a (and Figure 4b), the thickness direction is along the y axis and the planes of the first and second surfaces 4,5 lie within the x-z planes.

-13 -A region of the top cladding layer 10 may be completely (Figure 4a) or partially (Figure 4b) removed to form the opening 6. In the example shown in Figure 4a, the surface of the first intermediate cladding layer 11 forms the base 7 of the opening 6.

Referring to Figure 4b, which shows an alternative of the second example circuit 12, the opening 6 may be formed by partially removing the top cladding layer 10 such that the base 7 of the opening 6 is at a distance dc from the second surface 14, which may be between 50 nm and 2,000 nm.

Each of the top cladding layer 10, the first intermediary cladding layer 11, and the first waveguide cladding layer 12 may be formed of any dielectric material with a refractive index lower than the refractive index of the first waveguide 2, such as SiO2, dopedSiO2, or SiON, or any combinations thereof.

The top cladding layer 10, the first intermediary cladding layer 11, and/or the first waveguide cladding layer 12 may be formed of the same or different materials.

Referring also to Figure 5, a third example of the photonic integrated circuit 1, 13 (herein also referred to as "third example circuit") is shown. Figure 5 shows a cross-sectional view in the x-y plane of the first example circuit 11.

The third example circuit 13 is the same as the first example circuit h. However, the third example circuit 13 further comprises a second waveguide 15. The second waveguide 15 is disposed below the first waveguide 2 and embedded in the cladding layer 13.

The second waveguide 15 is disposed relative to the first waveguide 2 so as to evanescently couple to the first waveguide 2. The waveguides 2, 15 may be spaced apart at a distance, dvv2, of between 50 nm and 2,000 nm. The second waveguide 15 is configured to carry an optical signal (in the same way as hereinbefore described for the first waveguide 2) for transmitting to the first waveguide 2 and/or the active layer (not shown).

The second waveguide 15 may be formed of the same material or combinations thereof as hereinbefore describe for the first waveguide 2. The first and second waveguides 2, 15 may be formed of the same or different materials. For example, the second waveguide 15 may be formed of gallium nitride, GaN. Furthermore, the second -14 -waveguide 15 may be thicker than the first waveguide 2. For example, the second waveguide 15 may have a thickness, 6,2, of between 50 nm and 1,100 nm.

Referring also to Figures 6a and 6b, alternative arrangements of the third example circuit 13 are shown in an aerial view.

As shown in these Figures, the second waveguide 15 has first and second ends 151, 152 which it extends between. As with the first waveguide 2, the optical signal is arranged to propagate between these ends 151, 152 and the direction of propagation depends on how the third example circuit 13 is being operated.

The second waveguide 15 may have a width, wwz, greater than the width, my', of the first waveguide 2. The width, wwz, may be between 100 nm and 10,000 nm. Alternatively, the first waveguide 2 may have a width, wiw, greater than the second waveguide 15, wwz.

As hereinbefore described, the first waveguide 2 may be offset relative to the opening 6. The first waveguide 2 may also be offset relative to the opening 6.

As shown in Figure 6a, the second waveguide 15 may be offset such that neither the first or second ends 151, 152 are overlaid by the opening 6. In this example, the first end 21 of the first waveguide 2 is overlaid by the opening and the second end 22 overlays the second waveguide 15.

As shown in Figure 6a, the second waveguide 15 may be offset such that the first end 151 is overlaid by the opening 6 (and the first waveguide 2) and the second end 152 is not.

Figure 7 shows a cross-section view along the y-z plane of the arrangement shown in Figure 5. Figure 7 further shows the external photonic integrated circuit 16 hereinbefore referred to. The external circuit 16 is provided in the opening 6 and, in the example shown in Figure 7, directly contacts the base 7. The external circuit 16 partially overlaps the first waveguide 2 and is arranged to receive and transmit light signals with the first waveguide 2.

As will be hereinafter described in more detail, the photonic integrated circuit 1 according to the present application and the external circuit 16 can be heterogeneously bonded or integrated to form a photonic device. In this -15 -heterogeneously bonded system, the photonic integrated circuit 1 and external circuit 16 form an optical interface which allows light to travel between the photonic integrated circuit 1 and external circuit 16 (in other words, from one subsystem to another subsystem).

As hereinbefore described with respect to the first example circuit 11, the first waveguide 2 of the third example circuit 13 may taper towards the first end 21 and/or the second end 22.

As shown in Figure 8a, the first waveguide 2 may taper towards the first end 21 and, towards the second end 22, maintain a uniform width wv,/ with such that the first waveguide 2 has a squared second end 22. In another example, the waveguide 2 may taper towards both the first and second ends 21, 22-as shown in Figure 8b. Thus, the tapered region 8 of the first waveguide 2 may at least partially overlay the second waveguide 15.

Referring to Figures 9a, 9b, and 9c, further alternatives of the third example circuit 13 are shown in aerial view. As shown in these examples, the second waveguide 15 may taper towards the first end 151. Additionally or alternatively, the second waveguide 15 may taper towards the second end 152 (not shown). Thus, the first and second waveguides 2, 15 may both taper such that their tapered regions 8 overlap (as shown in each of Figures 9a, 9b, and 9c) The external circuit 16 may be provided in the opening 6 (as shown in Figure 9b) such that the external circuit 16 overlaps the tapered region 8 at the first end 21 of the first waveguide 2. Alternatively, the external circuit 16 may overlap both the tapered region 8 at the first end 21 and the tapered regions at the second end 22 and the first end 151 of the second waveguide 15 (as shown in Figure 9c).

Referring to Figure 10, a fourth example of the photonic integrated circuit 1, 14 (herein also referred to as "fourth example circuit") is shown. Figure 10 shows a cross-section view in the x-y plane of the fourth example circuit 14.

The fourth example circuit 14 is the same as the second example circuit 12. However, the fourth example circuit 14 comprises the second waveguide 15 as hereinbefore described with respect to the third example circuit 13.

-16 -Furthermore, the fourth example circuit 14 comprises a second intermediary cladding layer 17 and a second waveguide cladding layer 18.

The second intermediary cladding layer 17 is disposed between the first waveguide 2 and the second waveguide 15. The second waveguide 15 is embedded in the second waveguide cladding layer 18 and may be in direct contact with the second intermediary cladding layer 17 (as shown in Figure 10). Alternatively, the second waveguide 15 may be surrounded by the second waveguide cladding layer 18 such that the second waveguide 15 does not directly contact the second intermediary cladding layer 17. The second intermediary cladding layer 17 has a thickness, t02, of between 50 nm and 2,000 nm.

The second intermediary cladding layer 17 and the second waveguide cladding layer 18 may each be formed of the same or different materials as the other cladding layers 10, 11, 12. The second intermediary cladding layer 17 and the second waveguide cladding layer 18 may each be formed of any dielectric material with a refractive index lower than the refractive indexes of the first and second waveguides 2, 15, such as silicon dioxide (SiO2), doped-SiO2, or silicon oxynitride (SiON), or any combinations thereof.

In some examples, the first waveguide cladding layer 12, which surrounds the first waveguide 2 in regions overlapping the opening 6 but not overlapping the external circuit 16, may be replaced by air or void or a gas which has a refractive index of 1 or close to 1. In other words, the first waveguide 2 is air/void/gas cladded in those regions. The air/void/gas will act as cladding due to its inherently low refractive index.

Any photonic integrated circuit 1 according to the present application may further comprise a third intermediary cladding layer 19 (Figure 11). Merely by way of illustration, Figure 11 shows a cross-sectional view of the fourth example circuit 14 comprising the third intermediary layer 19.

The third intermediary layer 19 is disposed on the base 7 of the opening 6. When the external circuit 16 is provided in the opening 6, the external circuit 16 directly contacts the third intermediary layer 19.

The third intermediary cladding layer 19 may be configured to mechanically bond the external circuit 16 to the photonic integrated circuit 1 according to the present -17 -application. The third intermediary cladding layer 19 may have a thickness, tc3, of between 10 nm and 100 nm.

The third intermediary cladding layer 19 may be formed of benzocyclobutene (BCB), polymethyl methacrylate (PMMA), reflowable oxides, or other die-attach adhesives which have a refractive index lower than the first and second waveguides 2, 15.

Referring also to Figure 12a, a cross-section view along the y-z plane of the fourth example circuit 14 and the external circuit 16 provided in the opening 6 is shown.

The photonic integrated circuit 1 according to the present application and the external photonic integrated circuit 16 can form a photonic device 20 (as illustrated merely by way of example in Figures 12a and 12b).

Referring also to Figure 12b, an alternative of the fourth example circuit 14 is shown in a cross-section view along the y-z plane. In contrast to the example shown in Figure 12a, the example shown in Figure 12a illustrates that the opening 6 may be dimensioned such that the external circuit 16 (position in the opening 6) may completely overlay the first waveguide 2 and may overlay the region where the first waveguide 2 overlaps the second waveguide 15.

In the example shown in Figure 12b, the third intermediate cladding layer 19 is similarly dimensioned such that this cladding layer 19 extends over both the first waveguide 2 and the overlapping region of the first and second waveguides 2, 15.

As hereinbefore specified, the photonic integrated circuit 1 according to the present application and the external circuit 16 may be heterogeneously integrated to form the photonic device 20.

In an example, the photonic integrated circuit 1 of the present application is a passive photonic integrated circuit (PPIC) and the external circuit 16 is an active photonic integrated circuit (APIC). The APIC comprises an active layer (not shown) which is positioned vertically relative to the first and second waveguides 2, 15. Thus, when the APIC is provided in the opening 6, this arrangement may allow for light to travel between the APIC and the PPIC while maintaining very low propagation losses in the waveguides 2, 15.

-18 -Wherein the external circuit 16 is an APIC, the external circuit 16 may be configured as an electro-optic modulator.

An electro-optic modulator is an optical device in which physical properties of a beam of light or a guided mode of light are modulated in response to an electric signal.

Examples of physical properties of light include phase, amplitude or polarization. The charge density within silicon devices can be manipulated with an electric field via carrier injection, accumulation or depletion. Therefore, the modulation of phase and amplitude of light can be achieved with silicon devices via the plasma dispersion effect.

As used herein, the term "electro-optic modulator" will be understood to encompass all the mechanisms to induce the modulation of phase, amplitude or polarization of light in response to an electric field such the electro-optic effect and the plasma dispersion effect, and other possible mechanisms. Therefore, the term "electro-optic modulator" as used herein is used to mean any optical device in which a beam of light or a guided mode of light are modulated in response to an electric signal.

The external circuit 16, configured as the electro-optic modulator, may comprise an active layer (not shown) comprising a perovskite crystal structure ABXs in which A and B are metals and X is oxygen. Alternatively, the active layer may comprise a material that exhibits %2 non-linearity (Pockels effect), such as Lithium Niobate (LN) and Barium Titanate (BTO). Alternatively, the active layer may comprise a material exhibiting a large %3 non-linearity (Kerr effect), such as electro-optic polymers.

The ABO3 thin-film's optoelectronic characteristics typically present a moderate refractive index between 2.0 and 3.0, low absorption at the visible and infrared wavelengths and large Pockels coefficient. Furthermore, since its refractive index is close to Si3N4, the integration of an ABO3-based electro-optic modulator when the first waveguide 2 is made of Si3N4 does not require complex patterning of the ABO3 films, allowing efficient mode transfer by simply providing a tapered region 8 in the first waveguide 2.

Therefore, wherein the active layer (not shown) of the external circuit 16 comprises ABO3, the first waveguide 2 may be formed of Si3N4.

-19 -Alternatively, wherein the active layer of the external circuit 16 comprises A503, the first waveguide 2 may be formed of silicon-rich silicon nitride having a refractive index between 2.0 and 3.0 and the second waveguide 15 may be formed of Si3N4.

As hereinbefore described, the first and second waveguides 2, 15 may be formed of silicon nitride. An advantage of using silicon nitride is that it has a refractive index close to 2.0 in the optical C-band. Therefore, it is a suitable material for coupling light to typical opto-electric modulator materials that rely on x2 non-linearity (as hereinbefore described) and to crystals with perovskite structure in the form ABX3 (as hereinbefore described).

Alternatively, wherein the external circuit 16 is an APIC, the external circuit 16 may be configured as a laser.

A laser is a semiconductor device which converts an electric current into light by emitting at a specific wavelength. Without wishing to be bound by theory, the light is generated when the electrical carriers (electron-hole pairs) are injected inside the semiconductor device recombine or annihilate by generating photons. Most lasers rely on direct-band gap semiconductors which are typically fabricated with elements of groups III-V or groups II-VI, depending on the emission wavelength required.

The external circuit 16, when configured as a laser, may comprise an active layer (not shown) comprising a semiconductor, such as indium phosphide, InP, gallium arsenide, GaAs, indium gallium arsenide, InGaAs, indium aluminium gallium arsenide, InAlGaAs, gallium nitride, GaN, and combinations thereof.

Wherein the active layer (not shown) of the laser comprises a III-V compound semiconductor, such as MP, the first waveguide 2 has a refractive index of between 2.5 and 4.0. In this example, it is preferred to have the first waveguide 2 formed of a silicon-based material. Suitable materials are deposited Si photonic layers with amorphous or polycrystalline structures or crystalline Si. Si-based thin-films can have a refractive index within the required range. Alternatively, Si can be co-deposited with Ge in different percentages to allow for a larger refractive index value.

Use of silicon nitride in the first and second waveguides 2, 15 has an advantage with respect to lasers. Silicon nitride has a large optical transparency window, thereby providing it suitable for optical waveguiding with very low losses. In particular, most -20 -semiconductor-based lasers emit within the optical transparency window of silicon nitride.

Referring now to Figure 13a, which shows the photonic device 20 of Figure 12a, the materials of the photonic integrated circuit 1 are selected to help enhance optical mode transfer in coupling regions 23. Specifically, the materials of the first and second waveguides 2, 15 may be selected to have a higher refractive index than the cladding layers hereinbefore described.

Referring also to Figure 13b, the photonic device of Figure 12b is shown. The example in Figure 13b further shows the coupling regions 23 in which the optical mode transfer is enhanced by the design of the photonic circuit 1 according to the present application.

Furthermore, as hereinbefore described, the first and second waveguides 2, 15 may have one or two tapered regions 8 (as shown in Figures 13a and 13b). This can help improve the optical mode transfer to and from the active layer in the APIC (external circuit 16).

As hereinbefore stated, the photonic integrated circuit 1 according to the present application may comprise three or more waveguides. Such circuits 1 will now be described with reference to specific examples.

Referring to Figure 14, a fifth example of the photonic integrated circuit 1, 15 (herein also referred to as "fifth example circuit") is shown. Figure 14 shows a cross-sectional view in the y-z plane of the fifth example circuit 15.

The fifth example circuit 15 is the same as the fourth example circuit 14 but further comprises a third waveguide 24 disposed below the second waveguide 15.

In the example shown in Figure 14, the fifth example circuit 15 also includes the third intermediary cladding layer 19 as hereinbefore described. The third waveguide 24 may be embedded in the second waveguide cladding layer 18. Alternatively, a fourth intermediary cladding layer (not shown) may be disposed between the second and third waveguides 15, 22. The fourth intermediary cladding layer (not shown) may have the same dimensions and be formed of the same material(s) as the first and/or second intermediary cladding layers 11, 17. In such a case, the third waveguide 24 is -21 -embedded in a third waveguide cladding layer (not shown) similar to the first and/or second waveguide cladding layers 12, 18.

The third waveguide 24 may be disposed as a distance, (4,3, of between 50 nm and 1000 nm from the second waveguide 15. The third waveguide 24 may have a thickness, tw3, of between 50 nm and 1,000 nm and may be formed of the same material or the same combination of materials as the first and second waveguides 2, 15.

The third waveguide 24 is configured to carry an optical signal for transmitting to the second waveguide 15 and/or another region of the fifth example circuit 15, for example an active layer of the circuit 15 (not shown). As hereinbefore described, the optical mode transfer in the coupling region 23 between the second and third waveguides 15, 24 is enhanced by the design of the photonic circuit 1 according to the present application.

Referring now to Figure 15, the third waveguide 24 may comprise one or two tapered regions 8, as hereinbefore described with respect to the first and second waveguides 2, 15.

Figure 15 shows the fifth example circuit 15 in an aerial view. The external circuit 16 may be provided in the opening 6. As hereinbefore explained, the first waveguide 2 can transmit and receive light signals with the external circuit 2 such that the external circuit 16 and the fifth example circuit 15 form a photonic device 20.

In the example shown in Figure 15, the opening 6 completely overlays the first waveguide 2 and partially overlays the second waveguide 15. Furthermore, the external circuit 16 partially overlays the first waveguide 2. However, other arrangements are possible. For example, the external circuit 16 may completely overlay the first waveguide 2.

The third waveguide 24 tapers towards a first end (not shown) to form a tapered region 8. The second waveguide 15 overlays the tapered region 8 of the third waveguide 24 to form the coupling region 23 hereinbefore described.

The third waveguide 24 may have a width, ww3, of between 100 nm and 5000 nm.

-22 -As hereinbefore explained, the external circuit 16 may be an APIC, such as a III-V semiconductor-based laser. In the example photonic device 20 shown in Figure 15, when the external circuit 16 is a III-V semiconductor-based laser, the second waveguide 15 may be formed of silicon nitride and the first waveguide 2 may be formed of one of Si, SiGe, Ge or Si-rich nitride in order to minimise the effect of the refractive index mismatch between the active III-V component of the external circuit 16 and the second waveguide 15. In such an example, the third waveguide 24 is configured to transfer the optical signal originating from the external circuit 16 to another region of the fifth example circuit 14 with low propagation losses. The second waveguide 15 may have a thickness between 50 nm and 400 nm in this example.

Additional opening(s) 6 The photonic integrated circuit 1 according to the present application may comprise more than one opening 6.

The photonic integrated circuit 1 may be integrated with more than one external circuit 16 (e.g. laser, amplifier, or modulator), which are each provided in one of the multiple openings 6. As will now be described, light may travel between these external circuits 16 via a 3-layered waveguide scheme. Different waveguides may be used for escalating optical modes to different active regions within the external circuits 16.

In the following examples of the photonic integrated circuit 1, the cladding layers 10, 12, 17, 18, 19 hereinbefore described may be present but have been omitted from the figures for ease of illustration.

Referring now to Figures 16 and 17, a sixth example of the photonic integrated circuit 1, 16 (herein referred to as "sixth example circuit") is shown which comprises a first opening 61 and a second opening 62 (herein also referred to as a "double cavity arrangement"). The sixth example circuit 16 is shown in an aerial view in Figure 16.

Figure 17 shows a cross-sectional view of the sixth example circuit 16 in the y-z plane.

The sixth example circuit 16 comprises the first, second, and third waveguides 2, 15, 24 in the arrangement hereinbefore described with respect to the fifth example circuit 15.

The sixth example circuit 16 further comprises a fourth waveguide 25. The fourth waveguide 25 may have the same dimensions and/or be formed of the same material(s) as the second waveguide 15. Referring specifically to Figure 17, the fourth -23 -waveguide 25 is disposed in the same layer (for example, the second waveguide cladding layer 18) as the second waveguide 2. In other words, the second waveguide 15 and the fourth waveguide 25 are disposed along the same x-z plane.

Thus, the fourth waveguide 25 is disposed above the third waveguide 24. In the example shown in Figure 16, the fourth waveguide 25 comprises tapered regions 8 at each end: first end 251 and second end 252. The tapered region 8 at the first end 251 of the fourth waveguide 25 overlays the tapered region 8 at the second end (not shown) of the third waveguide 15.

An external circuit 16 may be provided in each opening 6, as shown in Figure 15. In one example, a III-V semiconductor-based laser is provided in the first opening 61 and a modulator (such as a thin-film lithium niobate on insulator-based modulator of a BTO-based modulator) is provided in the second opening 62. In this example, a photonic device 20 is formed which allows light to travel between the laser and modulator via the waveguide scheme of the sixth example circuit 15.

The external circuit 16 in the second opening 62 completely overlays the fourth waveguide 25 and partially overlays the third waveguide 24 and a fifth waveguide 26.

The fifth waveguide 26 is disposed below the fourth waveguide 25. Specifically, the fifth waveguide 26 is disposed in the same layer as the third waveguide 24. In other words, the third waveguide 24 and the fifth waveguide 26 are disposed along the same x-z plane, as shown in Figure 17. The fifth waveguide 26 may have the same dimensions and/or be formed of the same material(s) as the third waveguide 24.

The fourth waveguide 25 is configured to carry an optical signal for transmitting to the external circuit 16 in the second opening 62 and/or the third waveguide 24. Likewise, the fifth waveguide 26 is configured to carry an optical signal for transmitting to fourth waveguide 25 and/or another region of the sixth example circuit 16.

Referring now to Figure 18, a seventh example of the photonic integrated circuit 1, 17 (herein referred to as "seventh example circuit") is shown in an aerial view.

The seventh example circuit 17 is the same as the sixth example circuit ls. However, the third waveguide 24 of the sixth example circuit 16 has a 1-by-2 multimode interference (MMI) structure. In other words, the second end (not shown) of the third waveguide 24 is replaced by two branches 27. The branches 27 are disposed along the -24 -same x-z plane in a Y-formation. The arms 28 of each branch 27 are arranged in parallel. The end 29 of each arm 28 tapers to a point to form a tapered region 8, as shown in Figure 18. The third waveguide 24 of the seventh example circuit 17 may herein be referred to as a branched third waveguide 24.

The branched third waveguide 24 is configured to carry an optical signal and split the mode of the optical signal into the two branches 27.

The seventh example circuit 17 includes a fourth waveguide 25 (as hereinbefore described) corresponding to each branch 27. In other words, there are provided two fourth waveguides 25, each fourth waveguide 25 partially overlaying the tapered region 8 of a respective arm 28. The seventh example circuit 17 further includes a fifth waveguide 26 (as hereinbefore described) corresponding to each branch 27 and disposed under a respective fourth waveguide 25. The pair of fourth and fifth waveguides 25, 26 are relatively arranged in the seventh example circuit 17 in the same way as the sixth example circuit 16.

Referring now to Figure 19, an eighth example of the photonic integrated circuit 1, 18 (herein referred to as "eighth example circuit") is shown in an aerial view.

The eighth example circuit 18 is the same as the seventh example circuit 17. However, the branched third waveguide 24 and the fourth waveguides 25 are replaced by the second waveguide 15 having a 1-by-2 MMI structure ("branched second waveguide"). Thus, each end 29 of the branched second waveguide 15 overlays a respective fifth waveguide 26.

In once example, the eighth example circuit 18 is integrated with an external circuit 16, configured as a laser, in the first opening 61 and another external circuit, configured as a modulator, in the second opening 62. Light my travel between the laser and modulator via the first waveguide 2 and the branched second waveguide 15.

In this example, each fifth waveguide 26 is configured to transmit the optical mode to and from the modulator.

Referring now to Figure 20, a ninth example of the photonic integrated circuit 1, 19 (herein referred to as "ninth example circuit") is shown in an aerial view.

The ninth example circuit 19 is the same as the eighth example circuit 18. However, the ninth example circuit 19 includes a spiral 30 arranged to optically couple with the -25 -first and second waveguides 2, 15. The spiral 30 may be formed of rare-earth-doped silicon nitride, Si3N4. The first opening 61 completely or partially overlays the spiral 30.

The spiral 30 typically has tapered ends 301 (one end 301 shown in Figure 20) which overlap with the tapered regions 8 of the first and second waveguides 2, 15.

When a laser and modulator are integrated with the ninth example circuit 19, as hereinbefore described, the branched second waveguide 15 is arranged such that only this waveguide 15 supports light to travel between these external circuits 16. When in operation, the laser emits an optical signal, for example having a wavelength of 980 nm, which is received by the second waveguide 15. The spiral 30 is configured to amplify the optical signal in the C-band. Without wishing to be bound by theory, this is due to Er-ions states being pumped into the doped cavity of the spiral 30.

In one example, the external circuit 16 is heterogeneously integrated with the ninth example circuit 19 such that the external circuit 16 substantially overlaps with the spiral 30 to form an optical gain circuit. In this example, the external circuit 16 includes a layer that is doped with a rare-earth element, such as Erbium, Er, Ytterbium, Yb, or Thulium, Tm. Examples of layers that can be doped with a rare-earth element are SiO2, A1203, LNOI (lithium niobate on insulator), SiN, and phosphorus pentoxide, P2O5.

Referring now to Figure 21, a tenth example of the photonic integrated circuit 1, ho (herein referred to as "tenth example circuit") is shown in an aerial view.

The tenth example circuit ho is the same as the ninth example circuit 19. However, the spiral 30 is replaced by a ring resonator 31 having tapered ends 311 that overlap the first and second waveguides 2, 15. The ring resonator 31 may be formed of erbium-doped silicon nitride, Si3N4.

The spiral 30 and ring resonator 31 hereinbefore described may be incorporated into example circuits 1 having a single opening 6. In addition or alternatively, the spiral 30/ring resonator 31 may be positioned such that it is overlaid by the second opening 62.

The foregoing example circuits 1 have a double cavity arrangement. However, the photonic integrated circuit 1 according to the present application may comprise more -26 -than two openings 6. For example, the photonic integrated circuit 1 may comprise four openings 6-as shown in Figure 22. Different PPICs and other external circuits 16 may be provided in respective openings 6. In this way, the photonic integrated circuit 1 may be heterogeneously integrated with a plurality of other photonic circuits to form a photonic device 20 of improved utility.

Any one of the photonic integrated circuits 1 according to the present application may comprise the substrate 9 as hereinbefore described.

Extending first waveguide example Various example circuits 1 hereinbefore described show the first waveguide 2 terminating at the first end 21 in a region overlapped by the external circuit 16 (see Figure 9b, for example).

However, it should be appreciated that the first waveguide 2 may extend beyond the external circuit 16. An example of this arrangement is shown in aerial view in Figure 23. This example is herein referred to as an eleventh example of the photonic integrated circuit 1, lii ("eleventh example circuit").

The first waveguide 2 may have tapered regions 8 as hereinbefore described (shown in Figure 23). Additional waveguides 15, 24, 25, 26, openings 6, and cladding layers 3, 10, 11, 12, 17, 18, 19 hereinbefore described may be included in the eleventh example circuit lii. Merely for ease of illustration, Figure 23 shows the first waveguide 2 and a single opening 6 only.

The first waveguide 2 may extend across substantially the whole length (z direction in Figure 23) of the eleventh example circuit ln.

In one example, this example circuit 11.i may be implemented on a silicon nitride-lithium niobate on insulator (SiN-LNOI) platform.

In another example, the first waveguide 2 may be formed of SiN or a poly-Si material, with the eleventh example circuit lii being heterogeneously integrated with a III-V semiconductor-based external circuit 16 to create a low-confinement system for increased amplification in semiconductor optical amplifiers.

-27 -Alternative end regions Although various example circuits 1 hereinbefore described include waveguides 2, 15, 24, 25, 26 having tapered regions 8 at the ends 21, 22, 151, 152, 251, 252, it should be appreciated that other geometries for the ends are possible.

In other words, the tapered regions 8 may be replaced with regions having different geometries, such as linearly-shaped, parabolic-shaped or exponentially-tapered in their width dimension, as well as having an inverted-trapezoidal or a rectangular cross-section along the thickness dimension.

Additionally, the tapered regions 8 might have a variable thickness shape along the waveguide length.

Method of manufacture The opening 6 may be formed in the photonic integrated circuit 1 using any suitable method.

Referring now to Figure 24, a first example method of manufacturing the opening 6 in the photonic integrated circuit 1 will now be described. The first method is described with reference to the first example circuit 11 merely by way of example.

First, a cladding layer 3 is provided (step 51.1).

Next, a photolithographic mask is printed on the first surface 4 (step S1.2) in a printed region (not shown).

The printed region is then dry etched until a pre-defined depth is reached (step S1.3). The dry etch can be stopped based on a pre-set time or based on an electrophoretic deposition signal reaching an etch stop layer.

If the etch stop layer is present, the layer is then removed (step 51.4), followed by the removal of the photoresist mask (step 51.5).

Referring now to Figure 25, a second example method of manufacturing the opening 6 in the photonic integrated circuit 1 will now be described. The first method is described with reference to the first example circuit 11 merely by way of example.

First, a cladding layer 3 is provided (step 52.1).

-28 -Next, a photolithographic mask is printed on the first surface 4 (step S2.2) in a printed region (not shown).

Then, the printed region is etched with a wet chemical (step S2.3) that is selective to an etch stop layer. The etch stop layer is positioned at a pre-selected depth.

The etch stop layer may be removed (step S2.4), followed by the removal of the photoresist mask (step 52.5).

The opening 6 may be formed using a method other than the first and second example methods hereinbefore outlined.

For example, the opening 6 may be formed by etching where the etch stop is a waveguide layer.

The photonic device 20 hereinbefore described may be manufactured by any suitable method.

For example, the external circuit 16 may be provided in the opening 6 and bonded to the photonic integrated circuit 1 by die-bonding, transfer-printing, anodic bonding, or provision of one or more solder bumps.

Modifications It will be appreciated that various modifications may be made to the embodiments hereinbefore described. Such modifications may involve equivalent and other features which are already known. Features of one embodiment may be replaced or supplemented by features of another embodiment.

Although claims have been formulated in this application to particular combinations of features, it should be understood that the scope of the disclosure of the present invention also includes any novel features or any novel combination of features disclosed herein either explicitly or implicitly or any generalization thereof, whether or not it relates to the same invention as presently claimed in any claim and whether or not it mitigates any or all of the same technical problems as does the present invention. The applicant hereby gives notice that new claims may be formulated to such features and/or combinations of such features during the prosecution of the present application or of any further application derived therefrom.

Claims

-29 -Claims 1. A photonic integrated circuit comprising: a cladding layer having first and second surfaces, wherein an opening is formed on the first surface; and a first waveguide disposed below the opening.
2. The photonic integrated circuit of claim 1, wherein the first waveguide is formed of silicon nitride.
3. The photonic integrated circuit of claim 2, wherein the first waveguide is formed of trisilicon tetranitride, Si3N4, or silicon-rich silicon nitride.
4. The photonic integrated circuit of claim 1, wherein the first waveguide is formed of silicon oxynitride, SiON, doped silicon dioxide, SiO2, aluminium oxide, A1203, or aluminium nitride, AIN.
5. The photonic integrated circuit of any preceding claim, wherein the first waveguide is embedded in the cladding layer. 20
6. The photonic integrated circuit of any one of claims 1 to 4, the photonic integrated circuit comprising: a first intermediary cladding layer between the second surface and the first waveguide; a first waveguide cladding layer into which is embedded the first waveguide, wherein the cladding layer is a top cladding layer.
7. The photonic integrated circuit of any preceding claim, wherein the first waveguide tapers towards a first end and/or at a second, opposite end.
8. The photonic integrated circuit of any preceding claim, wherein the first waveguide is offset relative to the opening along a direction parallel to the plane in which the first waveguide is disposed.
9. The photonic integrated circuit of any one of claim 1 to 7, wherein the first waveguide is disposed such that the opening overlays the first waveguide.-30 -
10. The photonic integrated circuit of any preceding claim, the photonic integrated circuit comprising a second waveguide disposed below the first waveguide and arranged to evanescently couple with the first waveguide.
11. The photonic integrated circuit of claim 10, wherein the second waveguide is offset relative to the first waveguide along a direction parallel to the plane in which the second waveguide is disposed.
12. The photonic integrated circuit of claim 10 or 11, wherein the second waveguide is formed of silicon nitride, such as trisilicon tetranitride, Si3N4, or silicon-rich silicon nitride.
13. The photonic integrated circuit of claim 10 or 11, wherein the second waveguide is formed of silicon oxynitride, SiON, doped silicon dioxide, SiO2, aluminium oxide, A1203, aluminium nitride, AIN, or gallium nitride GaN.
14. The photonic integrated waveguide of any one of claims 10 to 13, wherein the second waveguide tapers towards a first end and/or at a second, opposite end.
15. The photonic integrated circuit of any one of claims 10 to 14, the photonic integrated circuit comprising: a second intermediary cladding layer between the first waveguide and the second waveguide; a bottom cladding layer into which is embedded the second waveguide.
16. The photonic integrated circuit of claim 15, wherein the first waveguide and second waveguide are each formed of a material having a higher refractive index than each of the top cladding layer, the first intermediary cladding layer, the first waveguide cladding layer, the second intermediary cladding layer, and the bottom cladding layer.
17. The photonic integrated circuit of any preceding claim, the photonic integrated circuit comprising a third intermediary cladding layer disposed at a base of the opening.
18. The photonic integrated circuit of any preceding claim, wherein the photonic integrated circuit comprises more than one opening formed on the first surface.-31 -
19. The photonic integrated circuit of any preceding claim, wherein the photonic integrated circuit comprises more than two waveguides.
20. A photonic device comprising: the photonic integrated circuit of any preceding claim, the photonic integrated circuit being a first photonic integrated circuit; a second photonic integrated circuit provided in the opening.
21. The photonic device of claim 20, wherein the second photonic integrated circuit is configured as an electro-optic modulator or a laser or an optical amplifier.
22. The photonic device of any one of claims 20 or 21, wherein the second photonic integrated circuit comprises an active layer arranged at an angle vertical to the first waveguide.
23. The photonic device of any one of claims 20 to 22, wherein the first photonic integrated circuit and the second photonic integrated circuit are heterogeneously integrated.
24. A method of manufacturing the photonic device of any one of claims 20 to 23, the method comprising: providing the first photonic integrated circuit; providing the second photonic integrated circuit; and bonding the second photonic integrated circuit to the first photonic integrated circuit.
25. A method of manufacturing a photonic integrated circuit, the method comprising: providing a cladding layer; forming an opening in the cladding layer.