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GB2622581B - Multiple-outer-product instruction - Google Patents

Multiple-outer-product instruction Download PDF

Info

Publication number
GB2622581B
GB2622581B GB2213475.3A GB202213475A GB2622581B GB 2622581 B GB2622581 B GB 2622581B GB 202213475 A GB202213475 A GB 202213475A GB 2622581 B GB2622581 B GB 2622581B
Authority
GB
United Kingdom
Prior art keywords
product instruction
instruction
product
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
GB2213475.3A
Other versions
GB202213475D0 (en
GB2622581A (en
Inventor
Philippe Claude Grasset Arnaud
Milanovic Jelena
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ARM Ltd
Original Assignee
ARM Ltd
Advanced Risc Machines Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ARM Ltd, Advanced Risc Machines Ltd filed Critical ARM Ltd
Priority to GB2213475.3A priority Critical patent/GB2622581B/en
Publication of GB202213475D0 publication Critical patent/GB202213475D0/en
Priority to KR1020257011553A priority patent/KR20250067861A/en
Priority to CN202380064200.0A priority patent/CN119836622A/en
Priority to JP2025513673A priority patent/JP2025529316A/en
Priority to EP23748299.7A priority patent/EP4587916A1/en
Priority to PCT/GB2023/051858 priority patent/WO2024056984A1/en
Priority to IL318943A priority patent/IL318943A/en
Priority to TW112131068A priority patent/TW202411860A/en
Publication of GB2622581A publication Critical patent/GB2622581A/en
Application granted granted Critical
Publication of GB2622581B publication Critical patent/GB2622581B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G06F9/30038—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations using a mask
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G06F17/16—Matrix or vector computation, e.g. matrix-matrix or matrix-vector multiplication, matrix factorization
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001—Arithmetic instructions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001—Arithmetic instructions
    • G06F9/30014—Arithmetic instructions with variable precision
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30101—Special purpose registers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30105—Register structure
    • G06F9/30109—Register structure having multiple operands in a single register

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computational Mathematics (AREA)
  • Data Mining & Analysis (AREA)
  • Algebra (AREA)
  • Databases & Information Systems (AREA)
  • Computing Systems (AREA)
  • Complex Calculations (AREA)
GB2213475.3A 2022-09-14 2022-09-14 Multiple-outer-product instruction Active GB2622581B (en)

Priority Applications (8)

Application Number Priority Date Filing Date Title
GB2213475.3A GB2622581B (en) 2022-09-14 2022-09-14 Multiple-outer-product instruction
EP23748299.7A EP4587916A1 (en) 2022-09-14 2023-07-14 Multiple-outer-product instruction
CN202380064200.0A CN119836622A (en) 2022-09-14 2023-07-14 Multiple outer product instructions
JP2025513673A JP2025529316A (en) 2022-09-14 2023-07-14 Multiple cross product instruction
KR1020257011553A KR20250067861A (en) 2022-09-14 2023-07-14 Multiple external commands
PCT/GB2023/051858 WO2024056984A1 (en) 2022-09-14 2023-07-14 Multiple-outer-product instruction
IL318943A IL318943A (en) 2022-09-14 2023-07-14 Multiple-outer-product instruction
TW112131068A TW202411860A (en) 2022-09-14 2023-08-18 Multiple-outer-product instruction

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB2213475.3A GB2622581B (en) 2022-09-14 2022-09-14 Multiple-outer-product instruction

Publications (3)

Publication Number Publication Date
GB202213475D0 GB202213475D0 (en) 2022-10-26
GB2622581A GB2622581A (en) 2024-03-27
GB2622581B true GB2622581B (en) 2025-06-18

Family

ID=83945083

Family Applications (1)

Application Number Title Priority Date Filing Date
GB2213475.3A Active GB2622581B (en) 2022-09-14 2022-09-14 Multiple-outer-product instruction

Country Status (8)

Country Link
EP (1) EP4587916A1 (en)
JP (1) JP2025529316A (en)
KR (1) KR20250067861A (en)
CN (1) CN119836622A (en)
GB (1) GB2622581B (en)
IL (1) IL318943A (en)
TW (1) TW202411860A (en)
WO (1) WO2024056984A1 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2622581B (en) * 2022-09-14 2025-06-18 Advanced Risc Mach Ltd Multiple-outer-product instruction
CN119002865B (en) * 2024-10-22 2025-03-07 上海壁仞科技股份有限公司 Data structure conversion method and electronic device

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20190121837A1 (en) * 2018-12-21 2019-04-25 Omid Azizi Apparatus and method for a masked multiply instruction to support neural network pruning operations
GB2594971A (en) * 2020-05-13 2021-11-17 Advanced Risc Mach Ltd Variable position shift for matrix processing
WO2022205197A1 (en) * 2021-03-31 2022-10-06 华为技术有限公司 Matrix multiplier, matrix computing method, and related device
WO2024056984A1 (en) * 2022-09-14 2024-03-21 Arm Limited Multiple-outer-product instruction

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10146738B2 (en) * 2016-12-31 2018-12-04 Intel Corporation Hardware accelerator architecture for processing very-sparse and hyper-sparse matrix data
EP4089531B1 (en) * 2016-12-31 2024-06-26 Intel Corporation Systems, methods, and apparatuses for heterogeneous computing
US20200159810A1 (en) * 2018-11-15 2020-05-21 Hewlett Packard Enterprise Development Lp Partitioning sparse matrices based on sparse matrix representations for crossbar-based architectures
US11429394B2 (en) * 2020-08-19 2022-08-30 Meta Platforms Technologies, Llc Efficient multiply-accumulation based on sparse matrix

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20190121837A1 (en) * 2018-12-21 2019-04-25 Omid Azizi Apparatus and method for a masked multiply instruction to support neural network pruning operations
GB2594971A (en) * 2020-05-13 2021-11-17 Advanced Risc Mach Ltd Variable position shift for matrix processing
WO2022205197A1 (en) * 2021-03-31 2022-10-06 华为技术有限公司 Matrix multiplier, matrix computing method, and related device
WO2024056984A1 (en) * 2022-09-14 2024-03-21 Arm Limited Multiple-outer-product instruction

Also Published As

Publication number Publication date
CN119836622A (en) 2025-04-15
JP2025529316A (en) 2025-09-04
EP4587916A1 (en) 2025-07-23
IL318943A (en) 2025-04-01
GB202213475D0 (en) 2022-10-26
WO2024056984A1 (en) 2024-03-21
GB2622581A (en) 2024-03-27
KR20250067861A (en) 2025-05-15
TW202411860A (en) 2024-03-16

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