GB2520277B - Controlling the voltage level on the word line to maintain performance and reduce access disturbs - Google Patents
Controlling the voltage level on the word line to maintain performance and reduce access disturbsInfo
- Publication number
- GB2520277B GB2520277B GB1320034.0A GB201320034A GB2520277B GB 2520277 B GB2520277 B GB 2520277B GB 201320034 A GB201320034 A GB 201320034A GB 2520277 B GB2520277 B GB 2520277B
- Authority
- GB
- United Kingdom
- Prior art keywords
- controlling
- word line
- voltage level
- maintain performance
- reduce access
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/408—Address circuits
- G11C11/4085—Word line control circuits, e.g. word line drivers, - boosters, - pull-up, - pull-down, - precharge
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
- G11C11/418—Address circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
- G11C11/419—Read-write [R-W] circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/02—Arrangements for writing information into, or reading information out from, a digital store with means for avoiding parasitic signals
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Static Random-Access Memory (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB1320034.0A GB2520277B (en) | 2013-11-13 | 2013-11-13 | Controlling the voltage level on the word line to maintain performance and reduce access disturbs |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB1320034.0A GB2520277B (en) | 2013-11-13 | 2013-11-13 | Controlling the voltage level on the word line to maintain performance and reduce access disturbs |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| GB201320034D0 GB201320034D0 (en) | 2013-12-25 |
| GB2520277A GB2520277A (en) | 2015-05-20 |
| GB2520277B true GB2520277B (en) | 2016-07-20 |
Family
ID=49818565
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB1320034.0A Expired - Fee Related GB2520277B (en) | 2013-11-13 | 2013-11-13 | Controlling the voltage level on the word line to maintain performance and reduce access disturbs |
Country Status (1)
| Country | Link |
|---|---|
| GB (1) | GB2520277B (en) |
Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0023655A2 (en) * | 1979-07-26 | 1981-02-11 | Kabushiki Kaisha Toshiba | Semiconductor memory device |
| JPS60226095A (en) * | 1984-04-25 | 1985-11-11 | Hitachi Micro Comput Eng Ltd | Semiconductor storage device |
| JPH0457297A (en) * | 1990-06-22 | 1992-02-25 | Mitsubishi Electric Corp | Semiconductor memory |
| US20030052725A1 (en) * | 2001-09-20 | 2003-03-20 | Yoshihiko Kamata | Voltage translator |
| US20100142253A1 (en) * | 2008-12-10 | 2010-06-10 | Akira Katayama | Semiconductor memory device |
| US20110149674A1 (en) * | 2009-12-22 | 2011-06-23 | Gus Yeung | Integrated circuit memory with word line driving helper circuits |
| US20120170390A1 (en) * | 2011-01-03 | 2012-07-05 | Arm Limited | Read stability of a semiconductor memory |
| US20130128680A1 (en) * | 2011-11-17 | 2013-05-23 | Texas Instruments Incorporated | Read assist circuit for an sram |
| US20130272056A1 (en) * | 2012-04-13 | 2013-10-17 | Taiwan Semicconductor Manufacturing Company, Ltd. | Apparatus for SRAM Cells |
-
2013
- 2013-11-13 GB GB1320034.0A patent/GB2520277B/en not_active Expired - Fee Related
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0023655A2 (en) * | 1979-07-26 | 1981-02-11 | Kabushiki Kaisha Toshiba | Semiconductor memory device |
| JPS60226095A (en) * | 1984-04-25 | 1985-11-11 | Hitachi Micro Comput Eng Ltd | Semiconductor storage device |
| JPH0457297A (en) * | 1990-06-22 | 1992-02-25 | Mitsubishi Electric Corp | Semiconductor memory |
| US20030052725A1 (en) * | 2001-09-20 | 2003-03-20 | Yoshihiko Kamata | Voltage translator |
| US20100142253A1 (en) * | 2008-12-10 | 2010-06-10 | Akira Katayama | Semiconductor memory device |
| US20110149674A1 (en) * | 2009-12-22 | 2011-06-23 | Gus Yeung | Integrated circuit memory with word line driving helper circuits |
| US20120170390A1 (en) * | 2011-01-03 | 2012-07-05 | Arm Limited | Read stability of a semiconductor memory |
| US20130128680A1 (en) * | 2011-11-17 | 2013-05-23 | Texas Instruments Incorporated | Read assist circuit for an sram |
| US20130272056A1 (en) * | 2012-04-13 | 2013-10-17 | Taiwan Semicconductor Manufacturing Company, Ltd. | Apparatus for SRAM Cells |
Also Published As
| Publication number | Publication date |
|---|---|
| GB201320034D0 (en) | 2013-12-25 |
| GB2520277A (en) | 2015-05-20 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PCNP | Patent ceased through non-payment of renewal fee |
Effective date: 20191113 |