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GB2514032B - Methods of forming fully embedded bumpless build-up layer packages and structures formed thereby - Google Patents

Methods of forming fully embedded bumpless build-up layer packages and structures formed thereby

Info

Publication number
GB2514032B
GB2514032B GB201413336A GB201413336A GB2514032B GB 2514032 B GB2514032 B GB 2514032B GB 201413336 A GB201413336 A GB 201413336A GB 201413336 A GB201413336 A GB 201413336A GB 2514032 B GB2514032 B GB 2514032B
Authority
GB
United Kingdom
Prior art keywords
methods
structures formed
fully embedded
layer packages
bumpless build
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
GB201413336A
Other versions
GB201413336D0 (en
GB2514032A (en
Inventor
Ravi K Nalla
Mathew J Manusharow
Pramod Malatkar
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US12/890,045 external-priority patent/US8304913B2/en
Application filed by Intel Corp filed Critical Intel Corp
Priority to GB201413336A priority Critical patent/GB2514032B/en
Publication of GB201413336D0 publication Critical patent/GB201413336D0/en
Publication of GB2514032A publication Critical patent/GB2514032A/en
Application granted granted Critical
Publication of GB2514032B publication Critical patent/GB2514032B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H10W70/614—
    • H10P72/74—
    • H10W70/05—
    • H10W70/09—
    • H10W70/093—
    • H10W70/60—
    • H10W70/611—
    • H10W70/685—
    • H10W72/0198—
    • H10W72/0711—
    • H10W74/117—
    • H10W90/00—
    • H10P72/7436—
    • H10W70/099—
    • H10W72/073—
    • H10W72/241—
    • H10W72/823—
    • H10W72/874—
    • H10W72/9413—
    • H10W74/00—
    • H10W74/019—
    • H10W74/142—
    • H10W90/20—
    • H10W90/724—
    • H10W90/734—
GB201413336A 2010-09-24 2011-09-26 Methods of forming fully embedded bumpless build-up layer packages and structures formed thereby Active GB2514032B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB201413336A GB2514032B (en) 2010-09-24 2011-09-26 Methods of forming fully embedded bumpless build-up layer packages and structures formed thereby

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US12/890,045 US8304913B2 (en) 2010-09-24 2010-09-24 Methods of forming fully embedded bumpless build-up layer packages and structures formed thereby
GB1303675.1A GB2497026B (en) 2010-09-24 2011-09-26 Methods of forming fully embedded bumpless build-up layer packages and structures formed thereby
GB201413336A GB2514032B (en) 2010-09-24 2011-09-26 Methods of forming fully embedded bumpless build-up layer packages and structures formed thereby

Publications (3)

Publication Number Publication Date
GB201413336D0 GB201413336D0 (en) 2014-09-10
GB2514032A GB2514032A (en) 2014-11-12
GB2514032B true GB2514032B (en) 2015-05-06

Family

ID=51587345

Family Applications (1)

Application Number Title Priority Date Filing Date
GB201413336A Active GB2514032B (en) 2010-09-24 2011-09-26 Methods of forming fully embedded bumpless build-up layer packages and structures formed thereby

Country Status (1)

Country Link
GB (1) GB2514032B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9041207B2 (en) * 2013-06-28 2015-05-26 Intel Corporation Method to increase I/O density and reduce layer counts in BBUL packages

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100193928A1 (en) * 2009-02-02 2010-08-05 Infineon Technologies Ag Semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100193928A1 (en) * 2009-02-02 2010-08-05 Infineon Technologies Ag Semiconductor device

Also Published As

Publication number Publication date
GB201413336D0 (en) 2014-09-10
GB2514032A (en) 2014-11-12

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