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GB2546761B - Methods and circuits - Google Patents

Methods and circuits Download PDF

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Publication number
GB2546761B
GB2546761B GB1601515.8A GB201601515A GB2546761B GB 2546761 B GB2546761 B GB 2546761B GB 201601515 A GB201601515 A GB 201601515A GB 2546761 B GB2546761 B GB 2546761B
Authority
GB
United Kingdom
Prior art keywords
circuits
methods
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
GB1601515.8A
Other versions
GB2546761A (en
GB201601515D0 (en
Inventor
Dominic Ogier Simon
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Neudrive Ltd
Original Assignee
Neudrive Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Neudrive Ltd filed Critical Neudrive Ltd
Priority to GB1601515.8A priority Critical patent/GB2546761B/en
Publication of GB201601515D0 publication Critical patent/GB201601515D0/en
Priority to PCT/GB2017/050101 priority patent/WO2017129945A1/en
Priority to CN201780012655.2A priority patent/CN108701646A/en
Publication of GB2546761A publication Critical patent/GB2546761A/en
Application granted granted Critical
Publication of GB2546761B publication Critical patent/GB2546761B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H10W72/012—
    • H10W20/067—
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/107—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by filling grooves in the support with conductive material
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K19/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic element specially adapted for rectifying, amplifying, oscillating or switching, covered by group H10K10/00
    • H10K19/10—Integrated devices, or assemblies of multiple devices, comprising at least one organic element specially adapted for rectifying, amplifying, oscillating or switching, covered by group H10K10/00 comprising field-effect transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K19/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic element specially adapted for rectifying, amplifying, oscillating or switching, covered by group H10K10/00
    • H10K19/202—Integrated devices comprising a common active layer
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/60—Forming conductive regions or layers, e.g. electrodes
    • H10K71/611—Forming conductive regions or layers, e.g. electrodes using printing deposition, e.g. ink jet printing
    • H10W20/49—
    • H10W70/611—
    • H10W70/635—
    • H10W70/641—
    • H10W70/65—
    • H10W72/00—

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
GB1601515.8A 2016-01-27 2016-01-27 Methods and circuits Active GB2546761B (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
GB1601515.8A GB2546761B (en) 2016-01-27 2016-01-27 Methods and circuits
PCT/GB2017/050101 WO2017129945A1 (en) 2016-01-27 2017-01-17 Methods and circuits
CN201780012655.2A CN108701646A (en) 2016-01-27 2017-01-17 Method and circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB1601515.8A GB2546761B (en) 2016-01-27 2016-01-27 Methods and circuits

Publications (3)

Publication Number Publication Date
GB201601515D0 GB201601515D0 (en) 2016-03-09
GB2546761A GB2546761A (en) 2017-08-02
GB2546761B true GB2546761B (en) 2020-07-22

Family

ID=55535029

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1601515.8A Active GB2546761B (en) 2016-01-27 2016-01-27 Methods and circuits

Country Status (3)

Country Link
CN (1) CN108701646A (en)
GB (1) GB2546761B (en)
WO (1) WO2017129945A1 (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110241202A1 (en) * 2010-03-30 2011-10-06 Taiwan Semiconductor Manufacturing Company, Ltd. Dummy Metal Design for Packaging Structures
US20130106942A1 (en) * 2011-10-31 2013-05-02 Samsung Electronics Co., Ltd. Methods of forming patterns on a substrate
US20140021604A1 (en) * 2011-10-25 2014-01-23 Globalfoundries Inc. Integrated circuit devices with bump structures that include a protection layer

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1995002901A1 (en) * 1993-07-15 1995-01-26 Astarix, Inc. Top level via structure for programming prefabricated multi-level interconnect
US5741727A (en) * 1997-05-23 1998-04-21 Industrial Technology Research Institute Circuit modification and repair using a low resistance conducting metal bridge and a focused ion beam
CN1697187B (en) * 2003-12-19 2011-05-04 株式会社半导体能源研究所 Semiconductor integrated circuit, semiconductor device, and method of manufacturing semiconductor integrated circuit
US8890338B2 (en) * 2006-09-27 2014-11-18 Agere Systems, Inc. Method of identifying and/or programming an integrated circuit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110241202A1 (en) * 2010-03-30 2011-10-06 Taiwan Semiconductor Manufacturing Company, Ltd. Dummy Metal Design for Packaging Structures
US20140021604A1 (en) * 2011-10-25 2014-01-23 Globalfoundries Inc. Integrated circuit devices with bump structures that include a protection layer
US20130106942A1 (en) * 2011-10-31 2013-05-02 Samsung Electronics Co., Ltd. Methods of forming patterns on a substrate

Also Published As

Publication number Publication date
WO2017129945A1 (en) 2017-08-03
CN108701646A (en) 2018-10-23
GB2546761A (en) 2017-08-02
GB201601515D0 (en) 2016-03-09

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