GB2540196B

GB2540196B - Radar signal processing

Info

Publication number: GB2540196B
Application number: GB1512026.4A
Authority: GB
Inventors: Johnson Angus
Original assignee: Thales Holdings UK PLC
Current assignee: Thales Holdings UK PLC
Priority date: 2015-07-09
Filing date: 2015-07-09
Publication date: 2019-06-26
Anticipated expiration: 2035-07-09
Also published as: GB2540196A; GB201512026D0

Description

Radar Signal Processing

FIELD

Embodiments disclosed herein relate to radar signal processing. In particular, embodiments concern radar electronic support measures (RESM), which involves the detection, classification and identification of radar emissions.

BACKGROUND

The field of RESM generally concerns the detection, interception and identification of radar sources, from trains of radar pulses received at a given radar receiver. A wide variety of different radar devices exists. However, one particular type of radar device achieves frequency stability by including a master oscillator, from which all signals generated by the radar device are derived. This type of radar device is known as Master Oscillator - Power Amplifier (ΜΟΡΑ). A ΜΟΡΑ radar transmitter is able to provide a precisely determined carrier phase and pulse repetition interval (PRI) clock, by virtue of having a stable reference oscillator and up-conversion chain.

As a result, a ΜΟΡΑ radar exhibits a signature which cannot readily be disguised. Since all behaviour of a ΜΟΡΑ radar, as characterised by its carrier phase and PRI, is derived from the master oscillator of that radar, the behaviour of the ΜΟΡΑ radar is detectable and identifiable, when compared with the emissions of another ΜΟΡΑ radar operating on the basis of a master oscillator with different characteristics.

However, separating out the emissions of a plurality of ΜΟΡΑ radar transmitters from a composite detection signal, can involve significant processing time, and can suffer from inaccuracy.

SUMMARY

According to an aspect of the present invention there is provided a method of determining a potential clock frequency of a radar emitter, the method comprising: processing received pulses to obtain frequency data and pulse repetition interval, PRI, data from a single emitter; forming pairs within frequency data, performing a first frequency difference value calculation process, which comprises finding difference values in each pair of the frequency data to form a first frequency difference level, performing a second frequency difference value calculation process which comprises finding difference values for each pair of frequency difference values of the first frequency difference level to form a second frequency difference level, and replacing the values of the first frequency difference level with the values of the second frequency difference level, repeating the second frequency difference value calculation process until all non-zero values are of equal value, for every frequency difference level, finding factors of each frequency difference value in the frequency difference level, comparing the factor values of frequencies in each difference level to find any common factors; forming pairs within PRI data, performing a first PRI difference value calculation process, which comprises finding difference values in each pair of the PRI data to form a first PRI difference level, performing a second PRI difference value calculation process which comprises finding difference values for each pair of PRI difference values of the first PRI difference level to form a second PRI difference level, and replacing the values of the first PRI difference level with the values of the second PRI difference level, repeating the second PRI difference value calculation process until all non-zero values are of equal value, for every difference level of PRI, finding factors of each PRI difference value in the PRI difference level, comparing the factor values of PRI in each PRI difference level to find any common factors; arranging the common factor values in their frequency of appearance; re-applying the most frequent common factor value to the frequency and PRI data to obtain potential emitter clock frequency.

The use of both the PRI values and the frequency values enable the method to be more efficient and accurate.

Preferably, processing received pulses includes deinterleaving the received pulses.

Preferably, frequency is obtained by analysing the phase.

Analysing phase introduces less noise.

Preferably, the frequency is obtained by using quarter rate mixing.

Preferably, the phase is obtained using the Rotate-Add-Decimate method.

Preferably, the method further comprises a re-submission step, wherein the received pulses are re-processed.

Preferably, the re-submission step comprises resampling the data using the obtained potential emitter frequency as a divisor of the sample rate.

Preferably, the re-submission step occurs if a minimum threshold level determined by the receiver noise was exceeded.

In other words, there is provided a method of determining a potential clock frequency of an emitter, wherein the frequency data and the PRI data of a received pulses are processed, the process including factorising each the frequency data and the PRI data by continuing cycles of finding differences within the frequency data and the PRI data, until all non-zero values of differences obtained are of equal value.

In some other words, there is provided a method of determining a potential clock frequency of a radar emitter, wherein the method comprises obtaining frequency data and pulse repetition interval, PRI, data from a single emitter, forming pairs each within frequency data and PRI data, finding differences between each pair to form difference values, repeating to form pairs of the difference values and finding difference values of each pair until all non-zero values are of equal value, whilst finding factors for each difference value found, and comparing the factor values to find any common factors, re-applying the most frequency common factor value to the frequency and PRI data to obtain potential emitter clock frequency.

According to another aspect of the present invention, there is provided an apparatus for determining a potential clock frequency of a radar emitter, the apparatus comprising: a processor configured to process received pulses to obtain frequency data and pulse repetition interval, PRI, data from a single emitter; a frequency pairer configured to form pairs within frequency data; a first frequency difference value calculator configured to perform a first frequency difference value calculation process, and comprising a first frequency difference level difference finder configured to find difference values in each pair of the frequency data to form a first frequency difference level; a second frequency difference value calculator configured to perform a second frequency difference value calculation process, and comprises a second frequency difference finder configured to find difference values for each pair of frequency difference values of the first frequency difference level to form a second frequency difference level, and a frequency difference level value replacer configured to replace the values of the first frequency difference level with the values of the second frequency difference level, wherein the second frequency difference value calculator is configured to repeat the second frequency difference value calculation process until all non-zero values are of equal value; a frequency factor finder configured to find factors of each frequency difference value in the frequency difference level, for every frequency difference level; a frequency common factor finder configured to compare the factor values of frequencies in each difference level to find any common factors; a PRI pairer configured to form pairs within PRI data; a first PRI difference value calculator configured to perform a first PRI difference value calculation process, and comprising a first PRI difference level difference finder configured to find difference values in each pair of the PRI data to form a first PRI difference level; a second PRI difference value calculator configured to perform a second PRI difference value calculation process, and comprises a second PRI difference finder configured to find difference values for each pair of PRI difference values of the first PRI difference level to form a second PRI difference level, and a PRI difference level value replacer configured to replace the values of the first PRI difference level with the values of the second PRI difference level, wherein the second PRI difference value calculator is configured to repeat the second PRI difference value calculation process until all non-zero values are of equal value; a PRI factor finder configured to find factors of each PRI difference value in the PRI difference level, for every PRI difference level; a PRI common factor finder configured to compare the factor values of frequencies in each difference level to find any common factors and arrange the common factor values in their frequency of appearance; a re-applicator configured to re-apply the most frequent common factor value to the frequency and PRI data to obtain potential emitter clock frequency.

Preferably, the processor comprises a deinterleaver for deinterleaving the received pulses.

Preferably, the processor is configured to obtain frequency by analysing the phase.

Preferably, the processor is configured to use quarter rate mixing.

Preferably, the processor is configured to obtain phase by using the Rotate-Add-Deci mate method.

Preferably, the re-applicator is configured to send the obtained potential emitter frequency as a divisor of the sample rate to the processor, to launch re-processing.

Preferably, the processor is configured to resample the data using the obtained potential emitter frequency as a divisor of the sample rate.

Preferably, the re-applicator is configured to send the obtained potential emitter frequency if a minimum threshold level determined by the receiver noise was exceeded.

DESCRIPTION OF DRAWINGS

Figure 1 is a schematic diagram showing a radar receiver being deployed to receive signals from a plurality of radar transmitters;

Figure 2 is a schematic diagram showing a segment of the amplitude demodulated (detected) waveform from a typical radar signal;

Figure 3 is a schematic diagram of a typical Master Oscillator-Power Amplifier (ΜΟΡΑ) radar transmitter;

Figure 4 is a schematic diagram of the main units of an embodiment described herein;

Figure 5 is a diagram illustrating emitter pulses from different emitters being separated by a deinterleaver;

Figure 6 is a schematic diagram of a digital down converter processing example sampled data in accordance with an embodiment described herein;

Figure 7 is an illustration of the relationship between frequency and instantaneous phase;

Figure 8 is a schematic diagram of a feedback unit in accordance with an embodiment described herein;

Figure 9 is a process diagram illustrating difference mapping of RF data in accordance with an embodiment described herein;

Figure 10 is a process diagram illustrating difference mapping of PRI data in accordance with an embodiment described herein;

DESCRIPTION OF EMBODIMENTS

Figure 1 is a schematic diagram showing a scenario in which a radar receiver 100 is deployed to receive signals from a plurality of radar transmitters 50. For the purpose of this example, the radar transmitters 50 are assumed all to be ΜΟΡΑ transmitters although in a real instance they may not all be so.

Figure 2 shows a schematic diagram showing an example of a segment of a typical amplitude detected radar signal from the RESM receiver. The pulses are of a variety of profiles, commensurate with the fact that they will be the product of emission by various radar transmitters 50. As shown in figure 2, it is assumed that there are K distinct emitters, to be identified from the received pulse train. A typical ΜΟΡΑ radar transmitter 50 is illustrated in figure 3. As shown, the transmitter 50 comprises a transmitter section 52, an antenna section 54 and a receiver section 56. A display 58 is also provided. The transmitter section 52 is operable to provide a transmission signal, for driving the antenna section 54 to produce a radar emission. The receiver section 56 is operable to receive a detection signal from the antenna section 54, and to translate that into a display signal commensurate with information discerned from the detection signal.

To do this, the antenna section 54 comprises an antenna 62 and a duplexer 64. The antenna 62 is operable to emit electromagnetic signals in response to an electrical driver signal, and to detect incoming electromagnetic signals and to produce a corresponding electrical driver signal. The duplexer 64 enables this receive/transmit dual function.

The transmitter section 52 includes a timer 72, a modulator 74 and an amplifier 76. The timer 72 is a highly stable oscillator, operable to emit a train of pulses for use by the modulator in forming a radar transmission signal. The modulator 74 modulates a pulse profile (in amplitude and, potentially, with intention, within pulse frequency I phase) onto the signal and upconverts to the desired emission frequency. The amplifier 76 conditions and amplifies the signal to a state enabling the driving of the antenna section 54.

As will be appreciated by the reader, the source of the emitted signal is, at all times, the oscillator signal produced by the timer. This is ideally unvarying in phase and frequency. This therefore translates through to an inherent quality of the resultant radar emission of the ΜΟΡΑ radar transmitter 50. As will be appreciated by the reader, there will be an algebraic relationship between the inherent oscillator phase and frequency and the emitted radar signal.

All emission frequencies and PRIs will, ultimately, be constructed by way of up-conversion and/or count-down from the originating oscillation frequency. Even when the emitted signal hops from one frequency to another or from one PRI to another, this change is fundamentally determined by the underlying clock of the radar system, and count-downs of the transmitter and timing chains to the master clock. Normally, it can be expected that a radar device will rely on only whole-number counts of the originating clock pulses, thereby providing a limitation on the possible behaviour of the transmitter, and this limitation can be used as a detection signature.

Figure 4 shows an example embodiment. A radar receiver 110 receives signals which comprise a series of received pulses. These incoming pulse samples are collected by a receiver 110. In this embodiment, the receiver 110 is a digital receiver, consisting of filtering, down-conversion (where necessary) including further bandwidth definition, analogue to digital conversion and pulse parameter estimation based on demodulated amplitude and frequency waveforms. All subsequent stages are numerical processes on the digitally sampled receiver output bitstream.

For every pulse arriving at the receiver, a measure of the frequency and Time-of-Arrival (TOA) is made from the digital samples at the receiver. The signal data is then passed to a deinterleaver 200 to be further processed.

The reader will appreciate that, although in this embodiment a deinterleaver is used, in other embodiments it may not be essential for the signal data to be processed by a deinterleaver. The signal could, for example, be separated in a number of different ways, for instance by simple within-limit selection, or manually by the skilled person using bespoke software GUIs. In this example, the deinterleaver 200 is a conventional signal sorter. This results in stable frequency and PRI levels to be derived from a single emitter. Emitter pulses from different emitters are deinterleaved such that an emitter pulse train originating from a certain emitter is sorted from another emitter pulse train originating from a different emitter, as shown in Figure 5. These emitter pulse trains, comprising primarily frequency and PRI level data, sorted by the deinterleaver 200, are then saved in a memory unit 300.

The emitter pulses, sorted by the deinterleaver 200, are also sent to a down converter 400 to be down converted. The main purpose of this down converter 400, which receives sorted pulse samples from the deinterleaver 200 and is also connected to the memory unit 300, is to use the downconverted signals to obtain improved values of frequency data and PRI data and to feed these improved values into the memory unit 300 in addition to the original frequency and PRI data obtained directly by the deinterleaver 200. The down converter 400 is shown in further detail in Figure 4, which will be discussed later.

The frequency data and the PRI data that have thus been sorted and categorised as being from a single emitter by the deinterleaver 200, and the improved frequency data and the PRI data received from the down converter 400 are received and saved in the memory unit 300. Differences mapper 500 accesses this data in the memory unit 300, and performs processes as illustrated in flow charts as shown in Figures 7 and 9 to the frequency data and the PRI data respectively. These processes will be discussed in further detail below.

As the name of the unit suggests, the differences mapper 500 maps the differences of each the frequency data and the PRI data. That is to say, the numerical differences of frequency data of a pulse signal and the numerical differences of PRI data of the same pulse signal are calculated. The algebraic relationship between the inherent oscillator phase and frequency and the emitted radar signal mentioned earlier is to be derived from these differences.

As the frequencies and PRIs have been constructed by way of up-conversion and/or count-down from the originating oscillation frequency, the frequencies and the PRIs from the same emitter will have a specific relationship that ultimately is a whole-number multiple of the originating oscillation frequency. That is to say, the frequency and PRIs can be described as rational numbers that originate from the oscillation frequency of the emitter. By obtaining the differences, such a multiple is made easier to identify. The identification of such a multiple is the function of divisor identifier 600. The divisor identifier 600 accesses the database of the differences mapper 500 to identify any divisors of the differences obtained by the differences mapper 500. Further detailed description of the divisor identifier 600 will follow.

It is not necessary for only a single divisor to be identified, and hence a number of potential divisors may be identified. Any potential divisors for the emitter are stored in a database of potential divisors 700.

The potential divisors stored in the database of potential divisors 700 are then processed in a re-applicator 800. The re-applicator uses the original frequency and PRI data and the potential divisors to calculate the originating clock pulses which characterises a specific emitter. Any recurring values are identified by a common value identifier 900, and the most often recurring value is considered the most likely potential emitter clock frequency. These likely potential emitter clock frequencies are stored in a potential emitter clock frequencies database 1000, such that when a similar pulse train is received, these may be immediately identified by searching through the potential emitter clock frequencies database 1000.

The arrow between the re-applicator 800 and the deinterleaver 200 represents a resubmission process, wherein the underlying radar clock found by the re-applicator is used as a divisor of a sample rate, and the data at the deinterleaver is resampled in the knowledge of the now known radar clock rate. This process only occurs if a minimum threshold level determined by the receiver noise was exceeded. In embodiments where a deinterleaver is not used, the data that has not been deinterleaved is resampled in the same way.

The units illustrated in Figure 4 as mentioned above will now be discussed in more detail.

Figure 6 shows the down converter 400 mentioned above in further detail. Here, the deinterleaved pulse samples comprising frequency data from the deinterleaver 200 are received by a digitally synthesized RF mixer such that the frequency data (RF) of the deinterleaved pulse samples may be down converted and processed into In-phase (I) and Quadrature (Q) sample pairs. A typical down converter structure comprising an RF mixer which also receives an input signal from a Local Oscillator (LO) 410 to output an intermediate frequency (IF). The IF is then split into I and Q samples by a quadrature phase splitter 420, which is illustrated for simplicity although typically this would be implemented by using techniques such as quarter rate mixing with a digital synthesized signal at one quarter of the data sample rate and digital filtering to +/- one quarter of the sample rate. The instantaneous phase Φ of each sample is calculated by taking an arctangent of Q/l by a phase calculator 430.

The calculated phase value Φ is then sent to a phase feedback unit 440. The phase feedback unit 440 aims to reduce any residual frequency present in the pulse samples. The relationship of phase and frequency, as illustrated in Figure 7, is used in order to achieve this. As can be seen in Figure 7, the instantaneous frequency is defined as the temporal derivative of the oscillation phase divided by 2tt, and is time-dependent.

The feedback unit 440 is shown in further detail in Figure 8. The phase data calculated for each pulse sample by the phase measurer 430 is stored in a phase data memory 441, along with the time interval between the pulse samples, which can be extracted from the TOA of the pulse samples.

The difference in the instantaneous phase values over a time interval between the samples is taken to be the residual frequency, and this is calculated in the residual frequency calculator 442. This residual frequency value, which is also a correction value to adjust the frequency output of the LO 410, is fed into the LO 410, such that the IF value may be changed to bring the residual frequency as close to zero as possible as illustrated in Figure 8.

The new IF values may also be considered as the more accurate RF values. This is because phase is the integral of frequency and therefore is less noisy, and hence it is possible to obtain a more accurate value of phase than the RF. Therefore, the new IF values are sent to an improved RF calculator 443 as well as being sent to the LO 410, such that the improved RF data may be sent from the improved RF calculator 443 to the memory unit 300. The improved RF data are stored alongside the frequency values that are already stored in the memory unit 300 from the measurements made earlier. This enables a more accurate RF data to be used for the frequency differences map.

As a result, the down converter 400 enables a more accurate frequency and phase values to be obtained from the deinterleaved pulse samples and to be sent to the memory unit 300.

An alternative to the above process providing enhanced frequency accuracy would be that by Crozier’s rotate-add-deci mate processing, as disclosed in “Low Complexity Frequency Estimation with Close-to-Optimum Performance for QPSK and Offset-QPSK Modulated Signals” by S. Crozier and K.Gracie, Proc. 9th Int. Conf. Wireless Communications, pp. 294-306, 9th - 11th July 1997.

In the memory unit 300, the frequency data and the phase data are saved for each pulse sample originating from the same emitter. These include both the measurements made from the pulse samples directly from the deinterleaver 200, and the improved phase and frequency data received from the down converter 400.

In the differences mapper 500, the frequency data and PRI data that have been sorted and categorised as being from a single emitter by the deinterleaver 200 and saved in the memory 300 are processed as shown in flow diagrams illustrated in Figures 9 and 10 respectively.

Figure 9 is a flow diagram of the process that is carried out on the RF data, and Figure 10 is a flow diagram of the process that is carried out on the PRI data.

In step S1-2 of the flow diagram in Figure 9, the RF data that has been extracted from the pulse samples as being from the same emitter is stored in the memory unit 300 as RF(i), wherein i =1, 2, ... ,k-1, k. These RF data values include both those extracted directly from the pulse samples as well as the improved RF data values that have been output from the down converter 400. In step S1-4, these RF data values are paired up, for example RF(1) with RF(2) and RF(3) with RF(4) etc. As the reader will appreciate, there are many different ways of pairing up the RF values. For instance, there is no need for an RF value to be paired up once with only one other RF value, but may be used repeatedly to be paired up with other RF values. For example, pairings could be RF(1) with RF(2) and RF(1) with RF(3) ... etc. A table of differences is formed to store the RF values as well as the differences calculated from the RF values. The table contains at least a first row, and this table is where the differences are ‘mapped’.

In this example embodiment, RF(i) values are firstly arranged in the first row of the table of differences. Then, RF(i) and RF(i-1) are paired up, such that RF(1) and RF(2), RF(2) and RF(3), ..., RF(k-1) and RF(k) are pairs.

In step S1-6, a second row of the table is generated for storing the difference in the RF values of each pair, wherein the difference is calculated as: ARF(i)(i-1) = | RF(i) - RF(i-1)|

In such a way, the difference values are obtained for each pair. These difference values are arranged in a second row of the table of differences. This row of differences is referred to as the first RF differences level.

In step S1-8, it is determined whether there is a single difference value ARF in the difference level. In other words, this step determined whether all non-zero difference values calculated are of equal value. Therefore, a situation where more than one difference value is generated from the difference calculation, wherein the actual data values of the difference values are equal would result in a ‘yes’.

Where the answer to the test in step S1-8 is ‘yes’, the difference values are sent to the divisor identifier.

In this embodiment, steps S1-2 to S1-8 form a part of a first frequency difference value calculation process.

If the answer to the above determination step S1-8 is ‘no’, it carried onto step S1-10, and a second frequency difference value calculation process is performed. In step S1-10, the difference values of the first RF differences level are paired up as the RF values were earlier. Similarly to before, the first RF differences values are not limited to being paired up in one specific way. In this specific embodiment, the pairings are made such that pairs are formed to include Δ RF (i-n)(i-n-1) and Δ RF (i-n-1 )(i-n-2), wherein n refers to the level of differences.

In step S1-12, the differences of the RF difference values in the first RF differences level are obtained by calculated the differences for each pair formed according to the above. A third row is generated in the table of differences and the new RF difference values, which are differences of differences, are stored in the third row of the table of differences.

In step S1-14, the same test as in step S1-8 is performed, and it is determined whether there is a single difference value ARF in the difference level. Again, this is to determine whether all non-zero difference values obtained from the difference calculation are of equal value.

If any non-zero difference values obtained from the difference calculation have difference values, such that the answer to step S1-14 is ‘no’, the second frequency difference value calculation process is repeated. That is to say, the steps S1-10 to S1-14, which include pairing and finding the differences in the values in the pair are repeated, and the difference values in each level are stored in a newly created row, until only a single value remains such that no pairing can be made.

Where the test of step S1-14 results in a ‘yes’, the calculation process is terminated, and the difference value is sent to the divisor identifier.

It is possible to configure the system such that any values that generate a difference value of zero are stored, and zero values to be disregarded are no longer included in any further pairings. That is to say, where a difference value of zero is detected, the data values from which the difference value of zero is obtained from is noted and sent to the divisor identifier instead. This enables to highlight any values that occur often, as well as minimizing any unnecessary work that is cause by calculating the differences of zero values, which adds little information.

An RF frequency differences map that is output by the differences mapper 500 is essentially in the form of a table, wherein an example is given below.

Table 1. RF frequency differences map

Equivalent steps of pairing and finding the differences are carried out to process the PRI data, wherein an example of a PRI data differences map can be found below.

Table 2. PRI data differences map

Once the differences maps are received by the divisor identifier 600, the difference values of each the PRI data and the RF frequency data are processed.

At each level of the differences map, calculation to find the factors of each difference value of the level is performed, such that a set of factors for the difference value is obtained. This process is carried out for all the difference values of the difference level that is being examined. The factors may be calculated, for example, using a well-known common factor calculator system.

Once factor sets for every difference value of the difference level has been generated, any intersections of the factor sets are then looked for, wherein the intersection is found where there are any factors of the same value in the factor sets. Such an intersection corresponds to a common factor of the difference values.

All the common factors found for the difference level are then stored in the database of potential divisors 700 for later use.

The above search of common factors is repeated for all the difference levels that are present on the differences map of both the RF frequency data and the PRI data.

The common factors obtained from one level of RF frequency data differences map and the common factors obtained from an equivalent level of PRI frequency data differences map are compared and any overlapping common factors for both RF frequency data differences and PRI frequency data are marked. The common factors are marked every time it is overlapped, such that the most often repeated common factor is marked with the highest number. The more often a common factor is repeated and overlaps, the more robust the common factor is considered to be.

It was mentioned previously that all emission frequencies and PRIs are ultimately constructed by way of up-conversion and/or count-down from the originating oscillation frequency, wherein the above discussed type of radar devices generally rely only on whole-number counts of the originating clock pulses.

The common factors that have been determined are the potential candidates of these whole-number counts that algebraically relate the originating oscillation frequency of the emitter to emit the signals with the frequencies, phase and PRI of the received pulse chains. As mentioned above, these common factors may be rational numbers.

Accordingly, the re-applicator 800 ‘re-applies’ the most often repeated common factor, and hence the most robust common factor, to the original pulse data to determine the potential clock frequencies. This process would attempt to resample the data with the knowledge of the underlying radar clock and having that clock as a divisor of the sample rate. This would then be re-submitted to the above process, if a minimum threshold level determined by the receiver noise was exceeded. Given the knowledge of the clock frequency from the first pass of the technique, it is possible to reapply this knowledge to the data on the basis that the PRI and Frequency should always be divided by an integer value of the underlying clock. This therefore forms an iterative process looking at the received signals and the derived clocks to determine if a subtle adjustment of the sampling clock would allow a more accurate demodulation of the signal. As the skilled reader would appreciate, this would be done on the recorded data, wholly in memory.

The potential clock frequencies are also marked in a similar manner to the common factors, such that it is possible for the common value identifier 900 to identify the more robust potential clock frequencies and log them in the potential emitter clock frequencies database 1000.

In turn, the potential originating oscillation frequency can be used to identify the specific emitter to which the originating oscillation frequency is a characterising feature of the emitter.

As the relationships underlying PRI data and the frequency data are considered, there is no need for the specific time at which the specific PRI and frequency data were measured to be tagged. That is to say, the PRI, RF and Phase data do not have to be aligned for each pulse, and can each be processed separately without the need of relevant data being tagged with the measurement time. As a result, the coherency of the radar emitter system is exploited fully whilst using conventional measurement of radar and without requiring additional measurements to be made.

As can be seen above, the present invention, when combined with modern, digital coherent receivers allows the received signal to be characterised accurately and rapidly to enable a unique identification of radar or a class of radars based on the underlying clock of the radar. This is achieved by exploiting the coherency of radar and using PRI, RF and Phase data in a combined manner as in the present invention.

While certain embodiments have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the inventions. Indeed, the novel methods and systems described herein may be embodied in a variety of other forms; furthermore, various omissions, substitutions and changes in the form of the methods and systems described herein may be made without departing from the scope of the inventions.

Claims

CLAIMS:

1. A method of determining a potential clock frequency of a radar emitter, the method comprising: processing received pulses to obtain frequency data and pulse repetition interval, PRI, data from a single emitter; forming pairs within frequency data, performing a first frequency difference value calculation process, which comprises finding difference values in each pair of the frequency data to form a first frequency difference level, performing a second frequency difference value calculation process which comprises finding difference values for each pair of frequency difference values of the first frequency difference level to form a second frequency difference level, and replacing the values of the first frequency difference level with the values of the second frequency difference level, repeating the second frequency difference value calculation process until all non-zero values are of equal value, for every frequency difference level, finding factors of each frequency difference value in the frequency difference level, comparing the factor values of frequencies in each difference level to find any common factors; forming pairs within PRI data, performing a first PRI difference value calculation process, which comprises finding difference values in each pair of the PRI data to form a first PRI difference level, performing a second PRI difference value calculation process which comprises finding difference values for each pair of PRI difference values of the first PRI difference level to form a second PRI difference level, and replacing the values of the first PRI difference level with the values of the second PRI difference level, repeating the second PRI difference value calculation process until all non-zero values are of equal value, for every difference level of PRI, finding factors of each PRI difference value in the PRI difference level, comparing the factor values of PRI in each PRI difference level to find any common factors; arranging the common factor values in their frequency of appearance; re-applying the most frequent common factor value to the frequency and PRI data to obtain potential emitter clock frequency.

2. A method according to claim 1, wherein processing received pulses includes deinterleaving the received pulses.

3. A method according to claim 1 or 2, wherein frequency is obtained by analysing the phase.

4. A method according to any preceding claim, wherein the frequency is obtained by using quarter rate mixing.

5. A method according to any preceding claim, wherein the phase is obtained using the Rotate-Add-Decimate method.

6. A method according any preceding claim, further comprising a re-submission step, wherein the received pulses are re-processed.

7. A method according to claim 6, wherein the re-submission step comprises resampling the data using the obtained potential emitter frequency as a divisor of the sample rate.

8. A method according to claim 6 or 7, wherein the re-submission step occurs if a minimum threshold level determined by the receiver noise was exceeded.

9. An apparatus for determining a potential clock frequency of a radar emitter, the apparatus comprising: a processor configured to process received pulses to obtain frequency data and pulse repetition interval, PRI, data from a single emitter; a frequency pairer configured to form pairs within frequency data; a first frequency difference value calculator configured to perform a first frequency difference value calculation process, and comprising a first frequency difference level difference finder configured to find difference values in each pair of the frequency data to form a first frequency difference level; a second frequency difference value calculator configured to perform a second frequency difference value calculation process, and comprises a second frequency difference finder configured to find difference values for each pair of frequency difference values of the first frequency difference level to form a second frequency difference level, and a frequency difference level value replacer configured to replace the values of the first frequency difference level with the values of the second frequency difference level, wherein the second frequency difference value calculator is configured to repeat the second frequency difference value calculation process until all non-zero values are of equal value; a frequency factor finder configured to find factors of each frequency difference value in the frequency difference level, for every frequency difference level; a frequency common factor finder configured to compare the factor values of frequencies in each difference level to find any common factors; a PRI pairer configured to form pairs within PRI data; a first PRI difference value calculator configured to perform a first PRI difference value calculation process, and comprising a first PRI difference level difference finder configured to find difference values in each pair of the PRI data to form a first PRI difference level; a second PRI difference value calculator configured to perform a second PRI difference value calculation process, and comprises a second PRI difference finder configured to find difference values for each pair of PRI difference values of the first PRI difference level to form a second PRI difference level, and a PRI difference level value replacer configured to replace the values of the first PRI difference level with the values of the second PRI difference level, wherein the second PRI difference value calculator is configured to repeat the second PRI difference value calculation process until all non-zero values are of equal value; a PRI factor finder configured to find factors of each PRI difference value in the PRI difference level, for every PRI difference level; a PRI common factor finder configured to compare the factor values of frequencies in each difference level to find any common factors and arrange the common factor values in their frequency of appearance; a re-applicator configured to re-apply the most frequent common factor value to the frequency and PRI data to obtain potential emitter clock frequency.

10. An apparatus according to claim 9, wherein the processor comprises a deinterleaver for deinterleaving the received pulses.

11. An apparatus according to claim 9 or 10, wherein the processor is configured to obtain frequency by analysing the phase.

12. An apparatus according to any one of claims 9 to 11, wherein the processor is configured to use quarter rate mixing.

13. An apparatus according to any one of claims 9 to 11, wherein the processor is configured to obtain phase by using the Rotate-Add-Decimate method.

14. An apparatus according to any one of claims 9 to 11, wherein the reapplicator is configured to send the obtained potential emitter frequency as a divisor of the sample rate to the processor, to launch re-processing.

15. An apparatus according to claim 14, wherein the processor is configured to resample the data using the obtained potential emitter frequency as a divisor of the sample rate.

16. An apparatus according to claim 14 or 15, wherein the re-applicator is configured to send the obtained potential emitter frequency if a minimum threshold level determined by the receiver noise was exceeded.