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GB2432061A - Frequency synthesiser - Google Patents

Frequency synthesiser Download PDF

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Publication number
GB2432061A
GB2432061A GB0618224A GB0618224A GB2432061A GB 2432061 A GB2432061 A GB 2432061A GB 0618224 A GB0618224 A GB 0618224A GB 0618224 A GB0618224 A GB 0618224A GB 2432061 A GB2432061 A GB 2432061A
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United Kingdom
Prior art keywords
frequency
signal
phase lock
mixer
loop
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GB0618224A
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GB0618224D0 (en
Inventor
Dominic Thomas Parfrey Banham
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
RadioScape Ltd
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RadioScape Ltd
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Publication date
Application filed by RadioScape Ltd filed Critical RadioScape Ltd
Publication of GB0618224D0 publication Critical patent/GB0618224D0/en
Publication of GB2432061A publication Critical patent/GB2432061A/en
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Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03BGENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B21/00Generation of oscillations by combining unmodulated signals of different frequencies
    • H03B21/01Generation of oscillations by combining unmodulated signals of different frequencies by beating unmodulated signals of different frequencies
    • H03B21/02Generation of oscillations by combining unmodulated signals of different frequencies by beating unmodulated signals of different frequencies by plural beating, i.e. for frequency synthesis ; Beating in combination with multiplication or division of frequency
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03DDEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D7/00Transference of modulation from one carrier to another, e.g. frequency-changing
    • H03D7/16Multiple-frequency-changing
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03DDEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D7/00Transference of modulation from one carrier to another, e.g. frequency-changing
    • H03D7/16Multiple-frequency-changing
    • H03D7/161Multiple-frequency-changing all the frequency changers being connected in cascade
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • H03L7/185Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using a mixer in the loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/22Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop
    • H03L7/23Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop with pulse counters or frequency dividers
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L2207/00Indexing scheme relating to automatic control of frequency or phase and to synchronisation
    • H03L2207/12Indirect frequency synthesis using a mixer in the phase-locked loop

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

A frequency synthesizer is disclosed which incorporates two phase locked loops (PLLs). The loop reference frequencies are spaced by a small frequency difference approximately equal to the smallest frequency step required of the synthesiser. Fine resolution of frequency generation, wide output frequency range, improved response time, lower phase noise and decreased susceptibility to microphonic effects are reported. Embodiments employing two mixers (fig.3) and one mixer (figs. 1 & 2) are described. In the embodiments employing one mixer, the mixer may be arranged within one PLL (fig. 1), or it may receive signals from both loops (fig.2). Applications disclosed include: radio transmitters and receivers, and spreading the electromagnetic noise spectrum generated by an electronic device.

Description

<p>FREQUENCY SYNTHESIZER</p>
<p>BACKGROUND OF THE INVENTION</p>
<p>1. Field of the Invention</p>
<p>The field of the invention is phase-locked ioop (PLL) frequency synthesisers, and applications thereof.</p>
<p>2. Discussion of Related Art In a conventional phase-locked ioop frequency synthesiser, the smallest frequency step is determined by the comparison (or reference) frequency at which the phase detector operates.</p>
<p>In order to achieve a fine frequency resolution, it is therefore necessary to operate the phase detector at a low frequency. This leads to some undesirable characteristics of conventional phase-locked loop frequency synthesisers. For example, to maintain loop stability, the ioop bandwidth must be set significantly lower (usually by a factor of about 10) than the comparison/reference frequency. Because the ioop response time varies inversely with the ioop bandwidth, this means that the ioop response time is large, leading to long settling times when the frequency is changed, and to increased close-in phase noise, where close-in phase noise is the noise in the phase value as the frequency in the loop approaches the new target frequency. The reduction in loop bandwidth also increases susceptibility to inicrophonic effects, where microphonic effects are those in which electronic components convert mechanical perturbations into unwanted electrical signal noise. Therefore, known disadvantages of conventional phase-locked loop frequency synthesisers include long settling times when the frequency is changed, significant close-in phase noise, and increased susceptibility to trucrophonic effects. Some of these disadvantages have been noted in US4,234,939.</p>
<p>A number of methods are known which can overcome the disadvantages of conventional phase-locked ioop frequency synthesisers. The principal methods known which can overcome the disadvantages of conventional phase-locked ioop frequency synthesisers include the use of fractional-N loops and of direct digital synthesis (DDS). However, fractional-N loops are known to suffer from spurious output frequencies, and DDS devices are relatively expensive and have a relatively low operating frequency range.</p>
<p>Implementations of the present invention provide a phase-locked ioop frequency synthesiser that overcomes at least some of the known disadvantages of the alternatives to conventional phase-locked ioop frequency synthesisers; implementations avoid the output of spurious frequencies, are relatively low cost, and provide an acceptably large operating frequency range, or provide any one or more combinations of these advantages.</p>
<p>In an application of conventional phase-locked loop frequency synthesisers, an incoming radio frequency (RE) signal at a receiver is converted to a fixed intermediate frequency (IF).</p>
<p>But the RF frequency resolution is limited by the properties of the one or more conventional phase-locked loop frequency synthesisers utilized. An implementation of the invention addresses this.</p>
<p>Further applications of conventional phase-locked loop frequency synthesisers include their use in radio transmitters/receivers, radio/T\T receivers, their use in spreading the electromagnetic noise spectrum generated by an electronic device over an increased bandwidth by varying the operating frequency of the electronic device, and their use in varying the phase and frequency of the signals derived from feedback clocks in electronic circuitry such that the signals match the reference clock of the electronic circuitry. An improved phase-locked loop frequency synthesiser may replace conventional phase-locked loop frequency synthesisers in such applications.</p>
<p>SUMMARY OF THE INVENTION</p>
<p>An implementation of the invention provides a phase-locked loop frequency synthesiser with improved characteristics relative to conventional phase-locked loop frequency synthesisers. The improved characteristics may include reduced settling times when the frequency is changed, reduced close-in phase noise, and reduced susceptibility to microphonic effects. These improved characteristics may be achieved using a comparison/reference frequency at which the phase detector in the PLL operates which is significantly higher than in conventional PLL designs. The implementation requires a main PLL, which includes the phase detector. This main PLL takes as its input the comparison/reference frequency. There is an auxiliary PLL, which uses as its comparison/reference frequency a frequency that differs from the comparison/reference frequency used in the main PLL by a small amount, i, which is approximately equal to the smallest frequency step required to be used in the synthesiser or some submultiple thereof.</p>
<p>The higher comparison/reference frequencies of the two phase-locked loops (i.e. when compared with conventional PLLs) may lead to reduced settling times when the phase detector frequency is changed, for example, because the settling time is typically inversely proportional to the comparison frequency. In some embodiments of the invention, sum frequency generation between the two phase-locked loops may also be utili2ed in the overall frequency conversion process.</p>
<p>Embodiments of the invention provide systems with improved characteristics, where the improved characteristics derive from the improved characteristics of the phase-locked ioop frequency synthesisers described above. Such systems may include radio receivers and radio transmitters, for example, or receivers or transmitters which function in other parts of the electromagnetic spectrum, such as for optical wavelengths, which include infra-red, visible or ultra-violet wavelengths. Such systems may also include those in which the electromagnetic waves are transmitted along conducting wires, or along optically transmissive cables such as fibre optic cables. More specifically, applications which utilize such systems may include frequency division multiplexing on mains cables, on telephone lines, on optical fibres, or for electromagnetic waves which propagate in air or in a vacuum.</p>
<p>BRIEF DESCRIPTION OF THE DRAWINGS</p>
<p>Figure 1 is a phase-locked ioop frequency synthesiser circuit diagram.</p>
<p>Figure 2 is a phase-locked ioop frequency synthesiser circuit diagram Figure 3 is a phase-locked loop frequency synthesiser circuit diagram.</p>
<p>DETAILED DESCRIPTION</p>
<p>In one implementation, a frequency synthesiser includes two phase-locked loops 11 and 12 with high, but slightly different comparison/reference frequencies which enter the circuit via transmitting media 13 and 17, as shown in Figure 1. A fme resolution in the frequency generation process is achieved through the use of a small difference between the frequencies of the two reference signals. Means are supplied for generating the comparison frequencies.</p>
<p>In Figure 1, the two loops are the main loop 11 and the auxiliary loop 12; the main loop 11 produces the final output frequency which propagates in the transmitting medium 16. In Figure 1, elements 14 and 18 are phase detectors. In Figure 1, the frequency output of the auxiliary loop 12 is mixed at mixer 100 with the frequency output of the main loop 11 to produce the sum frequency and the difference frequency. The sum frequency or the difference frequency may be removed by filtering, leaving one remaining frequency. The one remaining frequency may then be used as the feedback term for the main loop. Typically, the difference frequency would be used as the feedback term for the main loop. Filtering is also employed elsewhere in the circuit of Figure 1.</p>
<p>In Figure 1, the reference frequencies for the main loop 11 and for the auxiliary loop 12 are RI and R2, respectively. These enter the circuit via transmitting media 13 and 17, respectively, and are chosen such that RI = P R2 = (P + I) i where P is a scale factor and i. is the desired step frequency, such that: i = R2 -RI.</p>
<p>The auxiliary loop 12 has a programmable feedback divider 19 operating with a ratio N2. A programmable feedback divider is an adjustable frequency changing device. It follows that the auxiliary loop generates a frequency Fa given by Faux.=N2(P+I)L To enable a wide frequency coverage, it is preferable that it should be possible to vary N2 over a range of values of the order of P. Hence it would be possible to vary Faux over a range of values of about P (P + I) L. The frequency Fa,, is subtracted from the output frequency F0 of the main loop 11 to provide the main loop's feedback term. The main loop 11, which has a programmable feedback divider 15 operating with a ratio NI, will lock when its frequency is given by the sum of its internally generated frequency NI P L and F,,,, i.e. when NIPi+N2(P+I)i (NI +N2)P+N2 From Figure 1, the output frequency F0 is equal to It can be seen from the above that if N2 is increased by 1, and NI is decreased by 1, F0will increase by & It is also evident that the value of P does not affect the step size & However, in order to achieve continuous frequency coverage, the auxiliary loop 12 should cover a frequency range of at least about P (P + I) i, which may put practical limits on the value of P. In some embodiments of the invention, RI and R2 may be derived from a common reference source, which may put further restrictions on practical values of P. In a further embodiment of the invention, shown in Figure 2, the outputs of the main loop 21 and of the auxiliary ioop 22 are mixed together at mixer 200 to generate the sum frequency and the difference frequency. In Figure 2, the reference frequencies enter the circuit via transmitting media 23 and 27, elements 24 and 28 are phase detectors, and elements 25 and 29 are integer dividers. A fme resolution in the frequency generation process is achieved through the use of a small difference between the frequencies of the two reference signals. Means are supplied for generating the comparison/reference frequencies.</p>
<p>In the case of the circuit shown in Figure 2, is Ni P & If the sum frequency is used as the output frequency F0 it follows that FOU, in Figure 2 in transmitting medium 26 will be given by F0 =NlP+N2(P+I)i (NI +N2)PA+N2A In a further embodiment of the invention, two phase-locked loops with high, but somewhat different, comparison frequencies may be used to provide high resolution tuning in a radio receiver. A fine resolution in the frequency conversion process from the input signal to the output signal is achieved through the use of a small difference between the frequencies of the first and second reference signals. Means are supplied for generating the comparison frequencies. In the embodiment of the invention shown in Figure 3, two integer-N phase locked loops 31 and 33 are used as local oscillators to perform two consecutive frequency conversions on an incoming RF signal, which enters the circuit via transmitting medium 30.</p>
<p>PLLI 31 has a reference frequency QI and a divider ratio MI. PLL2 33 has frequency reference Q2 and divider ratio M2. QI and Q2 are multiples of the desired step size ti such that QI = (P+I) i Q2 = P i where P is a scaling factor and we have the property that ti = QI -Q2. The first frequency conversion in the first signal mixer 36 takes the signal frequency S and converts it by sum frequency generation to IFI. IFI is therefore given by: IF1 = S + (P+I) L Ml The second frequency conversion in the second signal mixer 37 is a difference frequency conversion which converts IFI to the final output frequency 1F2 in transmitting medium 35 given by: 1F2= IFI -PAM2 The two frequency conversions are equivalent to a single frequency conversion with an output frequency given by 1F2 = S+(P+l)AMI-PAM2 = S+PA(M1-M2)+AM1 It will be seen from the above that if both Ml and M2 are increased by 1, the change in output frequency 1F2 will be A. It also follows that as IFI does not appear in the final equation for 1F2, the value of IFI is arbitrary to this extent, which implies that IF1 can be chosen according to other factors such as ease of filtering or the re-use of existing circuitry.</p>
<p>To allow continuous frequency coverage, IFI should vary over a range of about P (P+l) A. It will be apparent to those skilled in the art that the receiver of Figure 3 may be applied to receive electromagnetic waves within any of many regions of the electromagnetic spectrum, including regions such as those characteristic of radio waves, microwaves, infra-red radiation, visible radiation and ultra-violet radiation.</p>
<p>Within the circuits of Figures 1,2 or 3, or in other circuits of the invention, filtering may be employed to allow frequencies in a particular range to propagate, thereby blocking frequencies outside the said range.</p>
<p>In a further embodiment of the invention, more than one auxiliary ioop may be used. This has the advantage of restricting the tuning range required of the auxiliary oscillators or of the intermediate frequencies.</p>
<p>In a further embodiment of the invention, the value of A could be selectable using a computer program, rather than being fixed by the circuitry. One example of an application of this embodiment of the invention is an application in a radio receiver, where a variable value of A would enable one to scan a wide band of frequencies, or to receive broadcasts which are consistent with various different broadcasting standards.</p>
<p>In a further embodiment of the invention, if a sufficiently small step size L is used, the system may be used for automatic frequency control or for sample-timing adjustment in digital receiver or transmitter systems.</p>
<p>In further embodiments of the invention, the circuitry of Figures 1, 2 or 3 may be used to provide a reference for another P11. In further embodiments of the invention, one could combine two or more elements, where each element consists of the circuitry of Figures 1, 2 or 3, to enable the attainment of increased frequency resolution. This could be achieved for instance by utilising more than one auxiliary loop: this would have the benefit of limiting the frequency range over which the auxiliary loops are required to operate. In the consecutive conversion system of Figure 3, this would allow more stringent filtering of the intermediate frequencies.</p>
<p>A further embodiment of the invention consists of a transmitter of electromagnetic waves in which the apparatus of Figure 3 is employed to convett an input frequency into an output frequency for transmission, where the output frequency is different to the input frequency.</p>
<p>An example of the embodiment of the invention illustrated in Figure 3 now follows, but many further variants of the invention will be obvious to persons skilled in the art. In this example, the first P11 31 is taken to have a comparison frequency of 100 kHz, and the second PLL 33 is taken to have a comparison frequency of 99 kHz. This implies that A is I kHz and that P is 99. The incoming signal in transmitting medium 30 is taken to have a frequency S of 6.000 MHz; we wish to convert it to an 1F2 value of 45.000 MHz.</p>
<p>By setting Ml to 1,380 the first loop oscillator (LO) 32 is set to 138 MHz, giving a IF1 value of 138 + 6 = 144 MHz in transmitting medium 36. By setting M2 to 1,000 the second LO 34 is set to 99 MHz. The resulting 1F2 value in transmitting medium 35 is 144-9945.000 MHz, as desired.</p>
<p>Suppose now that one desires to convert an incoming signal of 5.999 MHz to 45.000 MHz using the same circuitry. Ml is increased by 1 step to 1,381, giving a first LO 32 now set to 138.1 MHz, which implies IFI = 5.999 + 138.1 = 144.099 MHz. If M2 is also mcreased by I step to 1,001 then the second LO 34 is now set to 99.099 MHz. The resulting 1F2 in transmitting medium 35 is still 45.000 MHz, as desired. It is evident that to ensure broad frequency coverage IFI should be capable of varying in frequency over a range of about (100 x 99) kHz = 9.9 MHz in this example, which is an acceptable range. It will be apparent to those skilled in the art that variations in Ml and M2 may be used to tune to an incoming RF signal which varies by any integer multiple of I kHz.</p>
<p>Those skilled in the art will appreciate that in some cases the frequency resolution which will be achieved in implementations of the invention may be approximately equal to A, rather than being exactly equal to A, for various reasons such as but not limited to the signal dispersion which may occur during signal propagation, the quantitative measure of frequency resolution adopted, or non-ideal behaviour of the elements of the circuits.</p>
<p>In terms of response times, the two PLLs 31 and 33 will have a bandwidth of about one tenth of their frequency i.e. about 10 kHz. This suggests a response time for each PLL of the order the reciprocal of these bandwidths i.e. of the order of 100 microseconds. In contrast, a conventional P11 with a phase detector comparison frequency of I kHz will have a bandwidth of about one tenth of I kHz which is about 100 Hz. This suggests a response time of the order the reciprocal of this bandwidth i.e. of the order of 10 milliseconds. These considerations provide an indication of the order of the reduced response time that may be achieved by the phase-locked loop frequency synthesizer which is an embodiment of the invention.</p>
<p>Various modifications and alterations of this invention will become apparent to those skilled in the art without departing from the scope of this invention, and it should be understood that this invention is not to be unduly limited to the illustrative embodiments set forth herein.</p>

Claims (1)

  1. <p>CLAIMS</p>
    <p>1. An apparatus for generating an output signal of a selected frequency comprising: means for generating first and second reference signals winch differ in frequency by A; a first signal mixer and a second signal mixer; a first phase lock ioop frequency locked to said first reference signal for providing a first mixing signal to said first signal mixer, said first phase lock ioop mcluding a first adjustable frequency changing device for changing the frequency of a signal within said first loop by an adjustable factor Ml; a second phase lock loop frequency locked to said second reference signal for providing a second mixing signal to said second signal mixer, said second phase lock loop including a second adjustable frequency changing device for changing the frequency of a signal within said second loop by an adjustable factor M2; wherein an input signal is mixed with the first mixing signal in the first signal mixer, thereby generating an output signal; wherein the output signal of the first signal mixer is mixed with the second mixing signal in the second signal mixer, thereby generating an output signal, said first and second phase lock loops controlling said first and second signal mixers respectively to provide an output from the second signal mixer whose frequency is determined by said Ml and M2 factors; and, wherein a fine resolution of approximately A in the frequency conversion process from the input signal to the output signal is achieved through the use of the small difference A between the frequencies of the first and second reference signals.</p>
    <p>2. A receiver of electromagnetic waves in which the apparatus of claim I is employed to convert a received input frequency to an output frequency winch is different to the received input frequency.</p>
    <p>3. A transmitter of electromagnetic waves in which the apparatus of claim I is employed to convert an input frequency into an output transmission frequency which is different to the mput frequency.</p>
    <p>4. An electronic device in winch the apparatus of claim I is employed to spread the electromagnetic noise spectrum generated by the electronic device over an increased bandwidth.</p>
    <p>5. Electronic circuitry in which the apparatus of claim I is employed in varying the phase and frequency of the signals derived from feedback clocks in the electronic circuitry such that the signals match the reference clock of the electronic circuitry.</p>
    <p>6. An electronic device in which the apparatus of claim I is employed to perform frequency division multiplexing.</p>
    <p>7. An apparatus comprising the apparatus of claim 1 in which one or more additional auxiliary loops are employed.</p>
    <p>8. An apparatus comprising the apparatus of claim i in which the difference between the first and second reference signal frequencies may be selected using a computer program.</p>
    <p>9. An apparatus comprising the apparatus of claim I in which the apparatus of claim I is employed in automatic frequency control or in sample-timing adjustment in digital receiver or transmitter systems 10. An apparatus comprising the apparatus of claim I in which the apparatus is employed to provide a reference signal for another phase locked loop.</p>
    <p>11. An apparatus which comprises at least one apparatus of claim I and a further apparatus of claim 1.</p>
    <p>12. An apparatus for generating an output signal of a selected frequency comprising: means for generating first and second reference signals which differ in frequency by L; a signal mixer; a first phase lock loop frequency locked to said first reference signal for providing a first mixing signal to said signal mixer, said first phase lock loop including a first adjustable frequency changing device for changing the frequency of a signal within said first loop by an adjustable factor Ml; a second phase lock loop frequency locked to said second reference signal for providing a second mixing signal to the signal mixer, said second phase lock loop including a second adjustable frequency changing device for changing the frequency of a signal within said second loop by an adjustable factor M2, said first and second phase lock loops controlling said mixer to provide an output signal which is determined by said Ml and M2 factors; wherein said apparatus is employed to spread the electromagnetic noise spectrum generated by an electronic device over an increased bandwidth by varying the operating frequency of the electronic device; and, wherein a fine resolution of approximately A in the frequency generation process is achieved through the use of the small difference A between the frequencies of the first and second reference signals.</p>
    <p>13. An apparatus for generating an output signal of a selected frequency comprising: means for generating first and second reference signals which differ in frequency by A; a signal mixer; a first phase lock ioop which includes said signal mixer where the first phase lock ioop frequency is a function of the first reference signal, said first phase lock loop including a first adjustable frequency changing device for changing the frequency of a signal within said first loop by an adjustable factor Ml; a second phase lock loop frequency locked to said second reference signal for providing a mixing signal to the signal mixer, said second phase lock loop including a second adjustable frequency changing device for changing the frequency of a signal within said second loop by an adjustable factor M2, said first and second phase lock loops controlling said mixer to provide an output signal which is taken from the first phase lock loop and is determined by said Ml and M2 factors; wherein said apparatus is employed to spread the electromagnetic noise spectrum generated by an electronic device over an increased bandwidth by varying the operating frequency of the electronic device; and, wherein a fine resolution of approximately A in the frequency generation process is achieved through the use of the small difference A between the frequencies of the first and second reference signals.</p>
    <p>14. An apparatus for generating an output signal of a selected frequency comprising: means for generating first and second reference signals which differ in frequency by A; a signal mixer; a first phase lock loop frequency locked to said first reference signal for providing a first mixing signal to said signal mixer, said first phase lock loop including a first adjustable frequency changing device for changing the frequency of a signal within said first loop by an adjustable factor Ml; a second phase lock ioop frequency locked to said second reference signal for providing a second mixing signal to the signal mixer, said second phase lock loop including a second adjustable frequency changing device for changing the frequency of a signal within said second ioop by an adjustable factor M2, said first and second phase lock loops controlling said mixer to provide an output signal which is determined by said MI and M2 factors; in which one or more additional auxiliary loops are employed; and, wherein a fine resolution of approximately i in the frequency generation process is achieved through the use of the small difference A between the frequencies of the first and second reference signals.</p>
    <p>15. An apparatus for generating an output signal of a selected frequency comprising: means for generating first and second reference signals which differ in frequency by A; a signal mixer; a first phase lock ioop which includes said signal mixer where the first phase lock ioop frequency is a function of the first reference signal, said first phase lock loop including a first adjustable frequency changing device for changing the frequency of a signal within said first loop by an adjustable factor Ml; a second phase lock loop frequency locked to said second reference signal for providing a mixing signal to the signal mixer, said second phase lock loop including a second adjustable frequency changing device for changing the frequency of a signal within said second loop by an adjustable factor M2, said first and second phase lock loops controlling said mixer to provide an output signal which is taken from the first phase lock ioop and is determined by said Ml and M2 factors; in which one or more additional auxiliary loops are employed; and, wherein a fine resolution of approximately A in the frequency generation process is achieved through the use of the small difference A between the frequencies of the first and second reference signals.</p>
    <p>16. An apparatus for generating an output signal of a selected frequency comprising: means for generating first and second reference signals which differ in frequency by A; a signal mixer; a first phase lock ioop frequency locked to said first reference signal for providing a first mixing signal to said signal mixer, said first phase lock ioop including a first adjustable frequency changing device for changing the frequency of a signal within said first loop by an adjustable factor Ml; a second phase lock loop frequency locked to said second reference signal for providing a second mixing signal to the signal mixer, said second phase lock ioop including a second adjustable frequency changing device for changing the frequency of a signal within said second loop by an adjustable factor M2, said first and second phase lock loops controlling said mixer to provide an output signal which is determined by said Ml and M2 factors; in which the difference between the first and second reference signal frequencies may be selected using a computer program; and, wherein a fine resolution of approximately A in the frequency generation process is achieved through the use of the small difference A between the frequencies of the first and second reference signals.</p>
    <p>17. An apparatus for generating an output signal of a selected frequency comprising: means for generating first and second reference signals which differ in frequency by A; a signal mixer; a first phase lock loop which includes said signal mixer where the first phase lock loop frequency is a function of the first reference signal, said first phase lock loop including a first adjustable frequency changing device for changing the frequency of a signal within said first loop by an adjustable factor Ml; a second phase lock loop frequency locked to said second reference signal for providing a mixing signal to the signal mixer, said second phase lock ioop including a second adjustable frequency changing device for changing the frequency of a signal within said second loop by an adjustable factor M2, said first and second phase lock loops controlling said mixer to provide an output signal which is taken from the first phase lock loop and is determined by said Ml and M2 factors; in which the difference between the first and second reference signal frequencies may be selected using a computer program; and, wherein a fine resolution of approximately A in the frequency generation process is achieved through the use of the small difference A between the frequencies of the first and second reference signals.</p>
    <p>18. An apparatus for generating an output signal of a selected frequency comprising: means for generating first and second reference signals which differ in frequency by A; a signal mixer; a first phase lock loop frequency locked to said first reference signal for providing a first mixing signal to said signal mixer, said first phase lock loop including a first adjustable frequency changing device for changing the frequency of a signal within said first loop by an adjustable factor Ml; a second phase lock ioop frequency locked to said second reference signal for providing a second mixing signal to the signal mixer, said second phase lock ioop including a second adjustable frequency changing device for changing the frequency of a signal within said second loop by an adjustable factor M2, said first and second phase lock loops controlling said mixer to provide an output signal which is determined by said Ml and M2 factors; in which the apparatus is employed to provide a reference for another phase locked loop; and, wherein a fine resolution of approximately A in the frequency generation process is achieved through the use of the small difference A between the frequencies of the first and second reference signals.</p>
    <p>19. An apparatus for generating an output signal of a selected frequency comprising: means for generating first and second reference signals which differ in frequency by A; a signal mixer; a first phase lock loop which includes said signal mixer where the first phase lock loop frequency is a function of the first reference signal, said first phase lock loop including a first adjustable frequency changing device for changing the frequency of a signal within said first loop by an adjustable factor Ml; a second phase lock loop frequency locked to said second reference signal for providing a mixing signal to the signal mixer, said second phase lock ioop including a second adjustable frequency changing device for changing the frequency of a signal within said second loop by an adjustable factor M2, said first and second phase lock loops controlling said mixer to provide an output signal which is taken from the first phase lock loop and is determined by said Ml and M2 factors; in which the apparatus is employed to provide a reference for another phase locked loop; and, wherein a fine resolution of approximately i in the frequency generation process is achieved through the use of the small difference between the frequencies of the first and second reference signals.</p>
    <p>-</p>
GB0618224A 2005-09-15 2006-09-15 Frequency synthesiser Withdrawn GB2432061A (en)

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GBGB0518842.0A GB0518842D0 (en) 2005-09-15 2005-09-15 Vernier synthesiser

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GB2432061A true GB2432061A (en) 2007-05-09

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GB0618224A Withdrawn GB2432061A (en) 2005-09-15 2006-09-15 Frequency synthesiser

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2099645A (en) * 1981-05-29 1982-12-08 Racal Res Ltd Frequency synthesisers
US5390346A (en) * 1994-01-21 1995-02-14 General Instrument Corporation Of Delaware Small frequency step up or down converters using large frequency step synthesizers
JPH11205137A (en) * 1998-01-14 1999-07-30 Matsushita Electric Ind Co Ltd PLL frequency synthesizer circuit
GB2402564A (en) * 2003-06-07 2004-12-08 Zarlink Semiconductor Ltd Multiple conversion tuner with reduced spuriae
WO2005074152A1 (en) * 2004-01-26 2005-08-11 Koninklijke Philips Electronics, N.V. Frequency generation for a multi-band ofdm based ultra wide-band radio

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4234929A (en) * 1979-09-24 1980-11-18 Harris Corporation Control device for a phase lock loop vernier frequency synthesizer
DE19708772A1 (en) * 1997-03-04 1998-06-25 Siemens Ag Signal frequency generation method
US6163684A (en) * 1997-08-01 2000-12-19 Microtune, Inc. Broadband frequency synthesizer
GB2354383A (en) * 1999-09-17 2001-03-21 Sony Uk Ltd Dual loop phase-locked loop
US6888580B2 (en) * 2001-02-27 2005-05-03 Ati Technologies Inc. Integrated single and dual television tuner having improved fine tuning
US6931243B2 (en) * 2001-12-21 2005-08-16 Texas Instruments Incorporated Fully integrated low noise multi-loop synthesizer with fine frequency resolution for HDD read channel and RF wireless local oscillator applications

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2099645A (en) * 1981-05-29 1982-12-08 Racal Res Ltd Frequency synthesisers
US5390346A (en) * 1994-01-21 1995-02-14 General Instrument Corporation Of Delaware Small frequency step up or down converters using large frequency step synthesizers
JPH11205137A (en) * 1998-01-14 1999-07-30 Matsushita Electric Ind Co Ltd PLL frequency synthesizer circuit
GB2402564A (en) * 2003-06-07 2004-12-08 Zarlink Semiconductor Ltd Multiple conversion tuner with reduced spuriae
WO2005074152A1 (en) * 2004-01-26 2005-08-11 Koninklijke Philips Electronics, N.V. Frequency generation for a multi-band ofdm based ultra wide-band radio

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GB0618224D0 (en) 2006-10-25
WO2007031788A1 (en) 2007-03-22
GB0518842D0 (en) 2005-10-26

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