GB2498241B - Operating a frequency synthesizer - Google Patents
Operating a frequency synthesizerInfo
- Publication number
- GB2498241B GB2498241B GB1218381.0A GB201218381A GB2498241B GB 2498241 B GB2498241 B GB 2498241B GB 201218381 A GB201218381 A GB 201218381A GB 2498241 B GB2498241 B GB 2498241B
- Authority
- GB
- United Kingdom
- Prior art keywords
- coarse
- frequency
- fine
- signal
- control signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/093—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/07—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop using several loops, e.g. for redundant clock signal generation
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/087—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using at least two phase detectors or a frequency and phase detector in the loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
- H03L7/113—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using frequency discriminator
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/22—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L2207/00—Indexing scheme relating to automatic control of frequency or phase and to synchronisation
- H03L2207/50—All digital phase-locked loop
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
A two-loop frequency synthesizer (PLL) is disclosed having a short locking time particularly suitable for use in a radio transceiver employing multiple carriers, e.g. a TD-LTE transceiver. A controller receives the values of a first control signal 6 associated with a fine frequency feedback loop and a second control signal 4 associated with a medium or coarse frequency feedback loop. The controller monitors the fine signal and adjusts the coarse signal based on the monitored signal. The synthesiser initially operates in a coarse tuning mode to make the frequency of oscillator 2 approach the desired frequency, and then in a fine tuning mode to achieve phase lock. If the required frequency is changed, the coarse control value is stored in memory 46 and the process is repeated. If the system is then required to return to the original frequency, the coarse control value in memory 46 is provided to the oscillator and the first step of coarse tuning may be avoided, thus providing a substantially reduced lock-in time. If the fine control signal goes out of range, both the coarse and fine values may be adjusted to maintain lock.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/IB2012/055697 WO2013057691A2 (en) | 2011-10-20 | 2012-10-18 | Operating a frequency synthesizer |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US13/277,305 US8666012B2 (en) | 2011-10-20 | 2011-10-20 | Operating a frequency synthesizer |
| GBGB1118128.6A GB201118128D0 (en) | 2011-10-20 | 2011-10-20 | Operating a frequency synthesizer |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| GB201218381D0 GB201218381D0 (en) | 2012-11-28 |
| GB2498241A GB2498241A (en) | 2013-07-10 |
| GB2498241B true GB2498241B (en) | 2013-12-25 |
Family
ID=47324713
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB1218381.0A Expired - Fee Related GB2498241B (en) | 2011-10-20 | 2012-10-12 | Operating a frequency synthesizer |
Country Status (1)
| Country | Link |
|---|---|
| GB (1) | GB2498241B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2567463B (en) * | 2017-10-12 | 2022-08-24 | Communications Audit Uk Ltd | Phase locked loop circuit |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7180377B1 (en) * | 2005-01-18 | 2007-02-20 | Silicon Clocks Inc. | Method and apparatus for a hybrid phase lock loop frequency synthesizer |
| US20070146083A1 (en) * | 2003-05-02 | 2007-06-28 | Jerrell Hein | Calibration of oscillator devices |
| US20100060366A1 (en) * | 2008-09-05 | 2010-03-11 | Yi-Lung Chen | Two-step vco calibration method |
| US7969248B1 (en) * | 2009-07-30 | 2011-06-28 | Lattice Semiconductor Corporation | Oscillator tuning for phase-locked loop circuit |
-
2012
- 2012-10-12 GB GB1218381.0A patent/GB2498241B/en not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070146083A1 (en) * | 2003-05-02 | 2007-06-28 | Jerrell Hein | Calibration of oscillator devices |
| US7180377B1 (en) * | 2005-01-18 | 2007-02-20 | Silicon Clocks Inc. | Method and apparatus for a hybrid phase lock loop frequency synthesizer |
| US20100060366A1 (en) * | 2008-09-05 | 2010-03-11 | Yi-Lung Chen | Two-step vco calibration method |
| US7969248B1 (en) * | 2009-07-30 | 2011-06-28 | Lattice Semiconductor Corporation | Oscillator tuning for phase-locked loop circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| GB2498241A (en) | 2013-07-10 |
| GB201218381D0 (en) | 2012-11-28 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 732E | Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977) |
Free format text: REGISTERED BETWEEN 20140102 AND 20140108 |
|
| 732E | Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977) |
Free format text: REGISTERED BETWEEN 20140109 AND 20140115 |
|
| PCNP | Patent ceased through non-payment of renewal fee |
Effective date: 20161012 |